RAM access protection violation detectionΒΆ

group sdl_ex_ram_access_protect

sdl_ex_ram_access_protect

This example demonstrates a functional test of the RAM access protection violation detection and handling for several different types accesses. The example generates a number of controller or non-controller fetch, write, or read violations from the CPU, CLA, and DMA as applicable to the device.

External Connections

  • None.

Watch Variables

  • violationISRFlag - Indicates that the access violation interrupt was triggered and called the ISR.

  • illegalISRFlag - Indicates that a CPU fetch violation interrupt was generated and the ITRAP ISR ran.

  • violationStatus - Access protection violation status flags read in the ISR.

  • violationAddr - Address at which the access violation occurred.

  • result - Status of a successful detection and handling of RAM access protection violations.