Test of ECC logic in Flash

group sdl_ex_flash_ecc_test

sdl_ex_flash_ecc_test

This example demonstrates how to test the Flash ECC logic functionality.

A software test of the Flash ECC logic can be performed with the help of ECC test registers. Using the test registers, you can generate both single bit errors and uncorrectable errors. For additional details on the implementation of this diagnostic, see the “SECDED Logic Correctness Check” section in the device technical reference manual.

External Connections

• None.

Note

When using the flash test mode, you should not execute code from Flash. Note the #pragma CODE_SECTION lines below.

Watch Variables

• nmiISRFlag - Indicates that the NMI was triggered and called the ISR.

• nmiStatus - NMI status flags read in the ISR.

• errorISRFlag - Indicates that the correctable ECC error interrupt was triggered and called the ISR.

• errorStatus - Error status flags read in the ISR, indicating whether an error was single-bit or uncorrectable.

• errorCount - Number of correctable errors detected read in the ISR.

• errorType - For a single-bit error, indicates whether it was in the data or ECC bits.

• dataOut - For a single-bit error, displays the corrected data.

• result - Status of a successful detection and handling of ECC errors.