Test of parity/ECC logic in SRAM

group sdl_ex_ram_ecc_parity_test

sdl_ex_ram_ecc_parity_test

This example demonstrates how to check the SRAM ECC or parity logic functionality.

Three types of SRAM errors are generated to demonstrate the use of the SRAM test modes and the checking of the related flag and information registers. These types are parity errors, correctable ECC errors, and uncorrectable ECC errors. See your device data sheet to determine which memories have ECC and which have parity.

The flow for most of these tests to to put the SRAM into a test mode that either allows the data to be written with an update to the ECC/parity or allows the ECC/parity to be written to directly. A bit or multiple bits at a location in that SRAM block are then flipped depending on the type of error being tested. The test mode is then disabled and a read is performed at that location, prompting the detection or correction of the error. This process is then repeated, moving to the next bit or pair of bits until all 32 bits of that location are tested.

Note that each SRAM (GS0, GS1, etc…) has its own wrapper logic, so this test should be performed for each SRAM in use.

On some devices, there is also a test of the EtherCAT RAM which initializes the EtherCAT RAM, introduces an error, and then reads location in the RAM to detect it. An NMI will occur if the error is correctly detected.

When debugging this example, single-stepping over parts of the code can cause the example to fail, as the error handling ISRs may be prevented from executing. If you run into this issue, instead of using the “step into” and “step over” to examine the code, place breakpoints and run from breakpoint to breakpoint to allow the interrupts to execute.

External Connections

  • None.

Watch Variables

  • nmiISRFlag - Indicates that the NMI was triggered and called the ISR.

  • nmiStatus - NMI status flags read in the ISR.

  • errorISRFlag - Indicates that the correctable RAM error interrupt was triggered and called the ISR.

  • errorStatus - Correctable RAM error status flags read in the ISR.

  • errorCount - Number of correctable errors detected read in the ISR.

  • errorAddr - Address at which the error was detected.

  • result - Status of a successful detection and handling of RAM errors.