diff --git a/freertos_driverlib_f28377s/.cproject b/freertos_driverlib_f28377s/.cproject index 7f55c59..8dcff98 100644 --- a/freertos_driverlib_f28377s/.cproject +++ b/freertos_driverlib_f28377s/.cproject @@ -1,108 +1,6 @@ - - - - - - - - - - - - - - - - - - - - - - - - - @@ -153,7 +51,6 @@ @@ -212,7 +109,7 @@ - + diff --git a/freertos_driverlib_f28377s/.settings/org.eclipse.core.resources.prefs b/freertos_driverlib_f28377s/.settings/org.eclipse.core.resources.prefs index de4f5b6..8d20865 100644 --- a/freertos_driverlib_f28377s/.settings/org.eclipse.core.resources.prefs +++ b/freertos_driverlib_f28377s/.settings/org.eclipse.core.resources.prefs @@ -14,18 +14,3 @@ encoding//CPU1_FLASH/print_support/subdir_vars.mk=UTF-8 encoding//CPU1_FLASH/sources.mk=UTF-8 encoding//CPU1_FLASH/subdir_rules.mk=UTF-8 encoding//CPU1_FLASH/subdir_vars.mk=UTF-8 -encoding//CPU1_RAM/FreeRTOS/Source/portable/CCS/C2000_C28x/subdir_rules.mk=UTF-8 -encoding//CPU1_RAM/FreeRTOS/Source/portable/CCS/C2000_C28x/subdir_vars.mk=UTF-8 -encoding//CPU1_RAM/FreeRTOS/Source/portable/MemMang/subdir_rules.mk=UTF-8 -encoding//CPU1_RAM/FreeRTOS/Source/portable/MemMang/subdir_vars.mk=UTF-8 -encoding//CPU1_RAM/FreeRTOS/Source/subdir_rules.mk=UTF-8 -encoding//CPU1_RAM/FreeRTOS/Source/subdir_vars.mk=UTF-8 -encoding//CPU1_RAM/device/subdir_rules.mk=UTF-8 -encoding//CPU1_RAM/device/subdir_vars.mk=UTF-8 -encoding//CPU1_RAM/makefile=UTF-8 -encoding//CPU1_RAM/objects.mk=UTF-8 -encoding//CPU1_RAM/print_support/subdir_rules.mk=UTF-8 -encoding//CPU1_RAM/print_support/subdir_vars.mk=UTF-8 -encoding//CPU1_RAM/sources.mk=UTF-8 -encoding//CPU1_RAM/subdir_rules.mk=UTF-8 -encoding//CPU1_RAM/subdir_vars.mk=UTF-8 diff --git a/freertos_driverlib_f28377s/2837xs_FreeRTOS_RAM_lnk.cmd b/freertos_driverlib_f28377s/2837xs_FreeRTOS_RAM_lnk.cmd deleted file mode 100644 index 6a152bc..0000000 --- a/freertos_driverlib_f28377s/2837xs_FreeRTOS_RAM_lnk.cmd +++ /dev/null @@ -1,103 +0,0 @@ -MEMORY -{ - /* BEGIN is used for the "boot to SARAM" bootloader mode */ - BEGIN : origin = 0x000000, length = 0x000002 - BOOT_RSVD : origin = 0x000002, length = 0x000121 /* Part of M0, BOOT rom will use this for stack */ - RAMM0 : origin = 0x000123, length = 0x0002DD - RAMM1 : origin = 0x000400, length = 0x0003F8 /* on-chip RAM block M1 */ -// RAMM1_RSVD : origin = 0x0007F8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */ - - /* - RAMLS0 : origin = 0x008000, length = 0x000800 // 2K - RAMLS1 : origin = 0x008800, length = 0x000800 // 2K - RAMLS2 : origin = 0x009000, length = 0x000800 // 2K - RAMLS3 : origin = 0x009800, length = 0x000800 // 2K - RAMLS4 : origin = 0x00A000, length = 0x000800 // 2K - RAMLS5 : origin = 0x00A800, length = 0x000800 // 2K - RAMD0 : origin = 0x00B000, length = 0x000800 // 2K - RAMD1 : origin = 0x00B800, length = 0x000800 // 2K - RAMGS0 : origin = 0x00C000, length = 0x001000 // 4K - RAMGS1 : origin = 0x00D000, length = 0x001000 // 4K - RAMGS2 : origin = 0x00E000, length = 0x001000 // 4K - RAMGS3 : origin = 0x00F000, length = 0x001000 // 4K - */ - RAMLSxDxGSx : origin = 0x008000, length = 0x008000 // 4K x 8 = 32K - - /* - RAMGS4 : origin = 0x010000, length = 0x001000 // 4K - RAMGS5 : origin = 0x011000, length = 0x001000 // 4K - RAMGS6 : origin = 0x012000, length = 0x001000 // 4K - RAMGS7 : origin = 0x013000, length = 0x001000 // 4K - RAMGS8 : origin = 0x014000, length = 0x001000 // 4K - RAMGS9 : origin = 0x015000, length = 0x001000 // 4K - RAMGS10 : origin = 0x016000, length = 0x001000 // 4K - RAMGS11 : origin = 0x017000, length = 0x001000 // 4K - RAMGS12 : origin = 0x018000, length = 0x001000 // 4K - RAMGS13 : origin = 0x019000, length = 0x001000 // 4K - RAMGS14 : origin = 0x01A000, length = 0x001000 // 4K - RAMGS15 : origin = 0x01B000, length = 0x000FF8 - RAMGS15_RSVD : origin = 0x017FF8, length = 0x000008 Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" - */ - RAMGSx : origin = 0x010000, length = 0x00BFF8 - - CANA_MSG_RAM : origin = 0x049000, length = 0x000800 - CANB_MSG_RAM : origin = 0x04B000, length = 0x000800 - - RESET : origin = 0x3FFFC0, length = 0x000002 - -} - -SECTIONS -{ - codestart : > BEGIN - .text : >> RAMLSxDxGSx - .cinit : > RAMM0 - .switch : > RAMM0 - .reset : > RESET, TYPE = DSECT /* not used */ - .stack : > RAMLSxDxGSx - - /* IMPORTANT: The FreeRTOS statically allocated stack should be allocated to this section only */ - .freertosStaticStack : >> RAMM1 | RAMM0 | RAMLSxDxGSx - - /* IMPORTANT: The FreeRTOS heap should be allocated to this section only as the C28x stack - memory can be allocated in the lower 64k RAM memory only. */ - .freertosHeap : > RAMLSxDxGSx - -#if defined(__TI_EABI__) - .bss : > RAMGSx - .bss:output : > RAMGSx - .init_array : > RAMM0 - .const : > RAMLSxDxGSx - .data : > RAMGSx - .sysmem : > RAMLSxDxGSx -#else - .pinit : > RAMM0 - .ebss : > RAMGSx - .econst : > RAMLSxDxGSx - .esysmem : > RAMLSxDxGSx -#endif - - /* - ramgs0 : > RAMGS0, PAGE = 1 - ramgs1 : > RAMGS1, PAGE = 1 - */ - ramm0 : > RAMM0, type=NOINIT - ramm1 : > RAMM1, type=NOINIT - - /* The following section definitions are for SDFM examples */ - /* - Filter1_RegsFile : > RAMGS1, PAGE = 1, fill=0x1111 - Filter2_RegsFile : > RAMGS2, PAGE = 1, fill=0x2222 - Filter3_RegsFile : > RAMGS3, PAGE = 1, fill=0x3333 - Filter4_RegsFile : > RAMGS4, PAGE = 1, fill=0x4444 - Difference_RegsFile : >RAMGS5, PAGE = 1, fill=0x3333 - */ - - .TI.ramfunc : {} > RAMM0 - -} - - -//=========================================================================== -// End of file. -//=========================================================================== diff --git a/freertos_driverlib_f28377s/main.c b/freertos_driverlib_f28377s/main.c index d847a02..20123cb 100644 --- a/freertos_driverlib_f28377s/main.c +++ b/freertos_driverlib_f28377s/main.c @@ -34,6 +34,11 @@ #include "uart_drv.h" #include "sci.h" +#define LED_R 41U // Red LED +#define LED_B 58U // Blue LED + +#define SCI_RXDA_PIN 85U +#define SCI_TXDA_PIN 84U // -------------------------------------------------------------------- @@ -61,9 +66,9 @@ uint8_t ucHeap[configTOTAL_HEAP_SIZE]; #endif // UART stdout redirection configuration related functions +int uart_count; void UartSetup(void); void UartPutChar(uint16_t charToWrite); -extern int checkPrintf(void); // -------------------------------------------------------------------- @@ -71,11 +76,13 @@ extern int checkPrintf(void); void configCPUTimer(uint32_t cpuTimer, uint32_t period_us); __interrupt void timer1_ISR(void); +// -------------------------------------------------------------------- void LED_TaskRed(void * pvParameters); void LED_TaskBlue(void * pvParameters); static SemaphoreHandle_t xSemaphore = NULL; +// -------------------------------------------------------------------- void main(void) { @@ -89,13 +96,13 @@ void main(void) Device_initGPIO(); - GPIO_setPadConfig(DEVICE_GPIO_PIN_LED1, GPIO_PIN_TYPE_STD); - GPIO_setDirectionMode(DEVICE_GPIO_PIN_LED1, GPIO_DIR_MODE_OUT); - GPIO_writePin(DEVICE_GPIO_PIN_LED1, 0); + GPIO_setPadConfig(LED_R, GPIO_PIN_TYPE_STD); + GPIO_setDirectionMode(LED_R, GPIO_DIR_MODE_OUT); + GPIO_writePin(LED_R, 0); - GPIO_setPadConfig(DEVICE_GPIO_PIN_LED2, GPIO_PIN_TYPE_STD); - GPIO_setDirectionMode(DEVICE_GPIO_PIN_LED2, GPIO_DIR_MODE_OUT); - GPIO_writePin(DEVICE_GPIO_PIN_LED2, 0); + GPIO_setPadConfig(LED_B, GPIO_PIN_TYPE_STD); + GPIO_setDirectionMode(LED_B, GPIO_DIR_MODE_OUT); + GPIO_writePin(LED_B, 0); // ------------------------------------------------------------------------ @@ -154,29 +161,6 @@ void main(void) // Assign stdout to be a UART device assert(freopen("uart:", "w", stdout) != NULL); - // printf() tests - checkPrintf(); - -// Ptr string = Hello world! -// printf test -// (null) is null pointer -// 5 = 5 -// 129 = - max int -// char a = 'a' -// hex ff = ff -// hex 00 = 00 -// signed -3 = unsigned 65533 = hex fffd -// 0 message(s) -// 0 message(s) with % -// justif: "left " -// justif: " right" -// 3: 0003 zero padded -// 3: 3 left justif. -// 3: 3 right justif. -// -3: -003 zero padded -// -3: -3 left justif. -// -3: -3 right justif. - // ------------------------------- FreeRTOS ------------------------------- xSemaphore = xSemaphoreCreateBinary(); @@ -219,7 +203,9 @@ void LED_TaskRed(void * pvParameters) { while(1) { if(xSemaphoreTake(xSemaphore, portMAX_DELAY) == pdTRUE) { // Toggle red LED - GPIO_togglePin(DEVICE_GPIO_PIN_LED1); + GPIO_togglePin(LED_R); + uart_count++; + printf("Hello from FreeRTOS running on the F28377S Coreboard, %d!\r\n", uart_count); } } } @@ -232,8 +218,8 @@ void LED_TaskRed(void * pvParameters) { void LED_TaskBlue(void * pvParameters) { while(1) { // Toggle blue LED - GPIO_togglePin(DEVICE_GPIO_PIN_LED2); - vTaskDelay(500 / portTICK_PERIOD_MS); + GPIO_togglePin(LED_B); + vTaskDelay(500); } } @@ -288,37 +274,42 @@ __interrupt void timer1_ISR(void) { // UartSetup - Configures SCIA void UartSetup(void) { - // DEVICE_GPIO_PIN_SCIRXDA is the SCI Rx pin - GPIO_setMasterCore(DEVICE_GPIO_PIN_SCIRXDA, GPIO_CORE_CPU1); - GPIO_setPinConfig(DEVICE_GPIO_CFG_SCIRXDA); - GPIO_setDirectionMode(DEVICE_GPIO_PIN_SCIRXDA, GPIO_DIR_MODE_IN); - GPIO_setPadConfig(DEVICE_GPIO_PIN_SCIRXDA, GPIO_PIN_TYPE_STD); - GPIO_setQualificationMode(DEVICE_GPIO_PIN_SCIRXDA, GPIO_QUAL_ASYNC); + // SCIA RX: GPIO85 + GPIO_setMasterCore(SCI_RXDA_PIN, GPIO_CORE_CPU1); + GPIO_setPinConfig(GPIO_85_SCIRXDA); + GPIO_setDirectionMode(SCI_RXDA_PIN, GPIO_DIR_MODE_IN); + GPIO_setPadConfig(SCI_RXDA_PIN, GPIO_PIN_TYPE_STD); + GPIO_setQualificationMode(SCI_RXDA_PIN, GPIO_QUAL_ASYNC); - // DEVICE_GPIO_PIN_SCITXDA is the SCI Tx pin - GPIO_setMasterCore(DEVICE_GPIO_PIN_SCITXDA, GPIO_CORE_CPU1); - GPIO_setPinConfig(DEVICE_GPIO_CFG_SCITXDA); - GPIO_setDirectionMode(DEVICE_GPIO_PIN_SCITXDA, GPIO_DIR_MODE_OUT); - GPIO_setPadConfig(DEVICE_GPIO_PIN_SCITXDA, GPIO_PIN_TYPE_STD); - GPIO_setQualificationMode(DEVICE_GPIO_PIN_SCITXDA, GPIO_QUAL_ASYNC); + // SCIA TX: GPIO84 + GPIO_setMasterCore(SCI_TXDA_PIN, GPIO_CORE_CPU1); + GPIO_setPinConfig(GPIO_84_SCITXDA); + GPIO_setDirectionMode(SCI_TXDA_PIN, GPIO_DIR_MODE_OUT); + GPIO_setPadConfig(SCI_TXDA_PIN, GPIO_PIN_TYPE_STD); + GPIO_setQualificationMode(SCI_TXDA_PIN, GPIO_QUAL_ASYNC); - // Initialize SCIA and its FIFO + // Configure SCIA SCI_performSoftwareReset(SCIA_BASE); - // Configure SCIA with FIFO - SCI_setConfig(SCIA_BASE, DEVICE_LSPCLK_FREQ, 9600, (SCI_CONFIG_WLEN_8 | - SCI_CONFIG_STOP_ONE | - SCI_CONFIG_PAR_NONE)); + SCI_setConfig(SCIA_BASE, + DEVICE_LSPCLK_FREQ, + 115200U, + SCI_CONFIG_WLEN_8 | + SCI_CONFIG_STOP_ONE | + SCI_CONFIG_PAR_NONE); + SCI_resetChannels(SCIA_BASE); SCI_resetRxFIFO(SCIA_BASE); SCI_resetTxFIFO(SCIA_BASE); + + // Recommended when using FIFO + SCI_clearInterruptStatus(SCIA_BASE, SCI_INT_TXFF | SCI_INT_RXFF); + SCI_enableFIFO(SCIA_BASE); SCI_enableModule(SCIA_BASE); SCI_performSoftwareReset(SCIA_BASE); - } - // UartPutChar - Implements SCI based putchar() void UartPutChar(uint16_t charToWrite) { SCI_writeCharBlockingFIFO(SCIA_BASE, charToWrite);