Update repo
This commit is contained in:
@@ -0,0 +1,50 @@
|
||||
<projectSpec>
|
||||
<project
|
||||
name="cla_ex1_asin_cpu1"
|
||||
device="TMS320F28377D"
|
||||
cgtVersion="22.6.0.LTS"
|
||||
products="C2000WARE"
|
||||
outputFormat="ELF"
|
||||
launchWizard="False"
|
||||
linkerCommandFile=""
|
||||
>
|
||||
<configuration name="CPU1_RAM" compilerBuildOptions="--opt_level=off -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} --define=CPU1 -v28 -ml -mt --cla_support=cla1 --float_support=fpu32 --tmu_support=tmu0 --vcu_support=vcu2 --diag_warning=225 --diag_suppress=10063 --display_error_number" linkerBuildOptions="--entry_point code_start --stack_size=0x100" />
|
||||
<configuration name="CPU1_FLASH" compilerBuildOptions="--opt_level=off -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} --define=_FLASH --define=CPU1 -v28 -ml -mt --cla_support=cla1 --float_support=fpu32 --tmu_support=tmu0 --vcu_support=vcu2 --diag_warning=225 --diag_suppress=10063 --display_error_number" linkerBuildOptions="--entry_point code_start --stack_size=0x100" />
|
||||
<pathVariable name="C2000WARE_DLIB_ROOT" path="../../../../driverlib" scope="project" />
|
||||
<file action="copy" path="../../../../../../device_support/f2837xd/common/include/driverlib.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2837xd/common/include/device.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2837xd/common/source/device.c" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2837xd/common/targetConfigs/TMS320F28377D.ccxml" targetDirectory="targetConfigs" />
|
||||
<file action="copy" path="../../../../../../device_support/f2837xd/common/cmd/2837xD_RAM_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_RAM" />
|
||||
<file action="copy" path="../../../../../../device_support/f2837xd/common/cmd/2837xD_FLASH_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_FLASH" />
|
||||
<file action="copy" path="../../../../driverlib/" targetDirectory="device" excludeFromBuild="True" />
|
||||
<file action="copy" path="../../../../../../device_support/f2837xd/common/source/F2837xD_CodeStartBranch.asm" targetDirectory="device" />
|
||||
<file action="link" path="../../../../driverlib/ccs/Debug/driverlib.lib" targetDirectory="" />
|
||||
<file action="copy" path="../cla_ex1_asin_cpu1.c" targetDirectory="" />
|
||||
</project>
|
||||
<project
|
||||
name="cla_ex1_asin_cpu2"
|
||||
device="TMS320F28377D"
|
||||
cgtVersion="22.6.0.LTS"
|
||||
products="C2000WARE"
|
||||
outputFormat="ELF"
|
||||
launchWizard="False"
|
||||
linkerCommandFile=""
|
||||
>
|
||||
<configuration name="CPU2_RAM" compilerBuildOptions="--opt_level=off -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} --define=CPU2 -v28 -ml -mt --cla_support=cla1 --float_support=fpu32 --tmu_support=tmu0 --vcu_support=vcu2 --diag_warning=225 --diag_suppress=10063 --display_error_number" linkerBuildOptions="--entry_point code_start --stack_size=0x100 --define=CLA_C" />
|
||||
<configuration name="CPU2_FLASH" compilerBuildOptions="--opt_level=off -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} --define=_FLASH --define=CPU2 -v28 -ml -mt --cla_support=cla1 --float_support=fpu32 --tmu_support=tmu0 --vcu_support=vcu2 --diag_warning=225 --diag_suppress=10063 --display_error_number" linkerBuildOptions="--entry_point code_start --stack_size=0x100 --define=CLA_C" />
|
||||
<pathVariable name="C2000WARE_DLIB_ROOT" path="../../../../driverlib" scope="project" />
|
||||
<file action="copy" path="../../../../../../device_support/f2837xd/common/include/driverlib.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2837xd/common/include/device.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2837xd/common/source/device.c" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2837xd/common/targetConfigs/TMS320F28377D.ccxml" targetDirectory="targetConfigs" />
|
||||
<file action="copy" path="../../../../../../device_support/f2837xd/common/cmd/2837xD_RAM_CLA_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU2_RAM" />
|
||||
<file action="copy" path="../../../../../../device_support/f2837xd/common/cmd/2837xD_FLASH_CLA_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU2_FLASH" />
|
||||
<file action="copy" path="../../../../driverlib/" targetDirectory="device" excludeFromBuild="True" />
|
||||
<file action="copy" path="../../../../../../device_support/f2837xd/common/source/F2837xD_CodeStartBranch.asm" targetDirectory="device" />
|
||||
<file action="link" path="../../../../driverlib/ccs/Debug/driverlib.lib" targetDirectory="" />
|
||||
<file action="copy" path="../cla_ex1_asin_cpu2.c" targetDirectory="" />
|
||||
<file action="copy" path="../cla_ex1_asin_shared.h" targetDirectory="" />
|
||||
<file action="copy" path="../cla_ex1_asin.cla" targetDirectory="" />
|
||||
</project>
|
||||
</projectSpec>
|
||||
@@ -0,0 +1,50 @@
|
||||
<projectSpec>
|
||||
<project
|
||||
name="cla_ex2_iir2p2z_cpu1"
|
||||
device="TMS320F28377D"
|
||||
cgtVersion="22.6.0.LTS"
|
||||
products="C2000WARE"
|
||||
outputFormat="ELF"
|
||||
launchWizard="False"
|
||||
linkerCommandFile=""
|
||||
>
|
||||
<configuration name="CPU1_RAM" compilerBuildOptions="--opt_level=off -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} --define=CPU1 -v28 -ml -mt --cla_support=cla1 --float_support=fpu32 --tmu_support=tmu0 --vcu_support=vcu2 --diag_warning=225 --diag_suppress=10063 --display_error_number" linkerBuildOptions="--entry_point code_start --stack_size=0x100" />
|
||||
<configuration name="CPU1_FLASH" compilerBuildOptions="--opt_level=off -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} --define=_FLASH --define=CPU1 -v28 -ml -mt --cla_support=cla1 --float_support=fpu32 --tmu_support=tmu0 --vcu_support=vcu2 --diag_warning=225 --diag_suppress=10063 --display_error_number" linkerBuildOptions="--entry_point code_start --stack_size=0x100" />
|
||||
<pathVariable name="C2000WARE_DLIB_ROOT" path="../../../../driverlib" scope="project" />
|
||||
<file action="copy" path="../../../../../../device_support/f2837xd/common/include/driverlib.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2837xd/common/include/device.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2837xd/common/source/device.c" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2837xd/common/targetConfigs/TMS320F28377D.ccxml" targetDirectory="targetConfigs" />
|
||||
<file action="copy" path="../../../../../../device_support/f2837xd/common/cmd/2837xD_RAM_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_RAM"/>
|
||||
<file action="copy" path="../../../../../../device_support/f2837xd/common/cmd/2837xD_FLASH_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_FLASH"/>
|
||||
<file action="copy" path="../../../../driverlib/" targetDirectory="device" excludeFromBuild="True" />
|
||||
<file action="copy" path="../../../../../../device_support/f2837xd/common/source/F2837xD_CodeStartBranch.asm" targetDirectory="device" />
|
||||
<file action="link" path="../../../../driverlib/ccs/Debug/driverlib.lib" targetDirectory="" />
|
||||
<file action="copy" path="../cla_ex2_iir2p2z_cpu1.c" targetDirectory="" />
|
||||
</project>
|
||||
<project
|
||||
name="cla_ex2_iir2p2z_cpu2"
|
||||
device="TMS320F28377D"
|
||||
cgtVersion="22.6.0.LTS"
|
||||
products="C2000WARE"
|
||||
outputFormat="ELF"
|
||||
launchWizard="False"
|
||||
linkerCommandFile=""
|
||||
>
|
||||
<configuration name="CPU2_RAM" compilerBuildOptions="--opt_level=off -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} --define=CPU2 -v28 -ml -mt --cla_support=cla1 --float_support=fpu32 --tmu_support=tmu0 --vcu_support=vcu2 --diag_warning=225 --diag_suppress=10063 --display_error_number" linkerBuildOptions="--entry_point code_start --stack_size=0x100 --define=CLA_C" />
|
||||
<configuration name="CPU2_FLASH" compilerBuildOptions="--opt_level=off -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} --define=_FLASH --define=CPU2 -v28 -ml -mt --cla_support=cla1 --float_support=fpu32 --tmu_support=tmu0 --vcu_support=vcu2 --diag_warning=225 --diag_suppress=10063 --display_error_number" linkerBuildOptions="--entry_point code_start --stack_size=0x100 --define=CLA_C" />
|
||||
<pathVariable name="C2000WARE_DLIB_ROOT" path="../../../../driverlib" scope="project" />
|
||||
<file action="copy" path="../../../../../../device_support/f2837xd/common/include/driverlib.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2837xd/common/include/device.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2837xd/common/source/device.c" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2837xd/common/targetConfigs/TMS320F28377D.ccxml" targetDirectory="targetConfigs" />
|
||||
<file action="copy" path="../../../../../../device_support/f2837xd/common/cmd/2837xD_RAM_CLA_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU2_RAM" />
|
||||
<file action="copy" path="../../../../../../device_support/f2837xd/common/cmd/2837xD_FLASH_CLA_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU2_FLASH" />
|
||||
<file action="copy" path="../../../../driverlib/" targetDirectory="device" excludeFromBuild="True" />
|
||||
<file action="copy" path="../../../../../../device_support/f2837xd/common/source/F2837xD_CodeStartBranch.asm" targetDirectory="device" />
|
||||
<file action="link" path="../../../../driverlib/ccs/Debug/driverlib.lib" targetDirectory="" />
|
||||
<file action="copy" path="../cla_ex2_iir2p2z_cpu2.c" targetDirectory="" />
|
||||
<file action="copy" path="../cla_ex2_iir2p2z_shared.h" targetDirectory="" />
|
||||
<file action="copy" path="../cla_ex2_iir2p2z.cla" targetDirectory="" />
|
||||
</project>
|
||||
</projectSpec>
|
||||
@@ -0,0 +1,144 @@
|
||||
//#############################################################################
|
||||
//
|
||||
// FILE: cla_ex1_asin.cla
|
||||
//
|
||||
// TITLE: Arc Sine example
|
||||
//
|
||||
//#############################################################################
|
||||
//
|
||||
//
|
||||
// $Copyright:
|
||||
// Copyright (C) 2013-2024 Texas Instruments Incorporated - http://www.ti.com/
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// $
|
||||
//#############################################################################
|
||||
|
||||
//
|
||||
// Included Files
|
||||
//
|
||||
#include "cla_ex1_asin_shared.h"
|
||||
|
||||
//
|
||||
// function definitions
|
||||
//
|
||||
//Task 1 : Calculate asin(X)
|
||||
// Description:
|
||||
// Step(1): Calculate absolute of the input X
|
||||
//
|
||||
// Step(2): Use the upper 6-bits of input "X" value as an
|
||||
// index into the table to obtain the coefficients
|
||||
// for a second order equation:
|
||||
//
|
||||
// _FPUasinTable:
|
||||
// CoeffA0[0]
|
||||
// CoeffA1[0]
|
||||
// CoeffA2[0]
|
||||
// .
|
||||
// .
|
||||
// CoeffA0[63]
|
||||
// CoeffA1[63]
|
||||
// CoeffA2[63]
|
||||
//
|
||||
// Step(3): Calculate the angle using the following equation:
|
||||
//
|
||||
// arctan(Ratio) = A0 + A1*Ratio + A2*Ratio*Ratio
|
||||
// arctan(Ratio) = A0 + Ratio(A1 + A2*Ratio)
|
||||
//
|
||||
// Step(4): The final angle is determined as follows:
|
||||
//
|
||||
// if( X < 0 )
|
||||
// Angle = -Angle
|
||||
__attribute__((interrupt)) void Cla1Task1 ( void )
|
||||
{
|
||||
//Local Variables
|
||||
int xTblIdx; //integer valued Table index
|
||||
float A0,A1,A2; //Table coefficients
|
||||
float *entry;
|
||||
float result;
|
||||
|
||||
//Preprocessing
|
||||
__mdebugstop();
|
||||
xTblIdx = fVal * TABLE_SIZE_M_1; //convert table index to u16-bits
|
||||
xTblIdx = xTblIdx * 3; //Table is ordered as 3 32-bit coefficients, the
|
||||
//index points to these triplets, hence the *3*sizeof(float)
|
||||
entry = &CLAasinTable[xTblIdx];
|
||||
A0 = *entry++;
|
||||
A1 = *entry++;
|
||||
A2 = *entry;
|
||||
|
||||
result = A0 + fVal*(A1 + A2*fVal);
|
||||
|
||||
//Post processing
|
||||
if(fVal < 0)
|
||||
{
|
||||
result = - result;
|
||||
}
|
||||
|
||||
fResult = result;
|
||||
}
|
||||
|
||||
__attribute__((interrupt)) void Cla1Task2 ( void )
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
__attribute__((interrupt)) void Cla1Task3 ( void )
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
__attribute__((interrupt)) void Cla1Task4 ( void )
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
__attribute__((interrupt)) void Cla1Task5 ( void )
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
__attribute__((interrupt)) void Cla1Task6 ( void )
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
__attribute__((interrupt)) void Cla1Task7 ( void )
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
__attribute__((interrupt)) void Cla1Task8 ( void )
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
//
|
||||
// End of file
|
||||
//
|
||||
@@ -0,0 +1,193 @@
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: cla_ex1_asin_cpu1.c
|
||||
//
|
||||
// TITLE: CLA Arcsine Example for F2837xD.
|
||||
//
|
||||
//! \addtogroup dual_example_list
|
||||
//! <h1>CLA \f$arcsine(x)\f$ using a lookup table (cla_asin_cpu01)</h1>
|
||||
//!
|
||||
//! In this example, cpu1 will be used to initialize the clocks for cpu2.cla1.
|
||||
//! Task 1 of the CLA on cpu2 will calculate the arcsine of
|
||||
//! an input argument in the range (-1.0 to 1.0) using a lookup table.
|
||||
//!
|
||||
//! \b Memory \b Allocation \n
|
||||
//! - CLA1 Math Tables (RAMLS0)
|
||||
//! - CLAasinTable - Lookup table
|
||||
//! - CLA1 to CPU Message RAM
|
||||
//! - fResult - Result of the lookup algorithm
|
||||
//! - CPU to CLA1 Message RAM
|
||||
//! - fVal - Sample input to the lookup algorithm
|
||||
//!
|
||||
//! \b Watch \b Variables \n
|
||||
//! - fVal - Argument to task 1
|
||||
//! - fResult - Result of \f$arcsin(fVal)\f$
|
||||
//!
|
||||
//! \note CPU2 must turn on the CLA clock by writing a 1 to
|
||||
//! CpuSysRegs.PCLKCR0.bit.CLA1.
|
||||
//!
|
||||
//
|
||||
//#############################################################################
|
||||
//
|
||||
//
|
||||
// $Copyright:
|
||||
// Copyright (C) 2013-2024 Texas Instruments Incorporated - http://www.ti.com/
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// $
|
||||
//#############################################################################
|
||||
|
||||
//
|
||||
// Included Files
|
||||
//
|
||||
#include "driverlib.h"
|
||||
#include "device.h"
|
||||
#include "inc/hw_ipc.h"
|
||||
|
||||
//
|
||||
// Globals
|
||||
//
|
||||
uint16_t pass=0;
|
||||
uint16_t fail=0;
|
||||
|
||||
//
|
||||
// Function Prototypes
|
||||
//
|
||||
void initCpuXCla1(void);
|
||||
|
||||
//
|
||||
// Main
|
||||
//
|
||||
void main(void)
|
||||
{
|
||||
//
|
||||
// Initialize device clock and peripherals
|
||||
//
|
||||
Device_init();
|
||||
|
||||
#ifdef _STANDALONE
|
||||
#ifdef _FLASH
|
||||
//
|
||||
// Send boot command to allow the CPU2 application to begin execution
|
||||
//
|
||||
Device_bootCPU2(C1C2_BROM_BOOTMODE_BOOT_FROM_FLASH);
|
||||
#else
|
||||
//
|
||||
// Send boot command to allow the CPU2 application to begin execution
|
||||
//
|
||||
Device_bootCPU2(C1C2_BROM_BOOTMODE_BOOT_FROM_RAM);
|
||||
|
||||
#endif // _FLASH
|
||||
#endif // _STANDALONE
|
||||
|
||||
//
|
||||
// Disable pin locks and enable internal pullups.
|
||||
//
|
||||
Device_initGPIO();
|
||||
|
||||
//
|
||||
// Disable global interrupts.
|
||||
//
|
||||
DINT;
|
||||
|
||||
//
|
||||
// Initialize PIE and clear PIE registers. Disables CPU interrupts.
|
||||
//
|
||||
Interrupt_initModule();
|
||||
|
||||
//
|
||||
// Initialize the PIE vector table with pointers to the shell Interrupt
|
||||
// Service Routines (ISR).
|
||||
//
|
||||
Interrupt_initVectorTable();
|
||||
|
||||
//
|
||||
// Turn on the CLA clocks on both CPUs.
|
||||
//
|
||||
initCpuXCla1();
|
||||
|
||||
//
|
||||
// Enable global Interrupts and higher priority real-time debug events:
|
||||
//
|
||||
EINT; // Enable Global interrupt INTM
|
||||
ERTM; // Enable Global real-time interrupt DBGM
|
||||
|
||||
while(1);
|
||||
}
|
||||
|
||||
//
|
||||
// initCpuXCla1 - Enable CLA1 on CPU1 and CPU2
|
||||
//
|
||||
void initCpuXCla1(void)
|
||||
{
|
||||
uint16_t ipcFlag = 5U;
|
||||
|
||||
#ifdef CPU1
|
||||
EALLOW;
|
||||
//
|
||||
// Enable CPU1 CLA1
|
||||
//
|
||||
HWREG(DEVCFG_BASE + SYSCTL_O_DC1) |= SYSCTL_DC1_CPU1_CLA1;
|
||||
|
||||
//
|
||||
// Enable CPU2 CLA1
|
||||
//
|
||||
HWREG(DEVCFG_BASE + SYSCTL_O_DC1) |= SYSCTL_DC1_CPU2_CLA1;
|
||||
|
||||
EDIS;
|
||||
#endif //CPU1
|
||||
|
||||
//
|
||||
// Send IPC flag 5 to CPU2
|
||||
//
|
||||
HWREG(IPC_BASE + IPC_O_SET) = 1UL << ipcFlag;
|
||||
|
||||
//
|
||||
// Wait for IPC flag 5 from CPU2
|
||||
//
|
||||
while((HWREG(IPC_BASE + IPC_O_STS) & (1UL << ipcFlag)) == 0x00000000UL)
|
||||
{
|
||||
}
|
||||
|
||||
//
|
||||
// ACK IPC flag 5 for CPU2
|
||||
//
|
||||
HWREG(IPC_BASE + IPC_O_ACK) = 1UL << ipcFlag;
|
||||
|
||||
//
|
||||
// Wait for ACK of IPC flag 5 from CPU2
|
||||
//
|
||||
while((HWREG(IPC_BASE + IPC_O_FLG) & (1UL << ipcFlag)) != 0x00000000UL)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// End of file
|
||||
//
|
||||
@@ -0,0 +1,597 @@
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: cla_ex1_asin_cpu2.c
|
||||
//
|
||||
// TITLE: CLA Arcsine Example for F2837xD.
|
||||
//
|
||||
// Dual Core arcsine example. This example demonstrates how to run CLA tasks
|
||||
// on cpu2.cla1
|
||||
//
|
||||
//#############################################################################
|
||||
//
|
||||
//
|
||||
// $Copyright:
|
||||
// Copyright (C) 2013-2024 Texas Instruments Incorporated - http://www.ti.com/
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// $
|
||||
//#############################################################################
|
||||
|
||||
//
|
||||
// Included Files
|
||||
//
|
||||
#include "driverlib.h"
|
||||
#include "device.h"
|
||||
#include "inc/hw_ipc.h"
|
||||
#include "cla_ex1_asin_shared.h"
|
||||
|
||||
//
|
||||
// Defines
|
||||
//
|
||||
#define WAITSTEP asm(" RPT #255 || NOP")
|
||||
|
||||
//
|
||||
// Globals
|
||||
//
|
||||
//Task 1 (C) Variables
|
||||
// NOTE: Do not initialize the Message RAM variables globally, they will be
|
||||
// reset during the message ram initialization phase in the CLA memory
|
||||
// configuration routine
|
||||
//
|
||||
#ifdef __cplusplus
|
||||
#pragma DATA_SECTION("CpuToCla1MsgRAM");
|
||||
float fVal;
|
||||
#pragma DATA_SECTION("Cla1ToCpuMsgRAM");
|
||||
float fResult;
|
||||
#else
|
||||
#pragma DATA_SECTION(fVal,"CpuToCla1MsgRAM");
|
||||
float fVal;
|
||||
#pragma DATA_SECTION(fResult,"Cla1ToCpuMsgRAM");
|
||||
float fResult;
|
||||
#endif //__cplusplus
|
||||
float y[BUFFER_SIZE];
|
||||
|
||||
//
|
||||
//Task 2 (C) Variables
|
||||
//
|
||||
|
||||
//
|
||||
//Task 3 (C) Variables
|
||||
//
|
||||
|
||||
//
|
||||
//Task 4 (C) Variables
|
||||
//
|
||||
|
||||
//
|
||||
//Task 5 (C) Variables
|
||||
//
|
||||
|
||||
//
|
||||
//Task 6 (C) Variables
|
||||
//
|
||||
|
||||
//
|
||||
//Task 7 (C) Variables
|
||||
//
|
||||
|
||||
//
|
||||
//Task 8 (C) Variables
|
||||
//
|
||||
|
||||
//
|
||||
//Common (C) Variables
|
||||
//The Exponential table
|
||||
//
|
||||
#ifdef __cplusplus
|
||||
#pragma DATA_SECTION("CLADataLS0")
|
||||
#else
|
||||
#pragma DATA_SECTION(CLAasinTable,"CLADataLS0")
|
||||
#endif //__cplusplus
|
||||
float CLAasinTable[]={
|
||||
0.0, 1.0, 0.0,
|
||||
0.000000636202, 0.999877862610, 0.007815361896,
|
||||
0.000005099694, 0.999510644409, 0.015647916155,
|
||||
0.000017268312, 0.998895919094, 0.023514960332,
|
||||
0.000041121765, 0.998029615282, 0.031434003631,
|
||||
0.000080794520, 0.996905974725, 0.039422875916,
|
||||
0.000140631089, 0.995517492804, 0.047499840611,
|
||||
0.000225244584, 0.993854840311, 0.055683712914,
|
||||
0.000339579512, 0.991906765146, 0.063993984848,
|
||||
0.000488979852, 0.989659972212, 0.072450958820,
|
||||
0.000679263611, 0.987098979366, 0.081075891529,
|
||||
0.000916805182, 0.984205946802, 0.089891150305,
|
||||
0.001208627040, 0.980960476685, 0.098920384204,
|
||||
0.001562502549, 0.977339379243, 0.108188712551,
|
||||
0.001987071928, 0.973316400729, 0.117722933997,
|
||||
0.002491973784, 0.968861907789, 0.127551759665,
|
||||
0.003087995053, 0.963942521723, 0.137706074532,
|
||||
0.003787242692, 0.958520694794, 0.148219231941,
|
||||
0.004603341138, 0.952554219267, 0.159127386977,
|
||||
0.005551660294, 0.945995657913, 0.170469875522,
|
||||
0.006649579796, 0.938791682505, 0.182289647088,
|
||||
0.007916796475, 0.930882303984, 0.194633761132,
|
||||
0.009375683410, 0.922199974574, 0.207553958472,
|
||||
0.011051710808, 0.912668537890, 0.221107321885,
|
||||
0.012973941175, 0.902201997769, 0.235357042896,
|
||||
0.015175614174, 0.890703070035, 0.250373315541,
|
||||
0.017694840102, 0.878061473098, 0.266234382514,
|
||||
0.020575425537, 0.864151902887, 0.283027765009,
|
||||
0.023867860513, 0.848831624374, 0.300851714968,
|
||||
0.027630504055, 0.831937595031, 0.319816937941,
|
||||
0.031931014547, 0.813283013821, 0.340048646894,
|
||||
0.036848083955, 0.792653161200, 0.361689022958,
|
||||
0.042473551274, 0.769800358920, 0.384900179460,
|
||||
0.048914992206, 0.744437830278, 0.409867752228,
|
||||
0.056298910750, 0.716232177740, 0.436805274317,
|
||||
0.064774696786, 0.684794109766, 0.465959540059,
|
||||
0.074519565699, 0.649666934178, 0.497617226179,
|
||||
0.085744766889, 0.610312179660, 0.532113122767,
|
||||
0.098703445606, 0.566091493186, 0.569840443472,
|
||||
0.113700678529, 0.516243664372, 0.611263845480,
|
||||
0.131106395009, 0.459855210927, 0.656936015611,
|
||||
0.151372169232, 0.395822366759, 0.707518998893,
|
||||
0.175053263659, 0.322801460177, 0.763811905770,
|
||||
0.202837883870, 0.239143420888, 0.826787304376,
|
||||
0.235586468765, 0.142806299514, 0.897639596948,
|
||||
0.274385149825, 0.031236880585, 0.977850174820,
|
||||
0.320619535938, -0.098791845166, 1.069276441800,
|
||||
0.376078169620, -0.251407364538, 1.174275392129,
|
||||
0.443100143614, -0.431959397725, 1.295878193174,
|
||||
0.524789871827, -0.647485610469, 1.438041695773,
|
||||
0.625336471263, -0.907400624736, 1.606018804842,
|
||||
0.750500589935, -1.224540947101, 1.806917563896,
|
||||
0.908377657341, -1.616794995066, 2.050569262035,
|
||||
1.110633894185, -2.109729648039, 2.350920816737,
|
||||
1.374584721437, -2.740985157716, 2.728353889708,
|
||||
1.726848242753, -3.567962877198, 3.213722960014,
|
||||
2.210117561056, -4.682006534082, 3.855770086891,
|
||||
2.896554011854, -6.236312386687, 4.735651038017,
|
||||
3.916505715382, -8.505488022524, 5.997790945975,
|
||||
5.526855868703, -12.026617159136, 7.922628470498,
|
||||
8.298197116322, -17.983705080358, 11.123941286820,
|
||||
13.741706072449, -29.488929624542, 17.203344479111,
|
||||
27.202707817485, -57.466598393615, 31.741016484669,
|
||||
83.158101335898, -171.803399517566, 90.149831709374
|
||||
};
|
||||
|
||||
float asin_expected[BUFFER_SIZE]={
|
||||
1.570796, 1.393789, 1.320141, 1.263401, 1.215375,
|
||||
1.172892, 1.134327, 1.098718, 1.065436, 1.034046,
|
||||
1.004232, 0.9757544, 0.9484279, 0.9221048, 0.8966658,
|
||||
0.8720123, 0.8480621, 0.8247454, 0.8020028, 0.7797828,
|
||||
0.7580408, 0.7367374, 0.7158381, 0.6953120, 0.6751316,
|
||||
0.6552721, 0.6357113, 0.6164289, 0.5974064, 0.5786270,
|
||||
0.5600753, 0.5417370, 0.5235988, 0.5056486, 0.4878751,
|
||||
0.4702678, 0.4528166, 0.4355124, 0.4183464, 0.4013104,
|
||||
0.3843968, 0.3675981, 0.3509074, 0.3343180, 0.3178237,
|
||||
0.3014185, 0.2850964, 0.2688521, 0.2526802, 0.2365756,
|
||||
0.2205333, 0.2045484, 0.1886164, 0.1727327, 0.1568929,
|
||||
0.1410927, 0.1253278, 0.1095943, 0.09388787, 0.07820469,
|
||||
0.06254076, 0.04689218, 0.03125509, 0.01562564
|
||||
};
|
||||
|
||||
uint16_t pass=0;
|
||||
uint16_t fail=0;
|
||||
|
||||
//
|
||||
// Function Prototypes
|
||||
//
|
||||
void runTest(void);
|
||||
void configClaMemory(void);
|
||||
void initCpu2Cla1(void);
|
||||
|
||||
__interrupt void cla1Isr1();
|
||||
__interrupt void cla1Isr2();
|
||||
__interrupt void cla1Isr3();
|
||||
__interrupt void cla1Isr4();
|
||||
__interrupt void cla1Isr5();
|
||||
__interrupt void cla1Isr6();
|
||||
__interrupt void cla1Isr7();
|
||||
__interrupt void cla1Isr8();
|
||||
|
||||
//
|
||||
// Main
|
||||
//
|
||||
void main(void)
|
||||
{
|
||||
//
|
||||
// Initialize device clock and peripherals
|
||||
//
|
||||
Device_init();
|
||||
|
||||
//
|
||||
// Initialize GPIO and configure the GPIO pin as a push-pull output
|
||||
//
|
||||
// This is configured by CPU1
|
||||
|
||||
//
|
||||
// Initialize PIE and clear PIE registers. Disables CPU interrupts.
|
||||
//
|
||||
Interrupt_initModule();
|
||||
|
||||
//
|
||||
// Initialize the PIE vector table with pointers to the shell Interrupt
|
||||
// Service Routines (ISR).
|
||||
//
|
||||
Interrupt_initVectorTable();
|
||||
|
||||
//
|
||||
// Configure the CLA memory spaces first followed by
|
||||
// the CLA task vectors.
|
||||
//
|
||||
configClaMemory();
|
||||
initCpu2Cla1();
|
||||
|
||||
//
|
||||
// Enable global Interrupts and higher priority real-time debug events:
|
||||
//
|
||||
EINT; // Enable Global interrupt INTM
|
||||
ERTM; // Enable Global realtime interrupt DBGM
|
||||
|
||||
//
|
||||
// Run the test
|
||||
//
|
||||
runTest();
|
||||
|
||||
while(1);
|
||||
}
|
||||
|
||||
//
|
||||
// runTest - Run CLA test
|
||||
//
|
||||
void runTest(void)
|
||||
{
|
||||
int16_t i, error;
|
||||
|
||||
for(i = 0; i < BUFFER_SIZE; i++)
|
||||
{
|
||||
fVal= (float)(BUFFER_SIZE - i)/(float)BUFFER_SIZE;
|
||||
|
||||
//
|
||||
// Force Task 1 and wait
|
||||
//
|
||||
asm(" IACK #0x0001");
|
||||
asm(" RPT #3 || NOP");
|
||||
while(CLA_getTaskRunStatus(CLA1_BASE, CLA_TASK_1))
|
||||
{
|
||||
}
|
||||
WAITSTEP;
|
||||
|
||||
y[i] = fResult;
|
||||
error = fabs(asin_expected[i]-y[i]);
|
||||
|
||||
if(error < 0.1)
|
||||
{
|
||||
pass++;
|
||||
}
|
||||
else
|
||||
{
|
||||
fail++;
|
||||
}
|
||||
}
|
||||
|
||||
#if 0
|
||||
|
||||
//
|
||||
// Force Task 2 and wait
|
||||
//
|
||||
asm(" IACK #0x0002");
|
||||
asm(" RPT #3 || NOP");
|
||||
while(CLA_getTaskRunStatus(CLA1_BASE, CLA_TASK_2))
|
||||
{
|
||||
}
|
||||
WAITSTEP;
|
||||
|
||||
//
|
||||
// Force Task 3 and wait
|
||||
//
|
||||
asm(" IACK #0x0004");
|
||||
asm(" RPT #3 || NOP");
|
||||
while(CLA_getTaskRunStatus(CLA1_BASE, CLA_TASK_3))
|
||||
{
|
||||
}
|
||||
WAITSTEP;
|
||||
|
||||
//
|
||||
// Force Task 4 and wait
|
||||
//
|
||||
asm(" IACK #0x0008");
|
||||
asm(" RPT #3 || NOP");
|
||||
while(CLA_getTaskRunStatus(CLA1_BASE, CLA_TASK_4))
|
||||
{
|
||||
}
|
||||
WAITSTEP;
|
||||
|
||||
//
|
||||
// Force Task 5 and wait
|
||||
//
|
||||
asm(" IACK #0x0010");
|
||||
asm(" RPT #3 || NOP");
|
||||
while(CLA_getTaskRunStatus(CLA1_BASE, CLA_TASK_5))
|
||||
{
|
||||
}
|
||||
WAITSTEP;
|
||||
|
||||
//
|
||||
// Force Task 6 and wait
|
||||
//
|
||||
asm(" IACK #0x0020");
|
||||
asm(" RPT #3 || NOP");
|
||||
while(CLA_getTaskRunStatus(CLA1_BASE, CLA_TASK_6))
|
||||
{
|
||||
}
|
||||
WAITSTEP;
|
||||
|
||||
//
|
||||
// Force Task 7 and wait
|
||||
//
|
||||
asm(" IACK #0x0040");
|
||||
asm(" RPT #3 || NOP");
|
||||
while(CLA_getTaskRunStatus(CLA1_BASE, CLA_TASK_7))
|
||||
{
|
||||
}
|
||||
WAITSTEP;
|
||||
|
||||
//
|
||||
// Force Task 8 and wait
|
||||
//
|
||||
asm(" IACK #0x0080");
|
||||
asm(" RPT #3 || NOP");
|
||||
while(CLA_getTaskRunStatus(CLA1_BASE, CLA_TASK_8))
|
||||
{
|
||||
}
|
||||
WAITSTEP;
|
||||
#endif
|
||||
}
|
||||
|
||||
//
|
||||
// configClaMemory - Configure CLA memory
|
||||
//
|
||||
void configClaMemory(void)
|
||||
{
|
||||
uint16_t ipcFlag = 5U;
|
||||
|
||||
//
|
||||
// Wait for signal from CPU1 before configuring
|
||||
//
|
||||
//
|
||||
// Send IPC flag 5 to CPU1
|
||||
//
|
||||
HWREG(IPC_BASE + IPC_O_SET) = 1UL << ipcFlag;
|
||||
|
||||
//
|
||||
// Wait for IPC flag 5 from CPU1
|
||||
//
|
||||
while((HWREG(IPC_BASE + IPC_O_STS) & (1UL << ipcFlag)) == 0x00000000UL)
|
||||
{
|
||||
}
|
||||
|
||||
//
|
||||
// ACK IPC flag 5 for CPU1
|
||||
//
|
||||
HWREG(IPC_BASE + IPC_O_ACK) = 1UL << ipcFlag;
|
||||
|
||||
//
|
||||
// Wait for ACK of IPC flag 5 from CPU1
|
||||
//
|
||||
while((HWREG(IPC_BASE + IPC_O_FLG) & (1UL << ipcFlag)) != 0x00000000UL)
|
||||
{
|
||||
}
|
||||
|
||||
#ifdef _FLASH
|
||||
extern uint32_t Cla1funcsRunStart, Cla1funcsLoadStart, Cla1funcsLoadSize;
|
||||
//
|
||||
// Copy over code from FLASH to RAM
|
||||
//
|
||||
memcpy((uint32_t *)&Cla1funcsRunStart, (uint32_t *)&Cla1funcsLoadStart,
|
||||
(uint32_t)&Cla1funcsLoadSize);
|
||||
#endif //_FLASH
|
||||
|
||||
#ifdef CPU2
|
||||
//
|
||||
// Enable CPU2 clocking at the sys clock level
|
||||
//
|
||||
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLA1);
|
||||
#endif //CPU2
|
||||
|
||||
//
|
||||
// Initialize and wait for CLA1ToCPUMsgRAM
|
||||
//
|
||||
MemCfg_initSections(MEMCFG_SECT_MSGCLA1TOCPU);
|
||||
while(!MemCfg_getInitStatus(MEMCFG_SECT_MSGCLA1TOCPU))
|
||||
{
|
||||
}
|
||||
|
||||
//
|
||||
// Initialize and wait for CPUToCLA1MsgRAM
|
||||
//
|
||||
MemCfg_initSections(MEMCFG_SECT_MSGCPUTOCLA1);
|
||||
while(!MemCfg_getInitStatus(MEMCFG_SECT_MSGCPUTOCLA1))
|
||||
{
|
||||
}
|
||||
|
||||
//
|
||||
// Select LS4RAM and LS5RAM to be the programming space for the CLA
|
||||
// First configure the CLA to be the master for LS4 and LS5 and then
|
||||
// set the space to be a program block
|
||||
//
|
||||
MemCfg_setLSRAMMasterSel(MEMCFG_SECT_LS4, MEMCFG_LSRAMMASTER_CPU_CLA1);
|
||||
MemCfg_setCLAMemType(MEMCFG_SECT_LS4, MEMCFG_CLA_MEM_PROGRAM);
|
||||
MemCfg_setLSRAMMasterSel(MEMCFG_SECT_LS5, MEMCFG_LSRAMMASTER_CPU_CLA1);
|
||||
MemCfg_setCLAMemType(MEMCFG_SECT_LS5, MEMCFG_CLA_MEM_PROGRAM);
|
||||
|
||||
//
|
||||
// Next configure LS0RAM and LS1RAM as data spaces for the CLA
|
||||
// First configure the CLA to be the master for LS0(1) and then
|
||||
// set the spaces to be code blocks
|
||||
//
|
||||
MemCfg_setLSRAMMasterSel(MEMCFG_SECT_LS0, MEMCFG_LSRAMMASTER_CPU_CLA1);
|
||||
MemCfg_setCLAMemType(MEMCFG_SECT_LS0, MEMCFG_CLA_MEM_DATA);
|
||||
|
||||
MemCfg_setLSRAMMasterSel(MEMCFG_SECT_LS1, MEMCFG_LSRAMMASTER_CPU_CLA1);
|
||||
MemCfg_setCLAMemType(MEMCFG_SECT_LS1, MEMCFG_CLA_MEM_DATA);
|
||||
}
|
||||
|
||||
//
|
||||
// initCpu2Cla1 - Initialize CLA1 task vectors and end of task ISRs
|
||||
//
|
||||
void initCpu2Cla1(void)
|
||||
{
|
||||
//
|
||||
// Compute all CLA task vectors
|
||||
// On Type-1 CLAs the MVECT registers accept full 16-bit task addresses as
|
||||
// opposed to offsets used on older Type-0 CLAs
|
||||
//
|
||||
// Adding a pragma to suppress the warnings when casting the CLA tasks'
|
||||
// function pointers to uint16_t. Compiler believes this to be improper
|
||||
// although the CLA only has 16-bit addressing.
|
||||
//
|
||||
#pragma diag_suppress=770
|
||||
CLA_mapTaskVector(CLA1_BASE, CLA_MVECT_1, (uint16_t)&Cla1Task1);
|
||||
CLA_mapTaskVector(CLA1_BASE, CLA_MVECT_2, (uint16_t)&Cla1Task2);
|
||||
CLA_mapTaskVector(CLA1_BASE, CLA_MVECT_3, (uint16_t)&Cla1Task3);
|
||||
CLA_mapTaskVector(CLA1_BASE, CLA_MVECT_4, (uint16_t)&Cla1Task4);
|
||||
CLA_mapTaskVector(CLA1_BASE, CLA_MVECT_5, (uint16_t)&Cla1Task5);
|
||||
CLA_mapTaskVector(CLA1_BASE, CLA_MVECT_6, (uint16_t)&Cla1Task6);
|
||||
CLA_mapTaskVector(CLA1_BASE, CLA_MVECT_7, (uint16_t)&Cla1Task7);
|
||||
CLA_mapTaskVector(CLA1_BASE, CLA_MVECT_8, (uint16_t)&Cla1Task8);
|
||||
#pragma diag_warning=770
|
||||
|
||||
//
|
||||
// Enable the IACK instruction to start a task on CLA in software
|
||||
// for all 8 CLA tasks. Also, globally enable all 8 tasks (or a
|
||||
// subset of tasks) by writing to their respective bits in the
|
||||
// MIER register
|
||||
//
|
||||
CLA_enableIACK(CLA1_BASE);
|
||||
CLA_enableTasks(CLA1_BASE, 0x00FF);
|
||||
|
||||
//
|
||||
// Configure the vectors for the end-of-task interrupt for all
|
||||
// 8 tasks
|
||||
//
|
||||
Interrupt_register(INT_CLA1_1, cla1Isr1);
|
||||
Interrupt_register(INT_CLA1_2, cla1Isr2);
|
||||
Interrupt_register(INT_CLA1_3, cla1Isr3);
|
||||
Interrupt_register(INT_CLA1_4, cla1Isr4);
|
||||
Interrupt_register(INT_CLA1_5, cla1Isr5);
|
||||
Interrupt_register(INT_CLA1_6, cla1Isr6);
|
||||
Interrupt_register(INT_CLA1_7, cla1Isr7);
|
||||
Interrupt_register(INT_CLA1_8, cla1Isr8);
|
||||
|
||||
//
|
||||
// Enable CLA interrupts at the group and subgroup levels
|
||||
//
|
||||
Interrupt_enable(INT_CLA1_1);
|
||||
Interrupt_enable(INT_CLA1_2);
|
||||
Interrupt_enable(INT_CLA1_3);
|
||||
Interrupt_enable(INT_CLA1_4);
|
||||
Interrupt_enable(INT_CLA1_5);
|
||||
Interrupt_enable(INT_CLA1_6);
|
||||
Interrupt_enable(INT_CLA1_7);
|
||||
Interrupt_enable(INT_CLA1_8);
|
||||
IER |= INTERRUPT_CPU_INT11;
|
||||
}
|
||||
|
||||
//
|
||||
// cla1Isr1 - CLA1 ISR 1
|
||||
//
|
||||
__interrupt void cla1Isr1 ()
|
||||
{
|
||||
//
|
||||
// Acknowledge the end-of-task interrupt for task 1
|
||||
//
|
||||
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP11);
|
||||
// asm(" ESTOP0");
|
||||
}
|
||||
|
||||
//
|
||||
// cla1Isr2 - CLA1 ISR 2
|
||||
//
|
||||
__interrupt void cla1Isr2 ()
|
||||
{
|
||||
asm(" ESTOP0");
|
||||
}
|
||||
|
||||
//
|
||||
// cla1Isr3 - CLA1 ISR 3
|
||||
//
|
||||
__interrupt void cla1Isr3 ()
|
||||
{
|
||||
asm(" ESTOP0");
|
||||
}
|
||||
|
||||
//
|
||||
// cla1Isr4 - CLA1 ISR 4
|
||||
//
|
||||
__interrupt void cla1Isr4 ()
|
||||
{
|
||||
asm(" ESTOP0");
|
||||
}
|
||||
|
||||
//
|
||||
// cla1Isr5 - CLA1 ISR 5
|
||||
//
|
||||
__interrupt void cla1Isr5 ()
|
||||
{
|
||||
asm(" ESTOP0");
|
||||
}
|
||||
|
||||
//
|
||||
// cla1Isr6 - CLA1 ISR 6
|
||||
//
|
||||
__interrupt void cla1Isr6 ()
|
||||
{
|
||||
asm(" ESTOP0");
|
||||
}
|
||||
|
||||
//
|
||||
// cla1Isr7 - CLA1 ISR 7
|
||||
//
|
||||
__interrupt void cla1Isr7 ()
|
||||
{
|
||||
asm(" ESTOP0");
|
||||
}
|
||||
|
||||
//
|
||||
// cla1Isr8 - CLA1 ISR 8
|
||||
//
|
||||
__interrupt void cla1Isr8 ()
|
||||
{
|
||||
//
|
||||
// Acknowledge the end-of-task interrupt for task 8
|
||||
//
|
||||
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP11);
|
||||
// asm(" ESTOP0");
|
||||
}
|
||||
|
||||
//
|
||||
// End of file
|
||||
//
|
||||
@@ -0,0 +1,135 @@
|
||||
//#############################################################################
|
||||
//
|
||||
// FILE: cla_ex1_asin_shared.h
|
||||
//
|
||||
// TITLE: CLA arcsine example header file
|
||||
//
|
||||
//#############################################################################
|
||||
//
|
||||
//
|
||||
// $Copyright:
|
||||
// Copyright (C) 2013-2024 Texas Instruments Incorporated - http://www.ti.com/
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// $
|
||||
//#############################################################################
|
||||
|
||||
#ifndef CLA_ASIN_SHARED_H
|
||||
#define CLA_ASIN_SHARED_H
|
||||
|
||||
//
|
||||
// Included Files
|
||||
//
|
||||
#include <stdint.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
//
|
||||
// Defines
|
||||
//
|
||||
#define BUFFER_SIZE 64
|
||||
#define TABLE_SIZE 64
|
||||
#define TABLE_SIZE_M_1 TABLE_SIZE-1
|
||||
#define PIBYTWO 1.570796327
|
||||
#define PI 3.141592653589
|
||||
#define INV2PI 0.159154943
|
||||
|
||||
//
|
||||
// Globals
|
||||
//
|
||||
//Task 1 (C) Variables
|
||||
//
|
||||
extern float y[]; //Result vector
|
||||
extern float fVal; //Holds the input argument to the task
|
||||
extern float fResult; //The arsine of the input argument
|
||||
|
||||
//
|
||||
//Task 2 (C) Variables
|
||||
//
|
||||
|
||||
//
|
||||
//Task 3 (C) Variables
|
||||
//
|
||||
|
||||
//
|
||||
//Task 4 (C) Variables
|
||||
//
|
||||
|
||||
//
|
||||
//Task 5 (C) Variables
|
||||
//
|
||||
|
||||
//
|
||||
//Task 6 (C) Variables
|
||||
//
|
||||
|
||||
//
|
||||
//Task 7 (C) Variables
|
||||
//
|
||||
|
||||
//
|
||||
//Task 8 (C) Variables
|
||||
//
|
||||
|
||||
//
|
||||
//Common (C) Variables
|
||||
//
|
||||
extern float CLAasinTable[]; //The arcsine lookup table
|
||||
|
||||
//
|
||||
// Function Prototypes
|
||||
//
|
||||
// The following are symbols defined in the CLA assembly code
|
||||
// Including them in the shared header file makes them
|
||||
// .global and the main CPU can make use of them.
|
||||
//
|
||||
|
||||
//
|
||||
//CLA C Tasks
|
||||
//
|
||||
__interrupt void Cla1Task1();
|
||||
__interrupt void Cla1Task2();
|
||||
__interrupt void Cla1Task3();
|
||||
__interrupt void Cla1Task4();
|
||||
__interrupt void Cla1Task5();
|
||||
__interrupt void Cla1Task6();
|
||||
__interrupt void Cla1Task7();
|
||||
__interrupt void Cla1Task8();
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif // extern "C"
|
||||
|
||||
#endif // CLA_EX1_ASIN_SHARED_H
|
||||
|
||||
//
|
||||
// End of file
|
||||
//
|
||||
@@ -0,0 +1,165 @@
|
||||
//#############################################################################
|
||||
//
|
||||
// FILE: cla_ex2_iir2p2z.cla
|
||||
//
|
||||
// TITLE: 2-Pole 2-Zero IIR Filter Example
|
||||
//
|
||||
//#############################################################################
|
||||
//
|
||||
//
|
||||
// $Copyright:
|
||||
// Copyright (C) 2013-2024 Texas Instruments Incorporated - http://www.ti.com/
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// $
|
||||
//#############################################################################
|
||||
|
||||
//
|
||||
// Included Files
|
||||
//
|
||||
#include "cla_ex2_iir2p2z_shared.h"
|
||||
|
||||
//
|
||||
// Globals
|
||||
//
|
||||
// Note that the globals defined in the .cla source are global to the cla source
|
||||
// file. i.e. they may be shared across tasks. All of the data shared between
|
||||
// the CLA and the C28x CPU must be defined in the C (or C++) code, and not the
|
||||
// CLA code.
|
||||
//
|
||||
float W2[2]; //w2(n) and w2(n-1)
|
||||
float W1[2]; //w1(n) and w1(n-1)
|
||||
|
||||
//
|
||||
// function definitions
|
||||
//
|
||||
|
||||
//Task 1 : 2p2z IIR Transposed Direct Form II Filter
|
||||
// ALGORITHM:
|
||||
//
|
||||
// Difference Equation :
|
||||
//
|
||||
// The operations for each biquad, in order, is as follows
|
||||
// 1. yn = xn*b(0) + q4
|
||||
// 2. q3 = xn*b(1) + yn*a(1) + q2
|
||||
// 3. q4 = q3
|
||||
// 4. q1 = xn*b(2) + yn*a(2)
|
||||
// 5. q2 = q1
|
||||
// where
|
||||
// yn =output sample of the filter at index n
|
||||
// xn =input sample of the filter at index n
|
||||
// qx =intermediate values stored in the delay buffer
|
||||
//
|
||||
// Transfer Function :
|
||||
// The difference equation is split up into multiple Second-Order Sections(SOS)
|
||||
// Each SOS represents a Biquad with the following transfer function
|
||||
// -1 -2
|
||||
// Y(z) b(0) + b(1) z + b(2) z
|
||||
// ----- = -----------------------
|
||||
// X(z) -1 -2
|
||||
// a(0) + a(1) z + a(2) z
|
||||
//
|
||||
// For a detailed treatment of Direct II Forms see
|
||||
// [1]Digital Signal Processing, Proakis, J. G. and Manolakis, D. G. - Chapter 7
|
||||
// [2]Understanding Digital Signal Processing 3rd ed, Lyons, R. G.
|
||||
//
|
||||
// Network Diagram :
|
||||
//
|
||||
// xn------>(x)--->(+)--------------->yn
|
||||
// | ^ ^ |
|
||||
// | | |q4 |
|
||||
// | b(0) (z) |
|
||||
// | ^ |
|
||||
// | |q3 |
|
||||
// |-->(x)--->(+)<-----(x)---|
|
||||
// | ^ ^ ^ |
|
||||
// | | |q2 | |
|
||||
// | b(1) (z) a(1) |
|
||||
// | ^ |
|
||||
// | |q1 |
|
||||
// --->(x)--->(+)<-----(x)----
|
||||
// ^ ^
|
||||
// | |
|
||||
// b(2) a(2)
|
||||
interrupt void Cla1Task1 ( void )
|
||||
{
|
||||
//Local Variables
|
||||
|
||||
//Code
|
||||
__mdebugstop();
|
||||
yn = xn*S1_B[0] + W2[1];
|
||||
W2[0] = xn*S1_B[1] + yn*S1_A[1] + W1[1];
|
||||
W2[1] = W2[0];
|
||||
W1[0] = xn*S1_B[2] + yn*S1_A[2];
|
||||
W1[1] = W1[0];
|
||||
// __mnop();
|
||||
// __mnop();
|
||||
// __mnop();
|
||||
}
|
||||
|
||||
interrupt void Cla1Task2 ( void )
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
interrupt void Cla1Task3 ( void )
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
interrupt void Cla1Task4 ( void )
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
interrupt void Cla1Task5 ( void )
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
interrupt void Cla1Task6 ( void )
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
interrupt void Cla1Task7 ( void )
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
//Task 8 will initialize the variables used in Task 1
|
||||
interrupt void Cla1Task8 ( void )
|
||||
{
|
||||
W2[0] = 0; W2[1] = 0;
|
||||
W1[0] = 0; W1[1] = 0;
|
||||
}
|
||||
|
||||
//
|
||||
// End of file
|
||||
//
|
||||
@@ -0,0 +1,196 @@
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: cla_ex2_iir2p2z_cpu1.c
|
||||
//
|
||||
// TITLE: CLA IIR2p2Z Example for F2837xD.
|
||||
//
|
||||
//! \addtogroup dual_example_list
|
||||
//! <h1>CLA 2 Pole 2 Zero Infinite Impulse Response Filter (cla_iir2p2z_cpu01)</h1>
|
||||
//!
|
||||
//! This example implements a Transposed Direct Form II IIR filter, commonly
|
||||
//! known as a Biquad. The input vector is a software simulated noisy signal
|
||||
//! that is fed to the biquad one sample at a time, filtered and then stored
|
||||
//! in an output buffer for storage.
|
||||
//!
|
||||
//! \b Memory \b Allocation \n
|
||||
//! - CLA1 Data RAM 1 (RAML2)
|
||||
//! - S1_A - Feedback coefficients
|
||||
//! - S1_B - Feedforward coefficients
|
||||
//! - CLA1 to CPU Message RAM
|
||||
//! - yn - Output of the Biquad
|
||||
//! - CPU to CLA1 Message RAM
|
||||
//! - xn - Sample input to the filter
|
||||
//!
|
||||
//! \b Watch \b Variables \n
|
||||
//! - fBiquadOutput
|
||||
//! - pass
|
||||
//! - fail
|
||||
//!
|
||||
//! \note CPU2 must turn on the CLA clock by writing a 1 to
|
||||
//! CpuSysRegs.PCLKCR0.bit.CLA1.
|
||||
//!
|
||||
//
|
||||
//#############################################################################
|
||||
//
|
||||
//
|
||||
// $Copyright:
|
||||
// Copyright (C) 2013-2024 Texas Instruments Incorporated - http://www.ti.com/
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// $
|
||||
//#############################################################################
|
||||
|
||||
//
|
||||
// Included Files
|
||||
//
|
||||
#include "driverlib.h"
|
||||
#include "device.h"
|
||||
#include "inc/hw_ipc.h"
|
||||
|
||||
//
|
||||
// Globals
|
||||
//
|
||||
uint16_t pass=0;
|
||||
uint16_t fail=0;
|
||||
|
||||
//
|
||||
// Function Prototypes
|
||||
//
|
||||
void initCpuXCla1(void);
|
||||
|
||||
//
|
||||
// Main
|
||||
//
|
||||
void main(void)
|
||||
{
|
||||
//
|
||||
// Initialize device clock and peripherals
|
||||
//
|
||||
Device_init();
|
||||
|
||||
#ifdef _STANDALONE
|
||||
#ifdef _FLASH
|
||||
//
|
||||
// Send boot command to allow the CPU2 application to begin execution
|
||||
//
|
||||
Device_bootCPU2(C1C2_BROM_BOOTMODE_BOOT_FROM_FLASH);
|
||||
#else
|
||||
//
|
||||
// Send boot command to allow the CPU2 application to begin execution
|
||||
//
|
||||
Device_bootCPU2(C1C2_BROM_BOOTMODE_BOOT_FROM_RAM);
|
||||
|
||||
#endif // _FLASH
|
||||
#endif // _STANDALONE
|
||||
|
||||
//
|
||||
// Disable pin locks and enable internal pullups.
|
||||
//
|
||||
Device_initGPIO();
|
||||
|
||||
//
|
||||
// Disable global interrupts.
|
||||
//
|
||||
DINT;
|
||||
|
||||
//
|
||||
// Initialize PIE and clear PIE registers. Disables CPU interrupts.
|
||||
//
|
||||
Interrupt_initModule();
|
||||
|
||||
//
|
||||
// Initialize the PIE vector table with pointers to the shell Interrupt
|
||||
// Service Routines (ISR).
|
||||
//
|
||||
Interrupt_initVectorTable();
|
||||
|
||||
//
|
||||
// Turn on the CLA clocks on both CPUs.
|
||||
//
|
||||
initCpuXCla1();
|
||||
|
||||
//
|
||||
// Enable global Interrupts and higher priority real-time debug events:
|
||||
//
|
||||
EINT; // Enable Global interrupt INTM
|
||||
ERTM; // Enable Global real-time interrupt DBGM
|
||||
|
||||
while(1);
|
||||
}
|
||||
|
||||
//
|
||||
// initCpuXCla1 - Enable CLA1 on CPU1 and CPU2
|
||||
//
|
||||
void initCpuXCla1(void)
|
||||
{
|
||||
uint16_t ipcFlag = 5U;
|
||||
|
||||
#ifdef CPU1
|
||||
EALLOW;
|
||||
//
|
||||
// Enable CPU1 CLA1
|
||||
//
|
||||
HWREG(DEVCFG_BASE + SYSCTL_O_DC1) |= SYSCTL_DC1_CPU1_CLA1;
|
||||
|
||||
//
|
||||
// Enable CPU2 CLA1
|
||||
//
|
||||
HWREG(DEVCFG_BASE + SYSCTL_O_DC1) |= SYSCTL_DC1_CPU2_CLA1;
|
||||
|
||||
EDIS;
|
||||
#endif //CPU1
|
||||
|
||||
//
|
||||
// Send IPC flag 5 to CPU2
|
||||
//
|
||||
HWREG(IPC_BASE + IPC_O_SET) = 1UL << ipcFlag;
|
||||
|
||||
//
|
||||
// Wait for IPC flag 5 from CPU2
|
||||
//
|
||||
while((HWREG(IPC_BASE + IPC_O_STS) & (1UL << ipcFlag)) == 0x00000000UL)
|
||||
{
|
||||
}
|
||||
|
||||
//
|
||||
// ACK IPC flag 5 for CPU2
|
||||
//
|
||||
HWREG(IPC_BASE + IPC_O_ACK) = 1UL << ipcFlag;
|
||||
|
||||
//
|
||||
// Wait for ACK of IPC flag 5 from CPU2
|
||||
//
|
||||
while((HWREG(IPC_BASE + IPC_O_FLG) & (1UL << ipcFlag)) != 0x00000000UL)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// End of file
|
||||
//
|
||||
@@ -0,0 +1,600 @@
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: cla_ex2_iir2p2z_cpu2.c
|
||||
//
|
||||
// TITLE: CLA 2-pole 2-zero IIR Filter Example for F2837xD.
|
||||
//
|
||||
// Dual Core iir2p2z example. This example demonstrates how to run CLA tasks
|
||||
// on cpu2.cla1
|
||||
//
|
||||
//#############################################################################
|
||||
//
|
||||
//
|
||||
// $Copyright:
|
||||
// Copyright (C) 2013-2024 Texas Instruments Incorporated - http://www.ti.com/
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// $
|
||||
//#############################################################################
|
||||
|
||||
//
|
||||
// Included Files
|
||||
//
|
||||
#include "driverlib.h"
|
||||
#include "device.h"
|
||||
#include "inc/hw_ipc.h"
|
||||
#include "cla_ex2_iir2p2z_shared.h"
|
||||
|
||||
//
|
||||
// Defines
|
||||
//
|
||||
#define NUM_SAMPLES 128
|
||||
#define WAITSTEP asm(" RPT #255 || NOP")
|
||||
|
||||
//
|
||||
// Globals
|
||||
//
|
||||
//Task 1 (C) Variables
|
||||
//
|
||||
#ifdef __cplusplus
|
||||
#pragma DATA_SECTION("CLADataLS0")
|
||||
float S1_B[]={0.02008, 0.04017, 0.02008};
|
||||
#pragma DATA_SECTION("CLADataLS0")
|
||||
float S1_A[]={-1.0, 1.56102, -0.64135};
|
||||
#pragma DATA_SECTION("CLADataLS0")
|
||||
float S2_B[]={0, 0, 0};
|
||||
#pragma DATA_SECTION("CLADataLS0")
|
||||
float S2_A[]={0, 0, 0};
|
||||
#pragma DATA_SECTION("CLADataLS0")
|
||||
float S3_B[]={0, 0, 0};
|
||||
#pragma DATA_SECTION("CLADataLS0")
|
||||
float S3_A[]={0, 0, 0};
|
||||
#pragma DATA_SECTION("CpuToCla1MsgRAM")
|
||||
float xn;
|
||||
#pragma DATA_SECTION("Cla1ToCpuMsgRAM")
|
||||
float yn;
|
||||
#else
|
||||
#pragma DATA_SECTION(S1_B,"CLADataLS0")
|
||||
float S1_B[]={0.02008, 0.04017, 0.02008};
|
||||
#pragma DATA_SECTION(S1_A,"CLADataLS0")
|
||||
float S1_A[]={-1.0, 1.56102, -0.64135};
|
||||
#pragma DATA_SECTION(S2_B,"CLADataLS0")
|
||||
float S2_B[]={0, 0, 0};
|
||||
#pragma DATA_SECTION(S2_A,"CLADataLS0")
|
||||
float S2_A[]={0, 0, 0};
|
||||
#pragma DATA_SECTION(S3_B,"CLADataLS0")
|
||||
float S3_B[]={0, 0, 0};
|
||||
#pragma DATA_SECTION(S3_A,"CLADataLS0")
|
||||
float S3_A[]={0, 0, 0};
|
||||
#pragma DATA_SECTION(xn,"CpuToCla1MsgRAM")
|
||||
float xn;
|
||||
#pragma DATA_SECTION(yn,"Cla1ToCpuMsgRAM")
|
||||
float yn;
|
||||
#endif //__cplusplus
|
||||
|
||||
//
|
||||
//Task 2 (C) Variables
|
||||
//
|
||||
|
||||
//
|
||||
//Task 3 (C) Variables
|
||||
//
|
||||
|
||||
//
|
||||
//Task 4 (C) Variables
|
||||
//
|
||||
|
||||
//
|
||||
//Task 5 (C) Variables
|
||||
//
|
||||
|
||||
//
|
||||
//Task 6 (C) Variables
|
||||
//
|
||||
|
||||
//
|
||||
//Task 7 (C) Variables
|
||||
//
|
||||
|
||||
//
|
||||
//Task 8 (C) Variables
|
||||
//
|
||||
|
||||
//
|
||||
//Common (C) Variables
|
||||
//
|
||||
float fBiquadOutput[NUM_SAMPLES];
|
||||
float fAdcInput[NUM_SAMPLES] = {
|
||||
0, 0.4359, -0.4129, 0.2482,
|
||||
0.4182, -0.3455, 0.4780, 0.3674,
|
||||
-0.2347, 0.6724, 0.2939, -0.0858,
|
||||
0.8178, 0.2100, 0.0914, 0.9045,
|
||||
0.1283, 0.2836, 0.9279, 0.0604,
|
||||
0.4755, 0.8888, 0.0156, 0.6506,
|
||||
0.7929, 0, 0.7929, 0.6506,
|
||||
0.0156, 0.8888, 0.4755, 0.0604,
|
||||
0.9279, 0.2836, 0.1283, 0.9045,
|
||||
0.0914, 0.2100, 0.8178, -0.0858,
|
||||
0.2939, 0.6724, -0.2347, 0.3674,
|
||||
0.4780, -0.3455, 0.4182, 0.2482,
|
||||
-0.4129, 0.4359, 0.0000, -0.4359,
|
||||
0.4129, -0.2482, -0.4182, 0.3455,
|
||||
-0.4780, -0.3674, 0.2347, -0.6724,
|
||||
-0.2939, 0.0858, -0.8178, -0.2100,
|
||||
-0.0914, -0.9045, -0.1283, -0.2836,
|
||||
-0.9279, -0.0604, -0.4755, -0.8888,
|
||||
-0.0156, -0.6506, -0.7929, 0,
|
||||
-0.7929, -0.6506, -0.0156, -0.8888,
|
||||
-0.4755, -0.0604, -0.9279, -0.2836,
|
||||
-0.1283, -0.9045, -0.0914, -0.2100,
|
||||
-0.8178, 0.0858, -0.2939, -0.6724,
|
||||
0.2347, -0.3674, -0.4780, 0.3455,
|
||||
-0.4182, -0.2482, 0.4129, -0.4359,
|
||||
-0.0000, 0.4359, -0.4129, 0.2482,
|
||||
0.4182, -0.3455, 0.4780, 0.3674,
|
||||
-0.2347, 0.6724, 0.2939, -0.0858,
|
||||
0.8178, 0.2100, 0.0914, 0.9045,
|
||||
0.1283, 0.2836, 0.9279, 0.0604,
|
||||
0.4755, 0.8888, 0.0156, 0.6506,
|
||||
0.7929, 0, 0.7929, 0.6506
|
||||
};
|
||||
|
||||
float iir_expected[NUM_SAMPLES]={
|
||||
0, 0.008754415, 0.02288298, 0.02726187,
|
||||
0.03795755, 0.05661327, 0.06815149, 0.08971455,
|
||||
0.1159805, 0.1349670, 0.1645004, 0.1938129,
|
||||
0.2159233, 0.2481003, 0.2754995, 0.2969926,
|
||||
0.3276609, 0.3500223, 0.3688507, 0.3954768,
|
||||
0.4113952, 0.4267188, 0.4478308, 0.4569381,
|
||||
0.4684406, 0.4831003, 0.4855416, 0.4930161,
|
||||
0.5005732, 0.4967500, 0.4999563, 0.5000126,
|
||||
0.4904927, 0.4891656, 0.4816235, 0.4671103,
|
||||
0.4610198, 0.4461307, 0.4274355, 0.4164503,
|
||||
0.3948304, 0.3728325, 0.3569719, 0.3295808,
|
||||
0.3051807, 0.2846532, 0.2527421, 0.2268174,
|
||||
0.2020469, 0.1670849, 0.1404567, 0.1120952,
|
||||
0.07568341, 0.04909494, 0.01802110, -0.01820113,
|
||||
-0.04409146, -0.07679208, -0.1112392, -0.1358536,
|
||||
-0.1689253, -0.2001516, -0.2229802, -0.2550509,
|
||||
-0.2818236, -0.3024068, -0.3320566, -0.3534117,
|
||||
-0.3713224, -0.3971615, -0.4124396, -0.4272688,
|
||||
-0.4480195, -0.4568799, -0.4682287, -0.4828069,
|
||||
-0.4852195, -0.4927015, -0.5002885, -0.4965075,
|
||||
-0.4997604, -0.4998623, -0.4903836, -0.4890918,
|
||||
-0.4815782, -0.4670869, -0.4610124, -0.4461341,
|
||||
-0.4274456, -0.4164638, -0.3948451, -0.3728467,
|
||||
-0.3569847, -0.3295917, -0.3051894, -0.2846599,
|
||||
-0.2527469, -0.2268206, -0.2020488, -0.1670859,
|
||||
-0.1404569, -0.1120951, -0.07568294, -0.04909432,
|
||||
-0.01802043, 0.01820178, 0.04409203, 0.07679256,
|
||||
0.1112396, 0.1358539, 0.1689255, 0.2001518,
|
||||
0.2229803, 0.2550510, 0.2818236, 0.3024068,
|
||||
0.3320566, 0.3534117, 0.3713224, 0.3971614,
|
||||
0.4124396, 0.4272687, 0.4480195, 0.4568799,
|
||||
0.4682287, 0.4828069, 0.4852195, 0.4927014
|
||||
};
|
||||
|
||||
uint16_t pass=0;
|
||||
uint16_t fail=0;
|
||||
|
||||
//
|
||||
// Function Prototypes
|
||||
//
|
||||
void runTest(void);
|
||||
void configClaMemory(void);
|
||||
void initCpu2Cla1(void);
|
||||
|
||||
__interrupt void cla1Isr1();
|
||||
__interrupt void cla1Isr2();
|
||||
__interrupt void cla1Isr3();
|
||||
__interrupt void cla1Isr4();
|
||||
__interrupt void cla1Isr5();
|
||||
__interrupt void cla1Isr6();
|
||||
__interrupt void cla1Isr7();
|
||||
__interrupt void cla1Isr8();
|
||||
|
||||
//
|
||||
// Main
|
||||
//
|
||||
void main(void)
|
||||
{
|
||||
//
|
||||
// Initialize device clock and peripherals
|
||||
//
|
||||
Device_init();
|
||||
|
||||
//
|
||||
// Initialize GPIO and configure the GPIO pin as a push-pull output
|
||||
//
|
||||
// This is configured by CPU1
|
||||
|
||||
//
|
||||
// Initialize PIE and clear PIE registers. Disables CPU interrupts.
|
||||
//
|
||||
Interrupt_initModule();
|
||||
|
||||
//
|
||||
// Initialize the PIE vector table with pointers to the shell Interrupt
|
||||
// Service Routines (ISR).
|
||||
//
|
||||
Interrupt_initVectorTable();
|
||||
|
||||
//
|
||||
// Configure the CLA memory spaces first followed by
|
||||
// the CLA task vectors.
|
||||
//
|
||||
configClaMemory();
|
||||
initCpu2Cla1();
|
||||
|
||||
//
|
||||
// Enable global Interrupts and higher priority real-time debug events:
|
||||
//
|
||||
EINT; // Enable Global interrupt INTM
|
||||
ERTM; // Enable Global realtime interrupt DBGM
|
||||
|
||||
//
|
||||
// Run the test
|
||||
//
|
||||
runTest();
|
||||
|
||||
while(1);
|
||||
}
|
||||
|
||||
//
|
||||
// runTest - Run CLA test
|
||||
//
|
||||
void runTest(void)
|
||||
{
|
||||
int16_t i;
|
||||
float fError[NUM_SAMPLES];
|
||||
|
||||
//
|
||||
// Force Task 8 and wait
|
||||
//
|
||||
asm(" IACK #0x0080");
|
||||
asm(" RPT #3 || NOP");
|
||||
while(CLA_getTaskRunStatus(CLA1_BASE, CLA_TASK_8))
|
||||
{
|
||||
}
|
||||
WAITSTEP;
|
||||
|
||||
for(i = 0; i < NUM_SAMPLES; i++)
|
||||
{
|
||||
xn = fAdcInput[i];
|
||||
|
||||
//
|
||||
// Force Task 1 and wait
|
||||
//
|
||||
asm(" IACK #0x0001");
|
||||
asm(" RPT #3 || NOP");
|
||||
while(CLA_getTaskRunStatus(CLA1_BASE, CLA_TASK_1))
|
||||
{
|
||||
}
|
||||
WAITSTEP;
|
||||
|
||||
fBiquadOutput[i] = yn;
|
||||
fError[i] = fabs(iir_expected[i]-fBiquadOutput[i]);
|
||||
|
||||
if(fError[i] < 0.01)
|
||||
{
|
||||
pass++;
|
||||
}
|
||||
else
|
||||
{
|
||||
fail++;
|
||||
}
|
||||
}
|
||||
|
||||
#if 0
|
||||
//
|
||||
// Force Task 2 and wait
|
||||
//
|
||||
asm(" IACK #0x0002");
|
||||
asm(" RPT #3 || NOP");
|
||||
while(CLA_getTaskRunStatus(CLA1_BASE, CLA_TASK_2))
|
||||
{
|
||||
}
|
||||
WAITSTEP;
|
||||
|
||||
//
|
||||
// Force Task 3 and wait
|
||||
//
|
||||
asm(" IACK #0x0004");
|
||||
asm(" RPT #3 || NOP");
|
||||
while(CLA_getTaskRunStatus(CLA1_BASE, CLA_TASK_3))
|
||||
{
|
||||
}
|
||||
WAITSTEP;
|
||||
|
||||
//
|
||||
// Force Task 4 and wait
|
||||
//
|
||||
asm(" IACK #0x0008");
|
||||
asm(" RPT #3 || NOP");
|
||||
while(CLA_getTaskRunStatus(CLA1_BASE, CLA_TASK_4))
|
||||
{
|
||||
}
|
||||
WAITSTEP;
|
||||
|
||||
//
|
||||
// Force Task 5 and wait
|
||||
//
|
||||
asm(" IACK #0x0010");
|
||||
asm(" RPT #3 || NOP");
|
||||
while(CLA_getTaskRunStatus(CLA1_BASE, CLA_TASK_5))
|
||||
{
|
||||
}
|
||||
WAITSTEP;
|
||||
|
||||
//
|
||||
// Force Task 6 and wait
|
||||
//
|
||||
asm(" IACK #0x0020");
|
||||
asm(" RPT #3 || NOP");
|
||||
while(CLA_getTaskRunStatus(CLA1_BASE, CLA_TASK_6))
|
||||
{
|
||||
}
|
||||
WAITSTEP;
|
||||
|
||||
//
|
||||
// Force Task 7 and wait
|
||||
//
|
||||
asm(" IACK #0x0040");
|
||||
asm(" RPT #3 || NOP");
|
||||
while(CLA_getTaskRunStatus(CLA1_BASE, CLA_TASK_7))
|
||||
{
|
||||
}
|
||||
WAITSTEP;
|
||||
#endif
|
||||
}
|
||||
|
||||
//
|
||||
// configClaMemory - Configure CLA memory
|
||||
//
|
||||
void configClaMemory(void)
|
||||
{
|
||||
uint16_t ipcFlag = 5U;
|
||||
|
||||
//
|
||||
// Wait for signal from CPU1 before configuring
|
||||
//
|
||||
//
|
||||
// Send IPC flag 5 to CPU1
|
||||
//
|
||||
HWREG(IPC_BASE + IPC_O_SET) = 1UL << ipcFlag;
|
||||
|
||||
//
|
||||
// Wait for IPC flag 5 from CPU1
|
||||
//
|
||||
while((HWREG(IPC_BASE + IPC_O_STS) & (1UL << ipcFlag)) == 0x00000000UL)
|
||||
{
|
||||
}
|
||||
|
||||
//
|
||||
// ACK IPC flag 5 for CPU1
|
||||
//
|
||||
HWREG(IPC_BASE + IPC_O_ACK) = 1UL << ipcFlag;
|
||||
|
||||
//
|
||||
// Wait for ACK of IPC flag 5 from CPU1
|
||||
//
|
||||
while((HWREG(IPC_BASE + IPC_O_FLG) & (1UL << ipcFlag)) != 0x00000000UL)
|
||||
{
|
||||
}
|
||||
|
||||
#ifdef _FLASH
|
||||
extern uint32_t Cla1funcsRunStart, Cla1funcsLoadStart, Cla1funcsLoadSize;
|
||||
//
|
||||
// Copy over code from FLASH to RAM
|
||||
//
|
||||
memcpy((uint32_t *)&Cla1funcsRunStart, (uint32_t *)&Cla1funcsLoadStart,
|
||||
(uint32_t)&Cla1funcsLoadSize);
|
||||
#endif //_FLASH
|
||||
|
||||
#ifdef CPU2
|
||||
//
|
||||
// Enable CPU2 clocking at the sys clock level
|
||||
//
|
||||
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLA1);
|
||||
#endif //CPU2
|
||||
|
||||
//
|
||||
// Initialize and wait for CLA1ToCPUMsgRAM
|
||||
//
|
||||
MemCfg_initSections(MEMCFG_SECT_MSGCLA1TOCPU);
|
||||
while(!MemCfg_getInitStatus(MEMCFG_SECT_MSGCLA1TOCPU))
|
||||
{
|
||||
}
|
||||
|
||||
//
|
||||
// Initialize and wait for CPUToCLA1MsgRAM
|
||||
//
|
||||
MemCfg_initSections(MEMCFG_SECT_MSGCPUTOCLA1);
|
||||
while(!MemCfg_getInitStatus(MEMCFG_SECT_MSGCPUTOCLA1))
|
||||
{
|
||||
}
|
||||
|
||||
//
|
||||
// Select LS4RAM and LS5RAM to be the programming space for the CLA
|
||||
// First configure the CLA to be the master for LS4 and LS5 and then
|
||||
// set the space to be a program block
|
||||
//
|
||||
MemCfg_setLSRAMMasterSel(MEMCFG_SECT_LS4, MEMCFG_LSRAMMASTER_CPU_CLA1);
|
||||
MemCfg_setCLAMemType(MEMCFG_SECT_LS4, MEMCFG_CLA_MEM_PROGRAM);
|
||||
MemCfg_setLSRAMMasterSel(MEMCFG_SECT_LS5, MEMCFG_LSRAMMASTER_CPU_CLA1);
|
||||
MemCfg_setCLAMemType(MEMCFG_SECT_LS5, MEMCFG_CLA_MEM_PROGRAM);
|
||||
|
||||
//
|
||||
// Next configure LS0RAM and LS1RAM as data spaces for the CLA
|
||||
// First configure the CLA to be the master for LS0(1) and then
|
||||
// set the spaces to be code blocks
|
||||
//
|
||||
MemCfg_setLSRAMMasterSel(MEMCFG_SECT_LS0, MEMCFG_LSRAMMASTER_CPU_CLA1);
|
||||
MemCfg_setCLAMemType(MEMCFG_SECT_LS0, MEMCFG_CLA_MEM_DATA);
|
||||
|
||||
MemCfg_setLSRAMMasterSel(MEMCFG_SECT_LS1, MEMCFG_LSRAMMASTER_CPU_CLA1);
|
||||
MemCfg_setCLAMemType(MEMCFG_SECT_LS1, MEMCFG_CLA_MEM_DATA);
|
||||
}
|
||||
|
||||
//
|
||||
// initCpu2Cla1 - Initialize CLA1 task vectors and end of task ISRs
|
||||
//
|
||||
void initCpu2Cla1(void)
|
||||
{
|
||||
//
|
||||
// Compute all CLA task vectors
|
||||
// On Type-1 CLAs the MVECT registers accept full 16-bit task addresses as
|
||||
// opposed to offsets used on older Type-0 CLAs
|
||||
//
|
||||
// Adding a pragma to suppress the warnings when casting the CLA tasks'
|
||||
// function pointers to uint16_t. Compiler believes this to be improper
|
||||
// although the CLA only has 16-bit addressing.
|
||||
//
|
||||
#pragma diag_suppress=770
|
||||
CLA_mapTaskVector(CLA1_BASE, CLA_MVECT_1, (uint16_t)&Cla1Task1);
|
||||
CLA_mapTaskVector(CLA1_BASE, CLA_MVECT_2, (uint16_t)&Cla1Task2);
|
||||
CLA_mapTaskVector(CLA1_BASE, CLA_MVECT_3, (uint16_t)&Cla1Task3);
|
||||
CLA_mapTaskVector(CLA1_BASE, CLA_MVECT_4, (uint16_t)&Cla1Task4);
|
||||
CLA_mapTaskVector(CLA1_BASE, CLA_MVECT_5, (uint16_t)&Cla1Task5);
|
||||
CLA_mapTaskVector(CLA1_BASE, CLA_MVECT_6, (uint16_t)&Cla1Task6);
|
||||
CLA_mapTaskVector(CLA1_BASE, CLA_MVECT_7, (uint16_t)&Cla1Task7);
|
||||
CLA_mapTaskVector(CLA1_BASE, CLA_MVECT_8, (uint16_t)&Cla1Task8);
|
||||
#pragma diag_warning=770
|
||||
|
||||
//
|
||||
// Enable the IACK instruction to start a task on CLA in software
|
||||
// for all 8 CLA tasks. Also, globally enable all 8 tasks (or a
|
||||
// subset of tasks) by writing to their respective bits in the
|
||||
// MIER register
|
||||
//
|
||||
CLA_enableIACK(CLA1_BASE);
|
||||
CLA_enableTasks(CLA1_BASE, 0x00FF);
|
||||
|
||||
//
|
||||
// Configure the vectors for the end-of-task interrupt for all
|
||||
// 8 tasks
|
||||
//
|
||||
Interrupt_register(INT_CLA1_1, cla1Isr1);
|
||||
Interrupt_register(INT_CLA1_2, cla1Isr2);
|
||||
Interrupt_register(INT_CLA1_3, cla1Isr3);
|
||||
Interrupt_register(INT_CLA1_4, cla1Isr4);
|
||||
Interrupt_register(INT_CLA1_5, cla1Isr5);
|
||||
Interrupt_register(INT_CLA1_6, cla1Isr6);
|
||||
Interrupt_register(INT_CLA1_7, cla1Isr7);
|
||||
Interrupt_register(INT_CLA1_8, cla1Isr8);
|
||||
|
||||
//
|
||||
// Enable CLA interrupts at the group and subgroup levels
|
||||
//
|
||||
Interrupt_enable(INT_CLA1_1);
|
||||
Interrupt_enable(INT_CLA1_2);
|
||||
Interrupt_enable(INT_CLA1_3);
|
||||
Interrupt_enable(INT_CLA1_4);
|
||||
Interrupt_enable(INT_CLA1_5);
|
||||
Interrupt_enable(INT_CLA1_6);
|
||||
Interrupt_enable(INT_CLA1_7);
|
||||
Interrupt_enable(INT_CLA1_8);
|
||||
IER |= INTERRUPT_CPU_INT11;
|
||||
}
|
||||
|
||||
//
|
||||
// cla1Isr1 - CLA1 ISR 1
|
||||
//
|
||||
__interrupt void cla1Isr1()
|
||||
{
|
||||
//
|
||||
// Acknowledge the end-of-task interrupt for task 1
|
||||
//
|
||||
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP11);
|
||||
// asm(" ESTOP0");
|
||||
}
|
||||
|
||||
//
|
||||
// cla1Isr2 - CLA1 ISR 2
|
||||
//
|
||||
__interrupt void cla1Isr2()
|
||||
{
|
||||
asm(" ESTOP0");
|
||||
}
|
||||
|
||||
//
|
||||
// cla1Isr3 - CLA1 ISR 3
|
||||
//
|
||||
__interrupt void cla1Isr3()
|
||||
{
|
||||
asm(" ESTOP0");
|
||||
}
|
||||
|
||||
//
|
||||
// cla1Isr4 - CLA1 ISR 4
|
||||
//
|
||||
__interrupt void cla1Isr4()
|
||||
{
|
||||
asm(" ESTOP0");
|
||||
}
|
||||
|
||||
//
|
||||
// cla1Isr5 - CLA1 ISR 5
|
||||
//
|
||||
__interrupt void cla1Isr5()
|
||||
{
|
||||
asm(" ESTOP0");
|
||||
}
|
||||
|
||||
//
|
||||
// cla1Isr6 - CLA1 ISR 6
|
||||
//
|
||||
__interrupt void cla1Isr6()
|
||||
{
|
||||
asm(" ESTOP0");
|
||||
}
|
||||
|
||||
//
|
||||
// cla1Isr7 - CLA1 ISR 7
|
||||
//
|
||||
__interrupt void cla1Isr7()
|
||||
{
|
||||
asm(" ESTOP0");
|
||||
}
|
||||
|
||||
//
|
||||
// cla1Isr8 - CLA1 ISR 8
|
||||
//
|
||||
__interrupt void cla1Isr8()
|
||||
{
|
||||
//
|
||||
// Acknowledge the end-of-task interrupt for task 8
|
||||
//
|
||||
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP11);
|
||||
// asm(" ESTOP0");
|
||||
}
|
||||
|
||||
//
|
||||
// End of file
|
||||
//
|
||||
@@ -0,0 +1,145 @@
|
||||
//#############################################################################
|
||||
//
|
||||
// FILE: cla_ex2_iir2p2z_shared.h
|
||||
//
|
||||
// TITLE: CLA IIR 2-pole 2-zero filter
|
||||
//
|
||||
//#############################################################################
|
||||
//
|
||||
//
|
||||
// $Copyright:
|
||||
// Copyright (C) 2013-2024 Texas Instruments Incorporated - http://www.ti.com/
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// $
|
||||
//#############################################################################
|
||||
|
||||
#ifndef CLA_IIR2P2Z_SHARED_H
|
||||
#define CLA_IIR2P2Z_SHARED_H
|
||||
|
||||
//
|
||||
// Included Files
|
||||
//
|
||||
#include <stdint.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
//
|
||||
// Defines
|
||||
//
|
||||
#define BUFFER_SIZE 64
|
||||
#define TABLE_SIZE 64
|
||||
#define TABLE_SIZE_M_1 (TABLE_SIZE-1)
|
||||
#define PIBYTWO 1.570796327
|
||||
#define PI 3.141592653589
|
||||
#define INV2PI 0.159154943
|
||||
|
||||
//
|
||||
// Globals
|
||||
//
|
||||
|
||||
//
|
||||
//Task 1 (C) Variables
|
||||
//
|
||||
#define NUM_SAMPLES 128
|
||||
extern float S1_B[];
|
||||
extern float S1_A[];
|
||||
extern float S2_B[];
|
||||
extern float S2_A[];
|
||||
extern float S3_B[];
|
||||
extern float S3_A[];
|
||||
extern float xn; //Sample input
|
||||
extern float yn; //Sample output
|
||||
extern float fAdcInput[];
|
||||
extern float fBiquadOutput[];
|
||||
extern float fAdcInput[];
|
||||
|
||||
//
|
||||
//Task 2 (C) Variables
|
||||
//
|
||||
|
||||
//
|
||||
//Task 3 (C) Variables
|
||||
//
|
||||
|
||||
//
|
||||
//Task 4 (C) Variables
|
||||
//
|
||||
|
||||
//
|
||||
//Task 5 (C) Variables
|
||||
//
|
||||
|
||||
//
|
||||
//Task 6 (C) Variables
|
||||
//
|
||||
|
||||
//
|
||||
//Task 7 (C) Variables
|
||||
//
|
||||
|
||||
//
|
||||
//Task 8 (C) Variables
|
||||
//
|
||||
|
||||
//
|
||||
//Common (C) Variables
|
||||
//
|
||||
|
||||
//
|
||||
// Function Prototypes
|
||||
//
|
||||
// The following are symbols defined in the CLA assembly code
|
||||
// Including them in the shared header file makes them
|
||||
// .global and the main CPU can make use of them.
|
||||
//
|
||||
|
||||
//
|
||||
//CLA C Tasks
|
||||
//
|
||||
__interrupt void Cla1Task1();
|
||||
__interrupt void Cla1Task2();
|
||||
__interrupt void Cla1Task3();
|
||||
__interrupt void Cla1Task4();
|
||||
__interrupt void Cla1Task5();
|
||||
__interrupt void Cla1Task6();
|
||||
__interrupt void Cla1Task7();
|
||||
__interrupt void Cla1Task8();
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif // extern "C"
|
||||
|
||||
#endif // CLA_EX2_IIR2P2Z_SHARED_H_
|
||||
|
||||
//
|
||||
// End of file
|
||||
//
|
||||
Reference in New Issue
Block a user