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//###########################################################################
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//
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// FILE: cpu.h
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//
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// TITLE: Instruction wrappers for special CPU instructions needed by the
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// drivers.
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//
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//###########################################################################
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//
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// C2000Ware v5.04.00.00
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//
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// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// $
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//###########################################################################
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#ifndef CPU_H
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#define CPU_H
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//*****************************************************************************
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//
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// If building with a C++ compiler, make all of the definitions in this header
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// have a C binding.
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//
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//*****************************************************************************
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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//*****************************************************************************
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//
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//! \addtogroup cpu_api CPU
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//! \brief The module is used for configuring Cortex-M core registers
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//! @{
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//
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//*****************************************************************************
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#include <stdint.h>
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//
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// Define for no operation
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//
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#ifndef NOP
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#define NOP __asm(" NOP")
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#endif
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//*****************************************************************************
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//
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//! Returns the state of FAULTMASK register on entry and disable all
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//! interrupts except NMI.
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//!
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//! This function is wrapper function for the CPSID instruction. It returns
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//! the state of FAULTMASK on entry and disable all interrupts except NMI.
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//!
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//! \return Returns the state of FAULTMASK register.
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//
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//*****************************************************************************
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static inline uint32_t
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CPU_setFAULTMASK(void)
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{
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//
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// Disable interrupts and return previous FAULTMASK.
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//
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return(_disable_interrupts());
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}
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//*****************************************************************************
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//
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//! Returns the state of FAULTMASK register
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//!
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//! This function is wrapper function for returning the state of FAULTMASK
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//! register(indicating whether interrupts except NMI are enabled or disabled).
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//!
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//! \return Returns the state of FAULTMASK register.
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//
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//*****************************************************************************
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static inline uint32_t
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CPU_getFAULTMASK(void)
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{
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//
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// Read FAULTMASK register.
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//
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__asm(" mrs r0, FAULTMASK\n"
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" bx lr\n");
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//
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// The following keeps the compiler happy, because it wants to see a
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// return value from this function. It will generate code to return
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// a zero. However, the real return is the "bx lr" above, so the
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// return(0) is never executed and the function returns with the value
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// you expect in R0.
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//
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return(0U);
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}
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//*****************************************************************************
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//
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//! Returns the state of FAULTMASK register and enable the interrupts
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//!
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//! This function is wrapper function for returning the state of FAULTMASK
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//! register and enabling the interrupts.
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//!
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//! \return Returns the state of FAULTMASK register.
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//
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//*****************************************************************************
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static inline uint32_t
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CPU_clearFAULTMASK(void)
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{
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//
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// Enable interrupts and return previous FAULTMASK status.
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//
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return(_enable_interrupts());
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}
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//*****************************************************************************
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//
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//! Returns the state of PRIMASK register on entry and disable interrupts
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//!
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//! This function is wrapper function for the CPSID instruction. It returns
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//! the state of PRIMASK on entry and disable interrupts.
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//!
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//! \return Returns the state of PRIMASK register.
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//
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//*****************************************************************************
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static inline uint32_t
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CPU_setPRIMASK(void)
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{
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//
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// Read PRIMASK and Disable interrupts.
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//
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return(_disable_IRQ());
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}
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//*****************************************************************************
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//
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//! Returns the state of PRIMASK register
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//!
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//! This function is wrapper function for returning the state of PRIMASK
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//! register(indicating whether interrupts are enabled or disabled).
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//!
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//! \return Returns the state of PRIMASK register.
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//
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//*****************************************************************************
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static inline uint32_t
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CPU_getPRIMASK(void)
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{
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//
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// Return PRIMASK register status.
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//
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return(__get_PRIMASK());
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}
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//*****************************************************************************
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//
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//! Returns the state of PRIMASK register and enable the interrupts
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//!
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//! This function is wrapper function for returning the state of PRIMASK
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//! register and enabling the interrupts.
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//!
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//! \return Returns the state of PRIMASK register.
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//
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//*****************************************************************************
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static inline uint32_t
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CPU_clearPRIMASK(void)
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{
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//
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// Enable interrupts and return previous PRIMASK setting.
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//
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return(_enable_IRQ());
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}
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//*****************************************************************************
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//
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//! Wrapper function for the WFI instruction
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//!
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//! This function is wrapper function for the WFI instruction.
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//!
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//! \return None
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//
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//*****************************************************************************
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static inline void
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CPU_wfi(void)
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{
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//
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// Wait for the next interrupt.
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//
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__asm(" wfi\n");
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}
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//*****************************************************************************
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//
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//! Writes the BASEPRI register
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//!
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//! \param basePriority is the value to be set
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//!
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//! This function is wrapper function for writing the BASEPRI register. MSB
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//! 3-bits are enabled for setting the priority and non-implemented low-order
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//! bits read as zero and ignore writes. To set the base priority of 0x2U,
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//! the param \e basePriority to be passed should be 0x20U.
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//!
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//! \return None.
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//
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//*****************************************************************************
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static inline void
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CPU_setBASEPRI(uint32_t basePriority)
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{
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//
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// Set the BASEPRI register
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//
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_set_interrupt_priority(basePriority);
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}
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//*****************************************************************************
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//
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//! Returns the state of BASEPRI register
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//!
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//! This function is wrapper function for reading the BASEPRI register.
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//!
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//! \return Returns the state of BASEPRI register
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//
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//*****************************************************************************
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static inline uint32_t
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CPU_getBASEPRI(void)
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{
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//
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// Read BASEPRI register.
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//
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__asm(" mrs r0, BASEPRI\n"
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" bx lr\n");
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//
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// The following keeps the compiler happy, because it wants to see a
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// return value from this function. It will generate code to return
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// a zero. However, the real return is the "bx lr" above, so the
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// return(0) is never executed and the function returns with the value
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// you expect in R0.
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//
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return(0U);
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}
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//*****************************************************************************
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//
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// Extern compiler intrinsic prototypes. See compiler User's Guide for details.
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//
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//*****************************************************************************
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extern uint32_t __get_PRIMASK(void);
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extern uint32_t _disable_interrupts(void);
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extern uint32_t _enable_interrupts();
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extern uint32_t _disable_IRQ();
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extern uint32_t _enable_IRQ();
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extern uint32_t _set_interrupt_priority(uint32_t priority);
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//*****************************************************************************
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//
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// Close the Doxygen group.
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//! @}
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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// Mark the end of the C bindings section for C++ compilers.
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//
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//*****************************************************************************
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#ifdef __cplusplus
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}
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#endif
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#endif // CPU_H
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