Update repo
This commit is contained in:
+40
@@ -0,0 +1,40 @@
|
||||
<projectSpec>
|
||||
<project
|
||||
name="mcan_ex10_receive_multiple_buffers"
|
||||
device="TMS320F28388D"
|
||||
cgtVersion="22.6.1.LTS"
|
||||
products="sysconfig;C2000WARE"
|
||||
outputFormat="ELF"
|
||||
launchWizard="False"
|
||||
linkerCommandFile=""
|
||||
enableSysConfigTool="true"
|
||||
sysConfigBuildOptions="--product ${C2000WARE_ROOT}/.metadata/sdk.json --device F2838x --package 337bga --part F2838x_337bga"
|
||||
postBuildStep="
|
||||
echo "========= Build of the CLB simulation has moved to the CLB Tool. Click the '?' icon by the _Generate CLB Simulation File_ enable for more details (located in the Global Parameters of the Tile Design SysConfig module) ============="
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/dot_file_libraries/clbDotUtility.js" "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/" "${BuildDirectory}/syscfg" "${BuildDirectory}/syscfg/clb.dot"
|
||||
;if ${GENERATE_DIAGRAM} == 1 mkdir "${BuildDirectory}/diagrams"
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/driverlib/.meta/generate_diagrams.js" "${C2000WARE_ROOT}" "${BuildDirectory}/diagrams" "${BuildDirectory}/syscfg"
|
||||
"
|
||||
>
|
||||
<configuration name="CPU1_RAM" compilerBuildOptions= "--opt_level=off -I${C2000WARE_ROOT} -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} -v28 -ml -mt --cla_support=cla2 --define=RAM --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=RAM -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs " />
|
||||
<configuration name="CPU1_FLASH" compilerBuildOptions="--opt_level=off -I${C2000WARE_ROOT} -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} --define=_FLASH -v28 -ml -mt --cla_support=cla2 --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=_FLASH -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs " />
|
||||
|
||||
<pathVariable name="C2000WARE_DLIB_ROOT" path="../../../../../../driverlib/f2838x/driverlib/" scope="project" />
|
||||
<pathVariable name="C2000WARE_ROOT" path="../../../../../../" scope="project" />
|
||||
<pathVariable name="CLB_SYSCFG_ROOT" path="../../../../../../utilities/clb_tool/clb_syscfg/" scope="project" />
|
||||
<pathVariable name="SYSTEMC_INSTALL" path="../../../../../../utilities/clb_tool/clb_syscfg/systemc-2.3.3" scope="project" />
|
||||
<pathVariable name="CLB_SIM_COMPILER" path="C:/TDM-GCC-64/bin" scope="project" />
|
||||
<buildVariable name="GENERATE_DIAGRAM" value="0" scope="project" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/include/driverlib.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/include/device.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/source/device.c" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/targetConfigs/TMS320F28388D.ccxml" targetDirectory="targetConfigs" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/cmd/2838x_RAM_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_RAM" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/cmd/2838x_FLASH_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_FLASH" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/source/f2838x_codestartbranch.asm" targetDirectory="device" />
|
||||
<file action="link" path="../../../../../../driverlib/f2838x/driverlib/ccs/Debug/driverlib.lib" targetDirectory="" />
|
||||
<file action="copy" path="../../../../../../driverlib/f2838x/driverlib/" targetDirectory="device" excludeFromBuild="True" />
|
||||
<file action="copy" path="../mcan_ex10_receive_multiple_buffers.c" targetDirectory="" />
|
||||
<file action="copy" path="../../empty_projects/c2000.syscfg" targetDirectory="" />
|
||||
</project>
|
||||
</projectSpec>
|
||||
+40
@@ -0,0 +1,40 @@
|
||||
<projectSpec>
|
||||
<project
|
||||
name="mcan_ex12_receive_priority"
|
||||
device="TMS320F28388D"
|
||||
cgtVersion="22.6.1.LTS"
|
||||
products="sysconfig;C2000WARE"
|
||||
outputFormat="ELF"
|
||||
launchWizard="False"
|
||||
linkerCommandFile=""
|
||||
enableSysConfigTool="true"
|
||||
sysConfigBuildOptions="--product ${C2000WARE_ROOT}/.metadata/sdk.json --device F2838x --package 337bga --part F2838x_337bga"
|
||||
postBuildStep="
|
||||
echo "========= Build of the CLB simulation has moved to the CLB Tool. Click the '?' icon by the _Generate CLB Simulation File_ enable for more details (located in the Global Parameters of the Tile Design SysConfig module) ============="
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/dot_file_libraries/clbDotUtility.js" "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/" "${BuildDirectory}/syscfg" "${BuildDirectory}/syscfg/clb.dot"
|
||||
;if ${GENERATE_DIAGRAM} == 1 mkdir "${BuildDirectory}/diagrams"
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/driverlib/.meta/generate_diagrams.js" "${C2000WARE_ROOT}" "${BuildDirectory}/diagrams" "${BuildDirectory}/syscfg"
|
||||
"
|
||||
>
|
||||
<configuration name="CPU1_RAM" compilerBuildOptions= "--opt_level=off -I${C2000WARE_ROOT} -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} -v28 -ml -mt --cla_support=cla2 --define=RAM --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=RAM -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs " />
|
||||
<configuration name="CPU1_FLASH" compilerBuildOptions="--opt_level=off -I${C2000WARE_ROOT} -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} --define=_FLASH -v28 -ml -mt --cla_support=cla2 --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=_FLASH -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs " />
|
||||
|
||||
<pathVariable name="C2000WARE_DLIB_ROOT" path="../../../../../../driverlib/f2838x/driverlib/" scope="project" />
|
||||
<pathVariable name="C2000WARE_ROOT" path="../../../../../../" scope="project" />
|
||||
<pathVariable name="CLB_SYSCFG_ROOT" path="../../../../../../utilities/clb_tool/clb_syscfg/" scope="project" />
|
||||
<pathVariable name="SYSTEMC_INSTALL" path="../../../../../../utilities/clb_tool/clb_syscfg/systemc-2.3.3" scope="project" />
|
||||
<pathVariable name="CLB_SIM_COMPILER" path="C:/TDM-GCC-64/bin" scope="project" />
|
||||
<buildVariable name="GENERATE_DIAGRAM" value="0" scope="project" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/include/driverlib.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/include/device.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/source/device.c" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/targetConfigs/TMS320F28388D.ccxml" targetDirectory="targetConfigs" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/cmd/2838x_RAM_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_RAM" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/cmd/2838x_FLASH_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_FLASH" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/source/f2838x_codestartbranch.asm" targetDirectory="device" />
|
||||
<file action="link" path="../../../../../../driverlib/f2838x/driverlib/ccs/Debug/driverlib.lib" targetDirectory="" />
|
||||
<file action="copy" path="../../../../../../driverlib/f2838x/driverlib/" targetDirectory="device" excludeFromBuild="True" />
|
||||
<file action="copy" path="../mcan_ex12_receive_priority.c" targetDirectory="" />
|
||||
<file action="copy" path="../../empty_projects/c2000.syscfg" targetDirectory="" />
|
||||
</project>
|
||||
</projectSpec>
|
||||
+40
@@ -0,0 +1,40 @@
|
||||
<projectSpec>
|
||||
<project
|
||||
name="mcan_ex13_transmit_TxEventFIFO"
|
||||
device="TMS320F28388D"
|
||||
cgtVersion="22.6.1.LTS"
|
||||
products="sysconfig;C2000WARE"
|
||||
outputFormat="ELF"
|
||||
launchWizard="False"
|
||||
linkerCommandFile=""
|
||||
enableSysConfigTool="true"
|
||||
sysConfigBuildOptions="--product ${C2000WARE_ROOT}/.metadata/sdk.json --device F2838x --package 337bga --part F2838x_337bga"
|
||||
postBuildStep="
|
||||
echo "========= Build of the CLB simulation has moved to the CLB Tool. Click the '?' icon by the _Generate CLB Simulation File_ enable for more details (located in the Global Parameters of the Tile Design SysConfig module) ============="
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/dot_file_libraries/clbDotUtility.js" "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/" "${BuildDirectory}/syscfg" "${BuildDirectory}/syscfg/clb.dot"
|
||||
;if ${GENERATE_DIAGRAM} == 1 mkdir "${BuildDirectory}/diagrams"
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/driverlib/.meta/generate_diagrams.js" "${C2000WARE_ROOT}" "${BuildDirectory}/diagrams" "${BuildDirectory}/syscfg"
|
||||
"
|
||||
>
|
||||
<configuration name="CPU1_RAM" compilerBuildOptions= "--opt_level=off -I${C2000WARE_ROOT} -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} -v28 -ml -mt --cla_support=cla2 --define=RAM --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=RAM -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs " />
|
||||
<configuration name="CPU1_FLASH" compilerBuildOptions="--opt_level=off -I${C2000WARE_ROOT} -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} --define=_FLASH -v28 -ml -mt --cla_support=cla2 --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=_FLASH -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs " />
|
||||
|
||||
<pathVariable name="C2000WARE_DLIB_ROOT" path="../../../../../../driverlib/f2838x/driverlib/" scope="project" />
|
||||
<pathVariable name="C2000WARE_ROOT" path="../../../../../../" scope="project" />
|
||||
<pathVariable name="CLB_SYSCFG_ROOT" path="../../../../../../utilities/clb_tool/clb_syscfg/" scope="project" />
|
||||
<pathVariable name="SYSTEMC_INSTALL" path="../../../../../../utilities/clb_tool/clb_syscfg/systemc-2.3.3" scope="project" />
|
||||
<pathVariable name="CLB_SIM_COMPILER" path="C:/TDM-GCC-64/bin" scope="project" />
|
||||
<buildVariable name="GENERATE_DIAGRAM" value="0" scope="project" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/include/driverlib.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/include/device.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/source/device.c" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/targetConfigs/TMS320F28388D.ccxml" targetDirectory="targetConfigs" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/cmd/2838x_RAM_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_RAM" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/cmd/2838x_FLASH_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_FLASH" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/source/f2838x_codestartbranch.asm" targetDirectory="device" />
|
||||
<file action="link" path="../../../../../../driverlib/f2838x/driverlib/ccs/Debug/driverlib.lib" targetDirectory="" />
|
||||
<file action="copy" path="../../../../../../driverlib/f2838x/driverlib/" targetDirectory="device" excludeFromBuild="True" />
|
||||
<file action="copy" path="../mcan_ex13_transmit_TxEventFIFO.c" targetDirectory="" />
|
||||
<file action="copy" path="../../empty_projects/c2000.syscfg" targetDirectory="" />
|
||||
</project>
|
||||
</projectSpec>
|
||||
@@ -0,0 +1,40 @@
|
||||
<projectSpec>
|
||||
<project
|
||||
name="mcan_ex15_timestamp"
|
||||
device="TMS320F28388D"
|
||||
cgtVersion="22.6.1.LTS"
|
||||
products="sysconfig;C2000WARE"
|
||||
outputFormat="ELF"
|
||||
launchWizard="False"
|
||||
linkerCommandFile=""
|
||||
enableSysConfigTool="true"
|
||||
sysConfigBuildOptions="--product ${C2000WARE_ROOT}/.metadata/sdk.json --device F2838x --package 337bga --part F2838x_337bga"
|
||||
postBuildStep="
|
||||
echo "========= Build of the CLB simulation has moved to the CLB Tool. Click the '?' icon by the _Generate CLB Simulation File_ enable for more details (located in the Global Parameters of the Tile Design SysConfig module) ============="
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/dot_file_libraries/clbDotUtility.js" "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/" "${BuildDirectory}/syscfg" "${BuildDirectory}/syscfg/clb.dot"
|
||||
;if ${GENERATE_DIAGRAM} == 1 mkdir "${BuildDirectory}/diagrams"
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/driverlib/.meta/generate_diagrams.js" "${C2000WARE_ROOT}" "${BuildDirectory}/diagrams" "${BuildDirectory}/syscfg"
|
||||
"
|
||||
>
|
||||
<configuration name="CPU1_RAM" compilerBuildOptions= "--opt_level=off -I${C2000WARE_ROOT} -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} -v28 -ml -mt --cla_support=cla2 --define=RAM --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=RAM -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs " />
|
||||
<configuration name="CPU1_FLASH" compilerBuildOptions="--opt_level=off -I${C2000WARE_ROOT} -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} --define=_FLASH -v28 -ml -mt --cla_support=cla2 --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=_FLASH -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs " />
|
||||
|
||||
<pathVariable name="C2000WARE_DLIB_ROOT" path="../../../../../../driverlib/f2838x/driverlib/" scope="project" />
|
||||
<pathVariable name="C2000WARE_ROOT" path="../../../../../../" scope="project" />
|
||||
<pathVariable name="CLB_SYSCFG_ROOT" path="../../../../../../utilities/clb_tool/clb_syscfg/" scope="project" />
|
||||
<pathVariable name="SYSTEMC_INSTALL" path="../../../../../../utilities/clb_tool/clb_syscfg/systemc-2.3.3" scope="project" />
|
||||
<pathVariable name="CLB_SIM_COMPILER" path="C:/TDM-GCC-64/bin" scope="project" />
|
||||
<buildVariable name="GENERATE_DIAGRAM" value="0" scope="project" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/include/driverlib.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/include/device.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/source/device.c" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/targetConfigs/TMS320F28388D.ccxml" targetDirectory="targetConfigs" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/cmd/2838x_RAM_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_RAM" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/cmd/2838x_FLASH_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_FLASH" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/source/f2838x_codestartbranch.asm" targetDirectory="device" />
|
||||
<file action="link" path="../../../../../../driverlib/f2838x/driverlib/ccs/Debug/driverlib.lib" targetDirectory="" />
|
||||
<file action="copy" path="../../../../../../driverlib/f2838x/driverlib/" targetDirectory="device" excludeFromBuild="True" />
|
||||
<file action="copy" path="../mcan_ex15_timestamp.c" targetDirectory="" />
|
||||
<file action="copy" path="../../empty_projects/c2000.syscfg" targetDirectory="" />
|
||||
</project>
|
||||
</projectSpec>
|
||||
@@ -0,0 +1,40 @@
|
||||
<projectSpec>
|
||||
<project
|
||||
name="mcan_ex1_loopback"
|
||||
device="TMS320F28388D"
|
||||
cgtVersion="22.6.1.LTS"
|
||||
products="sysconfig;C2000WARE"
|
||||
outputFormat="ELF"
|
||||
launchWizard="False"
|
||||
linkerCommandFile=""
|
||||
enableSysConfigTool="true"
|
||||
sysConfigBuildOptions="--product ${C2000WARE_ROOT}/.metadata/sdk.json --device F2838x --package 337bga --part F2838x_337bga"
|
||||
postBuildStep="
|
||||
echo "========= Build of the CLB simulation has moved to the CLB Tool. Click the '?' icon by the _Generate CLB Simulation File_ enable for more details (located in the Global Parameters of the Tile Design SysConfig module) ============="
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/dot_file_libraries/clbDotUtility.js" "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/" "${BuildDirectory}/syscfg" "${BuildDirectory}/syscfg/clb.dot"
|
||||
;if ${GENERATE_DIAGRAM} == 1 mkdir "${BuildDirectory}/diagrams"
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/driverlib/.meta/generate_diagrams.js" "${C2000WARE_ROOT}" "${BuildDirectory}/diagrams" "${BuildDirectory}/syscfg"
|
||||
"
|
||||
>
|
||||
<configuration name="CPU1_RAM" compilerBuildOptions= "--opt_level=off -I${C2000WARE_ROOT} -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} -v28 -ml -mt --cla_support=cla2 --define=RAM --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=RAM -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs " />
|
||||
<configuration name="CPU1_FLASH" compilerBuildOptions="--opt_level=off -I${C2000WARE_ROOT} -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} --define=_FLASH -v28 -ml -mt --cla_support=cla2 --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=_FLASH -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs " />
|
||||
|
||||
<pathVariable name="C2000WARE_DLIB_ROOT" path="../../../../../../driverlib/f2838x/driverlib/" scope="project" />
|
||||
<pathVariable name="C2000WARE_ROOT" path="../../../../../../" scope="project" />
|
||||
<pathVariable name="CLB_SYSCFG_ROOT" path="../../../../../../utilities/clb_tool/clb_syscfg/" scope="project" />
|
||||
<pathVariable name="SYSTEMC_INSTALL" path="../../../../../../utilities/clb_tool/clb_syscfg/systemc-2.3.3" scope="project" />
|
||||
<pathVariable name="CLB_SIM_COMPILER" path="C:/TDM-GCC-64/bin" scope="project" />
|
||||
<buildVariable name="GENERATE_DIAGRAM" value="0" scope="project" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/include/driverlib.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/include/device.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/source/device.c" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/targetConfigs/TMS320F28388D.ccxml" targetDirectory="targetConfigs" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/cmd/2838x_RAM_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_RAM" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/cmd/2838x_FLASH_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_FLASH" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/source/f2838x_codestartbranch.asm" targetDirectory="device" />
|
||||
<file action="link" path="../../../../../../driverlib/f2838x/driverlib/ccs/Debug/driverlib.lib" targetDirectory="" />
|
||||
<file action="copy" path="../../../../../../driverlib/f2838x/driverlib/" targetDirectory="device" excludeFromBuild="True" />
|
||||
<file action="copy" path="../mcan_ex1_loopback.c" targetDirectory="" />
|
||||
<file action="copy" path="../../empty_projects/c2000.syscfg" targetDirectory="" />
|
||||
</project>
|
||||
</projectSpec>
|
||||
+40
@@ -0,0 +1,40 @@
|
||||
<projectSpec>
|
||||
<project
|
||||
name="mcan_ex3_loopback_syscfg"
|
||||
device="TMS320F28388D"
|
||||
cgtVersion="22.6.1.LTS"
|
||||
products="sysconfig;C2000WARE"
|
||||
outputFormat="ELF"
|
||||
launchWizard="False"
|
||||
linkerCommandFile=""
|
||||
enableSysConfigTool="true"
|
||||
sysConfigBuildOptions="--product ${C2000WARE_ROOT}/.metadata/sdk.json --device F2838x --package 337bga --part F2838x_337bga"
|
||||
postBuildStep="
|
||||
echo "========= Build of the CLB simulation has moved to the CLB Tool. Click the '?' icon by the _Generate CLB Simulation File_ enable for more details (located in the Global Parameters of the Tile Design SysConfig module) ============="
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/dot_file_libraries/clbDotUtility.js" "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/" "${BuildDirectory}/syscfg" "${BuildDirectory}/syscfg/clb.dot"
|
||||
;if ${GENERATE_DIAGRAM} == 1 mkdir "${BuildDirectory}/diagrams"
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/driverlib/.meta/generate_diagrams.js" "${C2000WARE_ROOT}" "${BuildDirectory}/diagrams" "${BuildDirectory}/syscfg"
|
||||
"
|
||||
>
|
||||
<configuration name="CPU1_RAM" compilerBuildOptions= "--opt_level=off -I${C2000WARE_ROOT} -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} -v28 -ml -mt --cla_support=cla2 --define=RAM --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=RAM -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs " />
|
||||
<configuration name="CPU1_FLASH" compilerBuildOptions="--opt_level=off -I${C2000WARE_ROOT} -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} --define=_FLASH -v28 -ml -mt --cla_support=cla2 --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=_FLASH -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs " />
|
||||
|
||||
<pathVariable name="C2000WARE_DLIB_ROOT" path="../../../../../../driverlib/f2838x/driverlib/" scope="project" />
|
||||
<pathVariable name="C2000WARE_ROOT" path="../../../../../../" scope="project" />
|
||||
<pathVariable name="CLB_SYSCFG_ROOT" path="../../../../../../utilities/clb_tool/clb_syscfg/" scope="project" />
|
||||
<pathVariable name="SYSTEMC_INSTALL" path="../../../../../../utilities/clb_tool/clb_syscfg/systemc-2.3.3" scope="project" />
|
||||
<pathVariable name="CLB_SIM_COMPILER" path="C:/TDM-GCC-64/bin" scope="project" />
|
||||
<buildVariable name="GENERATE_DIAGRAM" value="0" scope="project" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/include/driverlib.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/include/device.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/source/device.c" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/targetConfigs/TMS320F28388D.ccxml" targetDirectory="targetConfigs" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/cmd/2838x_RAM_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_RAM" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/cmd/2838x_FLASH_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_FLASH" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/source/f2838x_codestartbranch.asm" targetDirectory="device" />
|
||||
<file action="link" path="../../../../../../driverlib/f2838x/driverlib/ccs/Debug/driverlib.lib" targetDirectory="" />
|
||||
<file action="copy" path="../../../../../../driverlib/f2838x/driverlib/" targetDirectory="device" excludeFromBuild="True" />
|
||||
<file action="copy" path="../mcan_ex3_loopback_syscfg.c" targetDirectory="" />
|
||||
<file action="copy" path="../mcan_ex3_loopback_syscfg.syscfg" targetDirectory="" />
|
||||
</project>
|
||||
</projectSpec>
|
||||
@@ -0,0 +1,40 @@
|
||||
<projectSpec>
|
||||
<project
|
||||
name="mcan_ex4_receive"
|
||||
device="TMS320F28388D"
|
||||
cgtVersion="22.6.1.LTS"
|
||||
products="sysconfig;C2000WARE"
|
||||
outputFormat="ELF"
|
||||
launchWizard="False"
|
||||
linkerCommandFile=""
|
||||
enableSysConfigTool="true"
|
||||
sysConfigBuildOptions="--product ${C2000WARE_ROOT}/.metadata/sdk.json --device F2838x --package 337bga --part F2838x_337bga"
|
||||
postBuildStep="
|
||||
echo "========= Build of the CLB simulation has moved to the CLB Tool. Click the '?' icon by the _Generate CLB Simulation File_ enable for more details (located in the Global Parameters of the Tile Design SysConfig module) ============="
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/dot_file_libraries/clbDotUtility.js" "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/" "${BuildDirectory}/syscfg" "${BuildDirectory}/syscfg/clb.dot"
|
||||
;if ${GENERATE_DIAGRAM} == 1 mkdir "${BuildDirectory}/diagrams"
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/driverlib/.meta/generate_diagrams.js" "${C2000WARE_ROOT}" "${BuildDirectory}/diagrams" "${BuildDirectory}/syscfg"
|
||||
"
|
||||
>
|
||||
<configuration name="CPU1_RAM" compilerBuildOptions= "--opt_level=off -I${C2000WARE_ROOT} -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} -v28 -ml -mt --cla_support=cla2 --define=RAM --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=RAM -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs " />
|
||||
<configuration name="CPU1_FLASH" compilerBuildOptions="--opt_level=off -I${C2000WARE_ROOT} -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} --define=_FLASH -v28 -ml -mt --cla_support=cla2 --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=_FLASH -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs " />
|
||||
|
||||
<pathVariable name="C2000WARE_DLIB_ROOT" path="../../../../../../driverlib/f2838x/driverlib/" scope="project" />
|
||||
<pathVariable name="C2000WARE_ROOT" path="../../../../../../" scope="project" />
|
||||
<pathVariable name="CLB_SYSCFG_ROOT" path="../../../../../../utilities/clb_tool/clb_syscfg/" scope="project" />
|
||||
<pathVariable name="SYSTEMC_INSTALL" path="../../../../../../utilities/clb_tool/clb_syscfg/systemc-2.3.3" scope="project" />
|
||||
<pathVariable name="CLB_SIM_COMPILER" path="C:/TDM-GCC-64/bin" scope="project" />
|
||||
<buildVariable name="GENERATE_DIAGRAM" value="0" scope="project" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/include/driverlib.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/include/device.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/source/device.c" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/targetConfigs/TMS320F28388D.ccxml" targetDirectory="targetConfigs" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/cmd/2838x_RAM_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_RAM" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/cmd/2838x_FLASH_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_FLASH" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/source/f2838x_codestartbranch.asm" targetDirectory="device" />
|
||||
<file action="link" path="../../../../../../driverlib/f2838x/driverlib/ccs/Debug/driverlib.lib" targetDirectory="" />
|
||||
<file action="copy" path="../../../../../../driverlib/f2838x/driverlib/" targetDirectory="device" excludeFromBuild="True" />
|
||||
<file action="copy" path="../mcan_ex4_receive.c" targetDirectory="" />
|
||||
<file action="copy" path="../../empty_projects/c2000.syscfg" targetDirectory="" />
|
||||
</project>
|
||||
</projectSpec>
|
||||
+40
@@ -0,0 +1,40 @@
|
||||
<projectSpec>
|
||||
<project
|
||||
name="mcan_ex5_mask_filter_receive"
|
||||
device="TMS320F28388D"
|
||||
cgtVersion="22.6.1.LTS"
|
||||
products="sysconfig;C2000WARE"
|
||||
outputFormat="ELF"
|
||||
launchWizard="False"
|
||||
linkerCommandFile=""
|
||||
enableSysConfigTool="true"
|
||||
sysConfigBuildOptions="--product ${C2000WARE_ROOT}/.metadata/sdk.json --device F2838x --package 337bga --part F2838x_337bga"
|
||||
postBuildStep="
|
||||
echo "========= Build of the CLB simulation has moved to the CLB Tool. Click the '?' icon by the _Generate CLB Simulation File_ enable for more details (located in the Global Parameters of the Tile Design SysConfig module) ============="
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/dot_file_libraries/clbDotUtility.js" "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/" "${BuildDirectory}/syscfg" "${BuildDirectory}/syscfg/clb.dot"
|
||||
;if ${GENERATE_DIAGRAM} == 1 mkdir "${BuildDirectory}/diagrams"
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/driverlib/.meta/generate_diagrams.js" "${C2000WARE_ROOT}" "${BuildDirectory}/diagrams" "${BuildDirectory}/syscfg"
|
||||
"
|
||||
>
|
||||
<configuration name="CPU1_RAM" compilerBuildOptions= "--opt_level=off -I${C2000WARE_ROOT} -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} -v28 -ml -mt --cla_support=cla2 --define=RAM --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=RAM -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs " />
|
||||
<configuration name="CPU1_FLASH" compilerBuildOptions="--opt_level=off -I${C2000WARE_ROOT} -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} --define=_FLASH -v28 -ml -mt --cla_support=cla2 --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=_FLASH -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs " />
|
||||
|
||||
<pathVariable name="C2000WARE_DLIB_ROOT" path="../../../../../../driverlib/f2838x/driverlib/" scope="project" />
|
||||
<pathVariable name="C2000WARE_ROOT" path="../../../../../../" scope="project" />
|
||||
<pathVariable name="CLB_SYSCFG_ROOT" path="../../../../../../utilities/clb_tool/clb_syscfg/" scope="project" />
|
||||
<pathVariable name="SYSTEMC_INSTALL" path="../../../../../../utilities/clb_tool/clb_syscfg/systemc-2.3.3" scope="project" />
|
||||
<pathVariable name="CLB_SIM_COMPILER" path="C:/TDM-GCC-64/bin" scope="project" />
|
||||
<buildVariable name="GENERATE_DIAGRAM" value="0" scope="project" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/include/driverlib.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/include/device.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/source/device.c" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/targetConfigs/TMS320F28388D.ccxml" targetDirectory="targetConfigs" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/cmd/2838x_RAM_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_RAM" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/cmd/2838x_FLASH_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_FLASH" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/source/f2838x_codestartbranch.asm" targetDirectory="device" />
|
||||
<file action="link" path="../../../../../../driverlib/f2838x/driverlib/ccs/Debug/driverlib.lib" targetDirectory="" />
|
||||
<file action="copy" path="../../../../../../driverlib/f2838x/driverlib/" targetDirectory="device" excludeFromBuild="True" />
|
||||
<file action="copy" path="../mcan_ex5_mask_filter_receive.c" targetDirectory="" />
|
||||
<file action="copy" path="../../empty_projects/c2000.syscfg" targetDirectory="" />
|
||||
</project>
|
||||
</projectSpec>
|
||||
+40
@@ -0,0 +1,40 @@
|
||||
<projectSpec>
|
||||
<project
|
||||
name="mcan_ex7_classic_transmit"
|
||||
device="TMS320F28388D"
|
||||
cgtVersion="22.6.1.LTS"
|
||||
products="sysconfig;C2000WARE"
|
||||
outputFormat="ELF"
|
||||
launchWizard="False"
|
||||
linkerCommandFile=""
|
||||
enableSysConfigTool="true"
|
||||
sysConfigBuildOptions="--product ${C2000WARE_ROOT}/.metadata/sdk.json --device F2838x --package 337bga --part F2838x_337bga"
|
||||
postBuildStep="
|
||||
echo "========= Build of the CLB simulation has moved to the CLB Tool. Click the '?' icon by the _Generate CLB Simulation File_ enable for more details (located in the Global Parameters of the Tile Design SysConfig module) ============="
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/dot_file_libraries/clbDotUtility.js" "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/" "${BuildDirectory}/syscfg" "${BuildDirectory}/syscfg/clb.dot"
|
||||
;if ${GENERATE_DIAGRAM} == 1 mkdir "${BuildDirectory}/diagrams"
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/driverlib/.meta/generate_diagrams.js" "${C2000WARE_ROOT}" "${BuildDirectory}/diagrams" "${BuildDirectory}/syscfg"
|
||||
"
|
||||
>
|
||||
<configuration name="CPU1_RAM" compilerBuildOptions= "--opt_level=off -I${C2000WARE_ROOT} -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} -v28 -ml -mt --cla_support=cla2 --define=RAM --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=RAM -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs " />
|
||||
<configuration name="CPU1_FLASH" compilerBuildOptions="--opt_level=off -I${C2000WARE_ROOT} -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} --define=_FLASH -v28 -ml -mt --cla_support=cla2 --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=_FLASH -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs " />
|
||||
|
||||
<pathVariable name="C2000WARE_DLIB_ROOT" path="../../../../../../driverlib/f2838x/driverlib/" scope="project" />
|
||||
<pathVariable name="C2000WARE_ROOT" path="../../../../../../" scope="project" />
|
||||
<pathVariable name="CLB_SYSCFG_ROOT" path="../../../../../../utilities/clb_tool/clb_syscfg/" scope="project" />
|
||||
<pathVariable name="SYSTEMC_INSTALL" path="../../../../../../utilities/clb_tool/clb_syscfg/systemc-2.3.3" scope="project" />
|
||||
<pathVariable name="CLB_SIM_COMPILER" path="C:/TDM-GCC-64/bin" scope="project" />
|
||||
<buildVariable name="GENERATE_DIAGRAM" value="0" scope="project" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/include/driverlib.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/include/device.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/source/device.c" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/targetConfigs/TMS320F28388D.ccxml" targetDirectory="targetConfigs" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/cmd/2838x_RAM_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_RAM" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/cmd/2838x_FLASH_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_FLASH" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/source/f2838x_codestartbranch.asm" targetDirectory="device" />
|
||||
<file action="link" path="../../../../../../driverlib/f2838x/driverlib/ccs/Debug/driverlib.lib" targetDirectory="" />
|
||||
<file action="copy" path="../../../../../../driverlib/f2838x/driverlib/" targetDirectory="device" excludeFromBuild="True" />
|
||||
<file action="copy" path="../mcan_ex7_classic_transmit.c" targetDirectory="" />
|
||||
<file action="copy" path="../../empty_projects/c2000.syscfg" targetDirectory="" />
|
||||
</project>
|
||||
</projectSpec>
|
||||
+40
@@ -0,0 +1,40 @@
|
||||
<projectSpec>
|
||||
<project
|
||||
name="mcan_ex8_range_filter_receive"
|
||||
device="TMS320F28388D"
|
||||
cgtVersion="22.6.1.LTS"
|
||||
products="sysconfig;C2000WARE"
|
||||
outputFormat="ELF"
|
||||
launchWizard="False"
|
||||
linkerCommandFile=""
|
||||
enableSysConfigTool="true"
|
||||
sysConfigBuildOptions="--product ${C2000WARE_ROOT}/.metadata/sdk.json --device F2838x --package 337bga --part F2838x_337bga"
|
||||
postBuildStep="
|
||||
echo "========= Build of the CLB simulation has moved to the CLB Tool. Click the '?' icon by the _Generate CLB Simulation File_ enable for more details (located in the Global Parameters of the Tile Design SysConfig module) ============="
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/dot_file_libraries/clbDotUtility.js" "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/" "${BuildDirectory}/syscfg" "${BuildDirectory}/syscfg/clb.dot"
|
||||
;if ${GENERATE_DIAGRAM} == 1 mkdir "${BuildDirectory}/diagrams"
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/driverlib/.meta/generate_diagrams.js" "${C2000WARE_ROOT}" "${BuildDirectory}/diagrams" "${BuildDirectory}/syscfg"
|
||||
"
|
||||
>
|
||||
<configuration name="CPU1_RAM" compilerBuildOptions= "--opt_level=off -I${C2000WARE_ROOT} -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} -v28 -ml -mt --cla_support=cla2 --define=RAM --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=RAM -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs " />
|
||||
<configuration name="CPU1_FLASH" compilerBuildOptions="--opt_level=off -I${C2000WARE_ROOT} -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} --define=_FLASH -v28 -ml -mt --cla_support=cla2 --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=_FLASH -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs " />
|
||||
|
||||
<pathVariable name="C2000WARE_DLIB_ROOT" path="../../../../../../driverlib/f2838x/driverlib/" scope="project" />
|
||||
<pathVariable name="C2000WARE_ROOT" path="../../../../../../" scope="project" />
|
||||
<pathVariable name="CLB_SYSCFG_ROOT" path="../../../../../../utilities/clb_tool/clb_syscfg/" scope="project" />
|
||||
<pathVariable name="SYSTEMC_INSTALL" path="../../../../../../utilities/clb_tool/clb_syscfg/systemc-2.3.3" scope="project" />
|
||||
<pathVariable name="CLB_SIM_COMPILER" path="C:/TDM-GCC-64/bin" scope="project" />
|
||||
<buildVariable name="GENERATE_DIAGRAM" value="0" scope="project" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/include/driverlib.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/include/device.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/source/device.c" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/targetConfigs/TMS320F28388D.ccxml" targetDirectory="targetConfigs" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/cmd/2838x_RAM_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_RAM" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/cmd/2838x_FLASH_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_FLASH" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/source/f2838x_codestartbranch.asm" targetDirectory="device" />
|
||||
<file action="link" path="../../../../../../driverlib/f2838x/driverlib/ccs/Debug/driverlib.lib" targetDirectory="" />
|
||||
<file action="copy" path="../../../../../../driverlib/f2838x/driverlib/" targetDirectory="device" excludeFromBuild="True" />
|
||||
<file action="copy" path="../mcan_ex8_range_filter_receive.c" targetDirectory="" />
|
||||
<file action="copy" path="../../empty_projects/c2000.syscfg" targetDirectory="" />
|
||||
</project>
|
||||
</projectSpec>
|
||||
@@ -0,0 +1,40 @@
|
||||
<projectSpec>
|
||||
<project
|
||||
name="mcan_ex9_transmit"
|
||||
device="TMS320F28388D"
|
||||
cgtVersion="22.6.1.LTS"
|
||||
products="sysconfig;C2000WARE"
|
||||
outputFormat="ELF"
|
||||
launchWizard="False"
|
||||
linkerCommandFile=""
|
||||
enableSysConfigTool="true"
|
||||
sysConfigBuildOptions="--product ${C2000WARE_ROOT}/.metadata/sdk.json --device F2838x --package 337bga --part F2838x_337bga"
|
||||
postBuildStep="
|
||||
echo "========= Build of the CLB simulation has moved to the CLB Tool. Click the '?' icon by the _Generate CLB Simulation File_ enable for more details (located in the Global Parameters of the Tile Design SysConfig module) ============="
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/dot_file_libraries/clbDotUtility.js" "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/" "${BuildDirectory}/syscfg" "${BuildDirectory}/syscfg/clb.dot"
|
||||
;if ${GENERATE_DIAGRAM} == 1 mkdir "${BuildDirectory}/diagrams"
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/driverlib/.meta/generate_diagrams.js" "${C2000WARE_ROOT}" "${BuildDirectory}/diagrams" "${BuildDirectory}/syscfg"
|
||||
"
|
||||
>
|
||||
<configuration name="CPU1_RAM" compilerBuildOptions= "--opt_level=off -I${C2000WARE_ROOT} -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} -v28 -ml -mt --cla_support=cla2 --define=RAM --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=RAM -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs " />
|
||||
<configuration name="CPU1_FLASH" compilerBuildOptions="--opt_level=off -I${C2000WARE_ROOT} -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} --define=_FLASH -v28 -ml -mt --cla_support=cla2 --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=_FLASH -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs " />
|
||||
|
||||
<pathVariable name="C2000WARE_DLIB_ROOT" path="../../../../../../driverlib/f2838x/driverlib/" scope="project" />
|
||||
<pathVariable name="C2000WARE_ROOT" path="../../../../../../" scope="project" />
|
||||
<pathVariable name="CLB_SYSCFG_ROOT" path="../../../../../../utilities/clb_tool/clb_syscfg/" scope="project" />
|
||||
<pathVariable name="SYSTEMC_INSTALL" path="../../../../../../utilities/clb_tool/clb_syscfg/systemc-2.3.3" scope="project" />
|
||||
<pathVariable name="CLB_SIM_COMPILER" path="C:/TDM-GCC-64/bin" scope="project" />
|
||||
<buildVariable name="GENERATE_DIAGRAM" value="0" scope="project" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/include/driverlib.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/include/device.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/source/device.c" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/targetConfigs/TMS320F28388D.ccxml" targetDirectory="targetConfigs" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/cmd/2838x_RAM_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_RAM" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/cmd/2838x_FLASH_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_FLASH" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/source/f2838x_codestartbranch.asm" targetDirectory="device" />
|
||||
<file action="link" path="../../../../../../driverlib/f2838x/driverlib/ccs/Debug/driverlib.lib" targetDirectory="" />
|
||||
<file action="copy" path="../../../../../../driverlib/f2838x/driverlib/" targetDirectory="device" excludeFromBuild="True" />
|
||||
<file action="copy" path="../mcan_ex9_transmit.c" targetDirectory="" />
|
||||
<file action="copy" path="../../empty_projects/c2000.syscfg" targetDirectory="" />
|
||||
</project>
|
||||
</projectSpec>
|
||||
@@ -0,0 +1,452 @@
|
||||
//#############################################################################
|
||||
//
|
||||
// FILE: mcan_ex10_receive_multiple_buffers.c
|
||||
//
|
||||
// TITLE: MCAN receive multiple messages using Rx Buffer
|
||||
//
|
||||
//! \addtogroup driver_example_c28x_list
|
||||
//! <h1> MCAN receive using Rx Buffer </h1>
|
||||
//!
|
||||
//! This example demonstrates how to receive MCAN messages in multiple buffers,
|
||||
//! including the configuration and handling of the messages. Communication is done
|
||||
//! between atleast two CAN nodes. The transmitting node could be another MCU or a
|
||||
//! CAN bus analysis tool capable of transmitting CAN FD frames. The transmit
|
||||
//! and receive pins of the MCAN module should be connected to a CAN
|
||||
//! transceiver. Nominal Bit Rate of 500 kbps & Data bit rate of 1 Mbps is used
|
||||
//!
|
||||
//! Standard frames with message IDs 0x123, 0x124, 0x125, 0x126 are received.
|
||||
//! (For Extended frames, same procedure to be followed for configuration
|
||||
//! by adding Extended Message ID Filter Element(s))
|
||||
//!
|
||||
//! \b Hardware \b Required \n
|
||||
//! - A C2000 board with CAN transceiver
|
||||
//!
|
||||
//! \b External \b Connections \n
|
||||
//! Both nodes should communicate through CAN FD capable transceivers.
|
||||
//!
|
||||
//! - MCAN is on DEVICE_GPIO_PIN_CANRXA (MCANRXA)
|
||||
//! - and DEVICE_GPIO_PIN_CANTXA (MCANTXA)
|
||||
//!
|
||||
//! \b Watch \b Variables \n
|
||||
//! - rxMsg
|
||||
//!
|
||||
//
|
||||
//#############################################################################
|
||||
//
|
||||
//
|
||||
//
|
||||
// C2000Ware v5.04.00.00
|
||||
//
|
||||
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// $
|
||||
//#############################################################################
|
||||
|
||||
//
|
||||
// Include Files
|
||||
//
|
||||
#include "driverlib.h"
|
||||
#include "device.h"
|
||||
#include "inc/stw_types.h"
|
||||
#include "inc/stw_dataTypes.h"
|
||||
#include <string.h>
|
||||
|
||||
//
|
||||
// Defines.
|
||||
//
|
||||
#define NUM_OF_MSG (4U)
|
||||
#define MCAN_STD_ID_FILTER_NUM (4U)
|
||||
#define MCAN_EXT_ID_FILTER_NUM (0U)
|
||||
#define MCAN_FIFO_0_NUM (0U)
|
||||
#define MCAN_FIFO_0_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_FIFO_1_NUM (0U)
|
||||
#define MCAN_FIFO_1_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_RX_BUFF_NUM (10U)
|
||||
#define MCAN_RX_BUFF_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_TX_BUFF_SIZE (0U)
|
||||
#define MCAN_TX_FQ_SIZE (0U)
|
||||
#define MCAN_TX_BUFF_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_TX_EVENT_SIZE (0U)
|
||||
|
||||
//
|
||||
// Defining Starting Addresses for Message RAM Sections,
|
||||
// (Calculated from Macros based on User defined configuration above)
|
||||
//
|
||||
#define MCAN_STD_ID_FILT_START_ADDR (0x0U)
|
||||
#define MCAN_EXT_ID_FILT_START_ADDR (MCAN_STD_ID_FILT_START_ADDR + ((MCAN_STD_ID_FILTER_NUM * MCANSS_STD_ID_FILTER_SIZE_WORDS * 4U)))
|
||||
#define MCAN_FIFO_0_START_ADDR (MCAN_EXT_ID_FILT_START_ADDR + ((MCAN_EXT_ID_FILTER_NUM * MCANSS_EXT_ID_FILTER_SIZE_WORDS * 4U)))
|
||||
#define MCAN_FIFO_1_START_ADDR (MCAN_FIFO_0_START_ADDR + (MCAN_getMsgObjSize(MCAN_FIFO_0_ELEM_SIZE) * 4U * MCAN_FIFO_0_NUM))
|
||||
#define MCAN_RX_BUFF_START_ADDR (MCAN_FIFO_1_START_ADDR + (MCAN_getMsgObjSize(MCAN_FIFO_1_ELEM_SIZE) * 4U * MCAN_FIFO_1_NUM))
|
||||
#define MCAN_TX_BUFF_START_ADDR (MCAN_RX_BUFF_START_ADDR + (MCAN_getMsgObjSize(MCAN_RX_BUFF_ELEM_SIZE) * 4U * MCAN_RX_BUFF_NUM))
|
||||
#define MCAN_TX_EVENT_START_ADDR (MCAN_TX_BUFF_START_ADDR + (MCAN_getMsgObjSize(MCAN_TX_BUFF_ELEM_SIZE) * 4U * (MCAN_TX_BUFF_SIZE + MCAN_TX_FQ_SIZE)))
|
||||
|
||||
|
||||
//
|
||||
// Global Variables.
|
||||
//
|
||||
int32_t error = 0;
|
||||
MCAN_RxBufElement rxMsg[NUM_OF_MSG];
|
||||
int32_t loopCnt = 0U;
|
||||
|
||||
|
||||
//
|
||||
// Function Prototype.
|
||||
//
|
||||
static void MCANConfig(void);
|
||||
static void MCANIntrConfig(void);
|
||||
__interrupt void MCANIntr1ISR(void);
|
||||
|
||||
void main()
|
||||
{
|
||||
int i = 0;
|
||||
volatile uint32_t mode = 0U;
|
||||
uint32_t dataBytes = 64;
|
||||
|
||||
//
|
||||
// Initialize device clock and peripherals
|
||||
//
|
||||
Device_init();
|
||||
|
||||
//
|
||||
// Initialize GPIO and unlock the GPIO configuration registers
|
||||
//
|
||||
Device_initGPIO();
|
||||
|
||||
//
|
||||
// Allocate MCAN (a shared peripheral) to CPU1 (C28x)
|
||||
//
|
||||
SysCtl_allocateSharedPeripheral(SYSCTL_PALLOCATE_MCAN_A,0x0U);
|
||||
|
||||
//
|
||||
// Configure the divisor for the MCAN bit-clock
|
||||
//
|
||||
SysCtl_setMCANClk(SYSCTL_MCANCLK_DIV_5);
|
||||
|
||||
//
|
||||
// ISR Configuration.
|
||||
//
|
||||
MCANIntrConfig();
|
||||
|
||||
//
|
||||
// Configure GPIO pins for MCANTX/MCANRX operation
|
||||
//
|
||||
GPIO_setPinConfig(DEVICE_GPIO_CFG_MCANRXA);
|
||||
GPIO_setPinConfig(DEVICE_GPIO_CFG_MCANTXA);
|
||||
|
||||
for(loopCnt = 0; loopCnt < NUM_OF_MSG; loopCnt++)
|
||||
{
|
||||
//
|
||||
// Initialize message to receive
|
||||
//
|
||||
rxMsg[loopCnt].id = 0U;
|
||||
rxMsg[loopCnt].rtr = 0U;
|
||||
rxMsg[loopCnt].xtd = 0U;
|
||||
rxMsg[loopCnt].esi = 0U;
|
||||
rxMsg[loopCnt].rxts = 0U; // Rx Timestamp
|
||||
rxMsg[loopCnt].dlc = 0U;
|
||||
rxMsg[loopCnt].brs = 0U;
|
||||
rxMsg[loopCnt].fdf = 0U;
|
||||
rxMsg[loopCnt].fidx = 0U; // Filter Index
|
||||
// (of matching Rx acceptance filter element)
|
||||
rxMsg[loopCnt].anmf = 0U; // Accepted Non-matching Frame
|
||||
|
||||
for(i = 0; i < dataBytes; i++) // Initialize receive buffer to 0
|
||||
{
|
||||
rxMsg[loopCnt].data[i] = 0;
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// Configure the MCAN Module.
|
||||
//
|
||||
MCANConfig();
|
||||
|
||||
//
|
||||
// Enable Interrupts.
|
||||
//
|
||||
MCAN_enableIntr(MCANA_DRIVER_BASE, MCAN_INTR_MASK_ALL, 1U);
|
||||
|
||||
//
|
||||
// Select Interrupt Line.
|
||||
//
|
||||
MCAN_selectIntrLine(MCANA_DRIVER_BASE, MCAN_INTR_MASK_ALL, MCAN_INTR_LINE_NUM_1);
|
||||
|
||||
//
|
||||
// Enable Interrupt Line.
|
||||
//
|
||||
MCAN_enableIntrLine(MCANA_DRIVER_BASE, MCAN_INTR_LINE_NUM_1, 1U);
|
||||
|
||||
for(;;)
|
||||
{
|
||||
//
|
||||
// Adding delay of 1 second
|
||||
//
|
||||
DEVICE_DELAY_US(1000000);
|
||||
|
||||
//
|
||||
// Message handling code goes here
|
||||
//
|
||||
|
||||
}
|
||||
|
||||
//
|
||||
// Stop Application.
|
||||
//
|
||||
asm(" ESTOP0");
|
||||
}
|
||||
|
||||
static void MCANConfig(void)
|
||||
{
|
||||
MCAN_InitParams initParams;
|
||||
MCAN_MsgRAMConfigParams msgRAMConfigParams;
|
||||
MCAN_StdMsgIDFilterElement stdFiltelem;
|
||||
MCAN_BitTimingParams bitTimes;
|
||||
|
||||
//
|
||||
// Initializing all structs to zero to prevent stray values
|
||||
//
|
||||
memset(&initParams, 0, sizeof(initParams));
|
||||
memset(&msgRAMConfigParams, 0, sizeof(msgRAMConfigParams));
|
||||
memset(&stdFiltelem, 0, sizeof(stdFiltelem));
|
||||
memset(&bitTimes, 0, sizeof(bitTimes));
|
||||
|
||||
//
|
||||
// Configure MCAN initialization parameters
|
||||
//
|
||||
initParams.fdMode = 0x1U; // FD operation enabled.
|
||||
initParams.brsEnable = 0x1U; // Bit rate switching enabled
|
||||
|
||||
//
|
||||
// Initialize Message RAM Sections Configuration Parameters
|
||||
//
|
||||
msgRAMConfigParams.flssa = MCAN_STD_ID_FILT_START_ADDR;
|
||||
// Standard ID Filter List Start Address.
|
||||
msgRAMConfigParams.lss = MCAN_STD_ID_FILTER_NUM;
|
||||
// List Size: Standard ID.
|
||||
msgRAMConfigParams.rxBufStartAddr = MCAN_RX_BUFF_START_ADDR;
|
||||
// Rx Buffer Start Address.
|
||||
msgRAMConfigParams.rxBufElemSize = MCAN_RX_BUFF_ELEM_SIZE;
|
||||
// Rx Buffer Element Size.
|
||||
|
||||
//
|
||||
// Initialize bit timings.
|
||||
//
|
||||
bitTimes.nomRatePrescalar = 0x3U; // Nominal Baud Rate Pre-scaler
|
||||
bitTimes.nomTimeSeg1 = 0x9U; // Nominal Time segment before SP
|
||||
bitTimes.nomTimeSeg2 = 0x8U; // Nominal Time segment after SP
|
||||
bitTimes.nomSynchJumpWidth = 0x8U; // Nominal SJW
|
||||
bitTimes.dataRatePrescalar = 0x1U; // Data Baud Rate Pre-scaler
|
||||
bitTimes.dataTimeSeg1 = 0x9U; // Data Time segment before SP
|
||||
bitTimes.dataTimeSeg2 = 0x8U; // Data Time segment after SP
|
||||
bitTimes.dataSynchJumpWidth = 0x8U; // Data SJW
|
||||
|
||||
//
|
||||
// Wait for memory initialization to happen.
|
||||
//
|
||||
while(FALSE == MCAN_isMemInitDone(MCANA_DRIVER_BASE))
|
||||
{
|
||||
}
|
||||
|
||||
//
|
||||
// Put MCAN in SW initialization mode.
|
||||
//
|
||||
MCAN_setOpMode(MCANA_DRIVER_BASE, MCAN_OPERATION_MODE_SW_INIT);
|
||||
|
||||
//
|
||||
// Wait till MCAN is not initialized.
|
||||
//
|
||||
while (MCAN_OPERATION_MODE_SW_INIT != MCAN_getOpMode(MCANA_DRIVER_BASE))
|
||||
{}
|
||||
|
||||
//
|
||||
// Initialize MCAN module.
|
||||
//
|
||||
MCAN_init(MCANA_DRIVER_BASE, &initParams);
|
||||
|
||||
//
|
||||
// Configure Bit timings.
|
||||
//
|
||||
MCAN_setBitTime(MCANA_DRIVER_BASE, &bitTimes);
|
||||
|
||||
//
|
||||
// Configure Message RAM Sections
|
||||
//
|
||||
MCAN_msgRAMConfig(MCANA_DRIVER_BASE, &msgRAMConfigParams);
|
||||
|
||||
//
|
||||
// Initialize Rx Buffer Configuration parameters.
|
||||
//
|
||||
stdFiltelem.sfec = 0x7U; // Store into Rx Buffer
|
||||
// configuration of SFT[1:0] ignored
|
||||
|
||||
//
|
||||
// Configuring SFID2[10:9] = 0 to store message in RX Buffer
|
||||
// SFID2[5:0] defines which RX Buffer element received message
|
||||
// will be stored into (among upto 64 buffer elements)
|
||||
// Frames matching different filter elements cannot be
|
||||
// configured to be stored in the same buffer element
|
||||
// i.e. SFID2[5:0] HAS to be distinct for every filter element
|
||||
//
|
||||
|
||||
|
||||
//
|
||||
// Configure Standard ID filter element 0
|
||||
//
|
||||
stdFiltelem.sfid2 = 0x0U; // Standard Filter ID 2.
|
||||
stdFiltelem.sfid1 = 0x123U; // Standard Filter ID 1.
|
||||
|
||||
MCAN_addStdMsgIDFilter(MCANA_DRIVER_BASE, 0U, &stdFiltelem);
|
||||
|
||||
//
|
||||
// Configure Standard ID filter element 1
|
||||
//
|
||||
stdFiltelem.sfid2 = 0x1U; // Standard Filter ID 2.
|
||||
stdFiltelem.sfid1 = 0x124U; // Standard Filter ID 1.
|
||||
|
||||
MCAN_addStdMsgIDFilter(MCANA_DRIVER_BASE, 1U, &stdFiltelem);
|
||||
|
||||
//
|
||||
// Configure Standard ID filter element 2
|
||||
//
|
||||
stdFiltelem.sfid2 = 0x2U; // Standard Filter ID 2.
|
||||
stdFiltelem.sfid1 = 0x125U; // Standard Filter ID 1.
|
||||
|
||||
MCAN_addStdMsgIDFilter(MCANA_DRIVER_BASE, 2U, &stdFiltelem);
|
||||
|
||||
//
|
||||
// Configure Standard ID filter element 3
|
||||
//
|
||||
stdFiltelem.sfid2 = 0x3U; // Standard Filter ID 2.
|
||||
stdFiltelem.sfid1 = 0x126U; // Standard Filter ID 1.
|
||||
|
||||
MCAN_addStdMsgIDFilter(MCANA_DRIVER_BASE, 3U, &stdFiltelem);
|
||||
|
||||
//
|
||||
// Take MCAN out of the SW initialization mode
|
||||
//
|
||||
MCAN_setOpMode(MCANA_DRIVER_BASE, MCAN_OPERATION_MODE_NORMAL);
|
||||
|
||||
while (MCAN_OPERATION_MODE_NORMAL != MCAN_getOpMode(MCANA_DRIVER_BASE))
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
//
|
||||
// This function will configure X-BAR for MCAN interrupts.
|
||||
//
|
||||
static void MCANIntrConfig(void)
|
||||
{
|
||||
|
||||
Interrupt_initModule();
|
||||
Interrupt_initVectorTable();
|
||||
|
||||
Interrupt_register(INT_MCANA_1,&MCANIntr1ISR);
|
||||
Interrupt_enable(INT_MCANA_1);
|
||||
|
||||
Interrupt_enableGlobal();
|
||||
|
||||
}
|
||||
|
||||
//
|
||||
// This is Interrupt Service Routine for MCAN interrupt 1.
|
||||
//
|
||||
__interrupt void MCANIntr1ISR(void)
|
||||
{
|
||||
uint32_t intrStatus;
|
||||
MCAN_RxNewDataStatus newData;
|
||||
|
||||
intrStatus = MCAN_getIntrStatus(MCANA_DRIVER_BASE);
|
||||
|
||||
//
|
||||
// Clear the interrupt Status.
|
||||
//
|
||||
MCAN_clearIntrStatus(MCANA_DRIVER_BASE, intrStatus);
|
||||
|
||||
//
|
||||
// Clearing the interrupt lineNum
|
||||
//
|
||||
MCAN_clearInterrupt(MCANA_DRIVER_BASE, 0x2);
|
||||
|
||||
//
|
||||
// Check to see if the interrupt is caused by a message being
|
||||
// received in dedicated RX Buffers
|
||||
//
|
||||
if((MCAN_IR_DRX_MASK & intrStatus) == MCAN_IR_DRX_MASK)
|
||||
{
|
||||
//
|
||||
// Read the NewData registers
|
||||
//
|
||||
MCAN_getNewDataStatus(MCANA_DRIVER_BASE, &newData);
|
||||
|
||||
// If message is received in buffer element 0
|
||||
if((newData.statusLow & (1UL << 0U)) != 0)
|
||||
{
|
||||
MCAN_readMsgRam(MCANA_DRIVER_BASE, MCAN_MEM_TYPE_BUF, 0U,
|
||||
0, &rxMsg[0]);
|
||||
}
|
||||
// If message is received in buffer element 1
|
||||
if((newData.statusLow & (1UL << 1U)) != 0)
|
||||
{
|
||||
MCAN_readMsgRam(MCANA_DRIVER_BASE, MCAN_MEM_TYPE_BUF, 1U,
|
||||
0, &rxMsg[1]);
|
||||
}
|
||||
if((newData.statusLow & (1UL << 2U)) != 0)
|
||||
{
|
||||
MCAN_readMsgRam(MCANA_DRIVER_BASE, MCAN_MEM_TYPE_BUF, 2U,
|
||||
0, &rxMsg[2]);
|
||||
}
|
||||
if((newData.statusLow & (1UL << 3U)) != 0)
|
||||
{
|
||||
MCAN_readMsgRam(MCANA_DRIVER_BASE, MCAN_MEM_TYPE_BUF, 3U,
|
||||
0, &rxMsg[3]);
|
||||
}
|
||||
|
||||
//
|
||||
// Clearing the NewData registers
|
||||
//
|
||||
MCAN_clearNewDataStatus(MCANA_DRIVER_BASE, &newData);
|
||||
}
|
||||
else
|
||||
{
|
||||
error++;
|
||||
|
||||
//
|
||||
// Interrupt handling for other interrupt sources goes here
|
||||
//
|
||||
|
||||
}
|
||||
|
||||
//
|
||||
// Acknowledge this interrupt located in group 9
|
||||
//
|
||||
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP9);
|
||||
}
|
||||
@@ -0,0 +1,444 @@
|
||||
//#############################################################################
|
||||
//
|
||||
// FILE: mcan_ex12_receive_priority.c
|
||||
//
|
||||
// TITLE: MCAN Receive High Priority Message Example
|
||||
//
|
||||
//! \addtogroup driver_example_c28x_list
|
||||
//! <h1> MCAN Internal Loopback with Interrupt </h1>
|
||||
//!
|
||||
//! This example shows the MCAN Loopback functionality. The internal loopback
|
||||
//! mode is entered. The sent message should be received by the node.
|
||||
//! Use the last address of memory for Rx buffer.
|
||||
//! This example demonstrates the MCAN receive function for High Priority Messages.
|
||||
//! Messages with Message IDs from the range 0x1 to 0xB are received in Rx FIFO 1,
|
||||
//! while messages with Message IDs 0x3 and 0x9 are marked as High Priority by the
|
||||
//! receiving CAN node (frames in itself conform to CAN Protocol, Priority is only
|
||||
//! marked from the perspective of the receiving CAN Node), following which a separate
|
||||
//! interrupt is generated and the messages can be read.
|
||||
|
||||
//! Communication is done between two CAN nodes. The transmitting node could be another
|
||||
//! MCU or a CAN bus analysis tool capable of transmitting CAN FD frames. The transmit
|
||||
//! and receive pins of the MCAN module should be connected to a CAN
|
||||
//! transceiver. Nominal Bit Rate of 500 kbps & Data bit rate of 1 Mbps is used
|
||||
//!
|
||||
//! Only Standard frames within the message ID range 0x1 to 0x9 are received.
|
||||
//!
|
||||
//! If another C2000 MCU is used as the transmitter, mcan_ex3_transmit.c can be
|
||||
//! run on it for the transmit function.
|
||||
//!
|
||||
//! \b Hardware \b Required \n
|
||||
//! - A C2000 board with CAN transceiver
|
||||
//!
|
||||
//! \b External \b Connections \n
|
||||
//! Both nodes should communicate through CAN FD capable transceivers.
|
||||
//!
|
||||
//! - MCAN is on DEVICE_GPIO_PIN_CANRXA (MCANRXA)
|
||||
//! - and DEVICE_GPIO_PIN_CANTXA (MCANTXA)
|
||||
//!
|
||||
//! \b Watch \b Variables \n
|
||||
//! - rxMsg, rxMsg1
|
||||
//!
|
||||
//
|
||||
//#############################################################################
|
||||
//
|
||||
//
|
||||
// $Copyright:
|
||||
// Copyright (C) 2022 Texas Instruments Incorporated - http://www.ti.com
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// $
|
||||
//#############################################################################
|
||||
|
||||
//
|
||||
// Include Files
|
||||
//
|
||||
#include "driverlib.h"
|
||||
#include "device.h"
|
||||
#include "inc/stw_dataTypes.h"
|
||||
#include "inc/stw_types.h"
|
||||
#include "inc/hw_types_mcan.h"
|
||||
|
||||
//
|
||||
// Defines
|
||||
//
|
||||
#define MCAN_STD_ID_FILTER_NUM (3U)
|
||||
#define MCAN_EXT_ID_FILTER_NUM (0U)
|
||||
#define MCAN_FIFO_0_NUM (5U)
|
||||
#define MCAN_FIFO_0_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_FIFO_1_NUM (10U)
|
||||
#define MCAN_FIFO_1_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_RX_BUFF_NUM (10U)
|
||||
#define MCAN_RX_BUFF_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_TX_BUFF_SIZE (10U)
|
||||
#define MCAN_TX_BUFF_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_TX_EVENT_SIZE (10U)
|
||||
|
||||
//
|
||||
// Defining Starting Addresses for Message RAM Sections,
|
||||
// (Calculated from Macros based on User defined configuration above)
|
||||
//
|
||||
#define MCAN_STD_ID_FILT_START_ADDR (0x0U)
|
||||
#define MCAN_EXT_ID_FILT_START_ADDR (MCAN_STD_ID_FILT_START_ADDR + ((MCAN_STD_ID_FILTER_NUM * MCANSS_STD_ID_FILTER_SIZE_WORDS * 4U)))
|
||||
#define MCAN_FIFO_0_START_ADDR (MCAN_EXT_ID_FILT_START_ADDR + ((MCAN_EXT_ID_FILTER_NUM * MCANSS_EXT_ID_FILTER_SIZE_WORDS * 4U)))
|
||||
#define MCAN_FIFO_1_START_ADDR (MCAN_FIFO_0_START_ADDR + (MCAN_getMsgObjSize(MCAN_FIFO_0_ELEM_SIZE) * 4U * MCAN_FIFO_0_NUM))
|
||||
#define MCAN_RX_BUFF_START_ADDR (MCAN_FIFO_1_START_ADDR + (MCAN_getMsgObjSize(MCAN_FIFO_1_ELEM_SIZE) * 4U * MCAN_FIFO_1_NUM))
|
||||
#define MCAN_TX_BUFF_START_ADDR (MCAN_RX_BUFF_START_ADDR + (MCAN_getMsgObjSize(MCAN_RX_BUFF_ELEM_SIZE) * 4U * MCAN_RX_BUFF_NUM))
|
||||
#define MCAN_TX_EVENT_START_ADDR (MCAN_TX_BUFF_START_ADDR + (MCAN_getMsgObjSize(MCAN_TX_BUFF_ELEM_SIZE) * 4U * MCAN_TX_BUFF_SIZE))
|
||||
|
||||
//
|
||||
// Global Variables.
|
||||
//
|
||||
volatile uint32_t isrIntr0Flag = 1U;
|
||||
volatile uint32_t isrIntr1Flag = 1U;
|
||||
volatile uint16_t monEn = 0x0;
|
||||
volatile unsigned long msgCount = 0;
|
||||
volatile unsigned long error = 0;
|
||||
MCAN_RxBufElement rxMsg, rxMsg1;
|
||||
MCAN_RxFIFOStatus RxFS;
|
||||
|
||||
//
|
||||
// Function Prototype.
|
||||
//
|
||||
static void MCANConfig(void);
|
||||
static void MCANIntrConfig(void);
|
||||
__interrupt void MCANIntr1ISR(void);
|
||||
|
||||
//
|
||||
// Main
|
||||
//
|
||||
void main(void)
|
||||
{
|
||||
volatile uint32_t mode = 0U;
|
||||
|
||||
//
|
||||
// Initialize device clock and peripherals
|
||||
//
|
||||
Device_init();
|
||||
|
||||
//
|
||||
// Initialize GPIO and unlock the GPIO configuration registers
|
||||
//
|
||||
Device_initGPIO();
|
||||
|
||||
//
|
||||
// Configuring the GPIOs for MCAN.
|
||||
//
|
||||
GPIO_setPinConfig(DEVICE_GPIO_CFG_MCANRXA);
|
||||
GPIO_setPinConfig(DEVICE_GPIO_CFG_MCANTXA);
|
||||
|
||||
//
|
||||
// Allocate MCAN (a shared peripheral) to CPU1 (C28x)
|
||||
//
|
||||
SysCtl_allocateSharedPeripheral(SYSCTL_PALLOCATE_MCAN_A,0x0U);
|
||||
|
||||
//
|
||||
// Configure the divisor for the MCAN bit-clock
|
||||
//
|
||||
SysCtl_setMCANClk(SYSCTL_MCANCLK_DIV_5);
|
||||
|
||||
//
|
||||
// CrossBar and ISR Configuration.
|
||||
//
|
||||
MCANIntrConfig();
|
||||
|
||||
//
|
||||
// Configure MCAN.
|
||||
//
|
||||
MCANConfig();
|
||||
|
||||
//
|
||||
// Enable Interrupts.
|
||||
//
|
||||
MCAN_enableIntr(MCANA_DRIVER_BASE, MCAN_INTR_MASK_ALL, 1U);
|
||||
|
||||
//
|
||||
// Select Interrupt Line.
|
||||
//
|
||||
MCAN_selectIntrLine(MCANA_DRIVER_BASE, MCAN_INTR_MASK_ALL, MCAN_INTR_LINE_NUM_1);
|
||||
|
||||
//
|
||||
// Enable Interrupt Line.
|
||||
//
|
||||
MCAN_enableIntrLine(MCANA_DRIVER_BASE, MCAN_INTR_LINE_NUM_1, 1U);
|
||||
|
||||
while(1)
|
||||
{
|
||||
//
|
||||
// Adding delay of 1 second
|
||||
//
|
||||
DEVICE_DELAY_US(1000000);
|
||||
|
||||
//
|
||||
// Message Handling Code goes here
|
||||
//
|
||||
|
||||
}
|
||||
|
||||
//
|
||||
// Stop Application.
|
||||
//
|
||||
asm(" ESTOP0");
|
||||
}
|
||||
|
||||
//
|
||||
// This function will configure MCAN module.
|
||||
//
|
||||
static void MCANConfig(void)
|
||||
{
|
||||
MCAN_RevisionId revId;
|
||||
MCAN_InitParams initParams;
|
||||
MCAN_ConfigParams configParams;
|
||||
MCAN_MsgRAMConfigParams msgRAMConfigParams;
|
||||
MCAN_StdMsgIDFilterElement stdFiltelem;
|
||||
MCAN_BitTimingParams bitTimes;
|
||||
|
||||
//
|
||||
// Initializing all structs to zero to prevent stray values
|
||||
//
|
||||
memset(&initParams, 0, sizeof(initParams));
|
||||
memset(&configParams, 0, sizeof(configParams));
|
||||
memset(&msgRAMConfigParams, 0, sizeof(msgRAMConfigParams));
|
||||
memset(&stdFiltelem, 0, sizeof(stdFiltelem));
|
||||
memset(&bitTimes, 0, sizeof(bitTimes));
|
||||
|
||||
//
|
||||
// Initialize MCAN Init parameters.
|
||||
//
|
||||
initParams.fdMode = 0x1U; // FD operation enabled.
|
||||
initParams.brsEnable = 0x1U; // Bit rate switching for
|
||||
// transmissions enabled.
|
||||
initParams.txpEnable = 0x0U; // Transmit pause disabled.
|
||||
initParams.efbi = 0x0U; // Edge filtering disabled.
|
||||
initParams.pxhddisable = 0x0U; // Protocol exception handling enabled
|
||||
initParams.darEnable = 0x0U; // Enable Automatic retransmission of
|
||||
// messages not transmitted successfully
|
||||
initParams.wkupReqEnable = 0x1U; // Wakeup request is enabled.
|
||||
initParams.autoWkupEnable = 0x1U; // Auto-Wakeup is enabled.
|
||||
initParams.emulationEnable = 0x1U; // Emulation/Debug Suspend is enabled.
|
||||
initParams.tdcEnable = 0x1U; // Transmitter Delay Compensation is
|
||||
// enabled.
|
||||
initParams.wdcPreload = 0xFFU; // Start value of the Message RAM
|
||||
// Watchdog Counter preload.
|
||||
|
||||
//
|
||||
// Transmitter Delay Compensation parameters.
|
||||
//
|
||||
initParams.tdcConfig.tdcf = 0xAU;
|
||||
initParams.tdcConfig.tdco = 0x6U;
|
||||
|
||||
//
|
||||
// Initialize MCAN Config parameters.
|
||||
//
|
||||
configParams.monEnable = monEn; // Bus Monitoring Mode is disabled
|
||||
configParams.asmEnable = 0x0U; // Normal CAN operation.
|
||||
configParams.tsPrescalar = 0xFU; // Prescaler Value.
|
||||
configParams.tsSelect = 0x0U; // Timestamp counter value.
|
||||
configParams.timeoutSelect = MCAN_TIMEOUT_SELECT_CONT;
|
||||
// Time-out counter source select.
|
||||
configParams.timeoutPreload = 0xFFFFU; // Start value of the Timeout
|
||||
// Counter.
|
||||
configParams.timeoutCntEnable = 0x0U; // Time-out Counter is disabled.
|
||||
configParams.filterConfig.rrfs = 0x1U; // Reject all remote frames with
|
||||
// 29-bit extended IDs.
|
||||
configParams.filterConfig.rrfe = 0x1U; // Reject all remote frames with
|
||||
// 11-bit standard IDs.
|
||||
configParams.filterConfig.anfe = 0x1U; // Accept in Rx FIFO 1.
|
||||
configParams.filterConfig.anfs = 0x1U; // Accept in Rx FIFO 1.
|
||||
|
||||
//
|
||||
// Initialize Message RAM Sections Configuration Parameters.
|
||||
//
|
||||
msgRAMConfigParams.flssa = MCAN_STD_ID_FILT_START_ADDR;
|
||||
// Standard ID Filter List Start Address.
|
||||
msgRAMConfigParams.lss = MCAN_STD_ID_FILTER_NUM;
|
||||
// Standard ID Filter List Size
|
||||
msgRAMConfigParams.rxFIFO1startAddr = MCAN_FIFO_1_START_ADDR;
|
||||
// Rx FIFO1 Start Address.
|
||||
msgRAMConfigParams.rxFIFO1size = MCAN_FIFO_1_NUM;
|
||||
// Number of Rx FIFO elements.
|
||||
msgRAMConfigParams.rxFIFO1waterMark = 8U; // Level for Rx FIFO 1
|
||||
// watermark interrupt.
|
||||
msgRAMConfigParams.rxFIFO1OpMode = 0U; // FIFO blocking mode.
|
||||
msgRAMConfigParams.rxFIFO1ElemSize = MCAN_FIFO_1_ELEM_SIZE;
|
||||
// Rx FIFO1 Element Size.
|
||||
|
||||
//
|
||||
// Initialize bit timings.
|
||||
//
|
||||
bitTimes.nomRatePrescalar = 0x3U; // Nominal Baud Rate Pre-scaler
|
||||
bitTimes.nomTimeSeg1 = 0x9U; // Nominal Time segment before SP
|
||||
bitTimes.nomTimeSeg2 = 0x8U; // Nominal Time segment after SP
|
||||
bitTimes.nomSynchJumpWidth = 0x8U; // Nominal SJW
|
||||
bitTimes.dataRatePrescalar = 0x1U; // Data Baud Rate Pre-scaler
|
||||
bitTimes.dataTimeSeg1 = 0x9U; // Data Time segment before SP
|
||||
bitTimes.dataTimeSeg2 = 0x8U; // Data Time segment after SP
|
||||
bitTimes.dataSynchJumpWidth = 0x8U; // Data SJW
|
||||
|
||||
//
|
||||
// Get MCANSS Revision ID.
|
||||
//
|
||||
MCAN_getRevisionId(MCANA_DRIVER_BASE, &revId);
|
||||
|
||||
//
|
||||
// Wait for Memory initialization to be completed.
|
||||
//
|
||||
while(FALSE == MCAN_isMemInitDone(MCANA_DRIVER_BASE));
|
||||
|
||||
//
|
||||
// Put MCAN in SW initialization mode.
|
||||
//
|
||||
MCAN_setOpMode(MCANA_DRIVER_BASE, MCAN_OPERATION_MODE_SW_INIT);
|
||||
|
||||
//
|
||||
// Wait till MCAN is not initialized.
|
||||
//
|
||||
while (MCAN_OPERATION_MODE_SW_INIT != MCAN_getOpMode(MCANA_DRIVER_BASE));
|
||||
|
||||
//
|
||||
// Initialize MCAN module.
|
||||
//
|
||||
MCAN_init(MCANA_DRIVER_BASE, &initParams);
|
||||
|
||||
//
|
||||
// Configure MCAN module.
|
||||
//
|
||||
MCAN_config(MCANA_DRIVER_BASE, &configParams);
|
||||
|
||||
//
|
||||
// Configure Bit timings.
|
||||
//
|
||||
MCAN_setBitTime(MCANA_DRIVER_BASE, &bitTimes);
|
||||
|
||||
//
|
||||
// Configure Message RAM Sections
|
||||
//
|
||||
MCAN_msgRAMConfig(MCANA_DRIVER_BASE, &msgRAMConfigParams);
|
||||
|
||||
//
|
||||
// Initialize Rx Buffer Configuration parameters.
|
||||
//
|
||||
stdFiltelem.sfid2 = 0x3U; // Standard Filter ID 2.
|
||||
stdFiltelem.sfid1 = 0x9U; // Standard Filter ID 1.
|
||||
stdFiltelem.sfec = MCAN_STDFILTEC_PRI_FIFO0; //
|
||||
stdFiltelem.sft = 0x1U; // Dual ID filter for SFID1 and SFID2
|
||||
|
||||
//
|
||||
// Configure Standard ID filter element
|
||||
//
|
||||
MCAN_addStdMsgIDFilter(MCANA_DRIVER_BASE, 0U, &stdFiltelem);
|
||||
|
||||
//
|
||||
// Initialize Rx Buffer Configuration parameters.
|
||||
//
|
||||
stdFiltelem.sfid2 = 0x1U; // Standard Filter ID 2.
|
||||
stdFiltelem.sfid1 = 0xBU; // Standard Filter ID 1.
|
||||
stdFiltelem.sfec = MCAN_STDFILTEC_FIFO0; //
|
||||
stdFiltelem.sft = 0x0U; // Range filter from SFID1 to SFID2
|
||||
|
||||
//
|
||||
// Configure Standard ID filter element
|
||||
//
|
||||
MCAN_addStdMsgIDFilter(MCANA_DRIVER_BASE, 1U, &stdFiltelem);
|
||||
|
||||
//
|
||||
// Take MCAN out of the SW initialization mode
|
||||
//
|
||||
MCAN_setOpMode(MCANA_DRIVER_BASE, MCAN_OPERATION_MODE_NORMAL);
|
||||
|
||||
while (MCAN_OPERATION_MODE_NORMAL != MCAN_getOpMode(MCANA_DRIVER_BASE));
|
||||
}
|
||||
|
||||
//
|
||||
// This function will configure X-BAR for MCAN interrupts.
|
||||
//
|
||||
static void MCANIntrConfig(void)
|
||||
{
|
||||
|
||||
Interrupt_initModule();
|
||||
Interrupt_initVectorTable();
|
||||
|
||||
Interrupt_register(INT_MCANA_1,&MCANIntr1ISR);
|
||||
Interrupt_enable(INT_MCANA_1);
|
||||
|
||||
Interrupt_enableGlobal();
|
||||
|
||||
}
|
||||
|
||||
//
|
||||
// This is Interrupt Service Routine for MCAN interrupt 1.
|
||||
//
|
||||
__interrupt void MCANIntr1ISR(void)
|
||||
{
|
||||
uint32_t intrStatus;
|
||||
|
||||
intrStatus = MCAN_getIntrStatus(MCANA_DRIVER_BASE);
|
||||
|
||||
if((intrStatus & MCAN_INTR_SRC_HIGH_PRIO_MSG) == MCAN_INTR_SRC_HIGH_PRIO_MSG)
|
||||
{
|
||||
MCAN_readHighPriorityMsgRam(MCANA_DRIVER_BASE, &rxMsg);
|
||||
|
||||
//
|
||||
// High Priority Message Handling Goes Here
|
||||
//
|
||||
|
||||
}
|
||||
if((intrStatus & MCAN_INTR_SRC_RX_FIFO1_WATERMARK) == MCAN_INTR_SRC_RX_FIFO1_WATERMARK)
|
||||
{
|
||||
MCAN_RxFIFOStatus RxFS;
|
||||
|
||||
RxFS.num = MCAN_RX_FIFO_NUM_1;
|
||||
|
||||
MCAN_getRxFIFOStatus(MCANA_DRIVER_BASE, &RxFS);
|
||||
|
||||
while(RxFS.fillLvl)
|
||||
{
|
||||
MCAN_readMsgRam(MCANA_DRIVER_BASE, MCAN_MEM_TYPE_FIFO, 0U,
|
||||
MCAN_RX_FIFO_NUM_1, &rxMsg1);
|
||||
|
||||
MCAN_writeRxFIFOAck(MCANA_DRIVER_BASE, MCAN_RX_FIFO_NUM_1,
|
||||
RxFS.getIdx);
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// Clear the interrupt Status.
|
||||
//
|
||||
MCAN_clearIntrStatus(MCANA_DRIVER_BASE, intrStatus);
|
||||
|
||||
//
|
||||
// Clearing the interrupt lineNum
|
||||
//
|
||||
MCAN_clearInterrupt(MCANA_DRIVER_BASE, 0x2);
|
||||
|
||||
//
|
||||
// Acknowledge this interrupt located in group 9
|
||||
//
|
||||
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP9);
|
||||
}
|
||||
@@ -0,0 +1,461 @@
|
||||
//#############################################################################
|
||||
//
|
||||
// FILE: mcan_ex9_transmit_TxEventFIFO.c
|
||||
//
|
||||
// TITLE: MCAN External Transmit using Tx Buffer demonstrating use of
|
||||
// Tx Event FIFO
|
||||
//
|
||||
//! \addtogroup driver_example_c28x_list
|
||||
//! <h1> MCAN External Transmit using Tx Buffer </h1>
|
||||
//!
|
||||
//! This example demonstrates the usage of Tx Event FIFO. External
|
||||
//! communication is done between two CAN nodes. The receiving node could be
|
||||
//! another MCU or a CAN bus analysis tool capable of Receiving/ACKnowledging
|
||||
//! transmitted frames. The transmit and receive pins of the MCAN module
|
||||
//! should be connected to a CAN Transceiver. Nominal Bit Rate of 500 kbps and
|
||||
//! Data bit rate of 1 Mbps is used.
|
||||
//! Standard Identifier (STD ID) 0x4 is transmitted with 64 data bytes.
|
||||
//! Tx Event FIFOs store transmit status information from the Tx Buffer
|
||||
//! allowing the Tx Buffer to be overwritten based on the needs of the application
|
||||
//! Message Marker Bits are used to link Tx Event FIFO elements to the Tx Messages,
|
||||
//! while the Tx Timestamp denotes the counter value for when the message was transmitted.
|
||||
//!
|
||||
//! If another C2000 MCU is used as the receiver, mcan_ex4_receive.c can be
|
||||
//! run on it for the receive function.
|
||||
//!
|
||||
//! \b Hardware \b Required \n
|
||||
//! - A C2000 board with CAN transceiver
|
||||
//!
|
||||
//! \b External \b Connections \n
|
||||
//! Both nodes should communicate through CAN FD capable transceivers.
|
||||
//!
|
||||
//! - MCAN is on DEVICE_GPIO_PIN_CANRXA (MCANRXA)
|
||||
//! - and DEVICE_GPIO_PIN_CANTXA (MCANTXA)
|
||||
//!
|
||||
//! \b Watch \b Variables \n
|
||||
//! - txMsg
|
||||
//!
|
||||
//
|
||||
//#############################################################################
|
||||
//
|
||||
//
|
||||
// $Copyright:
|
||||
// Copyright (C) 2022 Texas Instruments Incorporated - http://www.ti.com
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// $
|
||||
//#############################################################################
|
||||
|
||||
//
|
||||
// Include Files
|
||||
//
|
||||
#include "driverlib.h"
|
||||
#include "device.h"
|
||||
#include "inc/stw_types.h"
|
||||
#include "inc/stw_dataTypes.h"
|
||||
#include "inc/hw_types_mcan.h"
|
||||
|
||||
//
|
||||
// Defines.
|
||||
//
|
||||
#define NUM_OF_MSG (3U)
|
||||
#define MCAN_STD_ID_FILTER_NUM (0U)
|
||||
#define MCAN_EXT_ID_FILTER_NUM (0U)
|
||||
#define MCAN_FIFO_0_NUM (0U)
|
||||
#define MCAN_FIFO_0_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_FIFO_1_NUM (0U)
|
||||
#define MCAN_FIFO_1_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_RX_BUFF_NUM (0U)
|
||||
#define MCAN_RX_BUFF_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_TX_BUFF_SIZE (NUM_OF_MSG)
|
||||
#define MCAN_TX_BUFF_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_TX_EVENT_SIZE (5U)
|
||||
|
||||
//
|
||||
// Defining Starting Addresses for Message RAM Sections,
|
||||
// (Calculated from Macros based on User defined configuration above)
|
||||
//
|
||||
#define MCAN_STD_ID_FILT_START_ADDR (0x0U)
|
||||
#define MCAN_EXT_ID_FILT_START_ADDR (MCAN_STD_ID_FILT_START_ADDR + ((MCAN_STD_ID_FILTER_NUM * MCANSS_STD_ID_FILTER_SIZE_WORDS * 4U)))
|
||||
#define MCAN_FIFO_0_START_ADDR (MCAN_EXT_ID_FILT_START_ADDR + ((MCAN_EXT_ID_FILTER_NUM * MCANSS_EXT_ID_FILTER_SIZE_WORDS * 4U)))
|
||||
#define MCAN_FIFO_1_START_ADDR (MCAN_FIFO_0_START_ADDR + (MCAN_getMsgObjSize(MCAN_FIFO_0_ELEM_SIZE) * 4U * MCAN_FIFO_0_NUM))
|
||||
#define MCAN_RX_BUFF_START_ADDR (MCAN_FIFO_1_START_ADDR + (MCAN_getMsgObjSize(MCAN_FIFO_1_ELEM_SIZE) * 4U * MCAN_FIFO_1_NUM))
|
||||
#define MCAN_TX_BUFF_START_ADDR (MCAN_RX_BUFF_START_ADDR + (MCAN_getMsgObjSize(MCAN_RX_BUFF_ELEM_SIZE) * 4U * MCAN_RX_BUFF_NUM))
|
||||
#define MCAN_TX_EVENT_START_ADDR (MCAN_TX_BUFF_START_ADDR + (MCAN_getMsgObjSize(MCAN_TX_BUFF_ELEM_SIZE) * 4U * MCAN_TX_BUFF_SIZE))
|
||||
|
||||
|
||||
//
|
||||
// Global Variables.
|
||||
//
|
||||
int32_t error = 0;
|
||||
MCAN_TxBufElement txMsg[NUM_OF_MSG];
|
||||
int32_t loopCnt = 0U, j = 0U;
|
||||
MCAN_TxEventFIFOStatus TxEFS;
|
||||
MCAN_TxEventFIFOElement TxEvent, TxEventArray[NUM_OF_MSG];
|
||||
uint32_t a_MM[NUM_OF_MSG] = { 0xAA, 0xBB, 0xCC};
|
||||
|
||||
//
|
||||
// Function Prototype.
|
||||
//
|
||||
static void MCANConfig(void);
|
||||
static void MCANIntrConfig(void);
|
||||
__interrupt void MCANIntr1ISR(void);
|
||||
|
||||
void main()
|
||||
{
|
||||
int i = 0;
|
||||
volatile uint32_t mode = 0U;
|
||||
uint32_t dataBytes = 64;
|
||||
|
||||
//
|
||||
// Initialize device clock and peripherals
|
||||
//
|
||||
Device_init();
|
||||
|
||||
//
|
||||
// Initialize GPIO and unlock the GPIO configuration registers
|
||||
//
|
||||
Device_initGPIO();
|
||||
|
||||
//
|
||||
// Allocate MCAN (a shared peripheral) to CPU1 (C28x)
|
||||
//
|
||||
SysCtl_allocateSharedPeripheral(SYSCTL_PALLOCATE_MCAN_A,0x0U);
|
||||
|
||||
//
|
||||
// Configure the divisor for the MCAN bit-clock
|
||||
//
|
||||
SysCtl_setMCANClk(SYSCTL_MCANCLK_DIV_5);
|
||||
|
||||
//
|
||||
// ISR Configuration.
|
||||
//
|
||||
MCANIntrConfig();
|
||||
|
||||
//
|
||||
// Configure GPIO pins for MCANTX/MCANRX operation
|
||||
//
|
||||
GPIO_setPinConfig(DEVICE_GPIO_CFG_MCANRXA);
|
||||
GPIO_setPinConfig(DEVICE_GPIO_CFG_MCANTXA);
|
||||
|
||||
//
|
||||
// Initialize message to transmit.
|
||||
//
|
||||
txMsg[loopCnt].id = ((uint32_t)(0x4)) << 18U; // STDID[28:18]
|
||||
txMsg[loopCnt].rtr = 0U; // RTR = 0 (Data frame)
|
||||
txMsg[loopCnt].xtd = 0U; // XTD = 0 (11-bit standard identifier)
|
||||
txMsg[loopCnt].esi = 0U;
|
||||
txMsg[loopCnt].dlc = 15U; // 64 bytes
|
||||
txMsg[loopCnt].brs = 1U; // Bit-rate switching enabled
|
||||
txMsg[loopCnt].fdf = 1U; // Frame transmitted in CAN FD format
|
||||
txMsg[loopCnt].efc = 1U; // Store TX events
|
||||
txMsg[loopCnt].mm = 0xAAU;
|
||||
txMsg[loopCnt].data[i] = 0x1;
|
||||
for(i = 1; i < dataBytes; i++)
|
||||
{
|
||||
txMsg[loopCnt].data[i] = txMsg[loopCnt].data[i-1] + 1;
|
||||
}
|
||||
i = 0;
|
||||
|
||||
//
|
||||
// Configure the MCAN Module.
|
||||
//
|
||||
MCANConfig();
|
||||
|
||||
//
|
||||
// Enable Interrupts.
|
||||
//
|
||||
MCAN_enableIntr(MCANA_DRIVER_BASE, MCAN_INTR_MASK_ALL, 1U);
|
||||
|
||||
//
|
||||
// Select Interrupt Line.
|
||||
//
|
||||
MCAN_selectIntrLine(MCANA_DRIVER_BASE, MCAN_INTR_MASK_ALL, MCAN_INTR_LINE_NUM_1);
|
||||
|
||||
//
|
||||
// Enable Interrupt Line.
|
||||
//
|
||||
MCAN_enableIntrLine(MCANA_DRIVER_BASE, MCAN_INTR_LINE_NUM_1, 1U);
|
||||
|
||||
for(i=0;i<NUM_OF_MSG;i++)
|
||||
{
|
||||
//
|
||||
// Setting Message Marker to Correlate each Tx Message
|
||||
// with Corresponding Tx Event FIFO Element
|
||||
//
|
||||
txMsg[loopCnt].mm = a_MM[i];
|
||||
|
||||
//
|
||||
// Write message to Message RAM.
|
||||
//
|
||||
MCAN_writeMsgRam(MCANA_DRIVER_BASE, MCAN_MEM_TYPE_BUF, loopCnt,
|
||||
&txMsg[loopCnt]);
|
||||
|
||||
//
|
||||
// Add transmission request for Tx buffer 0
|
||||
//
|
||||
MCAN_txBufAddReq(MCANA_DRIVER_BASE, 0U);
|
||||
|
||||
//
|
||||
// Wait till the frame is successfully transmitted (and ACKnowledged)
|
||||
// "Tx Buffer Transmission Occurred" register is polled.
|
||||
//
|
||||
while(MCAN_getTxBufReqPend(MCANA_DRIVER_BASE))
|
||||
{
|
||||
}
|
||||
|
||||
//
|
||||
// Add delay between consecutive transmit operations
|
||||
//
|
||||
DEVICE_DELAY_US(50000);
|
||||
}
|
||||
|
||||
//
|
||||
// Stop Application.
|
||||
//
|
||||
asm(" ESTOP0");
|
||||
}
|
||||
|
||||
static void MCANConfig(void)
|
||||
{
|
||||
MCAN_InitParams initParams;
|
||||
MCAN_ConfigParams configParams;
|
||||
MCAN_MsgRAMConfigParams msgRAMConfigParams;
|
||||
MCAN_BitTimingParams bitTimes;
|
||||
|
||||
//
|
||||
// Initializing all structs to zero to prevent stray values
|
||||
//
|
||||
memset(&initParams, 0, sizeof(initParams));
|
||||
memset(&configParams, 0, sizeof(configParams));
|
||||
memset(&msgRAMConfigParams, 0, sizeof(msgRAMConfigParams));
|
||||
memset(&bitTimes, 0, sizeof(bitTimes));
|
||||
|
||||
//
|
||||
// Initialize MCAN Init parameters.
|
||||
//
|
||||
initParams.fdMode = 0x1U; // FD operation enabled.
|
||||
initParams.brsEnable = 0x1U; // Bit rate switching for
|
||||
// transmissions enabled.
|
||||
|
||||
//
|
||||
// Transmitter Delay Compensation parameters.
|
||||
//
|
||||
initParams.tdcConfig.tdcf = 0xAU;
|
||||
initParams.tdcConfig.tdco = 0x6U;
|
||||
|
||||
//
|
||||
// Initialize MCAN Config parameters.
|
||||
//
|
||||
configParams.tsSelect = 0x2U; // External Timestamp counter value used. (necessary for CAN-FD operation)
|
||||
|
||||
//
|
||||
// Initialize Message RAM Sections Configuration Parameters
|
||||
//
|
||||
msgRAMConfigParams.txStartAddr = MCAN_TX_BUFF_START_ADDR;
|
||||
// Tx Buffers Start Address.
|
||||
|
||||
msgRAMConfigParams.txBufNum = MCAN_TX_BUFF_SIZE;
|
||||
// Number of Dedicated Transmit Buffers.
|
||||
|
||||
msgRAMConfigParams.txBufMode = 0U;
|
||||
|
||||
msgRAMConfigParams.txBufElemSize = MCAN_TX_BUFF_ELEM_SIZE;
|
||||
// Tx Buffer Element Size.
|
||||
msgRAMConfigParams.txEventFIFOStartAddr = MCAN_TX_EVENT_START_ADDR;
|
||||
// Tx Event FIFO Start Address.
|
||||
msgRAMConfigParams.txEventFIFOSize = MCAN_TX_EVENT_SIZE;
|
||||
// Event FIFO Size.
|
||||
msgRAMConfigParams.txEventFIFOWaterMark = 3U;
|
||||
|
||||
//
|
||||
// Initialize bit timings.
|
||||
//
|
||||
bitTimes.nomRatePrescalar = 0x3U; // Nominal Baud Rate Pre-scaler
|
||||
bitTimes.nomTimeSeg1 = 0x9U; // Nominal Time segment before SP
|
||||
bitTimes.nomTimeSeg2 = 0x8U; // Nominal Time segment after SP
|
||||
bitTimes.nomSynchJumpWidth = 0x8U; // Nominal SJW
|
||||
bitTimes.dataRatePrescalar = 0x1U; // Data Baud Rate Pre-scaler
|
||||
bitTimes.dataTimeSeg1 = 0x9U; // Data Time segment before SP
|
||||
bitTimes.dataTimeSeg2 = 0x8U; // Data Time segment after SP
|
||||
bitTimes.dataSynchJumpWidth = 0x8U; // Data SJW
|
||||
//
|
||||
// Wait for memory initialization to happen.
|
||||
//
|
||||
while(FALSE == MCAN_isMemInitDone(MCANA_DRIVER_BASE))
|
||||
{
|
||||
}
|
||||
|
||||
//
|
||||
// Put MCAN in SW initialization mode.
|
||||
//
|
||||
MCAN_setOpMode(MCANA_DRIVER_BASE, MCAN_OPERATION_MODE_SW_INIT);
|
||||
|
||||
//
|
||||
// Wait till MCAN is not initialized.
|
||||
//
|
||||
while (MCAN_OPERATION_MODE_SW_INIT != MCAN_getOpMode(MCANA_DRIVER_BASE))
|
||||
{}
|
||||
|
||||
//
|
||||
// Initialize MCAN module.
|
||||
//
|
||||
MCAN_init(MCANA_DRIVER_BASE, &initParams);
|
||||
|
||||
//
|
||||
// Configure Bit timings.
|
||||
//
|
||||
MCAN_setBitTime(MCANA_DRIVER_BASE, &bitTimes);
|
||||
|
||||
//
|
||||
// Configure MCAN module.
|
||||
//
|
||||
MCAN_config(MCANA_DRIVER_BASE, &configParams);
|
||||
|
||||
//
|
||||
// Configure Message RAM Sections
|
||||
//
|
||||
MCAN_msgRAMConfig(MCANA_DRIVER_BASE, &msgRAMConfigParams);
|
||||
|
||||
//
|
||||
// Set Prescalar and Enable External Timestamp Counter
|
||||
//
|
||||
MCAN_extTSCounterConfig(MCANA_DRIVER_BASE, 0xFFF);
|
||||
MCAN_extTSCounterEnable(MCANA_DRIVER_BASE, 1U);
|
||||
|
||||
//
|
||||
// Take MCAN out of the SW initialization mode
|
||||
//
|
||||
MCAN_setOpMode(MCANA_DRIVER_BASE, MCAN_OPERATION_MODE_NORMAL);
|
||||
|
||||
while (MCAN_OPERATION_MODE_NORMAL != MCAN_getOpMode(MCANA_DRIVER_BASE))
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// This function will configure X-BAR for MCAN interrupts.
|
||||
//
|
||||
static void MCANIntrConfig(void)
|
||||
{
|
||||
|
||||
Interrupt_initModule();
|
||||
Interrupt_initVectorTable();
|
||||
|
||||
Interrupt_register(INT_MCANA_1,&MCANIntr1ISR);
|
||||
Interrupt_enable(INT_MCANA_1);
|
||||
|
||||
Interrupt_enableGlobal();
|
||||
|
||||
}
|
||||
|
||||
//
|
||||
// This is Interrupt Service Routine for MCAN interrupt 1.
|
||||
//
|
||||
__interrupt void MCANIntr1ISR(void)
|
||||
{
|
||||
uint32_t intrStatus;
|
||||
MCAN_RxNewDataStatus newData;
|
||||
|
||||
intrStatus = MCAN_getIntrStatus(MCANA_DRIVER_BASE);
|
||||
|
||||
//
|
||||
// Clear the interrupt Status.
|
||||
//
|
||||
MCAN_clearIntrStatus(MCANA_DRIVER_BASE, intrStatus);
|
||||
|
||||
//
|
||||
// Clearing the interrupt lineNum
|
||||
//
|
||||
MCAN_clearInterrupt(MCANA_DRIVER_BASE, 0x2);
|
||||
|
||||
//
|
||||
// Check to see if the interrupt is caused by a message being
|
||||
// received in dedicated RX Buffers
|
||||
//
|
||||
if((MCAN_INTR_SRC_TX_EVT_FIFO_WATERMARK & intrStatus) == MCAN_INTR_SRC_TX_EVT_FIFO_WATERMARK)
|
||||
{
|
||||
//
|
||||
// Read Tx Event FIFO Status
|
||||
//
|
||||
MCAN_getTxEventFIFOStatus(MCANA_DRIVER_BASE, &TxEFS);
|
||||
|
||||
//
|
||||
// Read all Tx Event FIFO Elements once the
|
||||
// watermark is hit, so that the FIFO is empty again
|
||||
//
|
||||
while(TxEFS.fillLvl)
|
||||
{
|
||||
//
|
||||
// Read Tx Event FIFO Element Data from Message RAM
|
||||
//
|
||||
MCAN_readTxEventFIFO(MCANA_DRIVER_BASE, &TxEvent);
|
||||
|
||||
//
|
||||
// Store Tx FIFO Element information into predefined array
|
||||
//
|
||||
TxEventArray[j] = TxEvent;
|
||||
j++;
|
||||
|
||||
//
|
||||
// Write Acknowledge to increment Get Index
|
||||
// which will point to the next element in the FIFO
|
||||
//
|
||||
MCAN_writeTxEventFIFOAck(MCANA_DRIVER_BASE, TxEFS.getIdx);
|
||||
|
||||
//
|
||||
// Read FIFO Status to check Fill Level
|
||||
//
|
||||
MCAN_getTxEventFIFOStatus(MCANA_DRIVER_BASE, &TxEFS);
|
||||
}
|
||||
}
|
||||
else if((MCAN_INTR_SRC_TIMESTAMP_WRAPAROUND & intrStatus) == MCAN_INTR_SRC_TIMESTAMP_WRAPAROUND)
|
||||
{
|
||||
//
|
||||
// Interrupt handling when timestamp counter rolls over
|
||||
// Counter value resets to zero automatically, in case
|
||||
// no action is taken
|
||||
//
|
||||
}
|
||||
else
|
||||
{
|
||||
error++;
|
||||
|
||||
//
|
||||
// Interrupt handling for other interrupt sources goes here
|
||||
//
|
||||
|
||||
}
|
||||
|
||||
//
|
||||
// Acknowledge this interrupt located in group 9
|
||||
//
|
||||
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP9);
|
||||
}
|
||||
@@ -0,0 +1,739 @@
|
||||
//#############################################################################
|
||||
//
|
||||
// FILE: mcan_ex15_timestamp.c
|
||||
//
|
||||
// TITLE: MCAN Timestamping Example
|
||||
//
|
||||
//! \addtogroup driver_example_c28x_list
|
||||
//! <h1> MCAN Internal Loopback with Interrupt </h1>
|
||||
//!
|
||||
//! This example demonstrates the MCAN Timestamping functionality.
|
||||
//! When the TRANSMIT define is selected, the CAN Controller acts as a
|
||||
//! Transmitter and sends data to the second CAN Controller connected
|
||||
//! externally. If TRANMSIT is not defined the CAN Controller acts as a Receiver
|
||||
//! and waits for message to be transmitted by the External CAN Controller.
|
||||
//!
|
||||
//! \b External \b Connections \n
|
||||
//! - None.
|
||||
//!
|
||||
//! \b Watch \b Variables \n
|
||||
//! - a_txts - Array that stores Tx Timestamp values read from the Tx Event FIFO
|
||||
//! - a_rxts - Array that stores Rx Timestamp values read from Rx FIFO 1
|
||||
//!
|
||||
//
|
||||
//#############################################################################
|
||||
//
|
||||
//
|
||||
// $Copyright:
|
||||
// Copyright (C) 2022 Texas Instruments Incorporated - http://www.ti.com
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// $
|
||||
//#############################################################################
|
||||
|
||||
//
|
||||
// Include Files
|
||||
//
|
||||
#include "driverlib.h"
|
||||
#include "device.h"
|
||||
#include "inc/stw_dataTypes.h"
|
||||
#include "inc/stw_types.h"
|
||||
#include <string.h>
|
||||
|
||||
//
|
||||
// Defines
|
||||
//
|
||||
#define MCAN_STD_ID_FILTER_NUM (5U)
|
||||
#define MCAN_EXT_ID_FILTER_NUM (0U)
|
||||
#define MCAN_FIFO_0_NUM (0U)
|
||||
#define MCAN_FIFO_0_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_FIFO_1_NUM (20U)
|
||||
#define MCAN_FIFO_1_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_RX_BUFF_NUM (0U)
|
||||
#define MCAN_RX_BUFF_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_TX_BUFF_SIZE (15U)
|
||||
#define MCAN_TX_FQ_SIZE (0U)
|
||||
#define MCAN_TX_BUFF_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_TX_EVENT_SIZE (15U)
|
||||
#define MCAN_EXT_ID_AND_MASK (0x1FFFFFFFU)
|
||||
#define MCAN_MSG_INT (0x81200)
|
||||
|
||||
//
|
||||
// Defining Starting Addresses for Message RAM Sections,
|
||||
// (Calculated from Macros based on User defined configuration above)
|
||||
//
|
||||
#define MCAN_STD_ID_FILT_START_ADDR (0x0U)
|
||||
#define MCAN_EXT_ID_FILT_START_ADDR (MCAN_STD_ID_FILT_START_ADDR + ((MCAN_STD_ID_FILTER_NUM * MCANSS_STD_ID_FILTER_SIZE_WORDS * 4U)))
|
||||
#define MCAN_FIFO_0_START_ADDR (MCAN_EXT_ID_FILT_START_ADDR + ((MCAN_EXT_ID_FILTER_NUM * MCANSS_EXT_ID_FILTER_SIZE_WORDS * 4U)))
|
||||
#define MCAN_FIFO_1_START_ADDR (MCAN_FIFO_0_START_ADDR + (MCAN_getMsgObjSize(MCAN_FIFO_0_ELEM_SIZE) * 4U * MCAN_FIFO_0_NUM))
|
||||
#define MCAN_RX_BUFF_START_ADDR (MCAN_FIFO_1_START_ADDR + (MCAN_getMsgObjSize(MCAN_FIFO_1_ELEM_SIZE) * 4U * MCAN_FIFO_1_NUM))
|
||||
#define MCAN_TX_BUFF_START_ADDR (MCAN_RX_BUFF_START_ADDR + (MCAN_getMsgObjSize(MCAN_RX_BUFF_ELEM_SIZE) * 4U * MCAN_RX_BUFF_NUM))
|
||||
#define MCAN_TX_EVENT_START_ADDR (MCAN_TX_BUFF_START_ADDR + (MCAN_getMsgObjSize(MCAN_TX_BUFF_ELEM_SIZE) * 4U * (MCAN_TX_BUFF_SIZE + MCAN_TX_FQ_SIZE)))
|
||||
|
||||
//
|
||||
// Application Defines
|
||||
//
|
||||
#define NUM_OF_MSG (10U)
|
||||
#define MCAN_TS_PRESCALAR (0xBFF0) // Configures Prescaler for External Counter used for Timestamping
|
||||
|
||||
//
|
||||
// Comment out to make the CAN Controller work as a receiver
|
||||
//
|
||||
#define TRANSMIT
|
||||
|
||||
//
|
||||
// Global Variables.
|
||||
//
|
||||
volatile unsigned long tsInterruptCntr = 0;
|
||||
volatile unsigned long error = 0;
|
||||
#ifdef TRANSMIT
|
||||
MCAN_TxBufElement txMsg[NUM_OF_MSG];
|
||||
MCAN_TxEventFIFOStatus TxEFS;
|
||||
MCAN_TxEventFIFOElement TxEvent, TxEventArray[NUM_OF_MSG];
|
||||
uint32_t a_txts[NUM_OF_MSG], a_txCounter[NUM_OF_MSG];
|
||||
volatile uint32_t isrIntr0Flag = 1U;
|
||||
#else
|
||||
MCAN_RxBufElement rxMsg[NUM_OF_MSG], rxMsg1;
|
||||
MCAN_RxFIFOStatus RxFS;
|
||||
uint32_t a_rxts[NUM_OF_MSG], a_rxCounter[NUM_OF_MSG];
|
||||
volatile uint32_t isrIntr1Flag = 1U;
|
||||
#endif
|
||||
int32_t loopCnt = 0U, i = 0U, j = 0U;
|
||||
uint32_t msgCount = 0U;
|
||||
|
||||
//
|
||||
// Function Prototype.
|
||||
//
|
||||
static void MCANConfig(void);
|
||||
static void MCANIntrConfig(void);
|
||||
__interrupt void MCANTSIntrISR(void);
|
||||
#ifdef TRANSMIT
|
||||
__interrupt void MCANIntr0ISR(void);
|
||||
#else
|
||||
__interrupt void MCANIntr1ISR(void);
|
||||
#endif
|
||||
|
||||
//
|
||||
// Main
|
||||
//
|
||||
void main(void)
|
||||
{
|
||||
uint32_t numOfMsg = NUM_OF_MSG;
|
||||
|
||||
//
|
||||
// Initialize device clock and peripherals
|
||||
//
|
||||
Device_init();
|
||||
|
||||
//
|
||||
// Initialize GPIO and unlock the GPIO configuration registers
|
||||
//
|
||||
Device_initGPIO();
|
||||
|
||||
//
|
||||
// Configuring the GPIOs for MCAN.
|
||||
//
|
||||
GPIO_setPinConfig(DEVICE_GPIO_CFG_MCANRXA);
|
||||
GPIO_setPinConfig(DEVICE_GPIO_CFG_MCANTXA);
|
||||
|
||||
//
|
||||
// Allocate MCAN (a shared peripheral) to CPU1 (C28x)
|
||||
//
|
||||
SysCtl_allocateSharedPeripheral(SYSCTL_PALLOCATE_MCAN_A,0x0U);
|
||||
|
||||
//
|
||||
// Configure the divisor for the MCAN bit-clock
|
||||
//
|
||||
SysCtl_setMCANClk(SYSCTL_MCANCLK_DIV_5);
|
||||
|
||||
//
|
||||
// CrossBar and ISR Configuration.
|
||||
//
|
||||
MCANIntrConfig();
|
||||
|
||||
//
|
||||
// Initialize message to transmit.
|
||||
//
|
||||
uint32_t dataBytes = 64;
|
||||
|
||||
#ifdef TRANSMIT
|
||||
for(loopCnt = 0U ; loopCnt < numOfMsg ; loopCnt++)
|
||||
{
|
||||
txMsg[loopCnt].id = ((uint32_t)(0x4)) << 18U;
|
||||
txMsg[loopCnt].id |= (0xFF);
|
||||
txMsg[loopCnt].rtr = 0U;
|
||||
txMsg[loopCnt].xtd = 0U;
|
||||
txMsg[loopCnt].esi = 0U;
|
||||
txMsg[loopCnt].dlc = 15U;
|
||||
txMsg[loopCnt].brs = 1U;
|
||||
txMsg[loopCnt].fdf = 1U;
|
||||
txMsg[loopCnt].efc = 1U;
|
||||
txMsg[loopCnt].mm = 0xA0U + (uint32_t)loopCnt;
|
||||
//Message Marker is used to associate the Tx Message with the corresponding Tx Event FIFO element
|
||||
txMsg[loopCnt].data[i] = 0x1;
|
||||
for(i = 1; i < dataBytes; i++)
|
||||
{
|
||||
txMsg[loopCnt].data[i] = txMsg[loopCnt].data[i-1] + 1;
|
||||
}
|
||||
i = 0;
|
||||
}
|
||||
#else
|
||||
for(loopCnt = 0U ; loopCnt < numOfMsg ; loopCnt++)
|
||||
{
|
||||
rxMsg[loopCnt].id = 0U;
|
||||
rxMsg[loopCnt].rtr = 0U;
|
||||
rxMsg[loopCnt].xtd = 0U;
|
||||
rxMsg[loopCnt].esi = 0U;
|
||||
rxMsg[loopCnt].rxts = 0U;
|
||||
rxMsg[loopCnt].dlc = 0U;
|
||||
rxMsg[loopCnt].brs = 0U;
|
||||
rxMsg[loopCnt].fdf = 0U;
|
||||
rxMsg[loopCnt].fidx = 0U;
|
||||
rxMsg[loopCnt].anmf = 0U;
|
||||
for(i = 0; i < dataBytes; i++)
|
||||
{
|
||||
rxMsg[loopCnt].data[i] = 0;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef TRANSMIT
|
||||
for(loopCnt = 0; loopCnt < NUM_OF_MSG; loopCnt++)
|
||||
{
|
||||
//
|
||||
// Initializing Tx Timestamp Array
|
||||
//
|
||||
a_txts[loopCnt] = 0x0U;
|
||||
}
|
||||
#else
|
||||
for(loopCnt = 0; loopCnt < NUM_OF_MSG; loopCnt++)
|
||||
{
|
||||
//
|
||||
// Initializing Rx Timestamp Array
|
||||
//
|
||||
a_rxts[loopCnt] = 0x0U;
|
||||
}
|
||||
#endif
|
||||
|
||||
//
|
||||
// Configure MCAN.
|
||||
//
|
||||
MCANConfig();
|
||||
|
||||
#ifdef TRANSMIT
|
||||
//
|
||||
// Enable Interrupts.
|
||||
//
|
||||
MCAN_enableIntr(MCANA_DRIVER_BASE, MCAN_IR_TC_MASK | MCAN_IR_TEFW_MASK, 1U);
|
||||
|
||||
//
|
||||
// Select Interrupt Line.
|
||||
//
|
||||
MCAN_selectIntrLine(MCANA_DRIVER_BASE, MCAN_INTR_MASK_ALL, MCAN_INTR_LINE_NUM_0);
|
||||
|
||||
//
|
||||
// Enable Interrupt Line.
|
||||
//
|
||||
MCAN_enableIntrLine(MCANA_DRIVER_BASE, MCAN_INTR_LINE_NUM_0, 1U);
|
||||
#else
|
||||
//
|
||||
// Enable Interrupts.
|
||||
//
|
||||
MCAN_enableIntr(MCANA_DRIVER_BASE, MCAN_IR_RF1N_MASK | MCAN_IR_RF1W_MASK, 1U);
|
||||
|
||||
//
|
||||
// Select Interrupt Line.
|
||||
//
|
||||
MCAN_selectIntrLine(MCANA_DRIVER_BASE, MCAN_INTR_MASK_ALL, MCAN_INTR_LINE_NUM_1);
|
||||
|
||||
//
|
||||
// Enable Interrupt Line.
|
||||
//
|
||||
MCAN_enableIntrLine(MCANA_DRIVER_BASE, MCAN_INTR_LINE_NUM_1, 1U);
|
||||
#endif
|
||||
|
||||
#ifdef TRANSMIT
|
||||
for(loopCnt = 0U ; loopCnt < numOfMsg ; loopCnt++)
|
||||
{
|
||||
//
|
||||
// Enable Transmission Interrupt (One time configuration)
|
||||
//
|
||||
MCAN_txBufTransIntrEnable(MCANA_DRIVER_BASE, loopCnt, 1U);
|
||||
}
|
||||
|
||||
for(loopCnt = 0U ; loopCnt < numOfMsg ; loopCnt++)
|
||||
{
|
||||
//
|
||||
// Write Tx Message to the Message RAM.
|
||||
//
|
||||
MCAN_writeMsgRam(MCANA_DRIVER_BASE, MCAN_MEM_TYPE_BUF, loopCnt, &txMsg[loopCnt]);
|
||||
|
||||
//
|
||||
// Add request for transmission.
|
||||
//
|
||||
MCAN_txBufAddReq(MCANA_DRIVER_BASE, loopCnt);
|
||||
|
||||
//
|
||||
// Wait for the isrIntr0Flag to be reset. (for transmission to be completed)
|
||||
//
|
||||
while(isrIntr0Flag)
|
||||
{
|
||||
}
|
||||
|
||||
//
|
||||
// Reset the isrIntr0Flag
|
||||
//
|
||||
isrIntr0Flag = 1U;
|
||||
|
||||
DEVICE_DELAY_US(500000);
|
||||
}
|
||||
#endif
|
||||
|
||||
while(1)
|
||||
{
|
||||
//
|
||||
// Application code goes here
|
||||
//
|
||||
|
||||
}
|
||||
|
||||
//
|
||||
// Stop Application.
|
||||
//
|
||||
asm(" ESTOP0");
|
||||
}
|
||||
|
||||
//
|
||||
// This function will configure MCAN module.
|
||||
//
|
||||
static void MCANConfig(void)
|
||||
{
|
||||
MCAN_RevisionId revId;
|
||||
MCAN_InitParams initParams;
|
||||
MCAN_ConfigParams configParams;
|
||||
MCAN_MsgRAMConfigParams msgRAMConfigParams;
|
||||
MCAN_StdMsgIDFilterElement stdFiltelem;
|
||||
MCAN_BitTimingParams bitTimes;
|
||||
|
||||
//
|
||||
// Initializing all structs to zero to prevent stray values
|
||||
//
|
||||
memset(&initParams, 0, sizeof(initParams));
|
||||
memset(&configParams, 0, sizeof(configParams));
|
||||
memset(&msgRAMConfigParams, 0, sizeof(msgRAMConfigParams));
|
||||
memset(&stdFiltelem, 0, sizeof(stdFiltelem));
|
||||
memset(&bitTimes, 0, sizeof(bitTimes));
|
||||
|
||||
//
|
||||
// Initialize MCAN Init parameters.
|
||||
//
|
||||
initParams.fdMode = 0x1U; // FD operation enabled.
|
||||
initParams.brsEnable = 0x1U; // Bit rate switching for
|
||||
// transmissions enabled.
|
||||
initParams.txpEnable = 0x0U; // Transmit pause disabled.
|
||||
initParams.efbi = 0x0U; // Edge filtering disabled.
|
||||
initParams.pxhddisable = 0x0U; // Protocol exception handling enabled
|
||||
initParams.darEnable = 0x0U; // Enable Automatic retransmission of
|
||||
// messages not transmitted successfully
|
||||
initParams.wkupReqEnable = 0x1U; // Wakeup request is enabled.
|
||||
initParams.autoWkupEnable = 0x1U; // Auto-Wakeup is enabled.
|
||||
initParams.emulationEnable = 0x1U; // Emulation/Debug Suspend is enabled.
|
||||
initParams.tdcEnable = 0x1U; // Transmitter Delay Compensation is
|
||||
// enabled.
|
||||
initParams.wdcPreload = 0xFFU; // Start value of the Message RAM
|
||||
// Watchdog Counter preload.
|
||||
|
||||
//
|
||||
// Transmitter Delay Compensation parameters.
|
||||
//
|
||||
initParams.tdcConfig.tdcf = 0xAU;
|
||||
initParams.tdcConfig.tdco = 0x6U;
|
||||
|
||||
//
|
||||
// Initialize MCAN Config parameters.
|
||||
//
|
||||
configParams.monEnable = 0x0U; // Bus Monitoring Mode is disabled
|
||||
configParams.asmEnable = 0x0U; // Normal CAN operation.
|
||||
configParams.tsPrescalar = 0xFU; // Prescaler Value.
|
||||
configParams.tsSelect = 0x2U; // External Timestamp counter value used.
|
||||
configParams.timeoutSelect = MCAN_TIMEOUT_SELECT_CONT;
|
||||
// Time-out counter source select.
|
||||
configParams.timeoutPreload = 0xFFFFU; // Start value of the Timeout
|
||||
// Counter.
|
||||
configParams.timeoutCntEnable = 0x0U; // Time-out Counter is disabled.
|
||||
configParams.filterConfig.anfe = 0x1U; // Accept in Rx FIFO 1.
|
||||
configParams.filterConfig.anfs = 0x1U; // Accept in Rx FIFO 1.
|
||||
|
||||
configParams.filterConfig.rrfe = 0x0U; // Filter remote frames with
|
||||
// 29-bit extended IDs.
|
||||
configParams.filterConfig.rrfs = 0x0U; // Filter all remote frames with
|
||||
// 11-bit standard IDs.
|
||||
|
||||
//
|
||||
// Initialize Message RAM Sections Configuration Parameters.
|
||||
//
|
||||
msgRAMConfigParams.flssa = MCAN_STD_ID_FILT_START_ADDR;
|
||||
// Standard ID Filter List Start Address.
|
||||
msgRAMConfigParams.lss = MCAN_STD_ID_FILTER_NUM;
|
||||
// List Size: Standard ID.
|
||||
msgRAMConfigParams.flesa = MCAN_EXT_ID_FILT_START_ADDR;
|
||||
// Extended ID Filter List Start Address.
|
||||
msgRAMConfigParams.lse = MCAN_EXT_ID_FILTER_NUM;
|
||||
// List Size: Extended ID.
|
||||
msgRAMConfigParams.txStartAddr = MCAN_TX_BUFF_START_ADDR;
|
||||
// Tx Buffers Start Address.
|
||||
msgRAMConfigParams.txBufNum = MCAN_TX_BUFF_SIZE;
|
||||
// Number of Dedicated Transmit Buffers.
|
||||
msgRAMConfigParams.txFIFOSize = MCAN_TX_FQ_SIZE;
|
||||
// Number of Tx FIFO or Tx Queue Elements
|
||||
msgRAMConfigParams.txBufMode = 0U; //Tx FIFO operation
|
||||
msgRAMConfigParams.txBufElemSize = MCAN_TX_BUFF_ELEM_SIZE;
|
||||
// Tx Buffer Element Size.
|
||||
msgRAMConfigParams.txEventFIFOStartAddr = MCAN_TX_EVENT_START_ADDR;
|
||||
// Tx Event FIFO Start Address.
|
||||
msgRAMConfigParams.txEventFIFOSize = MCAN_TX_BUFF_SIZE;
|
||||
// Event FIFO Size.
|
||||
msgRAMConfigParams.txEventFIFOWaterMark = NUM_OF_MSG;
|
||||
// Level for Tx Event FIFO watermark interrupt.
|
||||
msgRAMConfigParams.rxFIFO0startAddr = MCAN_FIFO_0_START_ADDR;
|
||||
// Rx FIFO0 Start Address.
|
||||
msgRAMConfigParams.rxFIFO0size = MCAN_FIFO_0_NUM;
|
||||
// Number of Rx FIFO elements.
|
||||
msgRAMConfigParams.rxFIFO0waterMark = 3U; // Rx FIFO0 Watermark.
|
||||
msgRAMConfigParams.rxFIFO0OpMode = 0U; // FIFO blocking mode.
|
||||
msgRAMConfigParams.rxFIFO1startAddr = MCAN_FIFO_1_START_ADDR;
|
||||
// Rx FIFO1 Start Address.
|
||||
msgRAMConfigParams.rxFIFO1size = MCAN_FIFO_1_NUM;
|
||||
// Number of Rx FIFO elements.
|
||||
msgRAMConfigParams.rxFIFO1waterMark = NUM_OF_MSG; // Level for Rx FIFO 1
|
||||
// watermark interrupt.
|
||||
msgRAMConfigParams.rxFIFO1OpMode = 0U; // FIFO blocking mode.
|
||||
msgRAMConfigParams.rxBufStartAddr = MCAN_RX_BUFF_START_ADDR;
|
||||
// Rx Buffer Start Address.
|
||||
msgRAMConfigParams.rxBufElemSize = MCAN_RX_BUFF_ELEM_SIZE;
|
||||
// Rx Buffer Element Size.
|
||||
msgRAMConfigParams.rxFIFO0ElemSize = MCAN_FIFO_0_ELEM_SIZE;
|
||||
// Rx FIFO0 Element Size.
|
||||
msgRAMConfigParams.rxFIFO1ElemSize = MCAN_FIFO_1_ELEM_SIZE;
|
||||
// Rx FIFO1 Element Size.
|
||||
|
||||
//
|
||||
// Initialize Rx Buffer Configuration parameters.
|
||||
//
|
||||
stdFiltelem.sfid2 = 0xFU; // Standard Filter ID 2.
|
||||
stdFiltelem.sfid1 = 0x4U; // Standard Filter ID 1.
|
||||
stdFiltelem.sfec = 0x2U; // Store into Rx FIFO 1
|
||||
stdFiltelem.sft = 0x0U; // Range filter from SFID1 to SFID2
|
||||
|
||||
//
|
||||
// Initialize bit timings.
|
||||
//
|
||||
bitTimes.nomRatePrescalar = 0x3U; // Nominal Baud Rate Pre-scaler
|
||||
bitTimes.nomTimeSeg1 = 0x9U; // Nominal Time segment before SP
|
||||
bitTimes.nomTimeSeg2 = 0x8U; // Nominal Time segment after SP
|
||||
bitTimes.nomSynchJumpWidth = 0x8U; // Nominal SJW
|
||||
bitTimes.dataRatePrescalar = 0x1U; // Data Baud Rate Pre-scaler
|
||||
bitTimes.dataTimeSeg1 = 0x9U; // Data Time segment before SP
|
||||
bitTimes.dataTimeSeg2 = 0x8U; // Data Time segment after SP
|
||||
bitTimes.dataSynchJumpWidth = 0x8U; // Data SJW
|
||||
|
||||
//
|
||||
// Get MCANSS Revision ID.
|
||||
//
|
||||
MCAN_getRevisionId(MCANA_DRIVER_BASE, &revId);
|
||||
|
||||
//
|
||||
// Wait for Memory initialization to be completed.
|
||||
//
|
||||
while(FALSE == MCAN_isMemInitDone(MCANA_DRIVER_BASE));
|
||||
|
||||
//
|
||||
// Put MCAN in SW initialization mode.
|
||||
//
|
||||
MCAN_setOpMode(MCANA_DRIVER_BASE, MCAN_OPERATION_MODE_SW_INIT);
|
||||
|
||||
//
|
||||
// Wait till MCAN is not initialized.
|
||||
//
|
||||
while (MCAN_OPERATION_MODE_SW_INIT != MCAN_getOpMode(MCANA_DRIVER_BASE));
|
||||
|
||||
//
|
||||
// Initialize MCAN module.
|
||||
//
|
||||
MCAN_init(MCANA_DRIVER_BASE, &initParams);
|
||||
|
||||
//
|
||||
// Configure MCAN module.
|
||||
//
|
||||
MCAN_config(MCANA_DRIVER_BASE, &configParams);
|
||||
|
||||
//
|
||||
// Configure Bit timings.
|
||||
//
|
||||
MCAN_setBitTime(MCANA_DRIVER_BASE, &bitTimes);
|
||||
|
||||
//
|
||||
// Configure Message RAM Sections
|
||||
//
|
||||
MCAN_msgRAMConfig(MCANA_DRIVER_BASE, &msgRAMConfigParams);
|
||||
|
||||
//
|
||||
// Configure Standard ID filter element
|
||||
//
|
||||
MCAN_addStdMsgIDFilter(MCANA_DRIVER_BASE, 0U, &stdFiltelem);
|
||||
|
||||
//
|
||||
// Enable External timeStamp overflow interrupt
|
||||
//
|
||||
MCAN_extTSEnableIntr(MCANA_DRIVER_BASE, 1);
|
||||
|
||||
//
|
||||
// Configure Timestamp Counter
|
||||
//
|
||||
MCAN_extTSCounterConfig(MCANA_DRIVER_BASE, MCAN_TS_PRESCALAR);
|
||||
|
||||
//
|
||||
// Enable External Timestamp Counter
|
||||
//
|
||||
MCAN_extTSCounterEnable(MCANA_DRIVER_BASE, 1U);
|
||||
|
||||
//
|
||||
// Enable internal loopback mode
|
||||
//
|
||||
MCAN_lpbkModeEnable(MCANA_DRIVER_BASE, MCAN_LPBK_MODE_EXTERNAL, TRUE);
|
||||
|
||||
//
|
||||
// Take MCAN out of the SW initialization mode
|
||||
//
|
||||
MCAN_setOpMode(MCANA_DRIVER_BASE, MCAN_OPERATION_MODE_NORMAL);
|
||||
|
||||
while (MCAN_OPERATION_MODE_NORMAL != MCAN_getOpMode(MCANA_DRIVER_BASE));
|
||||
}
|
||||
|
||||
//
|
||||
// This function will configure X-BAR for MCAN interrupts.
|
||||
//
|
||||
static void MCANIntrConfig(void)
|
||||
{
|
||||
|
||||
Interrupt_initModule();
|
||||
Interrupt_initVectorTable();
|
||||
|
||||
#ifdef TRANSMIT
|
||||
Interrupt_register(INT_MCANA_0,&MCANIntr0ISR);
|
||||
Interrupt_enable(INT_MCANA_0);
|
||||
#else
|
||||
Interrupt_register(INT_MCANA_1,&MCANIntr1ISR);
|
||||
Interrupt_enable(INT_MCANA_1);
|
||||
#endif
|
||||
Interrupt_register(INT_MCANA_WAKE,&MCANTSIntrISR);
|
||||
Interrupt_enable(INT_MCANA_WAKE);
|
||||
|
||||
Interrupt_enableGlobal();
|
||||
|
||||
}
|
||||
|
||||
#ifdef TRANSMIT
|
||||
//
|
||||
// This is Interrupt Service Routine for MCAN interrupt 0.
|
||||
//
|
||||
__interrupt void MCANIntr0ISR(void)
|
||||
{
|
||||
uint32_t intrStatus;
|
||||
|
||||
intrStatus = MCAN_getIntrStatus(MCANA_DRIVER_BASE);
|
||||
if (MCAN_MSG_INT != intrStatus)
|
||||
{
|
||||
error++;
|
||||
}
|
||||
|
||||
//
|
||||
// Clear the interrupt Status.
|
||||
//
|
||||
MCAN_clearIntrStatus(MCANA_DRIVER_BASE, intrStatus);
|
||||
|
||||
//
|
||||
// Clearing the interrupt lineNum
|
||||
//
|
||||
MCAN_clearInterrupt(MCANA_DRIVER_BASE, 0x1U);
|
||||
|
||||
//
|
||||
// Check to see if the interrupt is caused by a message being
|
||||
// received in dedicated RX Buffers
|
||||
//
|
||||
if((MCAN_INTR_SRC_TRANS_COMPLETE & intrStatus) == MCAN_INTR_SRC_TRANS_COMPLETE)
|
||||
{
|
||||
isrIntr0Flag = 0;
|
||||
|
||||
msgCount++;
|
||||
}
|
||||
if((MCAN_INTR_SRC_TX_EVT_FIFO_WATERMARK & intrStatus) == MCAN_INTR_SRC_TX_EVT_FIFO_WATERMARK)
|
||||
{
|
||||
//
|
||||
// Read Tx Event FIFO Status
|
||||
//
|
||||
MCAN_getTxEventFIFOStatus(MCANA_DRIVER_BASE, &TxEFS);
|
||||
|
||||
//
|
||||
// Read all Tx Event FIFO Elements once the
|
||||
// watermark is hit, so that the FIFO is empty again
|
||||
//
|
||||
while(TxEFS.fillLvl)
|
||||
{
|
||||
//
|
||||
// Read Tx Event FIFO Element Data from Message RAM
|
||||
//
|
||||
MCAN_readTxEventFIFO(MCANA_DRIVER_BASE, &TxEvent);
|
||||
|
||||
//
|
||||
// Store Tx FIFO Element information into predefined array
|
||||
//
|
||||
TxEventArray[j] = TxEvent;
|
||||
|
||||
//
|
||||
// Store Tx Timestamps into predefined array
|
||||
//
|
||||
a_txts[j] = TxEvent.txts;
|
||||
j++;
|
||||
|
||||
//
|
||||
// Write Acknowledge to increment Get Index
|
||||
// which will point to the next element in the FIFO
|
||||
//
|
||||
MCAN_writeTxEventFIFOAck(MCANA_DRIVER_BASE, TxEFS.getIdx);
|
||||
|
||||
//
|
||||
// Read FIFO Status to check Fill Level
|
||||
//
|
||||
MCAN_getTxEventFIFOStatus(MCANA_DRIVER_BASE, &TxEFS);
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// Acknowledge this interrupt located in group 9
|
||||
//
|
||||
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP9);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifndef TRANSMIT
|
||||
//
|
||||
// This is Interrupt Service Routine for MCAN interrupt 1.
|
||||
//
|
||||
__interrupt void MCANIntr1ISR(void)
|
||||
{
|
||||
uint32_t intrStatus;
|
||||
|
||||
intrStatus = MCAN_getIntrStatus(MCANA_DRIVER_BASE);
|
||||
if (MCAN_MSG_INT != intrStatus)
|
||||
{
|
||||
error++;
|
||||
}
|
||||
|
||||
error++;
|
||||
|
||||
//
|
||||
// Clear the interrupt Status.
|
||||
//
|
||||
MCAN_clearIntrStatus(MCANA_DRIVER_BASE, intrStatus);
|
||||
|
||||
//
|
||||
// Clearing the interrupt lineNum
|
||||
//
|
||||
MCAN_clearInterrupt(MCANA_DRIVER_BASE, 0x2U);
|
||||
|
||||
if((intrStatus & MCAN_INTR_SRC_RX_FIFO1_WATERMARK) == MCAN_INTR_SRC_RX_FIFO1_WATERMARK)
|
||||
{
|
||||
RxFS.num = MCAN_RX_FIFO_NUM_1;
|
||||
MCAN_getRxFIFOStatus(MCANA_DRIVER_BASE, &RxFS);
|
||||
|
||||
while(RxFS.fillLvl)
|
||||
{
|
||||
MCAN_readMsgRam(MCANA_DRIVER_BASE, MCAN_MEM_TYPE_FIFO, 0U,
|
||||
MCAN_RX_FIFO_NUM_1, &rxMsg1);
|
||||
|
||||
rxMsg[j] = rxMsg1;
|
||||
a_rxts[j] = rxMsg1.rxts;
|
||||
j++;
|
||||
|
||||
MCAN_writeRxFIFOAck(MCANA_DRIVER_BASE, MCAN_RX_FIFO_NUM_1,
|
||||
RxFS.getIdx);
|
||||
|
||||
MCAN_getRxFIFOStatus(MCANA_DRIVER_BASE, &RxFS);
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// Acknowledge this interrupt located in group 9
|
||||
//
|
||||
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP9);
|
||||
}
|
||||
#endif
|
||||
|
||||
interrupt void MCANTSIntrISR(void)
|
||||
{
|
||||
uint32_t intrStatus;
|
||||
|
||||
intrStatus = MCAN_getIntrStatus(MCANA_DRIVER_BASE);
|
||||
|
||||
//
|
||||
// Clear the External Counter Overflow Interrupt Bit to decrement the interrupt counter
|
||||
//
|
||||
MCAN_extTSClearRawStatus(MCANA_DRIVER_BASE);
|
||||
|
||||
//
|
||||
// Clear the interrupt status.
|
||||
//
|
||||
MCAN_clearIntrStatus(MCANA_DRIVER_BASE, intrStatus);
|
||||
|
||||
//
|
||||
// Clear External Counter Interrupt
|
||||
//
|
||||
MCAN_extTSWriteEOI(MCANA_DRIVER_BASE);
|
||||
|
||||
if (MCAN_INTR_SRC_TIMESTAMP_WRAPAROUND == (intrStatus & MCAN_INTR_SRC_TIMESTAMP_WRAPAROUND))
|
||||
{
|
||||
tsInterruptCntr++ ;
|
||||
}
|
||||
else
|
||||
{
|
||||
error++;
|
||||
}
|
||||
|
||||
//
|
||||
// Clearing the interrupt Line
|
||||
//
|
||||
MCAN_clearInterrupt(MCANA_DRIVER_BASE, 0x0);
|
||||
|
||||
//
|
||||
// Acknowledge this interrupt located in group 9
|
||||
//
|
||||
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP9);
|
||||
|
||||
}
|
||||
@@ -0,0 +1,500 @@
|
||||
//#############################################################################
|
||||
//
|
||||
// FILE: mcan_ex1_loopback.c
|
||||
//
|
||||
// TITLE: MCAN Loopback with Interrupts Example
|
||||
//
|
||||
//! \addtogroup driver_example_c28x_list
|
||||
//! <h1> MCAN Internal Loopback with Interrupt </h1>
|
||||
//!
|
||||
//! This example shows the MCAN Loopback functionality. The internal loopback
|
||||
//! mode is entered. The sent message should be received by the node.
|
||||
//! Use the last address of memory for Rx buffer.
|
||||
//!
|
||||
//! \b External \b Connections \n
|
||||
//! - None.
|
||||
//!
|
||||
//! \b Watch \b Variables \n
|
||||
//! - error - Checks if there is an error that occurred when the data was
|
||||
//! sent using internal loopback.
|
||||
//!
|
||||
//
|
||||
//#############################################################################
|
||||
//
|
||||
//
|
||||
//
|
||||
// C2000Ware v5.04.00.00
|
||||
//
|
||||
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// $
|
||||
//#############################################################################
|
||||
|
||||
//
|
||||
// Include Files
|
||||
//
|
||||
#include "driverlib.h"
|
||||
#include "device.h"
|
||||
#include "inc/stw_dataTypes.h"
|
||||
#include "inc/stw_types.h"
|
||||
#include <string.h>
|
||||
|
||||
//
|
||||
// Defines
|
||||
//
|
||||
#define MCAN_STD_ID_FILTER_NUM (1U)
|
||||
#define MCAN_EXT_ID_FILTER_NUM (0U)
|
||||
#define MCAN_FIFO_0_NUM (5U)
|
||||
#define MCAN_FIFO_0_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_FIFO_1_NUM (10U)
|
||||
#define MCAN_FIFO_1_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_RX_BUFF_NUM (10U)
|
||||
#define MCAN_RX_BUFF_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_TX_BUFF_SIZE (10U)
|
||||
#define MCAN_TX_FQ_SIZE (0U)
|
||||
#define MCAN_TX_BUFF_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_TX_EVENT_SIZE (10U)
|
||||
#define MCAN_EXT_ID_AND_MASK (0x1FFFFFFFU)
|
||||
#define MCAN_MSG_INT (0x81200)
|
||||
|
||||
//
|
||||
// Defining Starting Addresses for Message RAM Sections,
|
||||
// (Calculated from Macros based on User defined configuration above)
|
||||
//
|
||||
#define MCAN_STD_ID_FILT_START_ADDR (0x0U)
|
||||
#define MCAN_EXT_ID_FILT_START_ADDR (MCAN_STD_ID_FILT_START_ADDR + ((MCAN_STD_ID_FILTER_NUM * MCANSS_STD_ID_FILTER_SIZE_WORDS * 4U)))
|
||||
#define MCAN_FIFO_0_START_ADDR (MCAN_EXT_ID_FILT_START_ADDR + ((MCAN_EXT_ID_FILTER_NUM * MCANSS_EXT_ID_FILTER_SIZE_WORDS * 4U)))
|
||||
#define MCAN_FIFO_1_START_ADDR (MCAN_FIFO_0_START_ADDR + (MCAN_getMsgObjSize(MCAN_FIFO_0_ELEM_SIZE) * 4U * MCAN_FIFO_0_NUM))
|
||||
#define MCAN_RX_BUFF_START_ADDR (MCAN_FIFO_1_START_ADDR + (MCAN_getMsgObjSize(MCAN_FIFO_1_ELEM_SIZE) * 4U * MCAN_FIFO_1_NUM))
|
||||
#define MCAN_TX_BUFF_START_ADDR (MCAN_RX_BUFF_START_ADDR + (MCAN_getMsgObjSize(MCAN_RX_BUFF_ELEM_SIZE) * 4U * MCAN_RX_BUFF_NUM))
|
||||
#define MCAN_TX_EVENT_START_ADDR (MCAN_TX_BUFF_START_ADDR + (MCAN_getMsgObjSize(MCAN_TX_BUFF_ELEM_SIZE) * 4U * (MCAN_TX_BUFF_SIZE + MCAN_TX_FQ_SIZE)))
|
||||
|
||||
//
|
||||
// Global Variables.
|
||||
//
|
||||
volatile uint32_t isrIntr0Flag = 1U;
|
||||
volatile uint32_t isrIntr1Flag = 1U;
|
||||
volatile uint16_t monEn = 0x0;
|
||||
volatile unsigned long msgCount = 0;
|
||||
volatile unsigned long error = 0;
|
||||
|
||||
//
|
||||
// Function Prototype.
|
||||
//
|
||||
static void MCANConfig(void);
|
||||
static void MCANIntrConfig(void);
|
||||
__interrupt void MCANIntr1ISR(void);
|
||||
|
||||
//
|
||||
// Main
|
||||
//
|
||||
void main(void)
|
||||
{
|
||||
volatile uint32_t mode = 0U;
|
||||
MCAN_TxBufElement txMsg;
|
||||
MCAN_RxBufElement rxMsg;
|
||||
MCAN_RxNewDataStatus newData;
|
||||
|
||||
//
|
||||
// Initialize device clock and peripherals
|
||||
//
|
||||
Device_init();
|
||||
|
||||
//
|
||||
// Initialize GPIO and unlock the GPIO configuration registers
|
||||
//
|
||||
Device_initGPIO();
|
||||
|
||||
//
|
||||
// Configuring the GPIOs for MCAN.
|
||||
//
|
||||
GPIO_setPinConfig(DEVICE_GPIO_CFG_MCANRXA);
|
||||
GPIO_setPinConfig(DEVICE_GPIO_CFG_MCANTXA);
|
||||
|
||||
//
|
||||
// Allocate MCAN (a shared peripheral) to CPU1 (C28x)
|
||||
//
|
||||
SysCtl_allocateSharedPeripheral(SYSCTL_PALLOCATE_MCAN_A,0x0U);
|
||||
|
||||
//
|
||||
// Configure the divisor for the MCAN bit-clock
|
||||
//
|
||||
SysCtl_setMCANClk(SYSCTL_MCANCLK_DIV_5);
|
||||
|
||||
//
|
||||
// CrossBar and ISR Configuration.
|
||||
//
|
||||
MCANIntrConfig();
|
||||
|
||||
//
|
||||
// Initialize message to transmit.
|
||||
//
|
||||
txMsg.id = ((uint32_t)(0x4)) << 18U; // Identifier Value.
|
||||
txMsg.rtr = 0U; // Transmit data frame.
|
||||
txMsg.xtd = 0U; // 11-bit standard identifier.
|
||||
txMsg.esi = 0U; // ESI bit in CAN FD format depends only on error
|
||||
// passive flag.
|
||||
txMsg.dlc = 4U; // CAN + CAN FD: transmit frame has 0-8 data bytes.
|
||||
txMsg.brs = 1U; // CAN FD frames transmitted with bit rate
|
||||
// switching.
|
||||
txMsg.fdf = 1U; // Frame transmitted in CAN FD format.
|
||||
txMsg.efc = 1U; // Store Tx events.
|
||||
txMsg.mm = 0xAAU; // Message Marker.
|
||||
|
||||
//
|
||||
// Data bytes.
|
||||
//
|
||||
txMsg.data[0] = 0x12;
|
||||
txMsg.data[1] = 0x34;
|
||||
txMsg.data[2] = 0x56;
|
||||
txMsg.data[3] = 0x78;
|
||||
|
||||
//
|
||||
// Configure MCAN.
|
||||
//
|
||||
MCANConfig();
|
||||
|
||||
//
|
||||
// Enable Interrupts.
|
||||
//
|
||||
MCAN_enableIntr(MCANA_DRIVER_BASE, MCAN_INTR_MASK_ALL, 1U);
|
||||
|
||||
//
|
||||
// Select Interrupt Line.
|
||||
//
|
||||
MCAN_selectIntrLine(MCANA_DRIVER_BASE, MCAN_INTR_MASK_ALL, MCAN_INTR_LINE_NUM_1);
|
||||
|
||||
//
|
||||
// Enable Interrupt Line.
|
||||
//
|
||||
MCAN_enableIntrLine(MCANA_DRIVER_BASE, MCAN_INTR_LINE_NUM_1, 1U);
|
||||
|
||||
//
|
||||
// Write Tx Message to the Message RAM.
|
||||
//
|
||||
MCAN_writeMsgRam(MCANA_DRIVER_BASE, MCAN_MEM_TYPE_BUF, 1U, &txMsg);
|
||||
|
||||
//
|
||||
// Enable Transmission interrupt.
|
||||
//
|
||||
MCAN_txBufTransIntrEnable(MCANA_DRIVER_BASE, 1U,1U);
|
||||
|
||||
//
|
||||
// Add request for transmission.
|
||||
//
|
||||
MCAN_txBufAddReq(MCANA_DRIVER_BASE, 1U);
|
||||
|
||||
//
|
||||
// Wait for the isrIntr1Flag to be reset.
|
||||
//
|
||||
while(isrIntr1Flag)
|
||||
{
|
||||
}
|
||||
|
||||
//
|
||||
// Read Message RAM.
|
||||
//
|
||||
MCAN_readMsgRam(MCANA_DRIVER_BASE, MCAN_MEM_TYPE_BUF, 0U, MCAN_RX_FIFO_NUM_1,
|
||||
&rxMsg);
|
||||
|
||||
//
|
||||
// Get the New Data Status.
|
||||
//
|
||||
MCAN_getNewDataStatus(MCANA_DRIVER_BASE, &newData);
|
||||
|
||||
//
|
||||
// Check that received data matches sent data.
|
||||
// Device will halt here during debug if data doesn't match.
|
||||
//
|
||||
if((txMsg.data[0] != rxMsg.data[0]) ||
|
||||
(txMsg.data[1] != rxMsg.data[1]) ||
|
||||
(txMsg.data[2] != rxMsg.data[2]) ||
|
||||
(txMsg.data[3] != rxMsg.data[3]))
|
||||
{
|
||||
//
|
||||
// Device will halt here if transmitted and received data are
|
||||
// not same.
|
||||
//
|
||||
asm(" ESTOP0");
|
||||
}
|
||||
else
|
||||
{
|
||||
//
|
||||
// Increment message count if message is received.
|
||||
//
|
||||
msgCount++;
|
||||
}
|
||||
|
||||
//
|
||||
// Stop Application.
|
||||
//
|
||||
asm(" ESTOP0");
|
||||
}
|
||||
|
||||
//
|
||||
// This function will configure MCAN module.
|
||||
//
|
||||
static void MCANConfig(void)
|
||||
{
|
||||
MCAN_RevisionId revId;
|
||||
MCAN_InitParams initParams;
|
||||
MCAN_ConfigParams configParams;
|
||||
MCAN_MsgRAMConfigParams msgRAMConfigParams;
|
||||
MCAN_StdMsgIDFilterElement stdFiltelem;
|
||||
MCAN_BitTimingParams bitTimes;
|
||||
|
||||
//
|
||||
// Initializing all structs to zero to prevent stray values
|
||||
//
|
||||
memset(&initParams, 0, sizeof(initParams));
|
||||
memset(&configParams, 0, sizeof(configParams));
|
||||
memset(&msgRAMConfigParams, 0, sizeof(msgRAMConfigParams));
|
||||
memset(&stdFiltelem, 0, sizeof(stdFiltelem));
|
||||
memset(&bitTimes, 0, sizeof(bitTimes));
|
||||
|
||||
//
|
||||
// Initialize MCAN Init parameters.
|
||||
//
|
||||
initParams.fdMode = 0x1U; // FD operation enabled.
|
||||
initParams.brsEnable = 0x1U; // Bit rate switching for
|
||||
// transmissions enabled.
|
||||
initParams.txpEnable = 0x0U; // Transmit pause disabled.
|
||||
initParams.efbi = 0x0U; // Edge filtering disabled.
|
||||
initParams.pxhddisable = 0x0U; // Protocol exception handling enabled
|
||||
initParams.darEnable = 0x0U; // Enable Automatic retransmission of
|
||||
// messages not transmitted successfully
|
||||
initParams.wkupReqEnable = 0x1U; // Wakeup request is enabled.
|
||||
initParams.autoWkupEnable = 0x1U; // Auto-Wakeup is enabled.
|
||||
initParams.emulationEnable = 0x1U; // Emulation/Debug Suspend is enabled.
|
||||
initParams.tdcEnable = 0x1U; // Transmitter Delay Compensation is
|
||||
// enabled.
|
||||
initParams.wdcPreload = 0xFFU; // Start value of the Message RAM
|
||||
// Watchdog Counter preload.
|
||||
|
||||
//
|
||||
// Transmitter Delay Compensation parameters.
|
||||
//
|
||||
initParams.tdcConfig.tdcf = 0xAU;
|
||||
initParams.tdcConfig.tdco = 0x6U;
|
||||
|
||||
//
|
||||
// Initialize MCAN Config parameters.
|
||||
//
|
||||
configParams.monEnable = monEn; // Bus Monitoring Mode is disabled
|
||||
configParams.asmEnable = 0x0U; // Normal CAN operation.
|
||||
configParams.tsPrescalar = 0xFU; // Prescaler Value.
|
||||
configParams.tsSelect = 0x0U; // Timestamp counter value.
|
||||
configParams.timeoutSelect = MCAN_TIMEOUT_SELECT_CONT;
|
||||
// Time-out counter source select.
|
||||
configParams.timeoutPreload = 0xFFFFU; // Start value of the Timeout
|
||||
// Counter.
|
||||
configParams.timeoutCntEnable = 0x0U; // Time-out Counter is disabled.
|
||||
configParams.filterConfig.rrfs = 0x1U; // Reject all remote frames with
|
||||
// 29-bit extended IDs.
|
||||
configParams.filterConfig.rrfe = 0x1U; // Reject all remote frames with
|
||||
// 11-bit standard IDs.
|
||||
configParams.filterConfig.anfe = 0x1U; // Accept in Rx FIFO 1.
|
||||
configParams.filterConfig.anfs = 0x1U; // Accept in Rx FIFO 1.
|
||||
|
||||
//
|
||||
// Initialize Message RAM Sections Configuration Parameters.
|
||||
//
|
||||
msgRAMConfigParams.flssa = MCAN_STD_ID_FILT_START_ADDR;
|
||||
// Standard ID Filter List Start Address.
|
||||
msgRAMConfigParams.lss = MCAN_STD_ID_FILTER_NUM;
|
||||
// List Size: Standard ID.
|
||||
msgRAMConfigParams.flesa = MCAN_EXT_ID_FILT_START_ADDR;
|
||||
// Extended ID Filter List Start Address.
|
||||
msgRAMConfigParams.lse = MCAN_EXT_ID_FILTER_NUM;
|
||||
// List Size: Extended ID.
|
||||
msgRAMConfigParams.txStartAddr = MCAN_TX_BUFF_START_ADDR;
|
||||
// Tx Buffers Start Address.
|
||||
msgRAMConfigParams.txBufNum = MCAN_TX_BUFF_SIZE;
|
||||
// Number of Dedicated Transmit Buffers.
|
||||
msgRAMConfigParams.txFIFOSize = MCAN_TX_FQ_SIZE;
|
||||
// Number of Tx FIFO or Tx Queue Elements
|
||||
msgRAMConfigParams.txBufMode = 0U; //Tx FIFO operation
|
||||
msgRAMConfigParams.txBufElemSize = MCAN_TX_BUFF_ELEM_SIZE;
|
||||
// Tx Buffer Element Size.
|
||||
msgRAMConfigParams.txEventFIFOStartAddr = MCAN_TX_EVENT_START_ADDR;
|
||||
// Tx Event FIFO Start Address.
|
||||
msgRAMConfigParams.txEventFIFOSize = MCAN_TX_BUFF_SIZE;
|
||||
// Event FIFO Size.
|
||||
msgRAMConfigParams.txEventFIFOWaterMark = 3U;
|
||||
// Level for Tx Event FIFO watermark interrupt.
|
||||
msgRAMConfigParams.rxFIFO0startAddr = MCAN_FIFO_0_START_ADDR;
|
||||
// Rx FIFO0 Start Address.
|
||||
msgRAMConfigParams.rxFIFO0size = MCAN_FIFO_0_NUM;
|
||||
// Number of Rx FIFO elements.
|
||||
msgRAMConfigParams.rxFIFO0waterMark = 3U; // Rx FIFO0 Watermark.
|
||||
msgRAMConfigParams.rxFIFO0OpMode = 0U; // FIFO blocking mode.
|
||||
msgRAMConfigParams.rxFIFO1startAddr = MCAN_FIFO_1_START_ADDR;
|
||||
// Rx FIFO1 Start Address.
|
||||
msgRAMConfigParams.rxFIFO1size = MCAN_FIFO_1_NUM;
|
||||
// Number of Rx FIFO elements.
|
||||
msgRAMConfigParams.rxFIFO1waterMark = 3U; // Level for Rx FIFO 1
|
||||
// watermark interrupt.
|
||||
msgRAMConfigParams.rxFIFO1OpMode = 0U; // FIFO blocking mode.
|
||||
msgRAMConfigParams.rxBufStartAddr = MCAN_RX_BUFF_START_ADDR;
|
||||
// Rx Buffer Start Address.
|
||||
msgRAMConfigParams.rxBufElemSize = MCAN_RX_BUFF_ELEM_SIZE;
|
||||
// Rx Buffer Element Size.
|
||||
msgRAMConfigParams.rxFIFO0ElemSize = MCAN_FIFO_0_ELEM_SIZE;
|
||||
// Rx FIFO0 Element Size.
|
||||
msgRAMConfigParams.rxFIFO1ElemSize = MCAN_FIFO_1_ELEM_SIZE;
|
||||
// Rx FIFO1 Element Size.
|
||||
|
||||
//
|
||||
// Initialize Rx Buffer Configuration parameters.
|
||||
//
|
||||
stdFiltelem.sfid2 = 0x0U; // Standard Filter ID 2.
|
||||
stdFiltelem.sfid1 = 0x4U; // Standard Filter ID 1.
|
||||
stdFiltelem.sfec = 0x7U; // Store into Rx Buffer
|
||||
stdFiltelem.sft = 0x0U; // Range filter from SFID1 to SFID2
|
||||
|
||||
//
|
||||
// Initialize bit timings.
|
||||
//
|
||||
bitTimes.nomRatePrescalar = 0x3U; // Nominal Baud Rate Pre-scaler
|
||||
bitTimes.nomTimeSeg1 = 0x9U; // Nominal Time segment before SP
|
||||
bitTimes.nomTimeSeg2 = 0x8U; // Nominal Time segment after SP
|
||||
bitTimes.nomSynchJumpWidth = 0x8U; // Nominal SJW
|
||||
bitTimes.dataRatePrescalar = 0x1U; // Data Baud Rate Pre-scaler
|
||||
bitTimes.dataTimeSeg1 = 0x9U; // Data Time segment before SP
|
||||
bitTimes.dataTimeSeg2 = 0x8U; // Data Time segment after SP
|
||||
bitTimes.dataSynchJumpWidth = 0x8U; // Data SJW
|
||||
|
||||
//
|
||||
// Get MCANSS Revision ID.
|
||||
//
|
||||
MCAN_getRevisionId(MCANA_DRIVER_BASE, &revId);
|
||||
|
||||
//
|
||||
// Wait for Memory initialization to be completed.
|
||||
//
|
||||
while(FALSE == MCAN_isMemInitDone(MCANA_DRIVER_BASE));
|
||||
|
||||
//
|
||||
// Put MCAN in SW initialization mode.
|
||||
//
|
||||
MCAN_setOpMode(MCANA_DRIVER_BASE, MCAN_OPERATION_MODE_SW_INIT);
|
||||
|
||||
//
|
||||
// Wait till MCAN is not initialized.
|
||||
//
|
||||
while (MCAN_OPERATION_MODE_SW_INIT != MCAN_getOpMode(MCANA_DRIVER_BASE));
|
||||
|
||||
//
|
||||
// Initialize MCAN module.
|
||||
//
|
||||
MCAN_init(MCANA_DRIVER_BASE, &initParams);
|
||||
|
||||
//
|
||||
// Configure MCAN module.
|
||||
//
|
||||
MCAN_config(MCANA_DRIVER_BASE, &configParams);
|
||||
|
||||
//
|
||||
// Configure Bit timings.
|
||||
//
|
||||
MCAN_setBitTime(MCANA_DRIVER_BASE, &bitTimes);
|
||||
|
||||
//
|
||||
// Configure Message RAM Sections
|
||||
//
|
||||
MCAN_msgRAMConfig(MCANA_DRIVER_BASE, &msgRAMConfigParams);
|
||||
|
||||
//
|
||||
// Configure Standard ID filter element
|
||||
//
|
||||
MCAN_addStdMsgIDFilter(MCANA_DRIVER_BASE, 0U, &stdFiltelem);
|
||||
|
||||
//
|
||||
// Enable internal loopback mode
|
||||
//
|
||||
MCAN_lpbkModeEnable(MCANA_DRIVER_BASE, MCAN_LPBK_MODE_EXTERNAL, TRUE);
|
||||
|
||||
//
|
||||
// Take MCAN out of the SW initialization mode
|
||||
//
|
||||
MCAN_setOpMode(MCANA_DRIVER_BASE, MCAN_OPERATION_MODE_NORMAL);
|
||||
|
||||
while (MCAN_OPERATION_MODE_NORMAL != MCAN_getOpMode(MCANA_DRIVER_BASE));
|
||||
}
|
||||
|
||||
//
|
||||
// This function will configure X-BAR for MCAN interrupts.
|
||||
//
|
||||
static void MCANIntrConfig(void)
|
||||
{
|
||||
|
||||
Interrupt_initModule();
|
||||
Interrupt_initVectorTable();
|
||||
|
||||
Interrupt_register(INT_MCANA_1,&MCANIntr1ISR);
|
||||
Interrupt_enable(INT_MCANA_1);
|
||||
|
||||
Interrupt_enableGlobal();
|
||||
|
||||
}
|
||||
|
||||
//
|
||||
// This is Interrupt Service Routine for MCAN interrupt 1.
|
||||
//
|
||||
__interrupt void MCANIntr1ISR(void)
|
||||
{
|
||||
uint32_t intrStatus;
|
||||
|
||||
intrStatus = MCAN_getIntrStatus(MCANA_DRIVER_BASE);
|
||||
if (MCAN_MSG_INT != intrStatus)
|
||||
{
|
||||
error++;
|
||||
}
|
||||
|
||||
//
|
||||
// Clear the interrupt Status.
|
||||
//
|
||||
MCAN_clearIntrStatus(MCANA_DRIVER_BASE, intrStatus);
|
||||
|
||||
//
|
||||
// Clearing the interrupt lineNum
|
||||
//
|
||||
MCAN_clearInterrupt(MCANA_DRIVER_BASE, 0x2);
|
||||
|
||||
//
|
||||
// Update the flag value.
|
||||
//
|
||||
isrIntr1Flag = 0U;
|
||||
|
||||
//
|
||||
// Acknowledge this interrupt located in group 9
|
||||
//
|
||||
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP9);
|
||||
}
|
||||
@@ -0,0 +1,292 @@
|
||||
//#############################################################################
|
||||
//
|
||||
// FILE: mcan_ex3_loopback_syscfg.c
|
||||
//
|
||||
// TITLE: MCAN Loopback with Interrupts Example Using SYSCONFIG Tool
|
||||
//
|
||||
//! \addtogroup driver_example_list
|
||||
//! <h1> MCAN Loopback with Interrupts Example Using SYSCONFIG Tool </h1>
|
||||
//!
|
||||
//! This example illustrates the MCAN Loopback functionality. The internal
|
||||
//! loopback mode is entered. The message transmitted would be received by the
|
||||
//! node. The last address of memory is used for the Rx buffer.
|
||||
//! Peripheral configuration is done through SYSCONFIG
|
||||
//!
|
||||
//! \b External \b Connections \n
|
||||
//! - None.
|
||||
//!
|
||||
//! \b Watch \b Variables \n
|
||||
//! - error - Checks if there is an error that occurred when the data was
|
||||
//! sent using internal loopback.
|
||||
//!
|
||||
//
|
||||
//#############################################################################
|
||||
//
|
||||
//
|
||||
//
|
||||
// C2000Ware v5.04.00.00
|
||||
//
|
||||
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// $
|
||||
//#############################################################################
|
||||
|
||||
//
|
||||
// Include Files
|
||||
//
|
||||
#include "driverlib.h"
|
||||
#include "device.h"
|
||||
#include "inc/stw_dataTypes.h"
|
||||
#include "inc/stw_types.h"
|
||||
#include <string.h>
|
||||
#include "board.h"
|
||||
|
||||
//
|
||||
// Defines
|
||||
//
|
||||
#define MCAN_EXT_ID_AND_MASK (0x1FFFFFFFU)
|
||||
#define MCAN_MSG_INT (0x81200)
|
||||
|
||||
//
|
||||
// Global Variables.
|
||||
//
|
||||
volatile uint32_t isrIntr0Flag = 1U;
|
||||
volatile uint32_t isrIntr1Flag = 1U;
|
||||
volatile unsigned long msgCount = 0;
|
||||
volatile unsigned long error = 0;
|
||||
|
||||
//
|
||||
// Function Prototype.
|
||||
//
|
||||
static void MCANFilterConfig(void);
|
||||
static void MCANIntrConfig(void);
|
||||
__interrupt void MCANIntr0ISR(void);
|
||||
__interrupt void MCANIntr1ISR(void);
|
||||
|
||||
//
|
||||
// Main
|
||||
//
|
||||
void main(void)
|
||||
{
|
||||
volatile uint32_t mode = 0U;
|
||||
MCAN_TxBufElement txMsg;
|
||||
MCAN_RxBufElement rxMsg;
|
||||
MCAN_RxNewDataStatus newData;
|
||||
|
||||
//
|
||||
// Initialize device clock and peripherals
|
||||
//
|
||||
Device_init();
|
||||
|
||||
//
|
||||
// Initialize GPIO and unlock the GPIO configuration registers
|
||||
//
|
||||
Device_initGPIO();
|
||||
|
||||
//
|
||||
// Allocate MCAN (a shared peripheral) to CPU1 (C28x)
|
||||
//
|
||||
SysCtl_allocateSharedPeripheral(SYSCTL_PALLOCATE_MCAN_A,0x0U);
|
||||
|
||||
//
|
||||
// Configure the divisor for the MCAN bit-clock
|
||||
//
|
||||
SysCtl_setMCANClk(SYSCTL_MCANCLK_DIV_5);
|
||||
|
||||
//
|
||||
// CrossBar and ISR Configuration.
|
||||
//
|
||||
MCANIntrConfig();
|
||||
|
||||
//
|
||||
// Board initialization
|
||||
//
|
||||
Board_init();
|
||||
|
||||
//
|
||||
// Initialize message to transmit.
|
||||
//
|
||||
txMsg.id = ((uint32_t)(0x4)) << 18U; // Identifier Value.
|
||||
txMsg.rtr = 0U; // Transmit data frame.
|
||||
txMsg.xtd = 0U; // 11-bit standard identifier.
|
||||
txMsg.esi = 0U; // ESI bit in CAN FD format depends only on error
|
||||
// passive flag.
|
||||
txMsg.dlc = 4U; // CAN + CAN FD: transmit frame has 0-8 data bytes.
|
||||
txMsg.brs = 1U; // CAN FD frames transmitted with bit rate
|
||||
// switching.
|
||||
txMsg.fdf = 1U; // Frame transmitted in CAN FD format.
|
||||
txMsg.efc = 1U; // Store Tx events.
|
||||
txMsg.mm = 0xAAU; // Message Marker.
|
||||
|
||||
//
|
||||
// Data bytes.
|
||||
//
|
||||
txMsg.data[0] = 0x12;
|
||||
txMsg.data[1] = 0x34;
|
||||
txMsg.data[2] = 0x56;
|
||||
txMsg.data[3] = 0x78;
|
||||
|
||||
//
|
||||
// Write Tx Message to the Message RAM.
|
||||
//
|
||||
MCAN_writeMsgRam(MCANA_DRIVER_BASE, MCAN_MEM_TYPE_BUF, 1U, &txMsg);
|
||||
|
||||
//
|
||||
// Enable Transmission interrupt.
|
||||
//
|
||||
MCAN_txBufTransIntrEnable(MCANA_DRIVER_BASE, 1U,1U);
|
||||
|
||||
//
|
||||
// Add request for transmission.
|
||||
//
|
||||
MCAN_txBufAddReq(MCANA_DRIVER_BASE, 1U);
|
||||
|
||||
//
|
||||
// Wait for the isrIntr1Flag to be reset.
|
||||
//
|
||||
while(isrIntr1Flag)
|
||||
{
|
||||
}
|
||||
|
||||
//
|
||||
// Read Message RAM.
|
||||
//
|
||||
MCAN_readMsgRam(MCANA_DRIVER_BASE, MCAN_MEM_TYPE_BUF, 0U, MCAN_RX_FIFO_NUM_1,
|
||||
&rxMsg);
|
||||
|
||||
//
|
||||
// Get the New Data Status.
|
||||
//
|
||||
MCAN_getNewDataStatus(MCANA_DRIVER_BASE, &newData);
|
||||
|
||||
//
|
||||
// Check that received data matches sent data.
|
||||
// Device will halt here during debug if data doesn't match.
|
||||
//
|
||||
if((txMsg.data[0] != rxMsg.data[0]) ||
|
||||
(txMsg.data[1] != rxMsg.data[1]) ||
|
||||
(txMsg.data[2] != rxMsg.data[2]) ||
|
||||
(txMsg.data[3] != rxMsg.data[3]))
|
||||
{
|
||||
//
|
||||
// Device will halt here if transmitted and received data are
|
||||
// not same.
|
||||
//
|
||||
asm(" ESTOP0");
|
||||
}
|
||||
else
|
||||
{
|
||||
//
|
||||
// Increment message count if message is received.
|
||||
//
|
||||
msgCount++;
|
||||
}
|
||||
|
||||
//
|
||||
// Stop Application.
|
||||
//
|
||||
asm(" ESTOP0");
|
||||
}
|
||||
|
||||
//
|
||||
// This function will configure X-BAR for MCAN interrupts.
|
||||
//
|
||||
static void MCANIntrConfig(void)
|
||||
{
|
||||
|
||||
Interrupt_initModule();
|
||||
Interrupt_initVectorTable();
|
||||
|
||||
Interrupt_enableGlobal();
|
||||
|
||||
}
|
||||
|
||||
//
|
||||
// This is Interrupt Service Routine for MCAN interrupt 0.
|
||||
//
|
||||
__interrupt void MCANIntr0ISR(void)
|
||||
{
|
||||
uint32_t intrStatus;
|
||||
intrStatus = MCAN_getIntrStatus(MCANA_DRIVER_BASE);
|
||||
|
||||
if (MCAN_MSG_INT != intrStatus)
|
||||
{
|
||||
error++;
|
||||
}
|
||||
|
||||
//
|
||||
// Clear the interrupt Status.
|
||||
//
|
||||
MCAN_clearIntrStatus(MCANA_DRIVER_BASE, intrStatus);
|
||||
|
||||
//
|
||||
// Update the flag value.
|
||||
//
|
||||
isrIntr0Flag = 0U;
|
||||
|
||||
//
|
||||
// Acknowledge this interrupt located in group 9
|
||||
//
|
||||
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP9);
|
||||
}
|
||||
|
||||
//
|
||||
// This is Interrupt Service Routine for MCAN interrupt 1.
|
||||
//
|
||||
__interrupt void MCANIntr1ISR(void)
|
||||
{
|
||||
uint32_t intrStatus;
|
||||
|
||||
intrStatus = MCAN_getIntrStatus(MCANA_DRIVER_BASE);
|
||||
if (MCAN_MSG_INT != intrStatus)
|
||||
{
|
||||
error++;
|
||||
}
|
||||
|
||||
//
|
||||
// Clearing the interrupt lineNum
|
||||
//
|
||||
HW_WR_FIELD32(MCANA_DRIVER_BASE + MCAN_MCANSS_EOI, MCAN_MCANSS_EOI, 0x2U);
|
||||
|
||||
//
|
||||
// Clear the interrupt Status.
|
||||
//
|
||||
MCAN_clearIntrStatus(MCANA_DRIVER_BASE, intrStatus);
|
||||
|
||||
//
|
||||
// Update the flag value.
|
||||
//
|
||||
isrIntr1Flag = 0U;
|
||||
|
||||
//
|
||||
// Acknowledge this interrupt located in group 9
|
||||
//
|
||||
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP9);
|
||||
}
|
||||
@@ -0,0 +1,26 @@
|
||||
/**
|
||||
* Import the modules used in this configuration.
|
||||
*/
|
||||
const mcan = scripting.addModule("/driverlib/mcan.js", {}, false);
|
||||
const mcan1 = mcan.addInstance();
|
||||
|
||||
/**
|
||||
* Write custom configuration values to the imported modules.
|
||||
*/
|
||||
mcan1.$name = "myMCAN0";
|
||||
mcan1.enableInterrupt = true;
|
||||
mcan1.interruptFlags = ["MCAN_INTR_MASK_ALL"];
|
||||
mcan1.interruptLine = ["MCAN_INTR_LINE_NUM_1"];
|
||||
mcan1.interruptLine1Flag = ["MCAN_INTR_MASK_ALL"];
|
||||
mcan1.registerInterruptLine1 = true;
|
||||
mcan1.registerInterruptLine0 = true;
|
||||
mcan1.additionalCoreConfig = true;
|
||||
mcan1.stdFiltsUsed = [0];
|
||||
mcan1.msgRamConfig = true;
|
||||
mcan1.mcanInt1.interruptHandler = "MCANIntr1ISR";
|
||||
mcan1.mcanInt1.enableInterrupt = true;
|
||||
mcan1.mcanInt0.interruptHandler = "MCANIntr0ISR";
|
||||
mcan1.mcanInt0.enableInterrupt = true;
|
||||
mcan1.stdFilt0.$name = "stdFilt0";
|
||||
mcan1.stdFilt0.sfec = "MCAN_STDFILTEC_RXBUFF";
|
||||
mcan1.stdFilt0.sfid1 = 4;
|
||||
@@ -0,0 +1,401 @@
|
||||
//#############################################################################
|
||||
//
|
||||
// FILE: mcan_ex4_receive.c
|
||||
//
|
||||
// TITLE: MCAN receive using Rx Buffer
|
||||
//
|
||||
//! \addtogroup driver_example_c28x_list
|
||||
//! <h1> MCAN receive using Rx Buffer </h1>
|
||||
//!
|
||||
//! This example demonstrates the MCAN receive function. Communication is done
|
||||
//! between two CAN nodes. The transmitting node could be another MCU or a
|
||||
//! CAN bus analysis tool capable of transmitting CAN FD frames. The transmit
|
||||
//! and receive pins of the MCAN module should be connected to a CAN
|
||||
//! transceiver. Nominal Bit Rate of 500 kbps & Data bit rate of 1 Mbps is used
|
||||
//!
|
||||
//! Only Standard frame with message ID 0x4 is received.
|
||||
//!
|
||||
//! If another C2000 MCU is used as the transmitter, mcan_ex3_transmit.c can be
|
||||
//! run on it for the transmit function.
|
||||
//!
|
||||
//! \b Hardware \b Required \n
|
||||
//! - A C2000 board with CAN transceiver
|
||||
//!
|
||||
//! \b External \b Connections \n
|
||||
//! Both nodes should communicate through CAN FD capable transceivers.
|
||||
//!
|
||||
//! - MCAN is on DEVICE_GPIO_PIN_CANRXA (MCANRXA)
|
||||
//! - and DEVICE_GPIO_PIN_CANTXA (MCANTXA)
|
||||
//!
|
||||
//! \b Watch \b Variables \n
|
||||
//! - rxMsg
|
||||
//!
|
||||
//
|
||||
//#############################################################################
|
||||
//
|
||||
//
|
||||
//
|
||||
// C2000Ware v5.04.00.00
|
||||
//
|
||||
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// $
|
||||
//#############################################################################
|
||||
|
||||
//
|
||||
// Include Files
|
||||
//
|
||||
#include "driverlib.h"
|
||||
#include "device.h"
|
||||
#include "inc/stw_types.h"
|
||||
#include "inc/stw_dataTypes.h"
|
||||
#include <string.h>
|
||||
|
||||
//
|
||||
// Defines.
|
||||
//
|
||||
#define NUM_OF_MSG (1U)
|
||||
#define MCAN_STD_ID_FILTER_NUM (1U)
|
||||
#define MCAN_EXT_ID_FILTER_NUM (0U)
|
||||
#define MCAN_FIFO_0_NUM (0U)
|
||||
#define MCAN_FIFO_0_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_FIFO_1_NUM (0U)
|
||||
#define MCAN_FIFO_1_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_RX_BUFF_NUM (10U)
|
||||
#define MCAN_RX_BUFF_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_TX_BUFF_SIZE (0U)
|
||||
#define MCAN_TX_FQ_SIZE (0U)
|
||||
#define MCAN_TX_BUFF_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_TX_EVENT_SIZE (0U)
|
||||
|
||||
//
|
||||
// Defining Starting Addresses for Message RAM Sections,
|
||||
// (Calculated from Macros based on User defined configuration above)
|
||||
//
|
||||
#define MCAN_STD_ID_FILT_START_ADDR (0x0U)
|
||||
#define MCAN_EXT_ID_FILT_START_ADDR (MCAN_STD_ID_FILT_START_ADDR + ((MCAN_STD_ID_FILTER_NUM * MCANSS_STD_ID_FILTER_SIZE_WORDS * 4U)))
|
||||
#define MCAN_FIFO_0_START_ADDR (MCAN_EXT_ID_FILT_START_ADDR + ((MCAN_EXT_ID_FILTER_NUM * MCANSS_EXT_ID_FILTER_SIZE_WORDS * 4U)))
|
||||
#define MCAN_FIFO_1_START_ADDR (MCAN_FIFO_0_START_ADDR + (MCAN_getMsgObjSize(MCAN_FIFO_0_ELEM_SIZE) * 4U * MCAN_FIFO_0_NUM))
|
||||
#define MCAN_RX_BUFF_START_ADDR (MCAN_FIFO_1_START_ADDR + (MCAN_getMsgObjSize(MCAN_FIFO_1_ELEM_SIZE) * 4U * MCAN_FIFO_1_NUM))
|
||||
#define MCAN_TX_BUFF_START_ADDR (MCAN_RX_BUFF_START_ADDR + (MCAN_getMsgObjSize(MCAN_RX_BUFF_ELEM_SIZE) * 4U * MCAN_RX_BUFF_NUM))
|
||||
#define MCAN_TX_EVENT_START_ADDR (MCAN_TX_BUFF_START_ADDR + (MCAN_getMsgObjSize(MCAN_TX_BUFF_ELEM_SIZE) * 4U * (MCAN_TX_BUFF_SIZE + MCAN_TX_FQ_SIZE)))
|
||||
|
||||
|
||||
//
|
||||
// Global Variables.
|
||||
//
|
||||
int32_t error = 0;
|
||||
MCAN_RxBufElement rxMsg[NUM_OF_MSG], rxMsg1;
|
||||
int32_t loopCnt = 0U;
|
||||
|
||||
|
||||
//
|
||||
// Function Prototype.
|
||||
//
|
||||
static void MCANConfig(void);
|
||||
static void MCANIntrConfig(void);
|
||||
__interrupt void MCANIntr1ISR(void);
|
||||
|
||||
void main()
|
||||
{
|
||||
int i = 0;
|
||||
volatile uint32_t mode = 0U;
|
||||
uint32_t dataBytes = 64;
|
||||
|
||||
//
|
||||
// Initialize device clock and peripherals
|
||||
//
|
||||
Device_init();
|
||||
|
||||
//
|
||||
// Initialize GPIO and unlock the GPIO configuration registers
|
||||
//
|
||||
Device_initGPIO();
|
||||
|
||||
//
|
||||
// Allocate MCAN (a shared peripheral) to CPU1 (C28x)
|
||||
//
|
||||
SysCtl_allocateSharedPeripheral(SYSCTL_PALLOCATE_MCAN_A,0x0U);
|
||||
|
||||
//
|
||||
// Configure the divisor for the MCAN bit-clock
|
||||
//
|
||||
SysCtl_setMCANClk(SYSCTL_MCANCLK_DIV_5);
|
||||
|
||||
//
|
||||
// ISR Configuration.
|
||||
//
|
||||
MCANIntrConfig();
|
||||
|
||||
//
|
||||
// Configure GPIO pins for MCANTX/MCANRX operation
|
||||
//
|
||||
GPIO_setPinConfig(DEVICE_GPIO_CFG_MCANRXA);
|
||||
GPIO_setPinConfig(DEVICE_GPIO_CFG_MCANTXA);
|
||||
|
||||
//
|
||||
// Initialize message to receive
|
||||
//
|
||||
rxMsg[loopCnt].id = 0U;
|
||||
rxMsg[loopCnt].rtr = 0U;
|
||||
rxMsg[loopCnt].xtd = 0U;
|
||||
rxMsg[loopCnt].esi = 0U;
|
||||
rxMsg[loopCnt].rxts = 0U; // Rx Timestamp
|
||||
rxMsg[loopCnt].dlc = 0U;
|
||||
rxMsg[loopCnt].brs = 0U;
|
||||
rxMsg[loopCnt].fdf = 0U;
|
||||
rxMsg[loopCnt].fidx = 0U; // Filter Index
|
||||
// (of matching Rx acceptance filter element)
|
||||
rxMsg[loopCnt].anmf = 0U; // Accepted Non-matching Frame
|
||||
|
||||
for(i = 0; i < dataBytes; i++) // Initialize receive buffer to 0
|
||||
{
|
||||
rxMsg[loopCnt].data[i] = 0;
|
||||
}
|
||||
|
||||
//
|
||||
// Configure the MCAN Module.
|
||||
//
|
||||
MCANConfig();
|
||||
|
||||
//
|
||||
// Enable Interrupts.
|
||||
//
|
||||
MCAN_enableIntr(MCANA_DRIVER_BASE, MCAN_INTR_MASK_ALL, 1U);
|
||||
|
||||
//
|
||||
// Select Interrupt Line.
|
||||
//
|
||||
MCAN_selectIntrLine(MCANA_DRIVER_BASE, MCAN_INTR_MASK_ALL, MCAN_INTR_LINE_NUM_1);
|
||||
|
||||
//
|
||||
// Enable Interrupt Line.
|
||||
//
|
||||
MCAN_enableIntrLine(MCANA_DRIVER_BASE, MCAN_INTR_LINE_NUM_1, 1U);
|
||||
|
||||
while(1)
|
||||
{
|
||||
//
|
||||
// Adding delay of 1 second
|
||||
//
|
||||
DEVICE_DELAY_US(1000000);
|
||||
|
||||
//
|
||||
// Message Handling Code goes here
|
||||
//
|
||||
|
||||
}
|
||||
|
||||
//
|
||||
// Stop Application.
|
||||
//
|
||||
asm(" ESTOP0");
|
||||
}
|
||||
|
||||
static void MCANConfig(void)
|
||||
{
|
||||
MCAN_InitParams initParams;
|
||||
MCAN_MsgRAMConfigParams msgRAMConfigParams;
|
||||
MCAN_StdMsgIDFilterElement stdFiltelem;
|
||||
MCAN_BitTimingParams bitTimes;
|
||||
|
||||
//
|
||||
// Initializing all structs to zero to prevent stray values
|
||||
//
|
||||
memset(&initParams, 0, sizeof(initParams));
|
||||
memset(&msgRAMConfigParams, 0, sizeof(msgRAMConfigParams));
|
||||
memset(&stdFiltelem, 0, sizeof(stdFiltelem));
|
||||
memset(&bitTimes, 0, sizeof(bitTimes));
|
||||
|
||||
//
|
||||
// Configure MCAN initialization parameters
|
||||
//
|
||||
initParams.fdMode = 0x1U; // FD operation enabled.
|
||||
initParams.brsEnable = 0x1U; // Bit rate switching enabled
|
||||
|
||||
//
|
||||
// Initialize Message RAM Sections Configuration Parameters
|
||||
//
|
||||
msgRAMConfigParams.flssa = MCAN_STD_ID_FILT_START_ADDR;
|
||||
// Standard ID Filter List Start Address.
|
||||
msgRAMConfigParams.lss = MCAN_STD_ID_FILTER_NUM;
|
||||
// List Size: Standard ID.
|
||||
msgRAMConfigParams.rxBufStartAddr = MCAN_RX_BUFF_START_ADDR;
|
||||
// Rx Buffer Start Address.
|
||||
msgRAMConfigParams.rxBufElemSize = MCAN_RX_BUFF_ELEM_SIZE;
|
||||
// Rx Buffer Element Size.
|
||||
|
||||
//
|
||||
// Initialize Rx Buffer Configuration parameters.
|
||||
//
|
||||
stdFiltelem.sfid2 = 0x0U; // Standard Filter ID 2.
|
||||
// Configuring received frame to be stored in buffer element 0
|
||||
stdFiltelem.sfid1 = 0x4U; // Standard Filter ID 1.
|
||||
// Confifuring frames with msg ID = 0x4U to be accepted by filter element
|
||||
stdFiltelem.sfec = 0x7U; // Store into Rx Buffer
|
||||
// configuration of SFT[1:0] ignored
|
||||
|
||||
//
|
||||
// Initialize bit timings.
|
||||
//
|
||||
bitTimes.nomRatePrescalar = 0x3U; // Nominal Baud Rate Pre-scaler
|
||||
bitTimes.nomTimeSeg1 = 0x9U; // Nominal Time segment before SP
|
||||
bitTimes.nomTimeSeg2 = 0x8U; // Nominal Time segment after SP
|
||||
bitTimes.nomSynchJumpWidth = 0x8U; // Nominal SJW
|
||||
bitTimes.dataRatePrescalar = 0x1U; // Data Baud Rate Pre-scaler
|
||||
bitTimes.dataTimeSeg1 = 0x9U; // Data Time segment before SP
|
||||
bitTimes.dataTimeSeg2 = 0x8U; // Data Time segment after SP
|
||||
bitTimes.dataSynchJumpWidth = 0x8U; // Data SJW
|
||||
|
||||
//
|
||||
// Wait for memory initialization to happen.
|
||||
//
|
||||
while(FALSE == MCAN_isMemInitDone(MCANA_DRIVER_BASE))
|
||||
{
|
||||
}
|
||||
|
||||
//
|
||||
// Put MCAN in SW initialization mode.
|
||||
//
|
||||
MCAN_setOpMode(MCANA_DRIVER_BASE, MCAN_OPERATION_MODE_SW_INIT);
|
||||
|
||||
//
|
||||
// Wait till MCAN is not initialized.
|
||||
//
|
||||
while (MCAN_OPERATION_MODE_SW_INIT != MCAN_getOpMode(MCANA_DRIVER_BASE))
|
||||
{}
|
||||
|
||||
//
|
||||
// Initialize MCAN module.
|
||||
//
|
||||
MCAN_init(MCANA_DRIVER_BASE, &initParams);
|
||||
|
||||
//
|
||||
// Configure Bit timings.
|
||||
//
|
||||
MCAN_setBitTime(MCANA_DRIVER_BASE, &bitTimes);
|
||||
|
||||
//
|
||||
// Configure Message RAM Sections
|
||||
//
|
||||
MCAN_msgRAMConfig(MCANA_DRIVER_BASE, &msgRAMConfigParams);
|
||||
|
||||
//
|
||||
// Configure Standard ID filter element
|
||||
//
|
||||
MCAN_addStdMsgIDFilter(MCANA_DRIVER_BASE, 0U, &stdFiltelem);
|
||||
|
||||
//
|
||||
// Take MCAN out of the SW initialization mode
|
||||
//
|
||||
MCAN_setOpMode(MCANA_DRIVER_BASE, MCAN_OPERATION_MODE_NORMAL);
|
||||
|
||||
while (MCAN_OPERATION_MODE_NORMAL != MCAN_getOpMode(MCANA_DRIVER_BASE))
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// This function will configure X-BAR for MCAN interrupts.
|
||||
//
|
||||
static void MCANIntrConfig(void)
|
||||
{
|
||||
|
||||
Interrupt_initModule();
|
||||
Interrupt_initVectorTable();
|
||||
|
||||
Interrupt_register(INT_MCANA_1,&MCANIntr1ISR);
|
||||
Interrupt_enable(INT_MCANA_1);
|
||||
|
||||
Interrupt_enableGlobal();
|
||||
|
||||
}
|
||||
|
||||
//
|
||||
// This is Interrupt Service Routine for MCAN interrupt 1.
|
||||
//
|
||||
__interrupt void MCANIntr1ISR(void)
|
||||
{
|
||||
uint32_t intrStatus;
|
||||
MCAN_RxNewDataStatus newData;
|
||||
|
||||
intrStatus = MCAN_getIntrStatus(MCANA_DRIVER_BASE);
|
||||
|
||||
//
|
||||
// Clear the interrupt Status.
|
||||
//
|
||||
MCAN_clearIntrStatus(MCANA_DRIVER_BASE, intrStatus);
|
||||
|
||||
//
|
||||
// Clearing the interrupt lineNum
|
||||
//
|
||||
MCAN_clearInterrupt(MCANA_DRIVER_BASE, 0x2);
|
||||
|
||||
//
|
||||
// Check to see if the interrupt is caused by a message being
|
||||
// received in dedicated RX Buffers
|
||||
//
|
||||
if((MCAN_INTR_SRC_DEDICATED_RX_BUFF_MSG & intrStatus) == MCAN_INTR_SRC_DEDICATED_RX_BUFF_MSG)
|
||||
{
|
||||
//
|
||||
// Read the NewData registers
|
||||
//
|
||||
MCAN_getNewDataStatus(MCANA_DRIVER_BASE, &newData);
|
||||
|
||||
// If message is received in buffer element 0
|
||||
if((newData.statusLow & (1UL << 0U)) != 0)
|
||||
{
|
||||
MCAN_readMsgRam(MCANA_DRIVER_BASE, MCAN_MEM_TYPE_BUF, 0U,
|
||||
0, &rxMsg1);
|
||||
|
||||
rxMsg[loopCnt] = rxMsg1;
|
||||
}
|
||||
|
||||
//
|
||||
// Clearing the NewData registers
|
||||
//
|
||||
MCAN_clearNewDataStatus(MCANA_DRIVER_BASE, &newData);
|
||||
}
|
||||
else
|
||||
{
|
||||
error++;
|
||||
|
||||
//
|
||||
// Interrupt handling for other interrupt sources goes here
|
||||
//
|
||||
|
||||
}
|
||||
|
||||
//
|
||||
// Acknowledge this interrupt located in group 9
|
||||
//
|
||||
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP9);
|
||||
}
|
||||
@@ -0,0 +1,403 @@
|
||||
//#############################################################################
|
||||
//
|
||||
// FILE: mcan_ex5_mask_filter_receive.c
|
||||
//
|
||||
// TITLE: MCAN External Reception (with mask filter) into RX-FIFO1
|
||||
//
|
||||
//! \addtogroup driver_example_c28x_list
|
||||
//! <h1> MCAN External Reception (with mask filter) into RX-FIFO1 </h1>
|
||||
//!
|
||||
//! This example demonstrates Receiving, with mask filter configuration.
|
||||
//! The transmitting node could be a CAN FD capable controller or a
|
||||
//! CAN bus analysis tool capable of transmitting CAN FD frames.
|
||||
//! Bits 0, 1 & 3 of the identifier are masked. So these bits can have any
|
||||
//! value. This is achieved by using stdFiltelem.sfid1 = 00000001111 and
|
||||
//! stdFiltelem.sfid2 (mask 0 for X ) = 11111110100, which means any message
|
||||
//! with an ID of 0b0000000X1XX are received and stored into the FIFO.
|
||||
//! i.e. Following STD IDs are received: 0x004, 0x005, 0x006, 0x007,
|
||||
//! 0x00C, 0x00D, 0x00E, 0x00F. All other IDs are not received.
|
||||
//! Classic bit-mask filter is used.
|
||||
//! This example may be used in conjunction with mcan_ex3_transmit.
|
||||
//!
|
||||
//! The transmit and receive pins of the MCAN module should be connected to a
|
||||
//! CAN Transceiver. Nominal Bit Rate of 500 kbps and Data bit rate of 1 Mbps
|
||||
//! is used.
|
||||
//!
|
||||
//!
|
||||
//! \b Hardware \b Required \n
|
||||
//! - A C2000 board with CAN transceiver
|
||||
//!
|
||||
//! \b External \b Connections \n
|
||||
//! Both nodes should communicate through CAN FD capable transceivers.
|
||||
//!
|
||||
//! - MCAN is on DEVICE_GPIO_PIN_CANRXA (MCANRXA)
|
||||
//! - and DEVICE_GPIO_PIN_CANTXA (MCANTXA)
|
||||
//!
|
||||
//! \b Watch \b Variables \n
|
||||
//! - rxMsg
|
||||
//!
|
||||
//
|
||||
//#############################################################################
|
||||
//
|
||||
//
|
||||
//
|
||||
// C2000Ware v5.04.00.00
|
||||
//
|
||||
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// $
|
||||
//#############################################################################
|
||||
|
||||
//
|
||||
// Include Files
|
||||
//
|
||||
#include "driverlib.h"
|
||||
#include "device.h"
|
||||
#include "inc/stw_types.h"
|
||||
#include "inc/stw_dataTypes.h"
|
||||
#include <string.h>
|
||||
|
||||
//
|
||||
// Defines.
|
||||
//
|
||||
#define NUM_OF_MSG (1U)
|
||||
#define MCAN_STD_ID_FILTER_NUM (1U)
|
||||
#define MCAN_EXT_ID_FILTER_NUM (0U)
|
||||
#define MCAN_FIFO_0_NUM (0U)
|
||||
#define MCAN_FIFO_0_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_FIFO_1_NUM (NUM_OF_MSG)
|
||||
#define MCAN_FIFO_1_WATERMARK (NUM_OF_MSG)
|
||||
#define MCAN_FIFO_1_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_RX_BUFF_NUM (0U)
|
||||
#define MCAN_RX_BUFF_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_TX_BUFF_SIZE (0U)
|
||||
#define MCAN_TX_FQ_SIZE (0U)
|
||||
#define MCAN_TX_BUFF_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_TX_EVENT_SIZE (0U)
|
||||
|
||||
//
|
||||
// Defining Starting Addresses for Message RAM Sections,
|
||||
// (Calculated from Macros based on User defined configuration above)
|
||||
//
|
||||
#define MCAN_STD_ID_FILT_START_ADDR (0x0U)
|
||||
#define MCAN_EXT_ID_FILT_START_ADDR (MCAN_STD_ID_FILT_START_ADDR + ((MCAN_STD_ID_FILTER_NUM * MCANSS_STD_ID_FILTER_SIZE_WORDS * 4U)))
|
||||
#define MCAN_FIFO_0_START_ADDR (MCAN_EXT_ID_FILT_START_ADDR + ((MCAN_EXT_ID_FILTER_NUM * MCANSS_EXT_ID_FILTER_SIZE_WORDS * 4U)))
|
||||
#define MCAN_FIFO_1_START_ADDR (MCAN_FIFO_0_START_ADDR + (MCAN_getMsgObjSize(MCAN_FIFO_0_ELEM_SIZE) * 4U * MCAN_FIFO_0_NUM))
|
||||
#define MCAN_RX_BUFF_START_ADDR (MCAN_FIFO_1_START_ADDR + (MCAN_getMsgObjSize(MCAN_FIFO_1_ELEM_SIZE) * 4U * MCAN_FIFO_1_NUM))
|
||||
#define MCAN_TX_BUFF_START_ADDR (MCAN_RX_BUFF_START_ADDR + (MCAN_getMsgObjSize(MCAN_RX_BUFF_ELEM_SIZE) * 4U * MCAN_RX_BUFF_NUM))
|
||||
#define MCAN_TX_EVENT_START_ADDR (MCAN_TX_BUFF_START_ADDR + (MCAN_getMsgObjSize(MCAN_TX_BUFF_ELEM_SIZE) * 4U * (MCAN_TX_BUFF_SIZE + MCAN_TX_FQ_SIZE)))
|
||||
|
||||
|
||||
//
|
||||
// Global Variables.
|
||||
//
|
||||
int32_t error = 0;
|
||||
MCAN_RxBufElement rxMsg[NUM_OF_MSG], rxMsg1;
|
||||
MCAN_RxFIFOStatus RxFS;
|
||||
int32_t loopCnt = 0U;
|
||||
|
||||
|
||||
//
|
||||
// Function Prototype.
|
||||
//
|
||||
static void MCANConfig(void);
|
||||
static void MCANIntrConfig(void);
|
||||
__interrupt void MCANIntr1ISR(void);
|
||||
|
||||
void main()
|
||||
{
|
||||
int i = 0;
|
||||
volatile uint32_t mode = 0U;
|
||||
uint32_t dataBytes = 64;
|
||||
|
||||
//
|
||||
// Initialize device clock and peripherals
|
||||
//
|
||||
Device_init();
|
||||
|
||||
//
|
||||
// Initialize GPIO and unlock the GPIO configuration registers
|
||||
//
|
||||
Device_initGPIO();
|
||||
|
||||
//
|
||||
// Allocate MCAN (a shared peripheral) to CPU1 (C28x)
|
||||
//
|
||||
SysCtl_allocateSharedPeripheral(SYSCTL_PALLOCATE_MCAN_A,0x0U);
|
||||
|
||||
//
|
||||
// Configure the divisor for the MCAN bit-clock
|
||||
//
|
||||
SysCtl_setMCANClk(SYSCTL_MCANCLK_DIV_5);
|
||||
|
||||
//
|
||||
// ISR Configuration.
|
||||
//
|
||||
MCANIntrConfig();
|
||||
|
||||
//
|
||||
// Configure GPIO pins for MCANTX/MCANRX operation
|
||||
//
|
||||
GPIO_setPinConfig(DEVICE_GPIO_CFG_MCANRXA);
|
||||
GPIO_setPinConfig(DEVICE_GPIO_CFG_MCANTXA);
|
||||
|
||||
//
|
||||
// Initialize receive data structure
|
||||
// (not to be confused with RX Buffer inside the MCAN module)
|
||||
//
|
||||
rxMsg[loopCnt].id = 0U;
|
||||
rxMsg[loopCnt].rtr = 0U;
|
||||
rxMsg[loopCnt].xtd = 0U;
|
||||
rxMsg[loopCnt].esi = 0U;
|
||||
rxMsg[loopCnt].rxts = 0U;
|
||||
rxMsg[loopCnt].dlc = 0U;
|
||||
rxMsg[loopCnt].brs = 0U;
|
||||
rxMsg[loopCnt].fdf = 0U;
|
||||
rxMsg[loopCnt].fidx = 0U;
|
||||
rxMsg[loopCnt].anmf = 0U;
|
||||
for(i = 0; i < dataBytes; i++)
|
||||
{
|
||||
rxMsg[loopCnt].data[i] = 0;
|
||||
}
|
||||
|
||||
//
|
||||
// Configure the MCAN Module.
|
||||
//
|
||||
MCANConfig();
|
||||
|
||||
//
|
||||
// Enable Interrupts.
|
||||
//
|
||||
MCAN_enableIntr(MCANA_DRIVER_BASE, MCAN_INTR_MASK_ALL, 1U);
|
||||
|
||||
//
|
||||
// Select Interrupt Line.
|
||||
//
|
||||
MCAN_selectIntrLine(MCANA_DRIVER_BASE, MCAN_INTR_MASK_ALL, MCAN_INTR_LINE_NUM_1);
|
||||
|
||||
//
|
||||
// Enable Interrupt Line.
|
||||
//
|
||||
MCAN_enableIntrLine(MCANA_DRIVER_BASE, MCAN_INTR_LINE_NUM_1, 1U);
|
||||
|
||||
while(1)
|
||||
{
|
||||
//
|
||||
// Adding delay of 1 second
|
||||
//
|
||||
DEVICE_DELAY_US(1000000);
|
||||
|
||||
//
|
||||
// Message Handling Code goes here
|
||||
//
|
||||
|
||||
}
|
||||
|
||||
//
|
||||
// Stop Application.
|
||||
//
|
||||
asm(" ESTOP0");
|
||||
}
|
||||
|
||||
static void MCANConfig(void)
|
||||
{
|
||||
MCAN_InitParams initParams;
|
||||
MCAN_MsgRAMConfigParams msgRAMConfigParams;
|
||||
MCAN_StdMsgIDFilterElement stdFiltelem;
|
||||
MCAN_BitTimingParams bitTimes;
|
||||
|
||||
//
|
||||
// Initializing all structs to zero to prevent stray values
|
||||
//
|
||||
memset(&initParams, 0, sizeof(initParams));
|
||||
memset(&msgRAMConfigParams, 0, sizeof(msgRAMConfigParams));
|
||||
memset(&stdFiltelem, 0, sizeof(stdFiltelem));
|
||||
memset(&bitTimes, 0, sizeof(bitTimes));
|
||||
|
||||
//
|
||||
// Initialize MCAN Init parameters.
|
||||
//
|
||||
initParams.fdMode = 0x1U; // FD operation enabled.
|
||||
initParams.brsEnable = 0x1U; // Bit rate switching enabled.
|
||||
|
||||
//
|
||||
// Initialize Message RAM Sections Configuration Parameters
|
||||
//
|
||||
msgRAMConfigParams.flssa = MCAN_STD_ID_FILT_START_ADDR;
|
||||
// Standard ID Filter List Start Address (0).
|
||||
msgRAMConfigParams.lss = MCAN_STD_ID_FILTER_NUM;
|
||||
// Standard ID Filter List Size (1).
|
||||
|
||||
msgRAMConfigParams.rxFIFO1startAddr = MCAN_FIFO_1_START_ADDR;
|
||||
// Rx FIFO1 Start Address (748U).
|
||||
msgRAMConfigParams.rxFIFO1size = MCAN_FIFO_1_NUM;
|
||||
// Number of Rx FIFO elements (1).
|
||||
msgRAMConfigParams.rxFIFO1waterMark = MCAN_FIFO_1_WATERMARK;
|
||||
// Level for Rx FIFO 1 watermark interrupt (1).
|
||||
msgRAMConfigParams.rxFIFO1OpMode = 0U;
|
||||
// FIFO blocking mode.
|
||||
msgRAMConfigParams.rxFIFO1ElemSize = MCAN_FIFO_1_ELEM_SIZE;
|
||||
// Rx FIFO1 Element Size. RBDS field of MCAN_RXESC Register
|
||||
|
||||
//
|
||||
// Initialize Rx Buffer Filter element Configuration parameters.
|
||||
//
|
||||
stdFiltelem.sfid2 = 0x7F4U; // Standard ID Filter Mask.
|
||||
// A 0 in any bit-position indicates "don't care"
|
||||
stdFiltelem.sfid1 = 0x00FU; // Standard ID Filter
|
||||
stdFiltelem.sfec = 0x6U; // Store into FIFO 1.
|
||||
stdFiltelem.sft = 0x2U; // SFID1 = filter; SFID2 = mask
|
||||
|
||||
//
|
||||
// Initialize bit timings.
|
||||
//
|
||||
bitTimes.nomRatePrescalar = 0x3U; // Nominal Baud Rate Pre-scaler.
|
||||
bitTimes.nomTimeSeg1 = 0x9U; // Nominal Time segment before SP
|
||||
bitTimes.nomTimeSeg2 = 0x8U; // Nominal Time segment after SP.
|
||||
bitTimes.nomSynchJumpWidth = 0x8U; // Nominal SJW
|
||||
bitTimes.dataRatePrescalar = 0x1U; // Data Baud Rate Pre-scaler.
|
||||
bitTimes.dataTimeSeg1 = 0x9U; // Data Time segment before SP
|
||||
bitTimes.dataTimeSeg2 = 0x8U; // Data Time segment after SP
|
||||
bitTimes.dataSynchJumpWidth = 0x8U; // Data SJW
|
||||
|
||||
//
|
||||
// Wait for memory initialization to happen.
|
||||
//
|
||||
while(FALSE == MCAN_isMemInitDone(MCANA_DRIVER_BASE))
|
||||
{
|
||||
}
|
||||
|
||||
//
|
||||
// Put MCAN in SW initialization mode.
|
||||
//
|
||||
MCAN_setOpMode(MCANA_DRIVER_BASE, MCAN_OPERATION_MODE_SW_INIT);
|
||||
|
||||
//
|
||||
// Wait till MCAN is not initialized.
|
||||
//
|
||||
while (MCAN_OPERATION_MODE_SW_INIT != MCAN_getOpMode(MCANA_DRIVER_BASE))
|
||||
{}
|
||||
|
||||
//
|
||||
// Initialize MCAN module.
|
||||
//
|
||||
MCAN_init(MCANA_DRIVER_BASE, &initParams);
|
||||
|
||||
//
|
||||
// Configure Bit timings.
|
||||
//
|
||||
MCAN_setBitTime(MCANA_DRIVER_BASE, &bitTimes);
|
||||
|
||||
//
|
||||
// Configure Message RAM Sections
|
||||
//
|
||||
MCAN_msgRAMConfig(MCANA_DRIVER_BASE, &msgRAMConfigParams);
|
||||
|
||||
//
|
||||
// Configure Standard ID filter element
|
||||
//
|
||||
MCAN_addStdMsgIDFilter(MCANA_DRIVER_BASE, 0U, &stdFiltelem);
|
||||
|
||||
//
|
||||
// Take MCAN out of the SW initialization mode
|
||||
//
|
||||
MCAN_setOpMode(MCANA_DRIVER_BASE, MCAN_OPERATION_MODE_NORMAL);
|
||||
|
||||
while (MCAN_OPERATION_MODE_NORMAL != MCAN_getOpMode(MCANA_DRIVER_BASE))
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// This function will configure X-BAR for MCAN interrupts.
|
||||
//
|
||||
static void MCANIntrConfig(void)
|
||||
{
|
||||
|
||||
Interrupt_initModule();
|
||||
Interrupt_initVectorTable();
|
||||
|
||||
Interrupt_register(INT_MCANA_1,&MCANIntr1ISR);
|
||||
Interrupt_enable(INT_MCANA_1);
|
||||
|
||||
Interrupt_enableGlobal();
|
||||
|
||||
}
|
||||
|
||||
//
|
||||
// This is Interrupt Service Routine for MCAN interrupt 1.
|
||||
//
|
||||
__interrupt void MCANIntr1ISR(void)
|
||||
{
|
||||
uint32_t intrStatus;
|
||||
|
||||
intrStatus = MCAN_getIntrStatus(MCANA_DRIVER_BASE);
|
||||
|
||||
//
|
||||
// Clear the interrupt Status.
|
||||
//
|
||||
MCAN_clearIntrStatus(MCANA_DRIVER_BASE, intrStatus);
|
||||
|
||||
//
|
||||
// Clearing the interrupt lineNum
|
||||
//
|
||||
MCAN_clearInterrupt(MCANA_DRIVER_BASE, 0x2);
|
||||
|
||||
//
|
||||
// Check to see if the interrupt is caused by a new message being
|
||||
// received in RX FIFO 1
|
||||
//
|
||||
if((MCAN_INTR_SRC_RX_FIFO1_NEW_MSG & intrStatus) == MCAN_INTR_SRC_RX_FIFO1_NEW_MSG)
|
||||
{
|
||||
MCAN_readMsgRam(MCANA_DRIVER_BASE, MCAN_MEM_TYPE_FIFO, 0U,
|
||||
MCAN_RX_FIFO_NUM_1, &rxMsg1);
|
||||
|
||||
rxMsg[loopCnt] = rxMsg1;
|
||||
RxFS.num = MCAN_RX_FIFO_NUM_1;
|
||||
|
||||
MCAN_writeRxFIFOAck(MCANA_DRIVER_BASE, MCAN_RX_FIFO_NUM_1,
|
||||
RxFS.getIdx);
|
||||
}
|
||||
else
|
||||
{
|
||||
error++;
|
||||
|
||||
//
|
||||
// Interrupt handling for other interrupt sources goes here
|
||||
//
|
||||
|
||||
}
|
||||
|
||||
//
|
||||
// Acknowledge this interrupt located in group 9
|
||||
//
|
||||
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP9);
|
||||
}
|
||||
@@ -0,0 +1,282 @@
|
||||
//#############################################################################
|
||||
//
|
||||
// FILE: mcan_ex7_classic_transmit.c
|
||||
//
|
||||
// TITLE: MCAN Classic frames transmission using Tx Buffer
|
||||
//
|
||||
//! \addtogroup driver_example_c28x_list
|
||||
//! <h1> MCAN Classic frames transmission using Tx Buffer </h1>
|
||||
//!
|
||||
//! This simple example shows external communication between the MCAN module
|
||||
//! and another CAN node. It shows how to transmit classic CAN frames.
|
||||
//! The GPIOs of MCAN should be connected to a CAN Transceiver.
|
||||
//! Bit Rate is 500 kbps. Extended Identifier 0x15A5A5A5 is transmitted with
|
||||
//! 8 data bytes.
|
||||
//!
|
||||
//! \b Hardware \b Required \n
|
||||
//! - A C2000 board with CAN transceiver
|
||||
//!
|
||||
//! \b External \b Connections \n
|
||||
//! Both nodes should communicate through CAN transceivers.
|
||||
//!
|
||||
//! - MCAN is on DEVICE_GPIO_PIN_CANRXA (MCANRXA)
|
||||
//! - and DEVICE_GPIO_PIN_CANTXA (MCANTXA)
|
||||
//!
|
||||
//! \b Watch \b Variables \n
|
||||
//! - txMsg
|
||||
//!
|
||||
//
|
||||
//#############################################################################
|
||||
//
|
||||
//
|
||||
//
|
||||
// C2000Ware v5.04.00.00
|
||||
//
|
||||
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// $
|
||||
//#############################################################################
|
||||
|
||||
//
|
||||
// Include Files
|
||||
//
|
||||
#include "driverlib.h"
|
||||
#include "device.h"
|
||||
#include "inc/stw_types.h"
|
||||
#include "inc/stw_dataTypes.h"
|
||||
#include <string.h>
|
||||
|
||||
//
|
||||
// Defines.
|
||||
//
|
||||
#define NUM_OF_MSG (1U)
|
||||
#define MCAN_STD_ID_FILTER_NUM (0U)
|
||||
#define MCAN_EXT_ID_FILTER_NUM (0U)
|
||||
#define MCAN_FIFO_0_NUM (0U)
|
||||
#define MCAN_FIFO_0_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_FIFO_1_NUM (0U)
|
||||
#define MCAN_FIFO_1_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_RX_BUFF_NUM (0U)
|
||||
#define MCAN_RX_BUFF_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_TX_BUFF_SIZE (NUM_OF_MSG)
|
||||
#define MCAN_TX_FQ_SIZE (0U)
|
||||
#define MCAN_TX_BUFF_ELEM_SIZE (MCAN_ELEM_SIZE_8BYTES)
|
||||
#define MCAN_TX_EVENT_SIZE (0U)
|
||||
|
||||
//
|
||||
// Defining Starting Addresses for Message RAM Sections,
|
||||
// (Calculated from Macros based on User defined configuration above)
|
||||
//
|
||||
#define MCAN_STD_ID_FILT_START_ADDR (0x0U)
|
||||
#define MCAN_EXT_ID_FILT_START_ADDR (MCAN_STD_ID_FILT_START_ADDR + ((MCAN_STD_ID_FILTER_NUM * MCANSS_STD_ID_FILTER_SIZE_WORDS * 4U)))
|
||||
#define MCAN_FIFO_0_START_ADDR (MCAN_EXT_ID_FILT_START_ADDR + ((MCAN_EXT_ID_FILTER_NUM * MCANSS_EXT_ID_FILTER_SIZE_WORDS * 4U)))
|
||||
#define MCAN_FIFO_1_START_ADDR (MCAN_FIFO_0_START_ADDR + (MCAN_getMsgObjSize(MCAN_FIFO_0_ELEM_SIZE) * 4U * MCAN_FIFO_0_NUM))
|
||||
#define MCAN_RX_BUFF_START_ADDR (MCAN_FIFO_1_START_ADDR + (MCAN_getMsgObjSize(MCAN_FIFO_1_ELEM_SIZE) * 4U * MCAN_FIFO_1_NUM))
|
||||
#define MCAN_TX_BUFF_START_ADDR (MCAN_RX_BUFF_START_ADDR + (MCAN_getMsgObjSize(MCAN_RX_BUFF_ELEM_SIZE) * 4U * MCAN_RX_BUFF_NUM))
|
||||
#define MCAN_TX_EVENT_START_ADDR (MCAN_TX_BUFF_START_ADDR + (MCAN_getMsgObjSize(MCAN_TX_BUFF_ELEM_SIZE) * 4U * (MCAN_TX_BUFF_SIZE + MCAN_TX_FQ_SIZE)))
|
||||
|
||||
|
||||
//
|
||||
// Global Variables.
|
||||
//
|
||||
int32_t error = 0;
|
||||
MCAN_TxBufElement txMsg[NUM_OF_MSG];
|
||||
int32_t loopCnt = 0U;
|
||||
|
||||
//
|
||||
// Function Prototype.
|
||||
//
|
||||
static void MCANConfig(void);
|
||||
|
||||
void main()
|
||||
{
|
||||
int i = 0;
|
||||
volatile uint32_t mode = 0U;
|
||||
uint32_t dataBytes = 8;
|
||||
|
||||
//
|
||||
// Initialize device clock and peripherals
|
||||
//
|
||||
Device_init();
|
||||
|
||||
//
|
||||
// Initialize GPIO and configure GPIO pins for CANTX/CANRX
|
||||
//
|
||||
Device_initGPIO();
|
||||
|
||||
//
|
||||
// Allocate MCAN (a shared peripheral) to CPU1 (C28x)
|
||||
//
|
||||
SysCtl_allocateSharedPeripheral(SYSCTL_PALLOCATE_MCAN_A,0x0U);
|
||||
|
||||
//
|
||||
// Configure the divisor for the MCAN bit-clock
|
||||
//
|
||||
SysCtl_setMCANClk(SYSCTL_MCANCLK_DIV_5);
|
||||
|
||||
//
|
||||
// Configuring the GPIOs for MCAN.
|
||||
//
|
||||
GPIO_setPinConfig(DEVICE_GPIO_CFG_MCANRXA);
|
||||
GPIO_setPinConfig(DEVICE_GPIO_CFG_MCANTXA);
|
||||
|
||||
//
|
||||
// Initialize message to transmit.
|
||||
//
|
||||
txMsg[loopCnt].id = ((uint32_t)(0x15A5A5A5)) ;
|
||||
txMsg[loopCnt].rtr = 0U;
|
||||
txMsg[loopCnt].xtd = 1U;
|
||||
txMsg[loopCnt].esi = 0U;
|
||||
txMsg[loopCnt].dlc = 8U;
|
||||
txMsg[loopCnt].brs = 0U;
|
||||
txMsg[loopCnt].fdf = 0U;
|
||||
txMsg[loopCnt].efc = 1U;
|
||||
txMsg[loopCnt].mm = 0xAAU;
|
||||
txMsg[loopCnt].data[i] = 0x1;
|
||||
for(i = 1; i < dataBytes; i++)
|
||||
{
|
||||
txMsg[loopCnt].data[i] = txMsg[loopCnt].data[i-1] + 1;
|
||||
}
|
||||
i = 0;
|
||||
|
||||
//
|
||||
// Configure the MCAN Module.
|
||||
//
|
||||
MCANConfig();
|
||||
|
||||
//
|
||||
// Write message to Message RAM.
|
||||
//
|
||||
MCAN_writeMsgRam(MCANA_DRIVER_BASE, MCAN_MEM_TYPE_BUF, loopCnt,
|
||||
&txMsg[loopCnt]);
|
||||
|
||||
while(1)
|
||||
{
|
||||
//
|
||||
// Add request for all transmission.
|
||||
//
|
||||
MCAN_txBufAddReq(MCANA_DRIVER_BASE, 0U);
|
||||
|
||||
//
|
||||
// Wait till all the messages are transmitted.
|
||||
//
|
||||
while(MCAN_getTxBufReqPend(MCANA_DRIVER_BASE))
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// Stop Application.
|
||||
//
|
||||
asm(" ESTOP0");
|
||||
}
|
||||
|
||||
static void MCANConfig(void)
|
||||
{
|
||||
MCAN_InitParams initParams;
|
||||
MCAN_MsgRAMConfigParams msgRAMConfigParams;
|
||||
MCAN_BitTimingParams bitTimes;
|
||||
|
||||
//
|
||||
// Initializing all structs to zero to prevent stray values
|
||||
//
|
||||
memset(&initParams, 0, sizeof(initParams));
|
||||
memset(&msgRAMConfigParams, 0, sizeof(msgRAMConfigParams));
|
||||
memset(&bitTimes, 0, sizeof(bitTimes));
|
||||
|
||||
//
|
||||
// Initialize MCAN Init parameters.
|
||||
//
|
||||
initParams.fdMode = 0x0U; // FD operation disabled.
|
||||
initParams.brsEnable = 0x0U; // Bit rate switching for
|
||||
// transmissions disabled.
|
||||
|
||||
//
|
||||
// Initialize Message RAM Sections Configuration Parameters
|
||||
//
|
||||
msgRAMConfigParams.txStartAddr = MCAN_TX_BUFF_START_ADDR;
|
||||
// Tx Buffers Start Address.
|
||||
msgRAMConfigParams.txBufNum = MCAN_TX_BUFF_SIZE;
|
||||
// Number of Dedicated Transmit Buffers.
|
||||
msgRAMConfigParams.txBufMode = 0U;
|
||||
msgRAMConfigParams.txBufElemSize = MCAN_TX_BUFF_ELEM_SIZE;
|
||||
// Tx Buffer Element Size.
|
||||
|
||||
//
|
||||
// Initialize bit timings.
|
||||
//
|
||||
bitTimes.nomRatePrescalar = 0x3U; // Nominal Baud Rate Pre-scaler
|
||||
bitTimes.nomTimeSeg1 = 0x9U; // Nominal Time segment before SP
|
||||
bitTimes.nomTimeSeg2 = 0x8U; // Nominal Time segment after SP
|
||||
bitTimes.nomSynchJumpWidth = 0x8U; // Nominal SJW
|
||||
|
||||
//
|
||||
// Wait for memory initialization to happen.
|
||||
//
|
||||
while(FALSE == MCAN_isMemInitDone(MCANA_DRIVER_BASE))
|
||||
{
|
||||
}
|
||||
|
||||
//
|
||||
// Put MCAN in SW initialization mode.
|
||||
//
|
||||
MCAN_setOpMode(MCANA_DRIVER_BASE, MCAN_OPERATION_MODE_SW_INIT);
|
||||
|
||||
//
|
||||
// Wait till MCAN is not initialized.
|
||||
//
|
||||
while (MCAN_OPERATION_MODE_SW_INIT != MCAN_getOpMode(MCANA_DRIVER_BASE))
|
||||
{}
|
||||
|
||||
//
|
||||
// Initialize MCAN module.
|
||||
//
|
||||
MCAN_init(MCANA_DRIVER_BASE, &initParams);
|
||||
|
||||
//
|
||||
// Configure Bit timings.
|
||||
//
|
||||
MCAN_setBitTime(MCANA_DRIVER_BASE, &bitTimes);
|
||||
|
||||
//
|
||||
// Configure Message RAM Sections
|
||||
//
|
||||
MCAN_msgRAMConfig(MCANA_DRIVER_BASE, &msgRAMConfigParams);
|
||||
|
||||
//
|
||||
// Take MCAN out of the SW initialization mode
|
||||
//
|
||||
MCAN_setOpMode(MCANA_DRIVER_BASE, MCAN_OPERATION_MODE_NORMAL);
|
||||
|
||||
while (MCAN_OPERATION_MODE_NORMAL != MCAN_getOpMode(MCANA_DRIVER_BASE))
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,411 @@
|
||||
//#############################################################################
|
||||
//
|
||||
// FILE: mcan_ex8_range_filter_receive.c
|
||||
//
|
||||
// TITLE: MCAN Reception of EXTID frames (with RANGE filter) into RX-FIFO1
|
||||
//
|
||||
//! \addtogroup driver_example_c28x_list
|
||||
//! <h1> MCAN External Reception (with RANGE filter) into RX-FIFO1 </h1>
|
||||
//!
|
||||
//! This example demonstrates Receiving, with RANGE filter configuration.
|
||||
//! The transmitting node could be a CAN FD capable controller or a
|
||||
//! CAN bus analysis tool capable of transmitting CAN FD frames.
|
||||
//! Only Extended IDs from 0x1FFFFF23 to 0x1FFFFF46 are received.
|
||||
//! Other IDs are not received. RXFIFO1 starts at an offset of 748 (2EC).
|
||||
//! MCAN Message RAM starts at 0x58000, so received messages will be copied
|
||||
//! starting at address 0x582EC. Note that as long as the ID matches,
|
||||
//! "classic" CAN frames will also be received.
|
||||
//!
|
||||
//! The transmit and receive pins of the MCAN module should be connected to a
|
||||
//! CAN Transceiver. Nominal Bit Rate of 500 kbps and Data bit rate of 1 Mbps
|
||||
//! is used.
|
||||
//!
|
||||
//!
|
||||
//! \b Hardware \b Required \n
|
||||
//! - A C2000 board with CAN transceiver
|
||||
//!
|
||||
//! \b External \b Connections \n
|
||||
//! Both nodes should communicate through CAN FD capable transceivers.
|
||||
//!
|
||||
//! - MCAN is on DEVICE_GPIO_PIN_CANRXA (MCANRXA)
|
||||
//! - and DEVICE_GPIO_PIN_CANTXA (MCANTXA)
|
||||
//!
|
||||
//! \b Watch \b Variables \n
|
||||
//! - rxMsg
|
||||
//!
|
||||
//
|
||||
//#############################################################################
|
||||
//
|
||||
//
|
||||
//
|
||||
// C2000Ware v5.04.00.00
|
||||
//
|
||||
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// $
|
||||
//#############################################################################
|
||||
|
||||
//
|
||||
// Include Files
|
||||
//
|
||||
#include "driverlib.h"
|
||||
#include "device.h"
|
||||
#include "inc/stw_types.h"
|
||||
#include "inc/stw_dataTypes.h"
|
||||
#include <string.h>
|
||||
|
||||
//
|
||||
// Defines.
|
||||
//
|
||||
#define NUM_OF_MSG (1U)
|
||||
#define MCAN_STD_ID_FILTER_NUM (0U)
|
||||
#define MCAN_EXT_ID_FILTER_NUM (1U)
|
||||
#define MCAN_FIFO_0_NUM (0U)
|
||||
#define MCAN_FIFO_0_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_FIFO_1_NUM (NUM_OF_MSG)
|
||||
#define MCAN_FIFO_1_WATERMARK (NUM_OF_MSG)
|
||||
#define MCAN_FIFO_1_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_RX_BUFF_NUM (0U)
|
||||
#define MCAN_RX_BUFF_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_TX_BUFF_SIZE (0U)
|
||||
#define MCAN_TX_FQ_SIZE (0U)
|
||||
#define MCAN_TX_BUFF_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_TX_EVENT_SIZE (0U)
|
||||
#define MCAN_EXT_ID_AND_MASK (0x1FFFFFFFU)
|
||||
|
||||
//
|
||||
// Defining Starting Addresses for Message RAM Sections,
|
||||
// (Calculated from Macros based on User defined configuration above)
|
||||
//
|
||||
#define MCAN_STD_ID_FILT_START_ADDR (0x0U)
|
||||
#define MCAN_EXT_ID_FILT_START_ADDR (MCAN_STD_ID_FILT_START_ADDR + ((MCAN_STD_ID_FILTER_NUM * MCANSS_STD_ID_FILTER_SIZE_WORDS * 4U)))
|
||||
#define MCAN_FIFO_0_START_ADDR (MCAN_EXT_ID_FILT_START_ADDR + ((MCAN_EXT_ID_FILTER_NUM * MCANSS_EXT_ID_FILTER_SIZE_WORDS * 4U)))
|
||||
#define MCAN_FIFO_1_START_ADDR (MCAN_FIFO_0_START_ADDR + (MCAN_getMsgObjSize(MCAN_FIFO_0_ELEM_SIZE) * 4U * MCAN_FIFO_0_NUM))
|
||||
#define MCAN_RX_BUFF_START_ADDR (MCAN_FIFO_1_START_ADDR + (MCAN_getMsgObjSize(MCAN_FIFO_1_ELEM_SIZE) * 4U * MCAN_FIFO_1_NUM))
|
||||
#define MCAN_TX_BUFF_START_ADDR (MCAN_RX_BUFF_START_ADDR + (MCAN_getMsgObjSize(MCAN_RX_BUFF_ELEM_SIZE) * 4U * MCAN_RX_BUFF_NUM))
|
||||
#define MCAN_TX_EVENT_START_ADDR (MCAN_TX_BUFF_START_ADDR + (MCAN_getMsgObjSize(MCAN_TX_BUFF_ELEM_SIZE) * 4U * (MCAN_TX_BUFF_SIZE + MCAN_TX_FQ_SIZE)))
|
||||
|
||||
|
||||
//
|
||||
// Global Variables.
|
||||
//
|
||||
int32_t error = 0;
|
||||
MCAN_RxBufElement rxMsg[NUM_OF_MSG], rxMsg1;
|
||||
MCAN_RxFIFOStatus RxFS;
|
||||
int32_t loopCnt = 0U;
|
||||
|
||||
//
|
||||
// Function Prototype.
|
||||
//
|
||||
static void MCANConfig(void);
|
||||
static void MCANIntrConfig(void);
|
||||
__interrupt void MCANIntr1ISR(void);
|
||||
|
||||
void main()
|
||||
{
|
||||
int i = 0;
|
||||
volatile uint32_t mode = 0U;
|
||||
uint32_t dataBytes = 64;
|
||||
|
||||
//
|
||||
// Initialize device clock and peripherals
|
||||
//
|
||||
Device_init();
|
||||
|
||||
//
|
||||
// Initialize GPIO and unlock the GPIO configuration registers
|
||||
//
|
||||
Device_initGPIO();
|
||||
|
||||
//
|
||||
// Allocate MCAN (a shared peripheral) to CPU1 (C28x)
|
||||
//
|
||||
SysCtl_allocateSharedPeripheral(SYSCTL_PALLOCATE_MCAN_A,0x0U);
|
||||
|
||||
//
|
||||
// Configure the divisor for the MCAN bit-clock
|
||||
//
|
||||
SysCtl_setMCANClk(SYSCTL_MCANCLK_DIV_5);
|
||||
|
||||
//
|
||||
// ISR Configuration.
|
||||
//
|
||||
MCANIntrConfig();
|
||||
|
||||
//
|
||||
// Configure GPIO pins for MCANTX/MCANRX operation
|
||||
//
|
||||
GPIO_setPinConfig(DEVICE_GPIO_CFG_MCANRXA);
|
||||
GPIO_setPinConfig(DEVICE_GPIO_CFG_MCANTXA);
|
||||
|
||||
//
|
||||
// Initialize receive data structure
|
||||
// (not to be confused with RX Buffer inside the MCAN module)
|
||||
//
|
||||
rxMsg[loopCnt].id = 0U;
|
||||
rxMsg[loopCnt].rtr = 0U;
|
||||
rxMsg[loopCnt].xtd = 1U;
|
||||
rxMsg[loopCnt].esi = 0U;
|
||||
rxMsg[loopCnt].rxts = 0U;
|
||||
rxMsg[loopCnt].dlc = 0U;
|
||||
rxMsg[loopCnt].brs = 0U;
|
||||
rxMsg[loopCnt].fdf = 0U;
|
||||
rxMsg[loopCnt].fidx = 0U;
|
||||
rxMsg[loopCnt].anmf = 0U;
|
||||
for(i = 0; i < dataBytes; i++)
|
||||
{
|
||||
rxMsg[loopCnt].data[i] = 0;
|
||||
}
|
||||
|
||||
//
|
||||
// Configure the MCAN Module.
|
||||
//
|
||||
MCANConfig();
|
||||
|
||||
//
|
||||
// Enable Interrupts.
|
||||
//
|
||||
MCAN_enableIntr(MCANA_DRIVER_BASE, MCAN_INTR_MASK_ALL, 1U);
|
||||
|
||||
//
|
||||
// Select Interrupt Line.
|
||||
//
|
||||
MCAN_selectIntrLine(MCANA_DRIVER_BASE, MCAN_INTR_MASK_ALL, MCAN_INTR_LINE_NUM_1);
|
||||
|
||||
//
|
||||
// Enable Interrupt Line.
|
||||
//
|
||||
MCAN_enableIntrLine(MCANA_DRIVER_BASE, MCAN_INTR_LINE_NUM_1, 1U);
|
||||
|
||||
while(1)
|
||||
{
|
||||
//
|
||||
// Adding delay of 1 second
|
||||
//
|
||||
DEVICE_DELAY_US(1000000);
|
||||
|
||||
//
|
||||
// Message Handling Code goes here
|
||||
//
|
||||
|
||||
}
|
||||
|
||||
//
|
||||
// Stop Application.
|
||||
//
|
||||
asm(" ESTOP0");
|
||||
}
|
||||
|
||||
static void MCANConfig(void)
|
||||
{
|
||||
MCAN_InitParams initParams;
|
||||
MCAN_MsgRAMConfigParams msgRAMConfigParams;
|
||||
MCAN_ExtMsgIDFilterElement extFiltelem;
|
||||
MCAN_BitTimingParams bitTimes;
|
||||
|
||||
//
|
||||
// Initializing all structs to zero to prevent stray values
|
||||
//
|
||||
memset(&initParams, 0, sizeof(initParams));
|
||||
memset(&msgRAMConfigParams, 0, sizeof(msgRAMConfigParams));
|
||||
memset(&extFiltelem, 0, sizeof(extFiltelem));
|
||||
memset(&bitTimes, 0, sizeof(bitTimes));
|
||||
|
||||
//
|
||||
// Initialize MCAN Init parameters.
|
||||
//
|
||||
initParams.fdMode = 0x1U; // FD operation enabled.
|
||||
initParams.brsEnable = 0x1U; // Bit rate switching enabled.
|
||||
|
||||
//
|
||||
// Initialize Message RAM Sections Configuration Parameters
|
||||
//
|
||||
msgRAMConfigParams.flesa = MCAN_EXT_ID_FILT_START_ADDR;
|
||||
// Extended ID Filter List Start Address (0)
|
||||
|
||||
msgRAMConfigParams.lse = MCAN_EXT_ID_FILTER_NUM;
|
||||
// Extended ID Filter List Size (1)
|
||||
|
||||
msgRAMConfigParams.rxFIFO1startAddr = MCAN_FIFO_1_START_ADDR;
|
||||
// Rx FIFO1 Start Address (748U)
|
||||
|
||||
msgRAMConfigParams.rxFIFO1size = MCAN_FIFO_1_NUM;
|
||||
// Number of Rx FIFO elements (1)
|
||||
|
||||
msgRAMConfigParams.rxFIFO1waterMark = MCAN_FIFO_1_WATERMARK;
|
||||
// Level for Rx FIFO 1 watermark interrupt (1)
|
||||
|
||||
msgRAMConfigParams.rxFIFO1OpMode = 0U;
|
||||
// FIFO blocking mode.
|
||||
|
||||
msgRAMConfigParams.rxFIFO1ElemSize = MCAN_FIFO_1_ELEM_SIZE;
|
||||
// Rx FIFO1 Element Size - RBDS field of MCAN_RXESC Register
|
||||
|
||||
//
|
||||
// Initialize Rx FIFO Filter element Configuration parameters.
|
||||
//
|
||||
|
||||
extFiltelem.efid2 = 0x1FFFFF46U; // Extended ID2
|
||||
extFiltelem.efid1 = 0x1FFFFF23U; // Extended ID1
|
||||
extFiltelem.efec = 0x6U; // Store into FIFO 1.
|
||||
extFiltelem.eft = 0x0U; // Range filter from EFID1 to EFID2
|
||||
//(EFID2 >= EFID1)
|
||||
//
|
||||
// Initialize bit timings.
|
||||
//
|
||||
bitTimes.nomRatePrescalar = 0x3U; // Nominal Baud Rate Pre-scaler
|
||||
bitTimes.nomTimeSeg1 = 0x9U; // Nominal Time segment before SP
|
||||
bitTimes.nomTimeSeg2 = 0x8U; // Nominal Time segment after SP
|
||||
bitTimes.nomSynchJumpWidth = 0x8U; // Nominal SJW
|
||||
bitTimes.dataRatePrescalar = 0x1U; // Data Baud Rate Pre-scaler
|
||||
bitTimes.dataTimeSeg1 = 0x9U; // Data Time segment before SP
|
||||
bitTimes.dataTimeSeg2 = 0x8U; // Data Time segment after SP
|
||||
bitTimes.dataSynchJumpWidth = 0x8U; // Data SJW
|
||||
|
||||
//
|
||||
// Wait for memory initialization to happen.
|
||||
//
|
||||
while(FALSE == MCAN_isMemInitDone(MCANA_DRIVER_BASE))
|
||||
{
|
||||
}
|
||||
|
||||
//
|
||||
// Put MCAN in SW initialization mode.
|
||||
//
|
||||
MCAN_setOpMode(MCANA_DRIVER_BASE, MCAN_OPERATION_MODE_SW_INIT);
|
||||
|
||||
//
|
||||
// Wait till MCAN is not initialized.
|
||||
//
|
||||
while (MCAN_OPERATION_MODE_SW_INIT != MCAN_getOpMode(MCANA_DRIVER_BASE))
|
||||
{}
|
||||
|
||||
//
|
||||
// Initialize MCAN module.
|
||||
//
|
||||
MCAN_init(MCANA_DRIVER_BASE, &initParams);
|
||||
|
||||
//
|
||||
// Configure Bit timings.
|
||||
//
|
||||
MCAN_setBitTime(MCANA_DRIVER_BASE, &bitTimes);
|
||||
|
||||
//
|
||||
// Configure Message RAM Sections
|
||||
//
|
||||
MCAN_msgRAMConfig(MCANA_DRIVER_BASE, &msgRAMConfigParams);
|
||||
|
||||
//
|
||||
// Configure Standard ID filter element
|
||||
//
|
||||
MCAN_addExtMsgIDFilter(MCANA_DRIVER_BASE, 0U, &extFiltelem);
|
||||
|
||||
//
|
||||
// Set Extended ID Mask for acceptance filtering of received frames
|
||||
// (Mask disabled when all bits are set to 1)
|
||||
//
|
||||
MCAN_setExtIDAndMask(MCANA_DRIVER_BASE, MCAN_EXT_ID_AND_MASK);
|
||||
|
||||
//
|
||||
// Take MCAN out of the SW initialization mode
|
||||
//
|
||||
MCAN_setOpMode(MCANA_DRIVER_BASE, MCAN_OPERATION_MODE_NORMAL);
|
||||
|
||||
while (MCAN_OPERATION_MODE_NORMAL != MCAN_getOpMode(MCANA_DRIVER_BASE))
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// This function will configure X-BAR for MCAN interrupts.
|
||||
//
|
||||
static void MCANIntrConfig(void)
|
||||
{
|
||||
|
||||
Interrupt_initModule();
|
||||
Interrupt_initVectorTable();
|
||||
|
||||
Interrupt_register(INT_MCANA_1,&MCANIntr1ISR);
|
||||
Interrupt_enable(INT_MCANA_1);
|
||||
|
||||
Interrupt_enableGlobal();
|
||||
|
||||
}
|
||||
|
||||
//
|
||||
// This is Interrupt Service Routine for MCAN interrupt 1.
|
||||
//
|
||||
__interrupt void MCANIntr1ISR(void)
|
||||
{
|
||||
uint32_t intrStatus;
|
||||
|
||||
intrStatus = MCAN_getIntrStatus(MCANA_DRIVER_BASE);
|
||||
|
||||
//
|
||||
// Clear the interrupt Status.
|
||||
//
|
||||
MCAN_clearIntrStatus(MCANA_DRIVER_BASE, intrStatus);
|
||||
|
||||
//
|
||||
// Clearing the interrupt lineNum
|
||||
//
|
||||
MCAN_clearInterrupt(MCANA_DRIVER_BASE, 0x2);
|
||||
|
||||
//
|
||||
// Check to see if the interrupt is caused by a new message being
|
||||
// received in RX FIFO 1
|
||||
//
|
||||
if((MCAN_INTR_SRC_RX_FIFO1_NEW_MSG & intrStatus) == MCAN_INTR_SRC_RX_FIFO1_NEW_MSG)
|
||||
{
|
||||
MCAN_readMsgRam(MCANA_DRIVER_BASE, MCAN_MEM_TYPE_FIFO, 0U,
|
||||
MCAN_RX_FIFO_NUM_1, &rxMsg1);
|
||||
|
||||
rxMsg[loopCnt] = rxMsg1;
|
||||
RxFS.num = MCAN_RX_FIFO_NUM_1;
|
||||
|
||||
MCAN_writeRxFIFOAck(MCANA_DRIVER_BASE, MCAN_RX_FIFO_NUM_1,
|
||||
RxFS.getIdx);
|
||||
}
|
||||
else
|
||||
{
|
||||
error++;
|
||||
|
||||
//
|
||||
// Interrupt handling for other interrupt sources goes here
|
||||
//
|
||||
|
||||
}
|
||||
|
||||
//
|
||||
// Acknowledge this interrupt located in group 9
|
||||
//
|
||||
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP9);
|
||||
}
|
||||
@@ -0,0 +1,303 @@
|
||||
//#############################################################################
|
||||
//
|
||||
// FILE: mcan_ex9_transmit.c
|
||||
//
|
||||
// TITLE: MCAN External Transmit using Tx Buffer
|
||||
//
|
||||
//! \addtogroup driver_example_c28x_list
|
||||
//! <h1> MCAN External Transmit using Tx Buffer </h1>
|
||||
//!
|
||||
//! This example demonstrates the MCAN External Transmit function. External
|
||||
//! communication is done between two CAN nodes. The receiving node could be
|
||||
//! another MCU or a CAN bus analysis tool capable of Receiving/ACKnowledging
|
||||
//! transmitted frames. The transmit and receive pins of the MCAN module
|
||||
//! should be connected to a CAN Transceiver. Nominal Bit Rate of 500 kbps and
|
||||
//! Data bit rate of 1 Mbps is used.
|
||||
//! Standard Identifier (STD ID) 0x4 is transmitted with 64 data bytes.
|
||||
//! #defines that are not required for this test case have been commented out.
|
||||
//! However, they have been left in the code should the scope of this code
|
||||
//! be expanded to include Receive and FIFO functions.
|
||||
//!
|
||||
//! If another C2000 MCU is used as the receiver, mcan_ex4_receive.c can be
|
||||
//! run on it for the receive function.
|
||||
//!
|
||||
//! \b Hardware \b Required \n
|
||||
//! - A C2000 board with CAN transceiver
|
||||
//!
|
||||
//! \b External \b Connections \n
|
||||
//! Both nodes should communicate through CAN FD capable transceivers.
|
||||
//!
|
||||
//! - MCAN is on DEVICE_GPIO_PIN_CANRXA (MCANRXA)
|
||||
//! - and DEVICE_GPIO_PIN_CANTXA (MCANTXA)
|
||||
//!
|
||||
//! \b Watch \b Variables \n
|
||||
//! - txMsg
|
||||
//!
|
||||
//
|
||||
//#############################################################################
|
||||
//
|
||||
//
|
||||
//
|
||||
// C2000Ware v5.04.00.00
|
||||
//
|
||||
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// $
|
||||
//#############################################################################
|
||||
|
||||
//
|
||||
// Include Files
|
||||
//
|
||||
#include "driverlib.h"
|
||||
#include "device.h"
|
||||
#include "inc/stw_types.h"
|
||||
#include "inc/stw_dataTypes.h"
|
||||
#include <string.h>
|
||||
|
||||
//
|
||||
// Defines.
|
||||
//
|
||||
#define NUM_OF_MSG (1U)
|
||||
#define MCAN_STD_ID_FILTER_NUM (0U)
|
||||
#define MCAN_EXT_ID_FILTER_NUM (0U)
|
||||
#define MCAN_FIFO_0_NUM (0U)
|
||||
#define MCAN_FIFO_0_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_FIFO_1_NUM (0U)
|
||||
#define MCAN_FIFO_1_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_RX_BUFF_NUM (0U)
|
||||
#define MCAN_RX_BUFF_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_TX_BUFF_SIZE (NUM_OF_MSG)
|
||||
#define MCAN_TX_FQ_SIZE (0U)
|
||||
#define MCAN_TX_BUFF_ELEM_SIZE (MCAN_ELEM_SIZE_64BYTES)
|
||||
#define MCAN_TX_EVENT_SIZE (0U)
|
||||
|
||||
//
|
||||
// Defining Starting Addresses for Message RAM Sections,
|
||||
// (Calculated from Macros based on User defined configuration above)
|
||||
//
|
||||
#define MCAN_STD_ID_FILT_START_ADDR (0x0U)
|
||||
#define MCAN_EXT_ID_FILT_START_ADDR (MCAN_STD_ID_FILT_START_ADDR + ((MCAN_STD_ID_FILTER_NUM * MCANSS_STD_ID_FILTER_SIZE_WORDS * 4U)))
|
||||
#define MCAN_FIFO_0_START_ADDR (MCAN_EXT_ID_FILT_START_ADDR + ((MCAN_EXT_ID_FILTER_NUM * MCANSS_EXT_ID_FILTER_SIZE_WORDS * 4U)))
|
||||
#define MCAN_FIFO_1_START_ADDR (MCAN_FIFO_0_START_ADDR + (MCAN_getMsgObjSize(MCAN_FIFO_0_ELEM_SIZE) * 4U * MCAN_FIFO_0_NUM))
|
||||
#define MCAN_RX_BUFF_START_ADDR (MCAN_FIFO_1_START_ADDR + (MCAN_getMsgObjSize(MCAN_FIFO_1_ELEM_SIZE) * 4U * MCAN_FIFO_1_NUM))
|
||||
#define MCAN_TX_BUFF_START_ADDR (MCAN_RX_BUFF_START_ADDR + (MCAN_getMsgObjSize(MCAN_RX_BUFF_ELEM_SIZE) * 4U * MCAN_RX_BUFF_NUM))
|
||||
#define MCAN_TX_EVENT_START_ADDR (MCAN_TX_BUFF_START_ADDR + (MCAN_getMsgObjSize(MCAN_TX_BUFF_ELEM_SIZE) * 4U * (MCAN_TX_BUFF_SIZE + MCAN_TX_FQ_SIZE)))
|
||||
|
||||
|
||||
//
|
||||
// Global Variables.
|
||||
//
|
||||
int32_t error = 0;
|
||||
MCAN_TxBufElement txMsg[NUM_OF_MSG];
|
||||
int32_t loopCnt = 0U;
|
||||
|
||||
//
|
||||
// Function Prototype.
|
||||
//
|
||||
static void MCANConfig(void);
|
||||
|
||||
void main()
|
||||
{
|
||||
int i = 0;
|
||||
volatile uint32_t mode = 0U;
|
||||
uint32_t dataBytes = 64;
|
||||
|
||||
//
|
||||
// Initialize device clock and peripherals
|
||||
//
|
||||
Device_init();
|
||||
|
||||
//
|
||||
// Initialize GPIO and unlock the GPIO configuration registers
|
||||
//
|
||||
Device_initGPIO();
|
||||
|
||||
//
|
||||
// Allocate MCAN (a shared peripheral) to CPU1 (C28x)
|
||||
//
|
||||
SysCtl_allocateSharedPeripheral(SYSCTL_PALLOCATE_MCAN_A,0x0U);
|
||||
|
||||
//
|
||||
// Configure the divisor for the MCAN bit-clock
|
||||
//
|
||||
SysCtl_setMCANClk(SYSCTL_MCANCLK_DIV_5);
|
||||
|
||||
//
|
||||
// Configure GPIO pins for MCANTX/MCANRX operation
|
||||
//
|
||||
GPIO_setPinConfig(DEVICE_GPIO_CFG_MCANRXA);
|
||||
GPIO_setPinConfig(DEVICE_GPIO_CFG_MCANTXA);
|
||||
|
||||
//
|
||||
// Initialize message to transmit.
|
||||
//
|
||||
txMsg[loopCnt].id = ((uint32_t)(0x4)) << 18U; // STDID[28:18]
|
||||
txMsg[loopCnt].rtr = 0U; // RTR = 0 (Data frame)
|
||||
txMsg[loopCnt].xtd = 0U; // XTD = 0 (11-bit standard identifier)
|
||||
txMsg[loopCnt].esi = 0U;
|
||||
txMsg[loopCnt].dlc = 15U; // 64 bytes
|
||||
txMsg[loopCnt].brs = 1U; // Bit-rate switching enabled
|
||||
txMsg[loopCnt].fdf = 1U; // Frame transmitted in CAN FD format
|
||||
txMsg[loopCnt].efc = 1U; // Store TX events
|
||||
txMsg[loopCnt].mm = 0xAAU;
|
||||
txMsg[loopCnt].data[i] = 0x1;
|
||||
for(i = 1; i < dataBytes; i++)
|
||||
{
|
||||
txMsg[loopCnt].data[i] = txMsg[loopCnt].data[i-1] + 1;
|
||||
}
|
||||
i = 0;
|
||||
|
||||
//
|
||||
// Configure the MCAN Module.
|
||||
//
|
||||
MCANConfig();
|
||||
|
||||
//
|
||||
// Write message to Message RAM.
|
||||
//
|
||||
MCAN_writeMsgRam(MCANA_DRIVER_BASE, MCAN_MEM_TYPE_BUF, loopCnt,
|
||||
&txMsg[loopCnt]);
|
||||
|
||||
//
|
||||
// Add transmission request for Tx buffer 0
|
||||
//
|
||||
MCAN_txBufAddReq(MCANA_DRIVER_BASE, 0U);
|
||||
|
||||
//
|
||||
// Wait till the frame is successfully transmitted (and ACKnowledged)
|
||||
// "Tx Buffer Transmission Occurred" register is polled.
|
||||
//
|
||||
while(MCAN_getTxBufReqPend(MCANA_DRIVER_BASE))
|
||||
{
|
||||
}
|
||||
|
||||
//
|
||||
// Stop Application.
|
||||
//
|
||||
asm(" ESTOP0");
|
||||
}
|
||||
|
||||
static void MCANConfig(void)
|
||||
{
|
||||
MCAN_InitParams initParams;
|
||||
MCAN_MsgRAMConfigParams msgRAMConfigParams;
|
||||
MCAN_BitTimingParams bitTimes;
|
||||
|
||||
//
|
||||
// Initializing all structs to zero to prevent stray values
|
||||
//
|
||||
memset(&initParams, 0, sizeof(initParams));
|
||||
memset(&msgRAMConfigParams, 0, sizeof(msgRAMConfigParams));
|
||||
memset(&bitTimes, 0, sizeof(bitTimes));
|
||||
|
||||
//
|
||||
// Initialize MCAN Init parameters.
|
||||
//
|
||||
initParams.fdMode = 0x1U; // FD operation enabled.
|
||||
initParams.brsEnable = 0x1U; // Bit rate switching for
|
||||
// transmissions enabled.
|
||||
|
||||
//
|
||||
// Transmitter Delay Compensation parameters.
|
||||
//
|
||||
initParams.tdcConfig.tdcf = 0xAU;
|
||||
initParams.tdcConfig.tdco = 0x6U;
|
||||
|
||||
//
|
||||
// Initialize Message RAM Sections Configuration Parameters
|
||||
//
|
||||
msgRAMConfigParams.txStartAddr = MCAN_TX_BUFF_START_ADDR;
|
||||
// Tx Buffers Start Address.
|
||||
|
||||
msgRAMConfigParams.txBufNum = MCAN_TX_BUFF_SIZE;
|
||||
// Number of Dedicated Transmit Buffers.
|
||||
|
||||
msgRAMConfigParams.txBufMode = 0U;
|
||||
|
||||
msgRAMConfigParams.txFIFOSize = MCAN_TX_FQ_SIZE;
|
||||
// Number of Tx FIFO or Tx Queue Elements
|
||||
|
||||
msgRAMConfigParams.txBufElemSize = MCAN_TX_BUFF_ELEM_SIZE;
|
||||
// Tx Buffer Element Size.
|
||||
|
||||
//
|
||||
// Initialize bit timings.
|
||||
//
|
||||
bitTimes.nomRatePrescalar = 0x3U; // Nominal Baud Rate Pre-scaler
|
||||
bitTimes.nomTimeSeg1 = 0x9U; // Nominal Time segment before SP
|
||||
bitTimes.nomTimeSeg2 = 0x8U; // Nominal Time segment after SP
|
||||
bitTimes.nomSynchJumpWidth = 0x8U; // Nominal SJW
|
||||
bitTimes.dataRatePrescalar = 0x1U; // Data Baud Rate Pre-scaler
|
||||
bitTimes.dataTimeSeg1 = 0x9U; // Data Time segment before SP
|
||||
bitTimes.dataTimeSeg2 = 0x8U; // Data Time segment after SP
|
||||
bitTimes.dataSynchJumpWidth = 0x8U; // Data SJW
|
||||
//
|
||||
// Wait for memory initialization to happen.
|
||||
//
|
||||
while(FALSE == MCAN_isMemInitDone(MCANA_DRIVER_BASE))
|
||||
{
|
||||
}
|
||||
|
||||
//
|
||||
// Put MCAN in SW initialization mode.
|
||||
//
|
||||
MCAN_setOpMode(MCANA_DRIVER_BASE, MCAN_OPERATION_MODE_SW_INIT);
|
||||
|
||||
//
|
||||
// Wait till MCAN is not initialized.
|
||||
//
|
||||
while (MCAN_OPERATION_MODE_SW_INIT != MCAN_getOpMode(MCANA_DRIVER_BASE))
|
||||
{}
|
||||
|
||||
//
|
||||
// Initialize MCAN module.
|
||||
//
|
||||
MCAN_init(MCANA_DRIVER_BASE, &initParams);
|
||||
|
||||
//
|
||||
// Configure Bit timings.
|
||||
//
|
||||
MCAN_setBitTime(MCANA_DRIVER_BASE, &bitTimes);
|
||||
|
||||
//
|
||||
// Configure Message RAM Sections
|
||||
//
|
||||
MCAN_msgRAMConfig(MCANA_DRIVER_BASE, &msgRAMConfigParams);
|
||||
|
||||
//
|
||||
// Take MCAN out of the SW initialization mode
|
||||
//
|
||||
MCAN_setOpMode(MCANA_DRIVER_BASE, MCAN_OPERATION_MODE_NORMAL);
|
||||
|
||||
while (MCAN_OPERATION_MODE_NORMAL != MCAN_getOpMode(MCANA_DRIVER_BASE))
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
Reference in New Issue
Block a user