Update repo
This commit is contained in:
@@ -0,0 +1,33 @@
|
||||
<projectSpec>
|
||||
<project
|
||||
name="spi_ex1_loopback"
|
||||
device="TMS320F28388D"
|
||||
cgtVersion="22.6.1.LTS"
|
||||
products="sysconfig;C2000WARE"
|
||||
outputFormat="ELF"
|
||||
launchWizard="False"
|
||||
linkerCommandFile=""
|
||||
enableSysConfigTool="true"
|
||||
sysConfigBuildOptions="--product ${C2000WARE_ROOT}/.metadata/sdk.json"
|
||||
postBuildStep="
|
||||
echo "========= Build of the CLB simulation has moved to the CLB Tool. Click the '?' icon by the _Generate CLB Simulation File_ enable for more details (located in the Global Parameters of the Tile Design SysConfig module) ============="
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/dot_file_libraries/clbDotUtility.js" "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/" "${BuildDirectory}/syscfg" "${BuildDirectory}/syscfg/clb.dot"
|
||||
;if ${GENERATE_DIAGRAM} == 1 mkdir "${BuildDirectory}/diagrams"
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/driverlib/.meta/generate_diagrams.js" "${C2000WARE_ROOT}" "${BuildDirectory}/diagrams" "${BuildDirectory}/syscfg"
|
||||
;if ${GUI_SUPPORT} == 1 "${BuildDirectory}/syscfg/gui_setup.bat"
|
||||
"
|
||||
>
|
||||
<configuration name="CPU1_RAM" compilerBuildOptions= "--opt_level=off -I${C2000WARE_ROOT} -v28 -ml -mt --cla_support=cla2 --define=RAM --define=generic_ram_lnk --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs -lboard.cmd.genlibs -ldevice_cmd.cmd.genlibs --define=generic_ram_lnk" />
|
||||
<configuration name="CPU1_FLASH" compilerBuildOptions="--opt_level=off -I${C2000WARE_ROOT} --define=_FLASH --define=generic_flash_lnk -v28 -ml -mt --cla_support=cla2 --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=_FLASH -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs -lboard.cmd.genlibs -ldevice_cmd.cmd.genlibs --define=generic_flash_lnk" />
|
||||
|
||||
<pathVariable name="C2000WARE_ROOT" path="../../../../../../" scope="project" />
|
||||
<pathVariable name="CLB_SYSCFG_ROOT" path="../../../../../../utilities/clb_tool/clb_syscfg/" scope="project" />
|
||||
<pathVariable name="SYSTEMC_INSTALL" path="../../../../../../utilities/clb_tool/clb_syscfg/systemc-2.3.3" scope="project" />
|
||||
<pathVariable name="CLB_SIM_COMPILER" path="C:/TDM-GCC-64/bin" scope="project" />
|
||||
<buildVariable name="CLB_DEBUG" value="0" scope="project" />
|
||||
<buildVariable name="GENERATE_DIAGRAM" value="0" scope="project" />
|
||||
<buildVariable name="GUI_SUPPORT" value="0" scope="project" />
|
||||
<file action="copy" path="../spi_ex1_loopback.c" targetDirectory="" />
|
||||
<file action="copy" path="../spi_ex1_loopback.syscfg" targetDirectory="" />
|
||||
</project>
|
||||
</projectSpec>
|
||||
+33
@@ -0,0 +1,33 @@
|
||||
<projectSpec>
|
||||
<project
|
||||
name="spi_ex2_loopback_fifo_interrupts"
|
||||
device="TMS320F28388D"
|
||||
cgtVersion="22.6.1.LTS"
|
||||
products="sysconfig;C2000WARE"
|
||||
outputFormat="ELF"
|
||||
launchWizard="False"
|
||||
linkerCommandFile=""
|
||||
enableSysConfigTool="true"
|
||||
sysConfigBuildOptions="--product ${C2000WARE_ROOT}/.metadata/sdk.json"
|
||||
postBuildStep="
|
||||
echo "========= Build of the CLB simulation has moved to the CLB Tool. Click the '?' icon by the _Generate CLB Simulation File_ enable for more details (located in the Global Parameters of the Tile Design SysConfig module) ============="
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/dot_file_libraries/clbDotUtility.js" "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/" "${BuildDirectory}/syscfg" "${BuildDirectory}/syscfg/clb.dot"
|
||||
;if ${GENERATE_DIAGRAM} == 1 mkdir "${BuildDirectory}/diagrams"
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/driverlib/.meta/generate_diagrams.js" "${C2000WARE_ROOT}" "${BuildDirectory}/diagrams" "${BuildDirectory}/syscfg"
|
||||
;if ${GUI_SUPPORT} == 1 "${BuildDirectory}/syscfg/gui_setup.bat"
|
||||
"
|
||||
>
|
||||
<configuration name="CPU1_RAM" compilerBuildOptions= "--opt_level=off -I${C2000WARE_ROOT} -v28 -ml -mt --cla_support=cla2 --define=RAM --define=generic_ram_lnk --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs -lboard.cmd.genlibs -ldevice_cmd.cmd.genlibs --define=generic_ram_lnk" />
|
||||
<configuration name="CPU1_FLASH" compilerBuildOptions="--opt_level=off -I${C2000WARE_ROOT} --define=_FLASH --define=generic_flash_lnk -v28 -ml -mt --cla_support=cla2 --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=_FLASH -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs -lboard.cmd.genlibs -ldevice_cmd.cmd.genlibs --define=generic_flash_lnk" />
|
||||
|
||||
<pathVariable name="C2000WARE_ROOT" path="../../../../../../" scope="project" />
|
||||
<pathVariable name="CLB_SYSCFG_ROOT" path="../../../../../../utilities/clb_tool/clb_syscfg/" scope="project" />
|
||||
<pathVariable name="SYSTEMC_INSTALL" path="../../../../../../utilities/clb_tool/clb_syscfg/systemc-2.3.3" scope="project" />
|
||||
<pathVariable name="CLB_SIM_COMPILER" path="C:/TDM-GCC-64/bin" scope="project" />
|
||||
<buildVariable name="CLB_DEBUG" value="0" scope="project" />
|
||||
<buildVariable name="GENERATE_DIAGRAM" value="0" scope="project" />
|
||||
<buildVariable name="GUI_SUPPORT" value="0" scope="project" />
|
||||
<file action="copy" path="../spi_ex2_loopback_fifo_interrupts.c" targetDirectory="" />
|
||||
<file action="copy" path="../spi_ex2_loopback_fifo_interrupts.syscfg" targetDirectory="" />
|
||||
</project>
|
||||
</projectSpec>
|
||||
+33
@@ -0,0 +1,33 @@
|
||||
<projectSpec>
|
||||
<project
|
||||
name="spi_ex3_external_loopback"
|
||||
device="TMS320F28388D"
|
||||
cgtVersion="22.6.1.LTS"
|
||||
products="sysconfig;C2000WARE"
|
||||
outputFormat="ELF"
|
||||
launchWizard="False"
|
||||
linkerCommandFile=""
|
||||
enableSysConfigTool="true"
|
||||
sysConfigBuildOptions="--product ${C2000WARE_ROOT}/.metadata/sdk.json"
|
||||
postBuildStep="
|
||||
echo "========= Build of the CLB simulation has moved to the CLB Tool. Click the '?' icon by the _Generate CLB Simulation File_ enable for more details (located in the Global Parameters of the Tile Design SysConfig module) ============="
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/dot_file_libraries/clbDotUtility.js" "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/" "${BuildDirectory}/syscfg" "${BuildDirectory}/syscfg/clb.dot"
|
||||
;if ${GENERATE_DIAGRAM} == 1 mkdir "${BuildDirectory}/diagrams"
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/driverlib/.meta/generate_diagrams.js" "${C2000WARE_ROOT}" "${BuildDirectory}/diagrams" "${BuildDirectory}/syscfg"
|
||||
;if ${GUI_SUPPORT} == 1 "${BuildDirectory}/syscfg/gui_setup.bat"
|
||||
"
|
||||
>
|
||||
<configuration name="CPU1_RAM" compilerBuildOptions= "--opt_level=off -I${C2000WARE_ROOT} -v28 -ml -mt --cla_support=cla2 --define=RAM --define=generic_ram_lnk --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs -lboard.cmd.genlibs -ldevice_cmd.cmd.genlibs --define=generic_ram_lnk" />
|
||||
<configuration name="CPU1_FLASH" compilerBuildOptions="--opt_level=off -I${C2000WARE_ROOT} --define=_FLASH --define=generic_flash_lnk -v28 -ml -mt --cla_support=cla2 --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=_FLASH -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs -lboard.cmd.genlibs -ldevice_cmd.cmd.genlibs --define=generic_flash_lnk" />
|
||||
|
||||
<pathVariable name="C2000WARE_ROOT" path="../../../../../../" scope="project" />
|
||||
<pathVariable name="CLB_SYSCFG_ROOT" path="../../../../../../utilities/clb_tool/clb_syscfg/" scope="project" />
|
||||
<pathVariable name="SYSTEMC_INSTALL" path="../../../../../../utilities/clb_tool/clb_syscfg/systemc-2.3.3" scope="project" />
|
||||
<pathVariable name="CLB_SIM_COMPILER" path="C:/TDM-GCC-64/bin" scope="project" />
|
||||
<buildVariable name="CLB_DEBUG" value="0" scope="project" />
|
||||
<buildVariable name="GENERATE_DIAGRAM" value="0" scope="project" />
|
||||
<buildVariable name="GUI_SUPPORT" value="0" scope="project" />
|
||||
<file action="copy" path="../spi_ex3_external_loopback.c" targetDirectory="" />
|
||||
<file action="copy" path="../spi_ex3_external_loopback.syscfg" targetDirectory="" />
|
||||
</project>
|
||||
</projectSpec>
|
||||
+33
@@ -0,0 +1,33 @@
|
||||
<projectSpec>
|
||||
<project
|
||||
name="spi_ex4_external_loopback_fifo_interrupts"
|
||||
device="TMS320F28388D"
|
||||
cgtVersion="22.6.1.LTS"
|
||||
products="sysconfig;C2000WARE"
|
||||
outputFormat="ELF"
|
||||
launchWizard="False"
|
||||
linkerCommandFile=""
|
||||
enableSysConfigTool="true"
|
||||
sysConfigBuildOptions="--product ${C2000WARE_ROOT}/.metadata/sdk.json"
|
||||
postBuildStep="
|
||||
echo "========= Build of the CLB simulation has moved to the CLB Tool. Click the '?' icon by the _Generate CLB Simulation File_ enable for more details (located in the Global Parameters of the Tile Design SysConfig module) ============="
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/dot_file_libraries/clbDotUtility.js" "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/" "${BuildDirectory}/syscfg" "${BuildDirectory}/syscfg/clb.dot"
|
||||
;if ${GENERATE_DIAGRAM} == 1 mkdir "${BuildDirectory}/diagrams"
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/driverlib/.meta/generate_diagrams.js" "${C2000WARE_ROOT}" "${BuildDirectory}/diagrams" "${BuildDirectory}/syscfg"
|
||||
;if ${GUI_SUPPORT} == 1 "${BuildDirectory}/syscfg/gui_setup.bat"
|
||||
"
|
||||
>
|
||||
<configuration name="CPU1_RAM" compilerBuildOptions= "--opt_level=off -I${C2000WARE_ROOT} -v28 -ml -mt --cla_support=cla2 --define=RAM --define=generic_ram_lnk --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs -lboard.cmd.genlibs -ldevice_cmd.cmd.genlibs --define=generic_ram_lnk" />
|
||||
<configuration name="CPU1_FLASH" compilerBuildOptions="--opt_level=off -I${C2000WARE_ROOT} --define=_FLASH --define=generic_flash_lnk -v28 -ml -mt --cla_support=cla2 --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=_FLASH -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs -lboard.cmd.genlibs -ldevice_cmd.cmd.genlibs --define=generic_flash_lnk" />
|
||||
|
||||
<pathVariable name="C2000WARE_ROOT" path="../../../../../../" scope="project" />
|
||||
<pathVariable name="CLB_SYSCFG_ROOT" path="../../../../../../utilities/clb_tool/clb_syscfg/" scope="project" />
|
||||
<pathVariable name="SYSTEMC_INSTALL" path="../../../../../../utilities/clb_tool/clb_syscfg/systemc-2.3.3" scope="project" />
|
||||
<pathVariable name="CLB_SIM_COMPILER" path="C:/TDM-GCC-64/bin" scope="project" />
|
||||
<buildVariable name="CLB_DEBUG" value="0" scope="project" />
|
||||
<buildVariable name="GENERATE_DIAGRAM" value="0" scope="project" />
|
||||
<buildVariable name="GUI_SUPPORT" value="0" scope="project" />
|
||||
<file action="copy" path="../spi_ex4_external_loopback_fifo_interrupts.c" targetDirectory="" />
|
||||
<file action="copy" path="../spi_ex4_external_loopback_fifo_interrupts.syscfg" targetDirectory="" />
|
||||
</project>
|
||||
</projectSpec>
|
||||
@@ -0,0 +1,33 @@
|
||||
<projectSpec>
|
||||
<project
|
||||
name="spi_ex5_loopback_dma"
|
||||
device="TMS320F28388D"
|
||||
cgtVersion="22.6.1.LTS"
|
||||
products="sysconfig;C2000WARE"
|
||||
outputFormat="ELF"
|
||||
launchWizard="False"
|
||||
linkerCommandFile=""
|
||||
enableSysConfigTool="true"
|
||||
sysConfigBuildOptions="--product ${C2000WARE_ROOT}/.metadata/sdk.json"
|
||||
postBuildStep="
|
||||
echo "========= Build of the CLB simulation has moved to the CLB Tool. Click the '?' icon by the _Generate CLB Simulation File_ enable for more details (located in the Global Parameters of the Tile Design SysConfig module) ============="
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/dot_file_libraries/clbDotUtility.js" "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/" "${BuildDirectory}/syscfg" "${BuildDirectory}/syscfg/clb.dot"
|
||||
;if ${GENERATE_DIAGRAM} == 1 mkdir "${BuildDirectory}/diagrams"
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/driverlib/.meta/generate_diagrams.js" "${C2000WARE_ROOT}" "${BuildDirectory}/diagrams" "${BuildDirectory}/syscfg"
|
||||
;if ${GUI_SUPPORT} == 1 "${BuildDirectory}/syscfg/gui_setup.bat"
|
||||
"
|
||||
>
|
||||
<configuration name="CPU1_RAM" compilerBuildOptions= "--opt_level=off -I${C2000WARE_ROOT} -v28 -ml -mt --cla_support=cla2 --define=RAM --define=generic_ram_lnk --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs -lboard.cmd.genlibs -ldevice_cmd.cmd.genlibs --define=generic_ram_lnk" />
|
||||
<configuration name="CPU1_FLASH" compilerBuildOptions="--opt_level=off -I${C2000WARE_ROOT} --define=_FLASH --define=generic_flash_lnk -v28 -ml -mt --cla_support=cla2 --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=_FLASH -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs -lboard.cmd.genlibs -ldevice_cmd.cmd.genlibs --define=generic_flash_lnk" />
|
||||
|
||||
<pathVariable name="C2000WARE_ROOT" path="../../../../../../" scope="project" />
|
||||
<pathVariable name="CLB_SYSCFG_ROOT" path="../../../../../../utilities/clb_tool/clb_syscfg/" scope="project" />
|
||||
<pathVariable name="SYSTEMC_INSTALL" path="../../../../../../utilities/clb_tool/clb_syscfg/systemc-2.3.3" scope="project" />
|
||||
<pathVariable name="CLB_SIM_COMPILER" path="C:/TDM-GCC-64/bin" scope="project" />
|
||||
<buildVariable name="CLB_DEBUG" value="0" scope="project" />
|
||||
<buildVariable name="GENERATE_DIAGRAM" value="0" scope="project" />
|
||||
<buildVariable name="GUI_SUPPORT" value="0" scope="project" />
|
||||
<file action="copy" path="../spi_ex5_loopback_dma.c" targetDirectory="" />
|
||||
<file action="copy" path="../spi_ex5_loopback_dma.syscfg" targetDirectory="" />
|
||||
</project>
|
||||
</projectSpec>
|
||||
@@ -0,0 +1,40 @@
|
||||
<projectSpec>
|
||||
<project
|
||||
name="spi_ex6_eeprom"
|
||||
device="TMS320F28388D"
|
||||
cgtVersion="22.6.1.LTS"
|
||||
products="sysconfig;C2000WARE"
|
||||
outputFormat="ELF"
|
||||
launchWizard="False"
|
||||
linkerCommandFile=""
|
||||
enableSysConfigTool="true"
|
||||
sysConfigBuildOptions="--product ${C2000WARE_ROOT}/.metadata/sdk.json --device F2838x --package 337bga --part F2838x_337bga"
|
||||
postBuildStep="
|
||||
echo "========= Build of the CLB simulation has moved to the CLB Tool. Click the '?' icon by the _Generate CLB Simulation File_ enable for more details (located in the Global Parameters of the Tile Design SysConfig module) ============="
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/dot_file_libraries/clbDotUtility.js" "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/" "${BuildDirectory}/syscfg" "${BuildDirectory}/syscfg/clb.dot"
|
||||
;if ${GENERATE_DIAGRAM} == 1 mkdir "${BuildDirectory}/diagrams"
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/driverlib/.meta/generate_diagrams.js" "${C2000WARE_ROOT}" "${BuildDirectory}/diagrams" "${BuildDirectory}/syscfg"
|
||||
"
|
||||
>
|
||||
<configuration name="CPU1_RAM" compilerBuildOptions= "--opt_level=off -I${C2000WARE_ROOT} -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} -v28 -ml -mt --cla_support=cla2 --define=RAM --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=RAM -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs " />
|
||||
<configuration name="CPU1_FLASH" compilerBuildOptions="--opt_level=off -I${C2000WARE_ROOT} -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} --define=_FLASH -v28 -ml -mt --cla_support=cla2 --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=_FLASH -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs " />
|
||||
|
||||
<pathVariable name="C2000WARE_DLIB_ROOT" path="../../../../../../driverlib/f2838x/driverlib/" scope="project" />
|
||||
<pathVariable name="C2000WARE_ROOT" path="../../../../../../" scope="project" />
|
||||
<pathVariable name="CLB_SYSCFG_ROOT" path="../../../../../../utilities/clb_tool/clb_syscfg/" scope="project" />
|
||||
<pathVariable name="SYSTEMC_INSTALL" path="../../../../../../utilities/clb_tool/clb_syscfg/systemc-2.3.3" scope="project" />
|
||||
<pathVariable name="CLB_SIM_COMPILER" path="C:/TDM-GCC-64/bin" scope="project" />
|
||||
<buildVariable name="GENERATE_DIAGRAM" value="0" scope="project" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/include/driverlib.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/include/device.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/source/device.c" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/targetConfigs/TMS320F28388D.ccxml" targetDirectory="targetConfigs" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/cmd/2838x_RAM_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_RAM" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/cmd/2838x_FLASH_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_FLASH" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/source/f2838x_codestartbranch.asm" targetDirectory="device" />
|
||||
<file action="link" path="../../../../../../driverlib/f2838x/driverlib/ccs/Debug/driverlib.lib" targetDirectory="" />
|
||||
<file action="copy" path="../../../../../../driverlib/f2838x/driverlib/" targetDirectory="device" excludeFromBuild="True" />
|
||||
<file action="copy" path="../spi_ex6_eeprom.c" targetDirectory="" />
|
||||
<file action="copy" path="../spi_ex6_eeprom.syscfg" targetDirectory="" />
|
||||
</project>
|
||||
</projectSpec>
|
||||
@@ -0,0 +1,42 @@
|
||||
<projectSpec>
|
||||
<project
|
||||
name="spi_ex7_eeprom_dma"
|
||||
device="TMS320F28388D"
|
||||
cgtVersion="22.6.1.LTS"
|
||||
products="sysconfig;C2000WARE"
|
||||
outputFormat="ELF"
|
||||
launchWizard="False"
|
||||
linkerCommandFile=""
|
||||
enableSysConfigTool="true"
|
||||
sysConfigBuildOptions="--product ${C2000WARE_ROOT}/.metadata/sdk.json --device F2838x --package 337bga --part F2838x_337bga"
|
||||
postBuildStep="
|
||||
echo "========= Build of the CLB simulation has moved to the CLB Tool. Click the '?' icon by the _Generate CLB Simulation File_ enable for more details (located in the Global Parameters of the Tile Design SysConfig module) ============="
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/dot_file_libraries/clbDotUtility.js" "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/" "${BuildDirectory}/syscfg" "${BuildDirectory}/syscfg/clb.dot"
|
||||
;if ${GENERATE_DIAGRAM} == 1 mkdir "${BuildDirectory}/diagrams"
|
||||
;if ${GENERATE_DIAGRAM} == 1 ${NODE_TOOL} "${C2000WARE_ROOT}/driverlib/.meta/generate_diagrams.js" "${C2000WARE_ROOT}" "${BuildDirectory}/diagrams" "${BuildDirectory}/syscfg"
|
||||
"
|
||||
>
|
||||
<configuration name="CPU1_RAM" compilerBuildOptions= "--opt_level=off -I${C2000WARE_ROOT} -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} -v28 -ml -mt --cla_support=cla2 --define=RAM --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=RAM -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs " />
|
||||
<configuration name="CPU1_FLASH" compilerBuildOptions="--opt_level=off -I${C2000WARE_ROOT} -I${PROJECT_ROOT}/device -I${C2000WARE_DLIB_ROOT} --define=_FLASH -v28 -ml -mt --cla_support=cla2 --float_support=fpu64 --tmu_support=tmu0 --define=DEBUG --define=CPU1 --gen_func_subsections=on --diag_warning=225 --diag_suppress=10063" linkerBuildOptions="--entry_point code_start --stack_size=0x3F8 --heap_size=0x200 --define=_FLASH -i${C2000WARE_ROOT} -i${PROJECT_BUILD_DIR}/syscfg -lc2000ware_libraries.cmd.genlibs " />
|
||||
|
||||
<pathVariable name="C2000WARE_DLIB_ROOT" path="../../../../../../driverlib/f2838x/driverlib/" scope="project" />
|
||||
<pathVariable name="C2000WARE_ROOT" path="../../../../../../" scope="project" />
|
||||
<pathVariable name="CLB_SYSCFG_ROOT" path="../../../../../../utilities/clb_tool/clb_syscfg/" scope="project" />
|
||||
<pathVariable name="SYSTEMC_INSTALL" path="../../../../../../utilities/clb_tool/clb_syscfg/systemc-2.3.3" scope="project" />
|
||||
<pathVariable name="CLB_SIM_COMPILER" path="C:/TDM-GCC-64/bin" scope="project" />
|
||||
<buildVariable name="GENERATE_DIAGRAM" value="0" scope="project" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/include/driverlib.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/include/device.h" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/source/device.c" targetDirectory="device" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/targetConfigs/TMS320F28388D.ccxml" targetDirectory="targetConfigs" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/cmd/2838x_RAM_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_RAM" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/cmd/2838x_FLASH_lnk_cpu1.cmd" targetDirectory="" applicableConfigurations="CPU1_FLASH" />
|
||||
<file action="copy" path="../../../../../../device_support/f2838x/common/source/f2838x_codestartbranch.asm" targetDirectory="device" />
|
||||
<file action="link" path="../../../../../../driverlib/f2838x/driverlib/ccs/Debug/driverlib.lib" targetDirectory="" />
|
||||
<file action="copy" path="../../../../../../driverlib/f2838x/driverlib/" targetDirectory="device" excludeFromBuild="True" />
|
||||
<file action="copy" path="../spi_ex7_eeprom_dma.c" targetDirectory="" />
|
||||
<file action="copy" path="../spi_DMA.c" targetDirectory="" />
|
||||
<file action="copy" path="../spi_DMA.h" targetDirectory="" />
|
||||
<file action="copy" path="../spi_ex7_eeprom_dma.syscfg" targetDirectory="" />
|
||||
</project>
|
||||
</projectSpec>
|
||||
@@ -0,0 +1,483 @@
|
||||
//#############################################################################
|
||||
//
|
||||
// FILE: spi_DMA.c
|
||||
//
|
||||
// TITLE: C28x-SPI source file when using DMA with SPI
|
||||
// <h1> C28x-SPI source file when using DMA with SPI </h1>
|
||||
//
|
||||
//#############################################################################
|
||||
//
|
||||
//
|
||||
//
|
||||
// C2000Ware v5.04.00.00
|
||||
//
|
||||
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// $
|
||||
//#############################################################################
|
||||
|
||||
|
||||
//
|
||||
// Included Files
|
||||
//
|
||||
#include "driverlib.h"
|
||||
#include "device.h"
|
||||
|
||||
#include "spi_DMA.h"
|
||||
|
||||
//Global variables
|
||||
uint16_t DMATXbuff[BUFFER_SIZE + ADDL_WORDS];
|
||||
uint16_t DMARXbuff[BUFFER_SIZE + ADDL_WORDS]; // Additional buffer space to
|
||||
// hold response data
|
||||
|
||||
#pragma DATA_SECTION(DMATXbuff, "ramgs0"); // map the TX data to memory
|
||||
#pragma DATA_SECTION(DMARXbuff, "ramgs0"); // map the RX data to memory
|
||||
|
||||
struct SPI_DMA_handle SPI_DMA_Handle;
|
||||
|
||||
struct DMA_CH SPITXDMA;
|
||||
struct DMA_CH SPIRXDMA;
|
||||
|
||||
|
||||
void SPI_DMA_ByteTransaction(uint16_t data, struct SPI_DMA_handle *pSPI_DMA_Handle)
|
||||
{
|
||||
//wordSize for a byte is 8 (because 1 byte = 8 bits)
|
||||
uint16_t wordSize = 8U;
|
||||
ASSERT(data < (1<<wordSize));
|
||||
|
||||
//Fill the TXbuffer with data to be transmitted
|
||||
uint16_t *pbuffer = pSPI_DMA_Handle->pSPITXDMA->pbuffer;
|
||||
uint16_t currentpointer = pSPI_DMA_Handle->pSPITXDMA->currentpointer;
|
||||
|
||||
pbuffer[currentpointer++] = data;
|
||||
|
||||
pSPI_DMA_Handle->pSPITXDMA->currentpointer = currentpointer;
|
||||
}
|
||||
|
||||
|
||||
void SPI_DMA_NBytesTransaction(uint16_t *pTXbuffer, uint16_t numOfbytes, struct SPI_DMA_handle *pSPI_DMA_Handle)
|
||||
{
|
||||
uint16_t *pbuffer = pSPI_DMA_Handle->pSPITXDMA->pbuffer;
|
||||
uint16_t currentpointer = pSPI_DMA_Handle->pSPITXDMA->currentpointer;
|
||||
|
||||
uint16_t i=0;
|
||||
for(i=0;i<numOfbytes;i++)
|
||||
{
|
||||
if(pTXbuffer == NULL)
|
||||
{
|
||||
//Fill the TXbuffer with dummy data to be transmitted
|
||||
//Here the dummy data is 0xFFFF
|
||||
pbuffer[currentpointer++] = 0xFFFF;
|
||||
}
|
||||
else
|
||||
{
|
||||
//Fill the TXbuffer
|
||||
pbuffer[currentpointer++] = pTXbuffer[i];
|
||||
}
|
||||
}
|
||||
|
||||
pSPI_DMA_Handle->pSPITXDMA->currentpointer = currentpointer;
|
||||
}
|
||||
|
||||
void SPI_DMA_16bitWordTransaction(uint16_t data, struct SPI_DMA_handle *pSPI_DMA_Handle)
|
||||
{
|
||||
//wordSize is 16
|
||||
uint16_t wordSize = 16U;
|
||||
ASSERT(data < ((uint32_t)1<<wordSize));
|
||||
|
||||
//Fill the TXbuffer with data to be transmitted
|
||||
uint16_t *pbuffer = pSPI_DMA_Handle->pSPITXDMA->pbuffer;
|
||||
uint16_t currentpointer = pSPI_DMA_Handle->pSPITXDMA->currentpointer;
|
||||
|
||||
pbuffer[currentpointer++] = (data & 0xFF00) >> 8;
|
||||
pbuffer[currentpointer++] = (data & 0xFF);
|
||||
|
||||
pSPI_DMA_Handle->pSPITXDMA->currentpointer = currentpointer;
|
||||
}
|
||||
|
||||
void SPI_DMA_24bitWordTransaction(uint32_t data, struct SPI_DMA_handle *pSPI_DMA_Handle)
|
||||
{
|
||||
//wordSize is 24
|
||||
uint16_t wordSize = 24U;
|
||||
ASSERT(data < ((uint32_t)1<<wordSize));
|
||||
|
||||
//Fill the TXbuffer with data to be transmitted
|
||||
uint16_t *pbuffer = pSPI_DMA_Handle->pSPITXDMA->pbuffer;
|
||||
uint16_t currentpointer = pSPI_DMA_Handle->pSPITXDMA->currentpointer;
|
||||
|
||||
pbuffer[currentpointer++] = (data & 0xFF0000) >> 16U;
|
||||
pbuffer[currentpointer++] = (data & 0x00FF00) >> 8U;
|
||||
pbuffer[currentpointer++] = (data & 0x0000FF);
|
||||
|
||||
pSPI_DMA_Handle->pSPITXDMA->currentpointer = currentpointer;
|
||||
}
|
||||
|
||||
void SPI_DMA_StartTransaction(struct SPI_DMA_handle *pSPI_DMA_Handle, uint16_t charlength, uint16_t txdly)
|
||||
{
|
||||
uint16_t i = 0;
|
||||
ASSERT((charlength >= 1U) && (charlength <= 16U));
|
||||
|
||||
pSPI_DMA_Handle->TransactionStatus = SPI_DMA_TRANSACTION_STARTED;
|
||||
|
||||
uint32_t spibase = pSPI_DMA_Handle->spibase;
|
||||
uint32_t dmaTXbase = pSPI_DMA_Handle->pSPITXDMA->dmach;
|
||||
uint32_t dmaRXbase = pSPI_DMA_Handle->pSPIRXDMA->dmach;
|
||||
uint16_t *pTXbuffer = pSPI_DMA_Handle->pSPITXDMA->pbuffer;
|
||||
uint16_t *pRXbuffer = pSPI_DMA_Handle->pSPIRXDMA->pbuffer;
|
||||
uint16_t currentpointer = pSPI_DMA_Handle->pSPITXDMA->currentpointer;
|
||||
|
||||
ASSERT(SPI_isBaseValid(spibase));
|
||||
|
||||
uint16_t maxTransactionSize = currentpointer;
|
||||
pSPI_DMA_Handle->pSPITXDMA->maxTransactionSize = maxTransactionSize;
|
||||
|
||||
/********************************************************************************/
|
||||
// SPI configuration
|
||||
/********************************************************************************/
|
||||
|
||||
uint16_t TXbuff_pos = 0;
|
||||
|
||||
for(i=1;i<=maxTransactionSize;i++)
|
||||
{
|
||||
pTXbuffer[TXbuff_pos] = pTXbuffer[TXbuff_pos] << (16 - charlength);
|
||||
|
||||
TXbuff_pos++;
|
||||
}
|
||||
|
||||
//Reset the TX / RX FIFO buffers to default state
|
||||
SPI_disableFIFO(spibase); //Disable FIFO register
|
||||
SPI_enableFIFO(spibase); //Enable FIFO register
|
||||
|
||||
//Configure the FIFO Transmit Delay
|
||||
SPI_setTxFifoTransmitDelay(spibase, txdly);
|
||||
|
||||
uint16_t burst_size = 0;
|
||||
uint16_t transfer_size = 1;
|
||||
|
||||
//Determine the number of 16-level words from number of words to be transmitted / received
|
||||
uint16_t numofSixteenWords = maxTransactionSize / SPI_FIFO_TXFULL;
|
||||
//Determine the number of remaining words from number of words to be transmitted / received
|
||||
uint16_t remainingWords = maxTransactionSize % SPI_FIFO_TXFULL;
|
||||
|
||||
if(numofSixteenWords)
|
||||
{
|
||||
SPI_setFIFOInterruptLevel(spibase, SPI_FIFO_TXEMPTY, SPI_FIFO_RXFULL);
|
||||
burst_size = 16U;
|
||||
transfer_size = numofSixteenWords;
|
||||
}
|
||||
else
|
||||
{
|
||||
SPI_setFIFOInterruptLevel(spibase, SPI_FIFO_TXEMPTY, (SPI_RxFIFOLevel)remainingWords);
|
||||
burst_size = remainingWords;
|
||||
transfer_size = 1;
|
||||
}
|
||||
|
||||
SPI_enableInterrupt(spibase, SPI_INT_RXFF);
|
||||
|
||||
// Initialize DMA
|
||||
DMA_initController();
|
||||
|
||||
/********************************************************************************/
|
||||
// DMA TX Channel configuration
|
||||
/********************************************************************************/
|
||||
ASSERT(DMA_isBaseValid(dmaTXbase));
|
||||
|
||||
uint32_t dmaTX_IntNum = selectDMA_PIE_Interrupt(dmaTXbase);
|
||||
Interrupt_register(dmaTX_IntNum, &dmaTXISR);
|
||||
|
||||
uint16_t *psrcAddr = pTXbuffer;
|
||||
uint16_t *pdestAddr = (uint16_t *)(spibase + SPI_O_TXBUF);
|
||||
|
||||
DMA_configAddresses(dmaTXbase, pdestAddr, psrcAddr);
|
||||
DMA_configBurst(dmaTXbase, burst_size, 1, 0);
|
||||
DMA_configTransfer(dmaTXbase, transfer_size, 1, 0);
|
||||
DMA_configMode(dmaTXbase, DMA_TRIGGER_SOFTWARE, DMA_CFG_ONESHOT_DISABLE | DMA_CFG_CONTINUOUS_ENABLE |
|
||||
DMA_CFG_SIZE_16BIT);
|
||||
|
||||
|
||||
DMA_setEmulationMode(DMA_EMULATION_FREE_RUN);
|
||||
|
||||
// DMA SW trigger to start SPI transaction using DMA
|
||||
DMA_enableTrigger(dmaTXbase);
|
||||
|
||||
/********************************************************************************/
|
||||
// DMA RX Channel configuration
|
||||
/********************************************************************************/
|
||||
ASSERT(DMA_isBaseValid(dmaRXbase));
|
||||
|
||||
uint32_t dmaRX_IntNum = selectDMA_PIE_Interrupt(dmaRXbase);
|
||||
Interrupt_register(dmaRX_IntNum, &dmaRXISR);
|
||||
|
||||
psrcAddr = (uint16_t *)(spibase + SPI_O_RXBUF);
|
||||
pdestAddr = pRXbuffer;
|
||||
|
||||
//Enable RXFIFO interrupt to ensure DMA RX channel is triggered
|
||||
SPI_enableInterrupt(spibase, SPI_INT_RXFF);
|
||||
|
||||
DMA_configAddresses(dmaRXbase, pdestAddr, psrcAddr);
|
||||
DMA_configBurst(dmaRXbase, BURST, 0, 1);
|
||||
DMA_configTransfer(dmaRXbase, TRANSFER, 0, 1);
|
||||
DMA_configMode(dmaRXbase, DMA_TRIGGER_SPIARX, DMA_CFG_ONESHOT_DISABLE |
|
||||
DMA_CFG_CONTINUOUS_ENABLE | DMA_CFG_SIZE_16BIT);
|
||||
|
||||
//
|
||||
// Configure DMA RX interrupts
|
||||
//
|
||||
DMA_setInterruptMode(dmaRXbase, DMA_INT_AT_END);
|
||||
DMA_enableInterrupt(dmaRXbase);
|
||||
DMA_enableTrigger(dmaRXbase);
|
||||
|
||||
|
||||
pSPI_DMA_Handle->pSPITXDMA->currentpointer = burst_size;
|
||||
pSPI_DMA_Handle->pSPIRXDMA->currentpointer = burst_size;
|
||||
|
||||
//Chip select pulled LOW
|
||||
CS_LOW;
|
||||
//DMA SW trigger to initiate SPI transaction
|
||||
DMA_forceTrigger(dmaTXbase);
|
||||
|
||||
}
|
||||
|
||||
//
|
||||
// Function used to select correct dma channel based base address provided
|
||||
//
|
||||
uint32_t selectDMA_PIE_Interrupt(uint32_t dmachbase)
|
||||
{
|
||||
|
||||
uint32_t DMA_Channel = 0;
|
||||
|
||||
switch(dmachbase)
|
||||
{
|
||||
case DMA_CH1_BASE:
|
||||
DMA_startChannel(DMA_CH1_BASE);
|
||||
DMA_Channel = INT_DMA_CH1;
|
||||
Interrupt_enable(DMA_Channel);
|
||||
break;
|
||||
|
||||
case DMA_CH2_BASE:
|
||||
DMA_startChannel(DMA_CH2_BASE);
|
||||
DMA_Channel = INT_DMA_CH2;
|
||||
Interrupt_enable(DMA_Channel);
|
||||
break;
|
||||
|
||||
case DMA_CH3_BASE:
|
||||
DMA_startChannel(DMA_CH3_BASE);
|
||||
DMA_Channel = INT_DMA_CH3;
|
||||
Interrupt_enable(DMA_Channel);
|
||||
break;
|
||||
|
||||
case DMA_CH4_BASE:
|
||||
DMA_startChannel(DMA_CH4_BASE);
|
||||
DMA_Channel = INT_DMA_CH4;
|
||||
Interrupt_enable(DMA_Channel);
|
||||
break;
|
||||
|
||||
case DMA_CH5_BASE:
|
||||
DMA_startChannel(DMA_CH5_BASE);
|
||||
DMA_Channel = INT_DMA_CH5;
|
||||
Interrupt_enable(DMA_Channel);
|
||||
break;
|
||||
|
||||
case DMA_CH6_BASE:
|
||||
DMA_startChannel(DMA_CH6_BASE);
|
||||
DMA_Channel = INT_DMA_CH6;
|
||||
Interrupt_enable(DMA_Channel);
|
||||
break;
|
||||
}
|
||||
|
||||
return(DMA_Channel);
|
||||
}
|
||||
|
||||
//
|
||||
// DMA TX ISR
|
||||
// Not used in this example.
|
||||
//
|
||||
__interrupt void dmaTXISR(void)
|
||||
{
|
||||
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP7);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
//
|
||||
// DMA RX ISR
|
||||
//
|
||||
__interrupt void dmaRXISR(void)
|
||||
{
|
||||
uint32_t spibase = SPI_DMA_Handle.spibase;
|
||||
uint32_t dmaTXbase = SPI_DMA_Handle.pSPITXDMA->dmach;
|
||||
uint32_t dmaRXbase = SPI_DMA_Handle.pSPIRXDMA->dmach;
|
||||
|
||||
uint16_t remainingWords = SPI_DMA_Handle.pSPITXDMA->maxTransactionSize - SPI_DMA_Handle.pSPITXDMA->currentpointer;
|
||||
|
||||
uint16_t burst_size = 0;
|
||||
|
||||
uint16_t srcAddr = HWREGH(dmaTXbase + DMA_O_SRC_ADDR_ACTIVE);
|
||||
uint16_t destAddr = HWREGH(dmaRXbase + DMA_O_DST_ADDR_ACTIVE);
|
||||
|
||||
DMA_configSourceAddress(dmaTXbase, (const void *)srcAddr);
|
||||
DMA_configDestAddress(dmaRXbase, (const void *)destAddr);
|
||||
|
||||
//If the remainingWords is non-zero and less than FIFO level (16U), then reconfigure
|
||||
//DMA burst and RX FIFO level
|
||||
if(remainingWords > 0 && remainingWords < 16)
|
||||
{
|
||||
burst_size = remainingWords;
|
||||
SPI_DMA_Handle.pSPITXDMA->currentpointer += remainingWords;
|
||||
|
||||
SPI_setFIFOInterruptLevel(spibase, SPI_FIFO_TXEMPTY, (SPI_RxFIFOLevel)remainingWords);
|
||||
DMA_configBurst(dmaTXbase, burst_size, 1, 0);
|
||||
DMA_configBurst(dmaRXbase, burst_size, 0, 1);
|
||||
|
||||
}
|
||||
if(remainingWords >= 16)
|
||||
{
|
||||
SPI_DMA_Handle.pSPITXDMA->currentpointer += 16U;
|
||||
}
|
||||
//If no remainingWords, pull chip select high and stop DMA CH6
|
||||
if(remainingWords == 0)
|
||||
{
|
||||
CS_HIGH; //Chip select pulled high
|
||||
|
||||
//Reset currentpointer for both TX / RX
|
||||
SPI_DMA_Handle.pSPITXDMA->currentpointer = 0;
|
||||
SPI_DMA_Handle.pSPIRXDMA->currentpointer = 0;
|
||||
|
||||
//Stop both TX / RX DMA channels
|
||||
DMA_stopChannel(dmaTXbase);
|
||||
DMA_stopChannel(dmaRXbase);
|
||||
|
||||
//Increment function pointer to execute next function
|
||||
SPI_DMA_Handle.FunctionCount++;
|
||||
if(SPI_DMA_Handle.TransactionType == SPI_DMA_READ_STATUS_REGISTER)
|
||||
{
|
||||
//Execute the same function until we received expected output
|
||||
if(SPI_DMA_Handle.pSPIRXDMA->pbuffer[SPI_DMA_Handle.offsetRXbuff] != SPI_DMA_Handle.expectedOutput)
|
||||
{
|
||||
SPI_DMA_Handle.FunctionCount--;
|
||||
}
|
||||
}
|
||||
|
||||
if(SPI_DMA_Handle.TransactionType == SPI_DMA_READ_TRANSACTION)
|
||||
{
|
||||
uint16_t numRXbytes = SPI_DMA_Handle.pSPITXDMA->maxTransactionSize - SPI_DMA_Handle.offsetRXbuff;
|
||||
|
||||
int16_t i = numRXbytes-1;
|
||||
uint16_t *pReceiveBuffer = SPI_DMA_Handle.pSPIRXDMA->pbuffer + SPI_DMA_Handle.offsetRXbuff;
|
||||
SPI_DMA_Handle.pSPIRXDMA->pbuffer = pReceiveBuffer;
|
||||
|
||||
//When the number of RXbytes is less than 4
|
||||
//package data into RX data based on endianess
|
||||
while(i>=0 && numRXbytes<=4)
|
||||
{
|
||||
if(SPI_DMA_Handle.endianess == SPI_DATA_BIG_ENDIAN)
|
||||
{
|
||||
SPI_DMA_Handle.RXdata |= (uint32_t)pReceiveBuffer[i] << (i * SPI_DMA_Handle.charlength);
|
||||
}
|
||||
else
|
||||
{
|
||||
SPI_DMA_Handle.RXdata |= (uint32_t)pReceiveBuffer[numRXbytes-i-1] << (i * SPI_DMA_Handle.charlength);
|
||||
}
|
||||
i--;
|
||||
}
|
||||
}
|
||||
|
||||
//If function pointer in not equal to NULL.
|
||||
//Execute next function
|
||||
if(SPI_DMA_Handle.pFunction[SPI_DMA_Handle.FunctionCount] != NULL)
|
||||
{
|
||||
SPI_DMA_Handle.pFunction[SPI_DMA_Handle.FunctionCount]();
|
||||
}
|
||||
else
|
||||
{
|
||||
SPI_DMA_Handle.TransactionStatus = SPI_DMA_TRANSACTION_COMPLETE;
|
||||
}
|
||||
}
|
||||
else
|
||||
{ //We still have remaining transactions
|
||||
DMA_forceTrigger(dmaTXbase);
|
||||
}
|
||||
|
||||
//Acknowledge CPU interrupt flag
|
||||
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP7);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
//
|
||||
// Function used to update SPI_DMA_Handle function pointer
|
||||
// and start executing first function in function pointer array
|
||||
//
|
||||
void RunCommandSequence(functionPointer *pFunction)
|
||||
{
|
||||
SPI_DMA_Handle.FunctionCount = 0;
|
||||
|
||||
uint16_t i;
|
||||
//Fill function pointer array in SPI_DMA_Handle
|
||||
for(i=0;i<5U;i++)
|
||||
{
|
||||
SPI_DMA_Handle.pFunction[i] = *pFunction[i];
|
||||
}
|
||||
|
||||
//Execute the first function in function pointer array
|
||||
SPI_DMA_Handle.pFunction[0]();
|
||||
}
|
||||
|
||||
//
|
||||
// Function used to update SPI_DMA_Handle parameters
|
||||
//
|
||||
void setupSPI_DMA_Handler(uint32_t spibase, uint16_t charlength, uint32_t dmaTXbase, uint32_t dmaRXbase)
|
||||
{
|
||||
|
||||
///////////////////////////////////////////
|
||||
// SPI configuration //
|
||||
///////////////////////////////////////////
|
||||
SPI_DMA_Handle.spibase = spibase;
|
||||
SPI_DMA_Handle.charlength = charlength;
|
||||
SPI_DMA_Handle.pSPITXDMA = &SPITXDMA;
|
||||
SPI_DMA_Handle.pSPIRXDMA = &SPIRXDMA;
|
||||
|
||||
///////////////////////////////////////////
|
||||
// DMA Transmit channel configuration //
|
||||
///////////////////////////////////////////
|
||||
SPITXDMA.dmach = dmaTXbase;
|
||||
SPITXDMA.pbuffer = &DMATXbuff[0];
|
||||
SPITXDMA.currentpointer = 0;
|
||||
|
||||
///////////////////////////////////////////
|
||||
// DMA Receive channel configuration //
|
||||
///////////////////////////////////////////
|
||||
SPIRXDMA.dmach = dmaRXbase;
|
||||
SPIRXDMA.pbuffer = &DMARXbuff[0];
|
||||
SPIRXDMA.currentpointer = 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
@@ -0,0 +1,239 @@
|
||||
//#############################################################################
|
||||
//
|
||||
// FILE: spi_DMA.h
|
||||
//
|
||||
// TITLE: C28x-SPI header file when using DMA with SPI
|
||||
//
|
||||
//#############################################################################
|
||||
//
|
||||
//
|
||||
//
|
||||
// C2000Ware v5.04.00.00
|
||||
//
|
||||
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// $
|
||||
//#############################################################################
|
||||
|
||||
|
||||
//
|
||||
// Included Files
|
||||
//
|
||||
#include<stdarg.h>
|
||||
#include "driverlib.h"
|
||||
#include "device.h"
|
||||
|
||||
#include "board.h"
|
||||
|
||||
#ifndef SPI_DMA_H
|
||||
#define SPI_DMA_H
|
||||
|
||||
//
|
||||
// Defines
|
||||
//
|
||||
#define EEPROM_ADDR 0x0000
|
||||
|
||||
#define FIFO_LVL 16 // FIFO interrupt level
|
||||
#define BURST 16 // 16 words / burst
|
||||
#define TRANSFER 1 // 4 burts / transfer
|
||||
|
||||
|
||||
#define NULL ((void *)0x0)
|
||||
|
||||
//
|
||||
// Defines for Chip Select toggle.
|
||||
//
|
||||
#define CS_LOW GPIO_writePin(SPI_CS_GPIO, 0)
|
||||
#define CS_HIGH GPIO_writePin(SPI_CS_GPIO, 1)
|
||||
|
||||
typedef enum
|
||||
{
|
||||
SPI_DMA_TRANSACTION_IDLE = 0x0000,
|
||||
SPI_DMA_TRANSACTION_STARTED = 0x0BAD,
|
||||
SPI_DMA_TRANSACTION_COMPLETE = 0x55AA,
|
||||
}SPI_TransactionStatus;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
SPI_DMA_WRITE_ENABLE = 0x0000,
|
||||
SPI_DMA_READ_STATUS_REGISTER = 0x0001,
|
||||
SPI_DMA_WRITE_TRANSACTION = 0x0002,
|
||||
SPI_DMA_READ_TRANSACTION = 0x0003,
|
||||
}SPI_TransactionType;
|
||||
|
||||
#define BUFFER_SIZE 64
|
||||
#define ADDL_WORDS 10
|
||||
|
||||
#define DUMMY_DATA 0xFF
|
||||
#define NO_DELAY 0
|
||||
|
||||
|
||||
extern uint16_t DMATXbuff[BUFFER_SIZE + ADDL_WORDS];
|
||||
extern uint16_t DMARXbuff[BUFFER_SIZE + ADDL_WORDS];
|
||||
|
||||
extern struct DMA_CH SPITXDMA;
|
||||
extern struct DMA_CH SPIRXDMA;
|
||||
|
||||
struct DMA_CH
|
||||
{
|
||||
uint32_t dmach;
|
||||
uint16_t *pbuffer;
|
||||
uint16_t currentpointer;
|
||||
uint16_t maxTransactionSize;
|
||||
};
|
||||
|
||||
|
||||
typedef void (*functionPointer)(void);
|
||||
|
||||
struct SPI_DMA_handle
|
||||
{
|
||||
uint32_t spibase; //Specifies SPI base address
|
||||
uint16_t charlength; //Specifies SPI character length
|
||||
struct DMA_CH *pSPITXDMA; //Pointer to SPITXDMA
|
||||
struct DMA_CH *pSPIRXDMA; //Pointer to SPIRXDMA
|
||||
|
||||
|
||||
functionPointer pFunction[5U]; //Array of function pointer which executes
|
||||
//different command sequence
|
||||
uint16_t FunctionCount; //Counter which specifies which function
|
||||
//command sequence
|
||||
SPI_TransactionType TransactionType; //Stores the type of EEPROM transaction
|
||||
SPI_TransactionStatus TransactionStatus;//Stores the status of SPI transaction
|
||||
|
||||
uint16_t expectedOutput; //Output expected from EEPROM
|
||||
uint16_t offsetRXbuff; //Offset pointer for RXbuffer
|
||||
uint32_t RXdata; //Stores received data
|
||||
SPI_endianess endianess; //Stores endianess of transaction
|
||||
};
|
||||
|
||||
struct EEPROM_Transaction
|
||||
{
|
||||
uint16_t EEPROMAddress;
|
||||
uint16_t numofBytes;
|
||||
uint16_t *pbuff;
|
||||
};
|
||||
|
||||
extern struct SPI_DMA_handle SPI_DMA_Handle;
|
||||
extern struct EEPROM_Transaction EEPROM_Transaction;
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//! This macro can be used to fill up the transmit buffer to transmit a byte.
|
||||
//!
|
||||
//! \param data specifies the data to be transmitted
|
||||
//! \param pSPI_DMA_Handle specifies SPI / DMA transaction parameters
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define SPI_DMA_TransmitByte(data, pSPI_DMA_Handle) SPI_DMA_ByteTransaction(data, pSPI_DMA_Handle)
|
||||
|
||||
//*****************************************************************************
|
||||
//! This macro can be used to fill up the transmit buffer to transmit 16-bits
|
||||
//!
|
||||
//! \param data specifies the data to be transmitted
|
||||
//! \param pSPI_DMA_Handle specifies SPI / DMA transaction parameters
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define SPI_DMA_Transmit16bitWord(data, pSPI_DMA_Handle) SPI_DMA_16bitWordTransaction(data, pSPI_DMA_Handle)
|
||||
|
||||
//*****************************************************************************
|
||||
//! This macro can be used to fill up the transmit buffer to transmit N-bytes
|
||||
//!
|
||||
//! \param pTXbuffer specifies the start address of transmit buffer
|
||||
//! \param numOfbytes specifies the number of bytes to be transmitted
|
||||
//! \param pSPI_DMA_Handle specifies SPI / DMA transaction parameters
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define SPI_DMA_Transmit_NBytes(pTXbuffer, numOfbytes, pSPI_DMA_Handle) SPI_DMA_NBytesTransaction(pTXbuffer, numOfbytes, pSPI_DMA_Handle)
|
||||
|
||||
#define SPI_DMA_ReceiveByte(dummyData, pSPI_DMA_Handle) SPI_DMA_ByteTransaction(dummyData, pSPI_DMA_Handle)
|
||||
#define SPI_DMA_Receive16bitWord(dummydata, pSPI_DMA_Handle) SPI_DMA_16bitWordTransaction(dummydata, pSPI_DMA_Handle)
|
||||
|
||||
//*****************************************************************************
|
||||
//! This macro can be used to receive N-bytes
|
||||
//!
|
||||
//! \param numOfbytes specifies the number of bytes to be transmitted
|
||||
//! \param pSPI_DMA_Handle specifies SPI / DMA transaction parameters
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define SPI_DMA_Receive_NBytes(numOfbytes, pSPI_DMA_Handle) SPI_DMA_NBytesTransaction(NULL, numOfbytes, pSPI_DMA_Handle)
|
||||
|
||||
|
||||
extern void SPI_DMA_ByteTransaction(uint16_t data, struct SPI_DMA_handle *pSPI_DMA_Handle);
|
||||
extern void SPI_DMA_16bitWordTransaction(uint16_t data, struct SPI_DMA_handle *pSPI_DMA_Handle);
|
||||
|
||||
//*****************************************************************************
|
||||
//! This function can be used to configure SPI_DMA_Handle structure
|
||||
//!
|
||||
//! \param spibase specifies the SPI module base address.
|
||||
//! \param endianess specifies whether endianess of received data
|
||||
//! \param charlength specifies character length of SPI transaction
|
||||
//! \param dmaTXbase specifies the DMA base address to act DMA TX channel
|
||||
//! \param dmaRXbase specifies the DMA base address to act DMA RX channel
|
||||
//!
|
||||
//! SPI_DMA_Handle configuration made by this function are:
|
||||
//! 1) SPI module, DMA TX / RX channel
|
||||
//! 2) Reset current pointer for TX / RX transaction
|
||||
//! 3) Configure TXbuff and RXbuff
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void setupSPI_DMA_Handler(uint32_t spibase, uint16_t charlength, uint32_t dmaTXbase, uint32_t dmaRXbase);
|
||||
|
||||
//*****************************************************************************
|
||||
//! This function configures DMA / SPI based on pSPI_DMA_Handle and starts
|
||||
//! SPI transaction using DMA
|
||||
//!
|
||||
//! \param pSPI_DMA_Handle specifies the SPI module base address.
|
||||
//! \param charLength specifies the SPI character length
|
||||
//! \param txDelay specifies the number of serial clock cycles delay time after
|
||||
//! completion of perious word
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void SPI_DMA_StartTransaction(struct SPI_DMA_handle *pSPI_DMA_Handle, uint16_t charlength, uint16_t txdly);
|
||||
extern void SPI_DMA_NBytesTransaction(uint16_t *pTXbuffer, uint16_t numOfbytes, struct SPI_DMA_handle *pSPI_DMA_Handle);
|
||||
extern uint32_t selectDMA_PIE_Interrupt(uint32_t dmabase);
|
||||
|
||||
extern void RunCommandSequence(functionPointer *pFunction);
|
||||
|
||||
__interrupt void dmaTXISR(void);
|
||||
__interrupt void dmaRXISR(void);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,143 @@
|
||||
//#############################################################################
|
||||
//
|
||||
// FILE: spi_ex1_loopback.c
|
||||
//
|
||||
// TITLE: SPI Digital Loopback
|
||||
//
|
||||
//! \addtogroup driver_example_list
|
||||
//! <h1>SPI Digital Loopback</h1>
|
||||
//!
|
||||
//! This program uses the internal loopback test mode of the SPI module. This
|
||||
//! is a very basic loopback that does not use the FIFOs or interrupts. A
|
||||
//! stream of data is sent and then compared to the received stream.
|
||||
//! The pinmux and SPI modules are configure through the sysconfig file.
|
||||
//!
|
||||
//! The sent data looks like this: \n
|
||||
//! 0000 0001 0002 0003 0004 0005 0006 0007 .... FFFE FFFF 0000
|
||||
//!
|
||||
//! This pattern is repeated forever.
|
||||
//!
|
||||
//! \note This example project has support for migration across our C2000
|
||||
//! device families. If you are wanting to build this project from launchpad
|
||||
//! or controlCARD, please specify in the .syscfg file the board you're using.
|
||||
//! At any time you can select another device to migrate this example.
|
||||
//!
|
||||
//! \b External \b Connections \n
|
||||
//! - None
|
||||
//!
|
||||
//! \b Watch \b Variables \n
|
||||
//! - \b sData - Data to send
|
||||
//! - \b rData - Received data
|
||||
//!
|
||||
//
|
||||
//#############################################################################
|
||||
//
|
||||
//
|
||||
//
|
||||
// C2000Ware v5.04.00.00
|
||||
//
|
||||
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// $
|
||||
//#############################################################################
|
||||
|
||||
//
|
||||
// Included Files
|
||||
//
|
||||
#include "driverlib.h"
|
||||
#include "device.h"
|
||||
#include "board.h"
|
||||
|
||||
//
|
||||
// Main
|
||||
//
|
||||
void main(void)
|
||||
{
|
||||
uint16_t sData = 0; // Send data
|
||||
uint16_t rData = 0; // Receive data
|
||||
|
||||
//
|
||||
// Initialize device clock and peripherals
|
||||
//
|
||||
Device_init();
|
||||
|
||||
//
|
||||
// Disable pin locks and enable internal pullups.
|
||||
//
|
||||
Device_initGPIO();
|
||||
|
||||
//
|
||||
// Initialize PIE and clear PIE registers. Disables CPU interrupts.
|
||||
//
|
||||
Interrupt_initModule();
|
||||
|
||||
//
|
||||
// Initialize the PIE vector table with pointers to the shell Interrupt
|
||||
// Service Routines (ISR).
|
||||
//
|
||||
Interrupt_initVectorTable();
|
||||
|
||||
//
|
||||
// Board initialization
|
||||
//
|
||||
Board_init();
|
||||
|
||||
//
|
||||
// Enable Global Interrupt (INTM) and realtime interrupt (DBGM)
|
||||
//
|
||||
EINT;
|
||||
ERTM;
|
||||
|
||||
//
|
||||
// Loop forever. Suspend or place breakpoints to observe the buffers.
|
||||
//
|
||||
while(1)
|
||||
{
|
||||
// Transmit data
|
||||
SPI_writeDataNonBlocking(mySPI0_BASE, sData);
|
||||
|
||||
// Block until data is received and then return it
|
||||
rData = SPI_readDataBlockingNonFIFO(mySPI0_BASE);
|
||||
|
||||
// Check received data against sent data
|
||||
if(rData != sData)
|
||||
{
|
||||
// Something went wrong. rData doesn't contain expected data.
|
||||
ESTOP0;
|
||||
}
|
||||
|
||||
sData++;
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// End File
|
||||
//
|
||||
@@ -0,0 +1,69 @@
|
||||
/**
|
||||
* These arguments were used when this file was generated. They will be automatically applied on subsequent loads
|
||||
* via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
|
||||
* @cliArgs --device "F2838x" --package "337bga" --part "F2838x_337bga" --context "CPU1" --product "C2000WARE@5.02.00.00"
|
||||
* @versions {"tool":"1.0.0+dev"}
|
||||
*/
|
||||
|
||||
/**
|
||||
* Import the modules used in this configuration.
|
||||
*/
|
||||
const device_support = scripting.addModule("/driverlib/device_support.js");
|
||||
const sysctl = scripting.addModule("/driverlib/sysctl.js");
|
||||
const CMD = scripting.addModule("/utilities/cmd_tool/cmd_syscfg/source/CMD");
|
||||
const CMD1 = CMD.addInstance();
|
||||
const CMD2 = CMD.addInstance();
|
||||
const memcfg = scripting.addModule("/driverlib/memcfg.js");
|
||||
const spi = scripting.addModule("/driverlib/spi.js", {}, false);
|
||||
const spi1 = spi.addInstance();
|
||||
|
||||
/**
|
||||
* Write custom configuration values to the imported modules.
|
||||
*/
|
||||
spi1.$name = "mySPI0";
|
||||
spi1.bitRate = 1000000;
|
||||
spi1.emulationMode = "SPI_EMULATION_STOP_AFTER_TRANSMIT";
|
||||
spi1.mode = "SPI_MODE_CONTROLLER";
|
||||
spi1.useFifo = false;
|
||||
spi1.useInterrupts = false;
|
||||
spi1.loopback = true;
|
||||
spi1.spi.$assign = "SPIA";
|
||||
|
||||
CMD1.$name = "generic_ram_lnk";
|
||||
CMD2.$name = "generic_flash_lnk";
|
||||
|
||||
CMD1.sectionMemory_text = ["RAMLS0","RAMLS1","RAMLS2","RAMLS3","RAMLS4"];
|
||||
CMD1.sectionMemory_ramfunc = ["RAMM0"];
|
||||
CMD1.sectionMemory_cinit = ["RAMM0"];
|
||||
CMD1.sectionMemory_stack = ["RAMM1"];
|
||||
CMD1.sectionMemory_init_array = ["RAMM0"];
|
||||
CMD1.sectionMemory_bss = ["RAMLS5"];
|
||||
CMD1.sectionMemory_const = ["RAMLS5"];
|
||||
CMD1.sectionMemory_data = ["RAMLS5"];
|
||||
CMD1.sectionMemory_switch = ["RAMM0"];
|
||||
CMD1.sectionMemory_sysmem = ["RAMLS5"];
|
||||
|
||||
CMD2.sectionAlignEnable_ramfunc = true;
|
||||
CMD2.sectionAlignEnable_text = true;
|
||||
CMD2.sectionAlignEnable_binit = true;
|
||||
CMD2.sectionAlignEnable_cinit = true;
|
||||
CMD2.sectionAlignEnable_switch = true;
|
||||
CMD2.sectionAlignEnable_init_array = true;
|
||||
CMD2.sectionAlignEnable_const = true;
|
||||
CMD2.sectionAlignEnable_ovly = true;
|
||||
CMD2.sectionMemory_codestart = "0x080000";
|
||||
CMD2.sectionMemory_stack = ["RAMM1"];
|
||||
CMD2.sectionMemory_bss = ["RAMLS5"];
|
||||
CMD2.sectionMemory_data = ["RAMLS5"];
|
||||
CMD2.sectionMemory_sysmem = ["RAMLS5"];
|
||||
CMD2.sectionMemory_ramfunc = ["FLASH3"];
|
||||
CMD2.sectionMemory_text = ["FLASH1","FLASH2","FLASH3","FLASH4"];
|
||||
CMD2.sectionMemory_binit = ["FLASH4"];
|
||||
CMD2.sectionMemory_cinit = ["FLASH4"];
|
||||
CMD2.sectionMemory_switch = ["FLASH1"];
|
||||
CMD2.sectionMemory_init_array = ["FLASH1"];
|
||||
CMD2.sectionMemory_const = ["FLASH5"];
|
||||
CMD2.sectionMemory_ovly = ["FLASH6"];
|
||||
CMD2.sectionRunFromDifferentAddr_ramfunc = true;
|
||||
CMD2.sectionRun_ramfunc = ["RAMLS0"];
|
||||
CMD2.sectionBinit_ramfunc = false;
|
||||
@@ -0,0 +1,217 @@
|
||||
//#############################################################################
|
||||
//
|
||||
// FILE: spi_ex2_loopback_fifo_interrupt.c
|
||||
//
|
||||
// TITLE: SPI Digital Loopback with FIFO Interrupts
|
||||
//
|
||||
//! \addtogroup driver_example_list
|
||||
//! <h1>SPI Digital Loopback with FIFO Interrupts</h1>
|
||||
//!
|
||||
//! This program uses the internal loopback test mode of the SPI module. Both
|
||||
//! the SPI FIFOs and their interrupts are used.
|
||||
//!
|
||||
//! A stream of data is sent and then compared to the received stream.
|
||||
//! The sent data looks like this: \n
|
||||
//! 0000 0001 \n
|
||||
//! 0001 0002 \n
|
||||
//! 0002 0003 \n
|
||||
//! .... \n
|
||||
//! FFFE FFFF \n
|
||||
//! FFFF 0000 \n
|
||||
//! etc.. \n
|
||||
//! This pattern is repeated forever.
|
||||
//!
|
||||
//! \note This example project has support for migration across our C2000
|
||||
//! device families. If you are wanting to build this project from launchpad
|
||||
//! or controlCARD, please specify in the .syscfg file the board you're using.
|
||||
//! At any time you can select another device to migrate this example.
|
||||
//!
|
||||
//! \b External \b Connections \n
|
||||
//! - None
|
||||
//!
|
||||
//! \b Watch \b Variables \n
|
||||
//! - \b sData - Data to send
|
||||
//! - \b rData - Received data
|
||||
//! - \b rDataPoint - Used to keep track of the last position in the receive
|
||||
//! stream for error checking
|
||||
//!
|
||||
//
|
||||
//#############################################################################
|
||||
//
|
||||
// C2000Ware v5.04.00.00
|
||||
//
|
||||
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// $
|
||||
//###########################################################################
|
||||
|
||||
//
|
||||
// Included Files
|
||||
//
|
||||
#include "driverlib.h"
|
||||
#include "device.h"
|
||||
#include "board.h"
|
||||
|
||||
//
|
||||
// Globals
|
||||
//
|
||||
uint16_t sData[2]; // Send data buffer
|
||||
uint16_t rData[2]; // Receive data buffer
|
||||
uint16_t rDataPoint = 0; // To keep track of where we are in the
|
||||
// data stream to check received data
|
||||
|
||||
//
|
||||
// Function Prototypes
|
||||
//
|
||||
__interrupt void spiTxFIFOISR(void);
|
||||
__interrupt void spiRxFIFOISR(void);
|
||||
|
||||
//
|
||||
// Main
|
||||
//
|
||||
void main(void)
|
||||
{
|
||||
uint16_t i;
|
||||
|
||||
//
|
||||
// Initialize device clock and peripherals
|
||||
//
|
||||
Device_init();
|
||||
|
||||
//
|
||||
// Disable pin locks and enable internal pullups.
|
||||
//
|
||||
Device_initGPIO();
|
||||
|
||||
//
|
||||
// Initialize PIE and clear PIE registers. Disables CPU interrupts.
|
||||
//
|
||||
Interrupt_initModule();
|
||||
|
||||
//
|
||||
// Initialize the PIE vector table with pointers to the shell Interrupt
|
||||
// Service Routines (ISR).
|
||||
//
|
||||
Interrupt_initVectorTable();
|
||||
|
||||
//
|
||||
// Board initialization
|
||||
//
|
||||
Board_init();
|
||||
|
||||
//
|
||||
// Initialize the data buffers
|
||||
//
|
||||
for(i = 0; i < 2; i++)
|
||||
{
|
||||
sData[i] = i;
|
||||
rData[i]= 0;
|
||||
}
|
||||
|
||||
//
|
||||
// Enable Global Interrupt (INTM) and realtime interrupt (DBGM)
|
||||
//
|
||||
EINT;
|
||||
ERTM;
|
||||
|
||||
//
|
||||
// Loop forever. Suspend or place breakpoints to observe the buffers.
|
||||
//
|
||||
while(1)
|
||||
{
|
||||
;
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// SPI A Transmit FIFO ISR
|
||||
//
|
||||
__interrupt void spiTxFIFOISR(void)
|
||||
{
|
||||
uint16_t i;
|
||||
|
||||
//
|
||||
// Send data
|
||||
//
|
||||
for(i = 0; i < 2; i++)
|
||||
{
|
||||
SPI_writeDataNonBlocking(SPIA_BASE, sData[i]);
|
||||
}
|
||||
|
||||
//
|
||||
// Increment data for next cycle
|
||||
//
|
||||
for(i = 0; i < 2; i++)
|
||||
{
|
||||
sData[i] = sData[i] + 1;
|
||||
}
|
||||
|
||||
//
|
||||
// Clear interrupt flag and issue ACK
|
||||
//
|
||||
SPI_clearInterruptStatus(SPIA_BASE, SPI_INT_TXFF);
|
||||
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP6);
|
||||
}
|
||||
|
||||
//
|
||||
// SPI A Receive FIFO ISR
|
||||
//
|
||||
__interrupt void spiRxFIFOISR(void)
|
||||
{
|
||||
uint16_t i;
|
||||
|
||||
//
|
||||
// Read data
|
||||
//
|
||||
for(i = 0; i < 2; i++)
|
||||
{
|
||||
rData[i] = SPI_readDataNonBlocking(SPIA_BASE);
|
||||
}
|
||||
|
||||
//
|
||||
// Check received data
|
||||
//
|
||||
for(i = 0; i < 2; i++)
|
||||
{
|
||||
if(rData[i] != (rDataPoint + i))
|
||||
{
|
||||
// Something went wrong. rData doesn't contain expected data.
|
||||
ESTOP0;
|
||||
}
|
||||
}
|
||||
|
||||
rDataPoint++;
|
||||
|
||||
//
|
||||
// Clear interrupt flag and issue ACK
|
||||
//
|
||||
SPI_clearInterruptStatus(SPIA_BASE, SPI_INT_RXFF);
|
||||
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP6);
|
||||
}
|
||||
@@ -0,0 +1,77 @@
|
||||
/**
|
||||
* These arguments were used when this file was generated. They will be automatically applied on subsequent loads
|
||||
* via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
|
||||
* @cliArgs --device "F2838x" --package "337bga" --part "F2838x_337bga" --context "CPU1" --product "C2000WARE@5.02.00.00"
|
||||
* @versions {"tool":"1.0.0+dev"}
|
||||
*/
|
||||
|
||||
/**
|
||||
* Import the modules used in this configuration.
|
||||
*/
|
||||
const device_support = scripting.addModule("/driverlib/device_support.js");
|
||||
const sysctl = scripting.addModule("/driverlib/sysctl.js");
|
||||
const CMD = scripting.addModule("/utilities/cmd_tool/cmd_syscfg/source/CMD");
|
||||
const CMD1 = CMD.addInstance();
|
||||
const CMD2 = CMD.addInstance();
|
||||
const memcfg = scripting.addModule("/driverlib/memcfg.js");
|
||||
const spi = scripting.addModule("/driverlib/spi.js", {}, false);
|
||||
const spi1 = spi.addInstance();
|
||||
|
||||
/**
|
||||
* Write custom configuration values to the imported modules.
|
||||
*/
|
||||
spi1.$name = "mySPI0";
|
||||
spi1.mode = "SPI_MODE_CONTROLLER";
|
||||
spi1.emulationMode = "SPI_EMULATION_STOP_AFTER_TRANSMIT";
|
||||
spi1.bitRate = 500000;
|
||||
spi1.enabledFIFOInterrupts = ["SPI_INT_RXFF","SPI_INT_TXFF"];
|
||||
spi1.txFifo = "SPI_FIFO_TX2";
|
||||
spi1.rxFifo = "SPI_FIFO_RX2";
|
||||
spi1.loopback = true;
|
||||
spi1.registerInterrupts = true;
|
||||
spi1.spi.$assign = "SPIA";
|
||||
spi1.spiRXInt.enableInterrupt = true;
|
||||
spi1.spiRXInt.$name = "INT_SPIA_RX";
|
||||
spi1.spiRXInt.interruptHandler = "spiRxFIFOISR";
|
||||
spi1.spiTXInt.enableInterrupt = true;
|
||||
spi1.spiTXInt.$name = "INT_SPIA_TX";
|
||||
spi1.spiTXInt.interruptHandler = "spiTxFIFOISR";
|
||||
|
||||
CMD1.$name = "generic_ram_lnk";
|
||||
CMD2.$name = "generic_flash_lnk";
|
||||
|
||||
CMD1.sectionMemory_text = ["RAMLS0","RAMLS1","RAMLS2","RAMLS3","RAMLS4"];
|
||||
CMD1.sectionMemory_ramfunc = ["RAMM0"];
|
||||
CMD1.sectionMemory_cinit = ["RAMM0"];
|
||||
CMD1.sectionMemory_stack = ["RAMM1"];
|
||||
CMD1.sectionMemory_init_array = ["RAMM0"];
|
||||
CMD1.sectionMemory_bss = ["RAMLS5"];
|
||||
CMD1.sectionMemory_const = ["RAMLS5"];
|
||||
CMD1.sectionMemory_data = ["RAMLS5"];
|
||||
CMD1.sectionMemory_switch = ["RAMM0"];
|
||||
CMD1.sectionMemory_sysmem = ["RAMLS5"];
|
||||
|
||||
CMD2.sectionAlignEnable_ramfunc = true;
|
||||
CMD2.sectionAlignEnable_text = true;
|
||||
CMD2.sectionAlignEnable_binit = true;
|
||||
CMD2.sectionAlignEnable_cinit = true;
|
||||
CMD2.sectionAlignEnable_switch = true;
|
||||
CMD2.sectionAlignEnable_init_array = true;
|
||||
CMD2.sectionAlignEnable_const = true;
|
||||
CMD2.sectionAlignEnable_ovly = true;
|
||||
CMD2.sectionMemory_codestart = "0x080000";
|
||||
CMD2.sectionMemory_stack = ["RAMM1"];
|
||||
CMD2.sectionMemory_bss = ["RAMLS5"];
|
||||
CMD2.sectionMemory_data = ["RAMLS5"];
|
||||
CMD2.sectionMemory_sysmem = ["RAMLS5"];
|
||||
CMD2.sectionMemory_ramfunc = ["FLASH3"];
|
||||
CMD2.sectionMemory_text = ["FLASH1","FLASH2","FLASH3","FLASH4"];
|
||||
CMD2.sectionMemory_binit = ["FLASH4"];
|
||||
CMD2.sectionMemory_cinit = ["FLASH4"];
|
||||
CMD2.sectionMemory_switch = ["FLASH1"];
|
||||
CMD2.sectionMemory_init_array = ["FLASH1"];
|
||||
CMD2.sectionMemory_const = ["FLASH5"];
|
||||
CMD2.sectionMemory_ovly = ["FLASH6"];
|
||||
CMD2.sectionRunFromDifferentAddr_ramfunc = true;
|
||||
CMD2.sectionRun_ramfunc = ["RAMLS0"];
|
||||
CMD2.sectionBinit_ramfunc = false;
|
||||
@@ -0,0 +1,151 @@
|
||||
//#############################################################################
|
||||
//
|
||||
// FILE: spi_ex3_external_loopback.c
|
||||
//
|
||||
// TITLE: SPI Digital Loopback without using FIFOs and Interrupts
|
||||
//
|
||||
//! \addtogroup driver_example_list
|
||||
//! <h1>SPI Digital External Loopback without FIFO Interrupts</h1>
|
||||
//!
|
||||
//! This program uses the external loopback between two SPI modules. Both
|
||||
//! the SPI FIFOs and interrupts are not used in this example. SPIA is
|
||||
//! configured as a peripheral and SPI B is configured as controller. This example
|
||||
//! demonstrates full duplex communication where both controller and peripheral transmits
|
||||
//! and receives data simultaneously.
|
||||
//!
|
||||
//! \note This example project has support for migration across our C2000
|
||||
//! device families. If you are wanting to build this project from launchpad
|
||||
//! or controlCARD, please specify in the .syscfg file the board you're using.
|
||||
//! At any time you can select another device to migrate this example.
|
||||
//!
|
||||
//! \b External \b Connections \n
|
||||
//! Refer to SysConfig for external connections (GPIO pin numbers) specific to each device
|
||||
//!
|
||||
//! \b Watch \b Variables \n
|
||||
//! - \b TxData_SPIA - Data send from SPIA (peripheral)
|
||||
//! - \b TxData_SPIB - Data send from SPIB (controller)
|
||||
//! - \b RxData_SPIA - Data received by SPIA (peripheral)
|
||||
//! - \b RxData_SPIB - Data received by SPIB (controller)
|
||||
//!
|
||||
//
|
||||
//#############################################################################
|
||||
//
|
||||
// C2000Ware v5.04.00.00
|
||||
//
|
||||
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// $
|
||||
//###########################################################################
|
||||
|
||||
//
|
||||
// Included Files
|
||||
//
|
||||
#include "driverlib.h"
|
||||
#include "device.h"
|
||||
#include "board.h"
|
||||
|
||||
//
|
||||
// Main
|
||||
//
|
||||
void main(void)
|
||||
{
|
||||
uint16_t i;
|
||||
|
||||
uint16_t TxData_SPIA[] = {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F};
|
||||
uint16_t RxData_SPIA[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
|
||||
|
||||
uint16_t TxData_SPIB[] = {0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F};
|
||||
uint16_t RxData_SPIB[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
|
||||
|
||||
//
|
||||
// Initialize device clock and peripherals
|
||||
//
|
||||
Device_init();
|
||||
|
||||
//
|
||||
// Disable pin locks and enable internal pullups.
|
||||
//
|
||||
Device_initGPIO();
|
||||
|
||||
//
|
||||
// Initialize PIE and clear PIE registers. Disables CPU interrupts.
|
||||
//
|
||||
Interrupt_initModule();
|
||||
|
||||
//
|
||||
// Initialize the PIE vector table with pointers to the shell Interrupt
|
||||
// Service Routines (ISR).
|
||||
//
|
||||
Interrupt_initVectorTable();
|
||||
|
||||
//
|
||||
// Board initialization
|
||||
//
|
||||
Board_init();
|
||||
|
||||
//
|
||||
// Loop forever. Suspend or place breakpoints to observe the buffers.
|
||||
//
|
||||
for(i = 0; i < 16; i++)
|
||||
{
|
||||
//
|
||||
// Set the TX buffer of peripheral SPI.
|
||||
//
|
||||
SPI_writeDataNonBlocking(SPIA_BASE, TxData_SPIA[i]);
|
||||
|
||||
//
|
||||
// Set the the controller TX buffer. This triggers the data transmission
|
||||
//
|
||||
SPI_writeDataNonBlocking(SPIB_BASE, TxData_SPIB[i]);
|
||||
|
||||
//
|
||||
// Read the received data
|
||||
//
|
||||
RxData_SPIA[i] = SPI_readDataBlockingNonFIFO(SPIA_BASE);
|
||||
RxData_SPIB[i] = SPI_readDataBlockingNonFIFO(SPIB_BASE);
|
||||
|
||||
//
|
||||
// Check the received data
|
||||
//
|
||||
if(RxData_SPIA[i] != TxData_SPIB[i])
|
||||
{
|
||||
ESTOP0;
|
||||
}
|
||||
if(RxData_SPIB[i] != TxData_SPIA[i])
|
||||
{
|
||||
ESTOP0;
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// Loop forever
|
||||
//
|
||||
while(1);
|
||||
}
|
||||
@@ -0,0 +1,84 @@
|
||||
/**
|
||||
* These arguments were used when this file was generated. They will be automatically applied on subsequent loads
|
||||
* via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
|
||||
* @cliArgs --device "F2838x" --package "337bga" --part "F2838x_337bga" --context "CPU1" --product "C2000WARE@5.02.00.00"
|
||||
* @versions {"tool":"1.0.0+dev"}
|
||||
*/
|
||||
|
||||
/**
|
||||
* Import the modules used in this configuration.
|
||||
*/
|
||||
const device_support = scripting.addModule("/driverlib/device_support.js");
|
||||
const sysctl = scripting.addModule("/driverlib/sysctl.js");
|
||||
const CMD = scripting.addModule("/utilities/cmd_tool/cmd_syscfg/source/CMD");
|
||||
const CMD1 = CMD.addInstance();
|
||||
const CMD2 = CMD.addInstance();
|
||||
const memcfg = scripting.addModule("/driverlib/memcfg.js");
|
||||
const spi = scripting.addModule("/driverlib/spi.js", {}, false);
|
||||
const spi1 = spi.addInstance();
|
||||
const spi2 = spi.addInstance();
|
||||
|
||||
/**
|
||||
* Write custom configuration values to the imported modules.
|
||||
*/
|
||||
spi1.$name = "SPIA_peripheral";
|
||||
spi1.emulationMode = "SPI_EMULATION_FREE_RUN";
|
||||
spi1.bitRate = 500000;
|
||||
spi1.useInterrupts = false;
|
||||
spi1.useFifo = false;
|
||||
spi1.spi.$assign = "SPIA";
|
||||
spi1.spi.spi_picoPin.$assign = "GPIO16";
|
||||
spi1.spi.spi_pociPin.$assign = "GPIO17";
|
||||
spi1.spi.spi_clkPin.$assign = "GPIO18";
|
||||
spi1.spi.spi_ptePin.$assign = "GPIO35";
|
||||
|
||||
spi2.$name = "SPIB_controller";
|
||||
spi2.mode = "SPI_MODE_CONTROLLER";
|
||||
spi2.emulationMode = "SPI_EMULATION_FREE_RUN";
|
||||
spi2.bitRate = 500000;
|
||||
spi2.useFifo = false;
|
||||
spi2.useInterrupts = false;
|
||||
spi2.spi.$assign = "SPIB";
|
||||
spi2.spi.spi_picoPin.$assign = "GPIO24";
|
||||
spi2.spi.spi_pociPin.$assign = "GPIO25";
|
||||
spi2.spi.spi_clkPin.$assign = "GPIO26";
|
||||
spi2.spi.spi_ptePin.$assign = "GPIO27";
|
||||
|
||||
CMD1.$name = "generic_ram_lnk";
|
||||
CMD2.$name = "generic_flash_lnk";
|
||||
|
||||
CMD1.sectionMemory_text = ["RAMLS0","RAMLS1","RAMLS2","RAMLS3","RAMLS4"];
|
||||
CMD1.sectionMemory_ramfunc = ["RAMM0"];
|
||||
CMD1.sectionMemory_cinit = ["RAMM0"];
|
||||
CMD1.sectionMemory_stack = ["RAMM1"];
|
||||
CMD1.sectionMemory_init_array = ["RAMM0"];
|
||||
CMD1.sectionMemory_bss = ["RAMLS5"];
|
||||
CMD1.sectionMemory_const = ["RAMLS5"];
|
||||
CMD1.sectionMemory_data = ["RAMLS5"];
|
||||
CMD1.sectionMemory_switch = ["RAMM0"];
|
||||
CMD1.sectionMemory_sysmem = ["RAMLS5"];
|
||||
|
||||
CMD2.sectionAlignEnable_ramfunc = true;
|
||||
CMD2.sectionAlignEnable_text = true;
|
||||
CMD2.sectionAlignEnable_binit = true;
|
||||
CMD2.sectionAlignEnable_cinit = true;
|
||||
CMD2.sectionAlignEnable_switch = true;
|
||||
CMD2.sectionAlignEnable_init_array = true;
|
||||
CMD2.sectionAlignEnable_const = true;
|
||||
CMD2.sectionAlignEnable_ovly = true;
|
||||
CMD2.sectionMemory_codestart = "0x080000";
|
||||
CMD2.sectionMemory_stack = ["RAMM1"];
|
||||
CMD2.sectionMemory_bss = ["RAMLS5"];
|
||||
CMD2.sectionMemory_data = ["RAMLS5"];
|
||||
CMD2.sectionMemory_sysmem = ["RAMLS5"];
|
||||
CMD2.sectionMemory_ramfunc = ["FLASH3"];
|
||||
CMD2.sectionMemory_text = ["FLASH1","FLASH2","FLASH3","FLASH4"];
|
||||
CMD2.sectionMemory_binit = ["FLASH4"];
|
||||
CMD2.sectionMemory_cinit = ["FLASH4"];
|
||||
CMD2.sectionMemory_switch = ["FLASH1"];
|
||||
CMD2.sectionMemory_init_array = ["FLASH1"];
|
||||
CMD2.sectionMemory_const = ["FLASH5"];
|
||||
CMD2.sectionMemory_ovly = ["FLASH6"];
|
||||
CMD2.sectionRunFromDifferentAddr_ramfunc = true;
|
||||
CMD2.sectionRun_ramfunc = ["RAMLS0"];
|
||||
CMD2.sectionBinit_ramfunc = false;
|
||||
+243
@@ -0,0 +1,243 @@
|
||||
//#############################################################################
|
||||
//
|
||||
// FILE: spi_ex4_external_loopback_fifo_interrupt.c
|
||||
//
|
||||
// TITLE: SPI Digital Loopback with FIFO Interrupts
|
||||
//
|
||||
//! \addtogroup driver_example_list
|
||||
//! <h1>SPI Digital External Loopback with FIFO Interrupts</h1>
|
||||
//!
|
||||
//! This program uses the external loopback between two SPI modules. Both
|
||||
//! the SPI FIFOs and their interrupts are used. SPIA is configured as a peripheral
|
||||
//! and receives data from SPI B which is configured as a controller.
|
||||
//!
|
||||
//! A stream of data is sent and then compared to the received stream.
|
||||
//! The sent data looks like this: \n
|
||||
//! 0000 0001 \n
|
||||
//! 0001 0002 \n
|
||||
//! 0002 0003 \n
|
||||
//! .... \n
|
||||
//! FFFE FFFF \n
|
||||
//! FFFF 0000 \n
|
||||
//! etc.. \n
|
||||
//! This pattern is repeated forever.
|
||||
//!
|
||||
//! \note This example project has support for migration across our C2000
|
||||
//! device families. If you are wanting to build this project from launchpad
|
||||
//! or controlCARD, please specify in the .syscfg file the board you're using.
|
||||
//! At any time you can select another device to migrate this example.
|
||||
//!
|
||||
//! \b External \b Connections \n
|
||||
//! Refer to SysConfig for external connections (GPIO pin numbers) specific to each device
|
||||
//!
|
||||
//! \b Watch \b Variables \n
|
||||
//! - \b sData - Data to send
|
||||
//! - \b rData - Received data
|
||||
//! - \b rDataPoint - Used to keep track of the last position in the receive
|
||||
//! stream for error checking
|
||||
//!
|
||||
//
|
||||
//#############################################################################
|
||||
//
|
||||
// C2000Ware v5.04.00.00
|
||||
//
|
||||
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// $
|
||||
//###########################################################################
|
||||
|
||||
//
|
||||
// Included Files
|
||||
//
|
||||
#include "driverlib.h"
|
||||
#include "device.h"
|
||||
#include "board.h"
|
||||
|
||||
//
|
||||
// Globals
|
||||
//
|
||||
volatile uint16_t sData[2]; // Send data buffer
|
||||
volatile uint16_t rData[2]; // Receive data buffer
|
||||
volatile uint16_t rDataPoint = 0; // To keep track of where we are in the
|
||||
// data stream to check received data
|
||||
|
||||
//
|
||||
// Function Prototypes
|
||||
//
|
||||
__interrupt void spibTxFIFOISR(void);
|
||||
__interrupt void spiaRxFIFOISR(void);
|
||||
|
||||
//
|
||||
// Main
|
||||
//
|
||||
void main(void)
|
||||
{
|
||||
uint16_t i;
|
||||
|
||||
//
|
||||
// Initialize device clock and peripherals
|
||||
//
|
||||
Device_init();
|
||||
|
||||
//
|
||||
// Disable pin locks and enable internal pullups.
|
||||
//
|
||||
Device_initGPIO();
|
||||
|
||||
//
|
||||
// Initialize PIE and clear PIE registers. Disables CPU interrupts.
|
||||
//
|
||||
Interrupt_initModule();
|
||||
|
||||
//
|
||||
// Initialize the PIE vector table with pointers to the shell Interrupt
|
||||
// Service Routines (ISR).
|
||||
//
|
||||
Interrupt_initVectorTable();
|
||||
|
||||
//
|
||||
// Board initialization
|
||||
//
|
||||
Board_init();
|
||||
|
||||
//
|
||||
// Initialize the data buffers
|
||||
//
|
||||
for(i = 0; i < 2; i++)
|
||||
{
|
||||
sData[i] = i;
|
||||
rData[i]= 0;
|
||||
}
|
||||
|
||||
//
|
||||
// Enable Global Interrupt (INTM) and realtime interrupt (DBGM)
|
||||
//
|
||||
EINT;
|
||||
ERTM;
|
||||
|
||||
//
|
||||
// Loop forever. Suspend or place breakpoints to observe the buffers.
|
||||
//
|
||||
while(1)
|
||||
{
|
||||
;
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// SPI B Transmit FIFO ISR
|
||||
//
|
||||
__interrupt void spibTxFIFOISR(void)
|
||||
{
|
||||
uint16_t i;
|
||||
|
||||
//
|
||||
// Send data
|
||||
//
|
||||
for(i = 0; i < 2; i++)
|
||||
{
|
||||
SPI_writeDataNonBlocking(SPIB_BASE, sData[i]);
|
||||
}
|
||||
|
||||
//
|
||||
// Increment data for next cycle
|
||||
//
|
||||
for(i = 0; i < 2; i++)
|
||||
{
|
||||
sData[i] = sData[i] + 1;
|
||||
}
|
||||
|
||||
//
|
||||
// Clear interrupt flag and issue ACK
|
||||
//
|
||||
SPI_clearInterruptStatus(SPIB_BASE, SPI_INT_TXFF);
|
||||
Interrupt_clearACKGroup(INT_SPIB_controller_TX_INTERRUPT_ACK_GROUP);
|
||||
}
|
||||
|
||||
//
|
||||
// SPI A Receive FIFO ISR
|
||||
//
|
||||
__interrupt void spiaRxFIFOISR(void)
|
||||
{
|
||||
uint16_t i;
|
||||
|
||||
//
|
||||
// Read data
|
||||
//
|
||||
for(i = 0; i < 2; i++)
|
||||
{
|
||||
rData[i] = SPI_readDataNonBlocking(SPIA_BASE);
|
||||
}
|
||||
|
||||
//
|
||||
// Check received data
|
||||
//
|
||||
for(i = 0; i < 2; i++)
|
||||
{
|
||||
if(rData[i] != (rDataPoint + i))
|
||||
{
|
||||
// Something went wrong. rData doesn't contain expected data.
|
||||
ESTOP0;
|
||||
}
|
||||
}
|
||||
|
||||
rDataPoint++;
|
||||
|
||||
//
|
||||
// Clear interrupt flag and issue ACK
|
||||
//
|
||||
SPI_clearInterruptStatus(SPIA_BASE, SPI_INT_RXFF);
|
||||
Interrupt_clearACKGroup(INT_SPIA_peripheral_RX_INTERRUPT_ACK_GROUP);
|
||||
}
|
||||
|
||||
//
|
||||
// Enabled only for SysConfig functionality
|
||||
//
|
||||
__interrupt void INT_SPIA_peripheral_TX_ISR(void) {
|
||||
//
|
||||
// Issue ACK
|
||||
//
|
||||
Interrupt_clearACKGroup(INT_SPIA_peripheral_TX_INTERRUPT_ACK_GROUP);
|
||||
}
|
||||
|
||||
//
|
||||
// Enabled only for SysConfig functionality
|
||||
//
|
||||
__interrupt void INT_SPIB_controller_RX_ISR(void) {
|
||||
//
|
||||
// Issue ACK
|
||||
//
|
||||
Interrupt_clearACKGroup(INT_SPIB_controller_RX_INTERRUPT_ACK_GROUP);
|
||||
|
||||
}
|
||||
|
||||
//
|
||||
// End of file
|
||||
//
|
||||
+95
@@ -0,0 +1,95 @@
|
||||
/**
|
||||
* These arguments were used when this file was generated. They will be automatically applied on subsequent loads
|
||||
* via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
|
||||
* @cliArgs --device "F2838x" --package "337bga" --part "F2838x_337bga" --context "CPU1" --product "C2000WARE@5.02.00.00"
|
||||
* @versions {"tool":"1.0.0+dev"}
|
||||
*/
|
||||
|
||||
/**
|
||||
* Import the modules used in this configuration.
|
||||
*/
|
||||
const device_support = scripting.addModule("/driverlib/device_support.js");
|
||||
const sysctl = scripting.addModule("/driverlib/sysctl.js");
|
||||
const CMD = scripting.addModule("/utilities/cmd_tool/cmd_syscfg/source/CMD");
|
||||
const CMD1 = CMD.addInstance();
|
||||
const CMD2 = CMD.addInstance();
|
||||
const memcfg = scripting.addModule("/driverlib/memcfg.js");
|
||||
const spi = scripting.addModule("/driverlib/spi.js", {}, false);
|
||||
const spi1 = spi.addInstance();
|
||||
const spi2 = spi.addInstance();
|
||||
|
||||
/**
|
||||
* Write custom configuration values to the imported modules.
|
||||
*/
|
||||
spi1.$name = "SPIA_peripheral";
|
||||
spi1.emulationMode = "SPI_EMULATION_FREE_RUN";
|
||||
spi1.bitRate = 500000;
|
||||
spi1.txFifo = "SPI_FIFO_TX2";
|
||||
spi1.rxFifo = "SPI_FIFO_RX2";
|
||||
spi1.enabledFIFOInterrupts = ["SPI_INT_RXFF"];
|
||||
spi1.registerInterrupts = true;
|
||||
spi1.spi.$assign = "SPIA";
|
||||
spi1.spiRXInt.enableInterrupt = true;
|
||||
spi1.spiRXInt.interruptHandler = "spiaRxFIFOISR";
|
||||
spi1.spiRXInt.$name = "INT_SPIA_RX";
|
||||
spi1.spi.spi_picoPin.$assign = "GPIO16";
|
||||
spi1.spi.spi_pociPin.$assign = "GPIO17";
|
||||
spi1.spi.spi_clkPin.$assign = "GPIO18";
|
||||
spi1.spi.spi_ptePin.$assign = "GPIO35";
|
||||
|
||||
spi2.$name = "SPIB_controller";
|
||||
spi2.mode = "SPI_MODE_CONTROLLER";
|
||||
spi2.emulationMode = "SPI_EMULATION_FREE_RUN";
|
||||
spi2.bitRate = 500000;
|
||||
spi2.txFifo = "SPI_FIFO_TX2";
|
||||
spi2.rxFifo = "SPI_FIFO_RX2";
|
||||
spi2.enabledFIFOInterrupts = ["SPI_INT_TXFF"];
|
||||
spi2.registerInterrupts = true;
|
||||
spi2.spi.$assign = "SPIB";
|
||||
spi2.spiTXInt.enableInterrupt = true;
|
||||
spi2.spiTXInt.$name = "INT_SPIB_TX";
|
||||
spi2.spiTXInt.interruptHandler = "spibTxFIFOISR";
|
||||
//#####END_F2837XD_F2837XS_F2807X_F28004X#####
|
||||
spi2.spi.spi_picoPin.$assign = "GPIO24";
|
||||
spi2.spi.spi_pociPin.$assign = "GPIO25";
|
||||
spi2.spi.spi_clkPin.$assign = "GPIO26";
|
||||
spi2.spi.spi_ptePin.$assign = "GPIO27";
|
||||
|
||||
CMD1.$name = "generic_ram_lnk";
|
||||
CMD2.$name = "generic_flash_lnk";
|
||||
|
||||
CMD1.sectionMemory_text = ["RAMLS0","RAMLS1","RAMLS2","RAMLS3","RAMLS4"];
|
||||
CMD1.sectionMemory_ramfunc = ["RAMM0"];
|
||||
CMD1.sectionMemory_cinit = ["RAMM0"];
|
||||
CMD1.sectionMemory_stack = ["RAMM1"];
|
||||
CMD1.sectionMemory_init_array = ["RAMM0"];
|
||||
CMD1.sectionMemory_bss = ["RAMLS5"];
|
||||
CMD1.sectionMemory_const = ["RAMLS5"];
|
||||
CMD1.sectionMemory_data = ["RAMLS5"];
|
||||
CMD1.sectionMemory_switch = ["RAMM0"];
|
||||
CMD1.sectionMemory_sysmem = ["RAMLS5"];
|
||||
|
||||
CMD2.sectionAlignEnable_ramfunc = true;
|
||||
CMD2.sectionAlignEnable_text = true;
|
||||
CMD2.sectionAlignEnable_binit = true;
|
||||
CMD2.sectionAlignEnable_cinit = true;
|
||||
CMD2.sectionAlignEnable_switch = true;
|
||||
CMD2.sectionAlignEnable_init_array = true;
|
||||
CMD2.sectionAlignEnable_const = true;
|
||||
CMD2.sectionAlignEnable_ovly = true;
|
||||
CMD2.sectionMemory_codestart = "0x080000";
|
||||
CMD2.sectionMemory_stack = ["RAMM1"];
|
||||
CMD2.sectionMemory_bss = ["RAMLS5"];
|
||||
CMD2.sectionMemory_data = ["RAMLS5"];
|
||||
CMD2.sectionMemory_sysmem = ["RAMLS5"];
|
||||
CMD2.sectionMemory_ramfunc = ["FLASH3"];
|
||||
CMD2.sectionMemory_text = ["FLASH1","FLASH2","FLASH3","FLASH4"];
|
||||
CMD2.sectionMemory_binit = ["FLASH4"];
|
||||
CMD2.sectionMemory_cinit = ["FLASH4"];
|
||||
CMD2.sectionMemory_switch = ["FLASH1"];
|
||||
CMD2.sectionMemory_init_array = ["FLASH1"];
|
||||
CMD2.sectionMemory_const = ["FLASH5"];
|
||||
CMD2.sectionMemory_ovly = ["FLASH6"];
|
||||
CMD2.sectionRunFromDifferentAddr_ramfunc = true;
|
||||
CMD2.sectionRun_ramfunc = ["RAMLS0"];
|
||||
CMD2.sectionBinit_ramfunc = false;
|
||||
@@ -0,0 +1,202 @@
|
||||
//#############################################################################
|
||||
//
|
||||
// FILE: spi_ex5_loopback_dma.c
|
||||
//
|
||||
// TITLE: SPI Digital Loopback with DMA
|
||||
//
|
||||
//! \addtogroup driver_example_list
|
||||
//! <h1>SPI Digital Loopback with DMA</h1>
|
||||
//!
|
||||
//! This program uses the internal loopback test mode of the SPI module. Both
|
||||
//! DMA interrupts and the SPI FIFOs are used. When the SPI transmit FIFO has
|
||||
//! enough space (as indicated by its FIFO level interrupt signal), the DMA
|
||||
//! will transfer data from global variable sData into the FIFO. This will be
|
||||
//! transmitted to the receive FIFO via the internal loopback.
|
||||
//!
|
||||
//! When enough data has been placed in the receive FIFO (as indicated by its
|
||||
//! FIFO level interrupt signal), the DMA will transfer the data from the FIFO
|
||||
//! into global variable rData.
|
||||
//!
|
||||
//! When all data has been placed into rData, a check of the validity of the
|
||||
//! data will be performed in one of the DMA channels' ISRs.
|
||||
//!
|
||||
//! \note This example project has support for migration across our C2000
|
||||
//! device families. If you are wanting to build this project from launchpad
|
||||
//! or controlCARD, please specify in the .syscfg file the board you're using.
|
||||
//! At any time you can select another device to migrate this example.
|
||||
//!
|
||||
//! \b External \b Connections \n
|
||||
//! - None
|
||||
//!
|
||||
//! \b Watch \b Variables \n
|
||||
//! - \b sData - Data to send
|
||||
//! - \b rData - Received data
|
||||
//!
|
||||
//
|
||||
//#############################################################################
|
||||
//
|
||||
//
|
||||
//
|
||||
// C2000Ware v5.04.00.00
|
||||
//
|
||||
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// $
|
||||
//#############################################################################
|
||||
|
||||
//
|
||||
// Included Files
|
||||
//
|
||||
#include "driverlib.h"
|
||||
#include "device.h"
|
||||
#include "board.h"
|
||||
|
||||
//
|
||||
// Globals
|
||||
//
|
||||
uint16_t sData[128]; // Send data buffer
|
||||
uint16_t rData[128]; // Receive data buffer
|
||||
|
||||
const void *destAddr = (const void *)rData;
|
||||
const void *srcAddr = (const void *)sData;
|
||||
|
||||
// Place buffers in GSRAM
|
||||
#pragma DATA_SECTION(sData, "DMA_TX_SECTION");
|
||||
#pragma DATA_SECTION(rData, "DMA_RX_SECTION");
|
||||
|
||||
volatile uint16_t done = 0; // Flag to set when all data transferred
|
||||
|
||||
//
|
||||
// Function Prototypes
|
||||
//
|
||||
__interrupt void INT_mySPI0_RX_DMA_ISR(void);
|
||||
__interrupt void INT_mySPI0_TX_DMA_ISR(void);
|
||||
|
||||
//
|
||||
// Main
|
||||
//
|
||||
void main(void)
|
||||
{
|
||||
uint16_t i;
|
||||
|
||||
//
|
||||
// Initialize device clock and peripherals
|
||||
//
|
||||
Device_init();
|
||||
|
||||
//
|
||||
// Disable pin locks and enable internal pullups.
|
||||
//
|
||||
Device_initGPIO();
|
||||
|
||||
//
|
||||
// Initialize PIE and clear PIE registers. Disables CPU interrupts.
|
||||
//
|
||||
Interrupt_initModule();
|
||||
|
||||
//
|
||||
// Initialize the PIE vector table with pointers to the shell Interrupt
|
||||
// Service Routines (ISR).
|
||||
//
|
||||
Interrupt_initVectorTable();
|
||||
|
||||
//
|
||||
// Board initialization from SysConfig
|
||||
//
|
||||
Board_init();
|
||||
|
||||
|
||||
//
|
||||
// Initialize the data buffers
|
||||
//
|
||||
for(i = 0; i < 128; i++)
|
||||
{
|
||||
sData[i] = i;
|
||||
rData[i]= 0;
|
||||
}
|
||||
|
||||
//
|
||||
// Enable Global Interrupt (INTM) and realtime interrupt (DBGM)
|
||||
//
|
||||
EINT;
|
||||
ERTM;
|
||||
|
||||
//
|
||||
// Start the DMA channels
|
||||
//
|
||||
DMA_startChannel(mySPI0_TX_DMA_BASE);
|
||||
DMA_startChannel(mySPI0_RX_DMA_BASE);
|
||||
|
||||
//
|
||||
// Wait until the DMA transfer is complete
|
||||
//
|
||||
while(!done);
|
||||
|
||||
//
|
||||
// When the DMA transfer is complete the program will stop here
|
||||
//
|
||||
ESTOP0;
|
||||
}
|
||||
|
||||
//
|
||||
// DMA Channel 5 ISR
|
||||
//
|
||||
__interrupt void INT_mySPI0_TX_DMA_ISR(void)
|
||||
{
|
||||
DMA_stopChannel(mySPI0_TX_DMA_BASE);
|
||||
Interrupt_clearACKGroup(INT_mySPI0_TX_DMA_INTERRUPT_ACK_GROUP);
|
||||
return;
|
||||
}
|
||||
|
||||
//
|
||||
// DMA Channel 6 ISR
|
||||
//
|
||||
__interrupt void INT_mySPI0_RX_DMA_ISR(void)
|
||||
{
|
||||
uint16_t i;
|
||||
|
||||
DMA_stopChannel(mySPI0_RX_DMA_BASE);
|
||||
Interrupt_clearACKGroup(INT_mySPI0_RX_DMA_INTERRUPT_ACK_GROUP);
|
||||
|
||||
//
|
||||
// Check for data integrity
|
||||
//
|
||||
for(i = 0; i < 128; i++)
|
||||
{
|
||||
if (rData[i] != i)
|
||||
{
|
||||
// Something went wrong. rData doesn't contain expected data.
|
||||
ESTOP0;
|
||||
}
|
||||
}
|
||||
|
||||
done = 1;
|
||||
return;
|
||||
}
|
||||
@@ -0,0 +1,114 @@
|
||||
/**
|
||||
* These arguments were used when this file was generated. They will be automatically applied on subsequent loads
|
||||
* via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
|
||||
* @cliArgs --device "F2838x" --package "337bga" --part "F2838x_337bga" --context "CPU1" --product "C2000WARE@5.02.00.00"
|
||||
* @versions {"tool":"1.0.0+dev"}
|
||||
*/
|
||||
|
||||
/**
|
||||
* Import the modules used in this configuration.
|
||||
*/
|
||||
const device_support = scripting.addModule("/driverlib/device_support.js");
|
||||
const sysctl = scripting.addModule("/driverlib/sysctl.js");
|
||||
const CMD = scripting.addModule("/utilities/cmd_tool/cmd_syscfg/source/CMD");
|
||||
const CMD1 = CMD.addInstance();
|
||||
const CMD2 = CMD.addInstance();
|
||||
const memcfg = scripting.addModule("/driverlib/memcfg.js");
|
||||
const spi = scripting.addModule("/driverlib/spi.js", {}, false);
|
||||
const spi1 = spi.addInstance();
|
||||
|
||||
/**
|
||||
* Write custom configuration values to the imported modules.
|
||||
*/
|
||||
spi1.$name = "mySPI0";
|
||||
spi1.mode = "SPI_MODE_CONTROLLER";
|
||||
spi1.bitRate = 500000;
|
||||
spi1.txFifo = "SPI_FIFO_TX8";
|
||||
spi1.rxFifo = "SPI_FIFO_RX8";
|
||||
spi1.useDMARX = true;
|
||||
spi1.loopback = true;
|
||||
spi1.useDMATX = true;
|
||||
spi1.spi.$assign = "SPIA";
|
||||
spi1.spiRXDMA.databusWidthConfig = scripting.forceWrite("DMA_CFG_SIZE_16BIT");
|
||||
spi1.spiRXDMA.dmaBase = "DMA_CH6_BASE";
|
||||
spi1.spiRXDMA.enableTriggers = true;
|
||||
spi1.spiRXDMA.useInterrupts = true;
|
||||
spi1.spiRXDMA.registerInterrupts = true;
|
||||
spi1.spiRXDMA.enableInterrupts = true;
|
||||
spi1.spiRXDMA.interruptMode = "DMA_INT_AT_END";
|
||||
spi1.spiRXDMA.burstSize = 8;
|
||||
spi1.spiRXDMA.transferSize = 16;
|
||||
spi1.spiRXDMA.destAddressInputMode = "VARIABLE";
|
||||
spi1.spiRXDMA.destAddressVariable = "destAddr";
|
||||
spi1.spiRXDMA.destBurstStep = 1;
|
||||
spi1.spiRXDMA.destTransferStep = 1;
|
||||
spi1.spiRXDMA.dmaInt.enableInterrupt = true;
|
||||
spi1.spiTXDMA.databusWidthConfig = scripting.forceWrite("DMA_CFG_SIZE_16BIT");
|
||||
spi1.spiTXDMA.dmaBase = "DMA_CH5_BASE";
|
||||
spi1.spiTXDMA.enableTriggers = true;
|
||||
spi1.spiTXDMA.useInterrupts = true;
|
||||
spi1.spiTXDMA.registerInterrupts = true;
|
||||
spi1.spiTXDMA.enableInterrupts = true;
|
||||
spi1.spiTXDMA.interruptMode = "DMA_INT_AT_END";
|
||||
spi1.spiTXDMA.burstSize = 8;
|
||||
spi1.spiTXDMA.transferSize = 16;
|
||||
spi1.spiTXDMA.srcAddressInputMode = "VARIABLE";
|
||||
spi1.spiTXDMA.srcAddressVariable = "srcAddr";
|
||||
spi1.spiTXDMA.srcBurstStep = 1;
|
||||
spi1.spiTXDMA.srcTransferStep = 1;
|
||||
spi1.spiTXDMA.dmaInt.enableInterrupt = true;
|
||||
|
||||
CMD1.$name = "generic_ram_lnk";
|
||||
CMD2.$name = "generic_flash_lnk";
|
||||
|
||||
CMD1.sectionMemory_text = ["RAMLS0","RAMLS1","RAMLS2","RAMLS3","RAMLS4"];
|
||||
CMD1.sectionMemory_ramfunc = ["RAMM0"];
|
||||
CMD1.sectionMemory_cinit = ["RAMM0"];
|
||||
CMD1.sectionMemory_stack = ["RAMM1"];
|
||||
CMD1.sectionMemory_init_array = ["RAMM0"];
|
||||
CMD1.sectionMemory_bss = ["RAMLS5"];
|
||||
CMD1.sectionMemory_const = ["RAMLS5"];
|
||||
CMD1.sectionMemory_data = ["RAMLS5"];
|
||||
CMD1.sectionMemory_switch = ["RAMM0"];
|
||||
CMD1.sectionMemory_sysmem = ["RAMLS5"];
|
||||
|
||||
CMD1.userSection.create(2);
|
||||
CMD1.userSection[0].$name = "userSection0";
|
||||
CMD1.userSection[0].sectionName = "DMA_TX_SECTION";
|
||||
CMD1.userSection[0].sectionMemory = ["RAMGS0"];
|
||||
CMD1.userSection[1].$name = "userSection1";
|
||||
CMD1.userSection[1].sectionName = "DMA_RX_SECTION";
|
||||
CMD1.userSection[1].sectionMemory = ["RAMGS1"];
|
||||
|
||||
CMD2.sectionAlignEnable_ramfunc = true;
|
||||
CMD2.sectionAlignEnable_text = true;
|
||||
CMD2.sectionAlignEnable_binit = true;
|
||||
CMD2.sectionAlignEnable_cinit = true;
|
||||
CMD2.sectionAlignEnable_switch = true;
|
||||
CMD2.sectionAlignEnable_init_array = true;
|
||||
CMD2.sectionAlignEnable_const = true;
|
||||
CMD2.sectionAlignEnable_ovly = true;
|
||||
CMD2.sectionMemory_codestart = "0x080000";
|
||||
CMD2.sectionMemory_stack = ["RAMM1"];
|
||||
CMD2.sectionMemory_bss = ["RAMLS5"];
|
||||
CMD2.sectionMemory_data = ["RAMLS5"];
|
||||
CMD2.sectionMemory_sysmem = ["RAMLS5"];
|
||||
CMD2.sectionMemory_ramfunc = ["FLASH3"];
|
||||
CMD2.sectionMemory_text = ["FLASH1","FLASH2","FLASH3","FLASH4"];
|
||||
CMD2.sectionMemory_binit = ["FLASH4"];
|
||||
CMD2.sectionMemory_cinit = ["FLASH4"];
|
||||
CMD2.sectionMemory_switch = ["FLASH1"];
|
||||
CMD2.sectionMemory_init_array = ["FLASH1"];
|
||||
CMD2.sectionMemory_const = ["FLASH5"];
|
||||
CMD2.sectionMemory_ovly = ["FLASH6"];
|
||||
CMD2.sectionRunFromDifferentAddr_ramfunc = true;
|
||||
CMD2.sectionRun_ramfunc = ["RAMLS0"];
|
||||
CMD2.sectionBinit_ramfunc = false;
|
||||
|
||||
CMD2.userSection.create(2);
|
||||
CMD2.userSection[0].$name = "userSection2";
|
||||
CMD2.userSection[0].sectionName = "DMA_TX_SECTION";
|
||||
CMD2.userSection[0].sectionMemory = ["RAMGS0"];
|
||||
CMD2.userSection[1].$name = "userSection3";
|
||||
CMD2.userSection[1].sectionName = "DMA_RX_SECTION";
|
||||
CMD2.userSection[1].sectionMemory = ["RAMGS1"];
|
||||
@@ -0,0 +1,484 @@
|
||||
//#############################################################################
|
||||
//
|
||||
// FILE: spi_ex6_eeprom.c
|
||||
//
|
||||
// TITLE: SPI EEPROM
|
||||
//
|
||||
//! \addtogroup driver_example_list
|
||||
//! <h1>SPI EEPROM</h1>
|
||||
//!
|
||||
//! This program will write 8 bytes to EEPROM and read them back. The device
|
||||
//! communicates with the EEPROM via SPI and specific opcodes. This example is
|
||||
//! written to work with the SPI Serial EEPROM AT25128/256.
|
||||
//! Note: SPI character length is configured to 8 bits in SysConfig, and not
|
||||
//! changed throughout the execution of the program. Runtime updation of
|
||||
//! character length when CS pin is not controlled by the SPI module can lead
|
||||
//! to unpredictable behaviour
|
||||
//!
|
||||
//! \b External \b Connections \n
|
||||
//! \b External \b Connections \n
|
||||
//! - Connect external SPI EEPROM
|
||||
//! - Connect GPIO16 (PICO) to external EEPROM SI pin
|
||||
//! - Connect GPIO17 (POCI) to external EEPROM SO pin
|
||||
//! - Connect GPIO18 (CLK) to external EEPROM SCK pin
|
||||
//! - Connect GPIO11 (CS) to external EEPROM CS pin
|
||||
//! - Connect the external EEPROM VCC and GND pins
|
||||
//!
|
||||
//! \b Watch \b Variables \n
|
||||
//! - writeBuffer - Data that is written to external EEPROM
|
||||
//! - readBuffer - Data that is read back from EEPROM
|
||||
//! - error - Error count
|
||||
//!
|
||||
//
|
||||
//#############################################################################
|
||||
//
|
||||
//
|
||||
//
|
||||
// C2000Ware v5.04.00.00
|
||||
//
|
||||
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// $
|
||||
//#############################################################################
|
||||
|
||||
//
|
||||
// Included Files
|
||||
//
|
||||
#include "driverlib.h"
|
||||
#include "device.h"
|
||||
#include "board.h"
|
||||
|
||||
//
|
||||
// Defines
|
||||
//
|
||||
#define EEPROM_ADDR 0x0000
|
||||
#define NUM_BYTES 8
|
||||
|
||||
//
|
||||
// SPI EEPROM status
|
||||
//
|
||||
#define MSG_STATUS_READY_M 0x0001 // EEPROM is ready (not busy)
|
||||
#define MSG_STATUS_WRITE_READY_M 0x0002 // EEPROM
|
||||
#define MSG_STATUS_BUSY 0xFFFF // EEPROM is busy (internal write)
|
||||
|
||||
//
|
||||
// Opcodes for the EEPROM (8-bit)
|
||||
//
|
||||
#define RDSR 0x05
|
||||
#define READ 0x03
|
||||
#define WRITE 0x02
|
||||
#define WREN 0x06
|
||||
#define WRDI 0x04
|
||||
#define WRSR 0x01
|
||||
|
||||
//
|
||||
// Defines for Chip Select toggle.
|
||||
//
|
||||
#define CS_LOW GPIO_writePin(SPI_CS_GPIO, 0)
|
||||
#define CS_HIGH GPIO_writePin(SPI_CS_GPIO, 1)
|
||||
|
||||
//
|
||||
// Globals
|
||||
//
|
||||
uint16_t writeBuffer[8] = {100, 101, 102, 103, 104, 105, 106, 107};
|
||||
uint16_t readBuffer[8] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
|
||||
|
||||
//
|
||||
// Function Prototypes
|
||||
//
|
||||
uint16_t readStatusRegister(uint16_t statusRegister);
|
||||
void writeData(uint16_t address, uint16_t * data, uint16_t length, uint16_t txdly);
|
||||
void readData(uint16_t address, uint16_t * data, uint16_t length, uint16_t txdly);
|
||||
void enableWrite(void);
|
||||
|
||||
#define DUMMY_DATA 0
|
||||
#define NO_DELAY 0
|
||||
|
||||
uint16_t SPI_readByte_EEPROM(uint32_t base, uint16_t address);
|
||||
uint16_t SPI_read16bits_EEPROM(uint32_t base, SPI_endianess endianness, uint16_t address);
|
||||
uint32_t SPI_read24bits_EEPROM(uint32_t base, SPI_endianess endianness, uint16_t address);
|
||||
uint32_t SPI_read32bits_EEPROM(uint32_t base, SPI_endianess endianness, uint16_t address);
|
||||
|
||||
void done(void);
|
||||
|
||||
uint32_t base = SPIA_BASE;
|
||||
|
||||
#define BUFFER_SIZE 64
|
||||
|
||||
//
|
||||
// Main
|
||||
//
|
||||
void main(void)
|
||||
{
|
||||
uint16_t i;
|
||||
uint16_t pass = 0;
|
||||
uint16_t fail = 0;
|
||||
|
||||
|
||||
//
|
||||
// Initialize device clock and peripherals
|
||||
//
|
||||
Device_init();
|
||||
|
||||
//
|
||||
// Disable pin locks and enable internal pullups.
|
||||
//
|
||||
Device_initGPIO();
|
||||
|
||||
//
|
||||
// Board initialization
|
||||
//
|
||||
Board_init();
|
||||
|
||||
uint16_t TXbuff[BUFFER_SIZE];
|
||||
uint16_t RXbuff[BUFFER_SIZE];
|
||||
|
||||
for(i=0; i<BUFFER_SIZE;i++)
|
||||
{
|
||||
TXbuff[i] = i+1;
|
||||
RXbuff[i] = 0;
|
||||
}
|
||||
|
||||
CS_HIGH;
|
||||
|
||||
//
|
||||
// Enable write on the EEPROM
|
||||
//
|
||||
enableWrite();
|
||||
|
||||
// Wait until the EEPROM is ready to write data
|
||||
while((readStatusRegister(RDSR) & MSG_STATUS_WRITE_READY_M) != MSG_STATUS_WRITE_READY_M)
|
||||
{
|
||||
}
|
||||
|
||||
writeData(EEPROM_ADDR, &TXbuff[0], BUFFER_SIZE, NO_DELAY);
|
||||
|
||||
//
|
||||
// Wait until the EEPROM is ready to write data
|
||||
// MSG_STATUS_READY_M == 0 indicates READY
|
||||
//
|
||||
while((readStatusRegister(RDSR) & MSG_STATUS_READY_M) == MSG_STATUS_READY_M)
|
||||
{
|
||||
}
|
||||
|
||||
uint32_t RXdata = 0;
|
||||
|
||||
RXdata = SPI_readByte_EEPROM(base, EEPROM_ADDR);
|
||||
|
||||
if(RXdata == 0x1)
|
||||
{
|
||||
pass++;
|
||||
}
|
||||
else
|
||||
{
|
||||
fail++;
|
||||
ESTOP0;
|
||||
}
|
||||
|
||||
RXdata = SPI_read16bits_EEPROM(base, SPI_DATA_LITTLE_ENDIAN, EEPROM_ADDR);
|
||||
|
||||
if(RXdata == 0x0201)
|
||||
{
|
||||
pass++;
|
||||
}
|
||||
else
|
||||
{
|
||||
fail++;
|
||||
ESTOP0;
|
||||
}
|
||||
|
||||
RXdata = SPI_read16bits_EEPROM(base, SPI_DATA_BIG_ENDIAN, EEPROM_ADDR);
|
||||
|
||||
if(RXdata == 0x0102)
|
||||
{
|
||||
pass++;
|
||||
}
|
||||
else
|
||||
{
|
||||
fail++;
|
||||
ESTOP0;
|
||||
}
|
||||
|
||||
RXdata = SPI_read24bits_EEPROM(base, SPI_DATA_LITTLE_ENDIAN, EEPROM_ADDR);
|
||||
|
||||
if(RXdata == 0x030201)
|
||||
{
|
||||
pass++;
|
||||
}
|
||||
else
|
||||
{
|
||||
fail++;
|
||||
ESTOP0;
|
||||
}
|
||||
|
||||
RXdata = SPI_read24bits_EEPROM(base, SPI_DATA_BIG_ENDIAN, EEPROM_ADDR);
|
||||
|
||||
if(RXdata == 0x010203)
|
||||
{
|
||||
pass++;
|
||||
}
|
||||
else
|
||||
{
|
||||
fail++;
|
||||
ESTOP0;
|
||||
}
|
||||
|
||||
RXdata = SPI_read32bits_EEPROM(base, SPI_DATA_LITTLE_ENDIAN, EEPROM_ADDR);
|
||||
|
||||
if(RXdata == 0x04030201)
|
||||
{
|
||||
pass++;
|
||||
}
|
||||
else
|
||||
{
|
||||
fail++;
|
||||
ESTOP0;
|
||||
}
|
||||
|
||||
RXdata = SPI_read32bits_EEPROM(base, SPI_DATA_BIG_ENDIAN, EEPROM_ADDR);
|
||||
|
||||
if(RXdata == 0x01020304)
|
||||
{
|
||||
pass++;
|
||||
}
|
||||
else
|
||||
{
|
||||
fail++;
|
||||
ESTOP0;
|
||||
}
|
||||
|
||||
// Read from the EEPROM
|
||||
readData(EEPROM_ADDR, &RXbuff[0], BUFFER_SIZE,NO_DELAY);
|
||||
|
||||
// Check received data for correctness
|
||||
for(i = 0; i < BUFFER_SIZE; i++)
|
||||
{
|
||||
if(TXbuff[i] != RXbuff[i])
|
||||
{
|
||||
fail++;
|
||||
}
|
||||
}
|
||||
|
||||
if((pass == 7) && (fail == 0))
|
||||
{
|
||||
done();
|
||||
}
|
||||
else
|
||||
{
|
||||
ESTOP0;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void done(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
uint16_t SPI_readByte_EEPROM(uint32_t base, uint16_t address)
|
||||
{
|
||||
uint16_t RXdata = 0;
|
||||
|
||||
CS_LOW;
|
||||
|
||||
// Send the READ opcode.
|
||||
SPI_transmitByte(base, READ);
|
||||
|
||||
// Send EEPROM address to write data
|
||||
SPI_transmitByte(base, address>>8);
|
||||
SPI_transmitByte(base, address);
|
||||
|
||||
// Receive data byte from EEPROM by sending dummy byte
|
||||
RXdata = SPI_receiveByte(base, DUMMY_DATA);
|
||||
|
||||
CS_HIGH;
|
||||
|
||||
return(RXdata);
|
||||
}
|
||||
|
||||
uint16_t SPI_read16bits_EEPROM(uint32_t base, SPI_endianess endianness, uint16_t address)
|
||||
{
|
||||
uint16_t RXdata = 0;
|
||||
|
||||
CS_LOW;
|
||||
|
||||
// Send the READ opcode.
|
||||
SPI_transmitByte(base, READ);
|
||||
|
||||
// Send EEPROM address to write data
|
||||
SPI_transmitByte(base, address>>8);
|
||||
SPI_transmitByte(base, address);
|
||||
|
||||
// Receive data 16-bit word from EEPROM by sending two dummy bytes
|
||||
RXdata = SPI_receive16Bits(base, endianness, DUMMY_DATA, NO_DELAY);
|
||||
|
||||
CS_HIGH;
|
||||
|
||||
return RXdata;
|
||||
}
|
||||
|
||||
uint32_t SPI_read24bits_EEPROM(uint32_t base, SPI_endianess endianness, uint16_t address)
|
||||
{
|
||||
uint32_t RXdata = 0;
|
||||
|
||||
CS_LOW;
|
||||
|
||||
// Send the READ opcode.
|
||||
SPI_transmitByte(base, READ);
|
||||
|
||||
// Send EEPROM address to write data
|
||||
SPI_transmitByte(base, address>>8);
|
||||
SPI_transmitByte(base, address);
|
||||
|
||||
// Receive data 24-bit word from EEPROM by sending three dummy bytes
|
||||
RXdata = SPI_receive24Bits(base, endianness, DUMMY_DATA, NO_DELAY);
|
||||
|
||||
CS_HIGH;
|
||||
|
||||
return RXdata;
|
||||
}
|
||||
|
||||
uint32_t SPI_read32bits_EEPROM(uint32_t base, SPI_endianess endianness, uint16_t address)
|
||||
{
|
||||
uint32_t RXdata = 0;
|
||||
|
||||
CS_LOW;
|
||||
|
||||
// Send the READ opcode.
|
||||
SPI_transmitByte(base, READ);
|
||||
|
||||
// Send EEPROM address to write data
|
||||
SPI_transmitByte(base, address>>8);
|
||||
SPI_transmitByte(base, address);
|
||||
|
||||
// Receive data 32-bit word from EEPROM by sending four dummy bytes
|
||||
RXdata = SPI_receive32Bits(base, endianness, DUMMY_DATA, NO_DELAY);
|
||||
|
||||
CS_HIGH;
|
||||
|
||||
return RXdata;
|
||||
}
|
||||
|
||||
//
|
||||
// Function to send RDSR opcode and return the status of the EEPROM
|
||||
//
|
||||
uint16_t readStatusRegister(uint16_t statusRegister)
|
||||
{
|
||||
uint16_t temp;
|
||||
uint32_t base = SPIA_BASE;
|
||||
|
||||
// Pull chip select low.
|
||||
CS_LOW;
|
||||
|
||||
// Send RDSR opcode
|
||||
SPI_transmitByte(base, statusRegister);
|
||||
|
||||
// Send dummy data to read status register.
|
||||
temp = SPI_receiveByte(base, 0x0);
|
||||
|
||||
// Pull chip select high.
|
||||
CS_HIGH;
|
||||
|
||||
// Read the status from the receive buffer
|
||||
return(temp);
|
||||
}
|
||||
|
||||
//
|
||||
// Function to send the WREN opcode
|
||||
//
|
||||
void enableWrite(void)
|
||||
{
|
||||
uint32_t base = SPIA_BASE;
|
||||
// Pull chip select low.
|
||||
CS_LOW;
|
||||
|
||||
// Send the WREN opcode.
|
||||
SPI_transmitByte(base, WREN);
|
||||
|
||||
// Pull chip select high.
|
||||
CS_HIGH;
|
||||
}
|
||||
|
||||
//
|
||||
// Function to write data to the EEPROM
|
||||
// - address is the byte address of the EEPROM
|
||||
// - data is a pointer to an array of data being sent
|
||||
// - length is the number of characters in the array to send
|
||||
//
|
||||
void writeData(uint16_t address, uint16_t *data, uint16_t length, uint16_t txdly)
|
||||
{
|
||||
uint32_t base = SPIA_BASE;
|
||||
|
||||
// Pull chip select low.
|
||||
CS_LOW;
|
||||
|
||||
// Send the WRITE opcode.
|
||||
SPI_transmitByte(base, WRITE);
|
||||
|
||||
// Send EEPROM address to write data
|
||||
SPI_transmitByte(base, address>>8);
|
||||
SPI_transmitByte(base, address);
|
||||
|
||||
// Send data to be programmed
|
||||
SPI_transmitNBytes(base, data, length, txdly);
|
||||
|
||||
// Pull chip select high.
|
||||
CS_HIGH;
|
||||
}
|
||||
|
||||
//
|
||||
// Function to read data from the EEPROM
|
||||
// - address is the byte address of the EEPROM
|
||||
// - data is a pointer to an array of data being received
|
||||
// - length is the number of characters in the array to receive
|
||||
//
|
||||
void readData(uint16_t address, uint16_t *data, uint16_t length, uint16_t txdly)
|
||||
{
|
||||
uint32_t base = SPIA_BASE;
|
||||
|
||||
CS_LOW;
|
||||
|
||||
// Send the READ opcode.
|
||||
SPI_transmitByte(base, READ);
|
||||
|
||||
// Send EEPROM address to write data
|
||||
SPI_transmitByte(base, address>>8);
|
||||
SPI_transmitByte(base, address);
|
||||
|
||||
// Receive length number of bytes
|
||||
SPI_receiveNBytes(base, data, length, txdly);
|
||||
|
||||
|
||||
CS_HIGH;
|
||||
}
|
||||
|
||||
//
|
||||
// End of File
|
||||
//
|
||||
|
||||
@@ -0,0 +1,28 @@
|
||||
/**
|
||||
* Import the modules used in this configuration.
|
||||
*/
|
||||
const gpio = scripting.addModule("/driverlib/gpio.js", {}, false);
|
||||
const gpio1 = gpio.addInstance();
|
||||
const spi = scripting.addModule("/driverlib/spi.js", {}, false);
|
||||
const spi1 = spi.addInstance();
|
||||
|
||||
/**
|
||||
* Write custom configuration values to the imported modules.
|
||||
*/
|
||||
gpio1.$name = "SPI_CS_GPIO";
|
||||
gpio1.direction = "GPIO_DIR_MODE_OUT";
|
||||
gpio1.gpioPin.$assign = "GPIO11";
|
||||
|
||||
spi1.$name = "mySPI0";
|
||||
spi1.useCase = "CUSTOM";
|
||||
spi1.useInterfacePins = ["SPI@_CLK","SPI@_SIMO","SPI@_SOMI"];
|
||||
spi1.transferProtocol = "SPI_PROT_POL0PHA1";
|
||||
spi1.mode = "SPI_MODE_CONTROLLER";
|
||||
spi1.bitRate = 1000000;
|
||||
spi1.dataWidth = "8";
|
||||
spi1.useInterrupts = false;
|
||||
spi1.useFifo = false;
|
||||
spi1.spi.$assign = "SPIA";
|
||||
spi1.spi.spi_picoPin.$assign = "GPIO16";
|
||||
spi1.spi.spi_pociPin.$assign = "GPIO17";
|
||||
spi1.spi.spi_clkPin.$assign = "GPIO18";
|
||||
@@ -0,0 +1,412 @@
|
||||
//#############################################################################
|
||||
//
|
||||
// FILE: spi_ex7_eeprom_dma.c
|
||||
//
|
||||
// TITLE: SPI DMA EEPROM
|
||||
//
|
||||
//! \addtogroup driver_example_list
|
||||
//! <h1>SPI DMA EEPROM</h1>
|
||||
//!
|
||||
//! This program will write 8 bytes to EEPROM and read them back. The device
|
||||
//! communicates with the EEPROM via SPI using DMA and specific opcodes. This
|
||||
//! example is written to work with the SPI Serial EEPROM AT25128/256.
|
||||
//! Note: SPI character length is configured to 8 bits in SysConfig, and not
|
||||
//! changed throughout the execution of the program. Runtime updation of
|
||||
//! character length when CS pin is not controlled by the SPI module can lead
|
||||
//! to unpredictable behaviour
|
||||
//!
|
||||
//! \b External \b Connections \n
|
||||
//! \b External \b Connections \n
|
||||
//! - Connect external SPI EEPROM
|
||||
//! - Connect GPIO16 (PICO) to external EEPROM SI pin
|
||||
//! - Connect GPIO17 (POCI) to external EEPROM SO pin
|
||||
//! - Connect GPIO18 (CLK) to external EEPROM SCK pin
|
||||
//! - Connect GPIO11 (CS) to external EEPROM CS pin
|
||||
//! - Connect the external EEPROM VCC and GND pins
|
||||
//!
|
||||
//! \b Watch \b Variables \n
|
||||
//! - writeBuffer - Data that is written to external EEPROM
|
||||
//! - SPI_DMA_Handle.RXdata - Data that is read back from EEPROM
|
||||
//! when number of received bytes is
|
||||
//! less than 4
|
||||
//! - SPI_DMA_Handle.pSPIRXDMA->pbuffer - Start address of received data
|
||||
//! from EEPROM
|
||||
//! - error - Error count
|
||||
//!
|
||||
//
|
||||
//
|
||||
//#############################################################################
|
||||
//
|
||||
//
|
||||
//
|
||||
// C2000Ware v5.04.00.00
|
||||
//
|
||||
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// $
|
||||
//#############################################################################
|
||||
|
||||
//
|
||||
// Included Files
|
||||
//
|
||||
#include "driverlib.h"
|
||||
#include "device.h"
|
||||
|
||||
#include "spi_DMA.h"
|
||||
|
||||
//
|
||||
// Defines
|
||||
// SPI EEPROM status
|
||||
//
|
||||
#define MSG_STATUS_READY_M 0x0000 // EEPROM is ready (not busy)
|
||||
#define MSG_STATUS_WRITE_READY_M 0x0002 // EEPROM
|
||||
#define MSG_STATUS_BUSY 0xFFFF // EEPROM is busy (internal write)
|
||||
|
||||
//
|
||||
// Opcodes for the EEPROM (8-bit)
|
||||
//
|
||||
#define RDSR 0x05
|
||||
#define READ 0x03
|
||||
#define WRITE 0x02
|
||||
#define WREN 0x06
|
||||
#define WRDI 0x04
|
||||
#define WRSR 0x01
|
||||
|
||||
//
|
||||
// Globals
|
||||
//
|
||||
struct EEPROM_Transaction EEPROM_Transaction;
|
||||
|
||||
//
|
||||
// Function Prototypes
|
||||
//
|
||||
void initDMA(void);
|
||||
|
||||
void EEPROM_writeTransaction(uint16_t eepromAddr, uint16_t *pbuffer, uint16_t numofBytes);
|
||||
void EEPROM_readTransaction(uint16_t eepromAddr, uint16_t numofBytes);
|
||||
|
||||
void sendWriteEnable(void);
|
||||
void readStatusRegister(uint16_t statusRegister, struct SPI_DMA_handle *pSPI_DMA_Handle);
|
||||
|
||||
void waitforWriteReady(void);
|
||||
void waitforReadReady(void);
|
||||
void writeEEPROM(void);
|
||||
void readEEPROM(void);
|
||||
|
||||
//
|
||||
// Main
|
||||
//
|
||||
void main(void)
|
||||
{
|
||||
uint16_t i;
|
||||
|
||||
//
|
||||
// Initialize device clock and peripherals
|
||||
//
|
||||
Device_init();
|
||||
|
||||
//
|
||||
// Disable pin locks and enable internal pullups.
|
||||
//
|
||||
Device_initGPIO();
|
||||
|
||||
//
|
||||
// Initialize PIE and clear PIE registers. Disables CPU interrupts.
|
||||
//
|
||||
Interrupt_initModule();
|
||||
|
||||
//
|
||||
// Initialize the PIE vector table with pointers to the shell Interrupt
|
||||
// Service Routines (ISR).
|
||||
//
|
||||
Interrupt_initVectorTable();
|
||||
|
||||
Board_init();
|
||||
|
||||
//Clear TX / RX buffer used by DMA
|
||||
for(i=0; i<BUFFER_SIZE;i++)
|
||||
{
|
||||
DMATXbuff[i] = 0;
|
||||
DMARXbuff[i] = 0;
|
||||
}
|
||||
|
||||
//
|
||||
// Enable Global Interrupt (INTM) and realtime interrupt (DBGM)
|
||||
//
|
||||
EINT;
|
||||
ERTM;
|
||||
|
||||
//////////////////////////////////////////////////////
|
||||
// 1) Using SPIA for transaction
|
||||
// 2) DMA Transmit channel = DMA channel 3
|
||||
// 3) DMA Receive channel = DMA channel 4
|
||||
//////////////////////////////////////////////////////
|
||||
setupSPI_DMA_Handler(SPI_EEPROM_BASE, 8U, DMA_CH3_BASE, DMA_CH4_BASE);
|
||||
|
||||
uint16_t eepromAddr = 0x0;
|
||||
uint16_t writeBuffer[BUFFER_SIZE];
|
||||
|
||||
for(i=0;i<BUFFER_SIZE;i++)
|
||||
{
|
||||
writeBuffer[i] = i;
|
||||
}
|
||||
|
||||
EEPROM_writeTransaction(eepromAddr, &writeBuffer[0], BUFFER_SIZE);
|
||||
|
||||
//Wait for TransactionStatus to be set to SPI_DMA_TRANSACTION_COMPLETE
|
||||
while(SPI_DMA_Handle.TransactionStatus != SPI_DMA_TRANSACTION_COMPLETE);
|
||||
|
||||
ESTOP0;
|
||||
|
||||
EEPROM_readTransaction(eepromAddr, 4U);
|
||||
|
||||
//Wait for TransactionStatus to be set to SPI_DMA_TRANSACTION_COMPLETE
|
||||
while(SPI_DMA_Handle.TransactionStatus != SPI_DMA_TRANSACTION_COMPLETE);
|
||||
|
||||
//Number of received bytes <= 4,
|
||||
//So, RXdata will contain received data
|
||||
//Receive data is also available in with start address pointed by
|
||||
//SPI_DMA_Handle.pSPIRXDMA->pbuffer
|
||||
ESTOP0;
|
||||
|
||||
EEPROM_readTransaction(eepromAddr, BUFFER_SIZE);
|
||||
|
||||
//Wait for TransactionStatus to be set to SPI_DMA_TRANSACTION_COMPLETE
|
||||
while(SPI_DMA_Handle.TransactionStatus != SPI_DMA_TRANSACTION_COMPLETE);
|
||||
|
||||
//Number of received bytes > 4,
|
||||
//So, RXdata will not contain any data
|
||||
//Receive data is also available in with start address pointed by
|
||||
//SPI_DMA_Handle.pSPIRXDMA->pbuffer
|
||||
ESTOP0;
|
||||
|
||||
uint16_t error = 0;
|
||||
for(i=0;i<BUFFER_SIZE;i++)
|
||||
{
|
||||
if(writeBuffer[i] != SPI_DMA_Handle.pSPIRXDMA->pbuffer[i])
|
||||
{
|
||||
//Data written into EEPROM doesn't match with
|
||||
//data read from EEPROM
|
||||
error++;
|
||||
ESTOP0;
|
||||
}
|
||||
}
|
||||
|
||||
while(1);
|
||||
}
|
||||
|
||||
|
||||
void EEPROM_writeTransaction(uint16_t eepromAddr, uint16_t *pbuffer, uint16_t numofBytes)
|
||||
{
|
||||
|
||||
CS_HIGH;
|
||||
//EEPROM address
|
||||
EEPROM_Transaction.EEPROMAddress = eepromAddr;
|
||||
//Number of bytes to be programmed
|
||||
EEPROM_Transaction.numofBytes = numofBytes;
|
||||
//Start address of data array to be programmed
|
||||
EEPROM_Transaction.pbuff = pbuffer;
|
||||
|
||||
functionPointer pFunction[5U];
|
||||
|
||||
//////////////////////////////////////////////////////
|
||||
// 1) Send Write Enable to EEPROM
|
||||
// 2) Read EEPROM Read Status Register (RDSR) and
|
||||
// wait till EEPROM is ready to be written
|
||||
// 3) Write to EEPROM using TXbuff
|
||||
//////////////////////////////////////////////////////
|
||||
pFunction[0] = sendWriteEnable; //1st function to be executed
|
||||
pFunction[1] = waitforWriteReady; //2nd function to be executed
|
||||
pFunction[2] = writeEEPROM; //3rd function to be executed
|
||||
pFunction[3] = NULL; //NULL function
|
||||
pFunction[4] = NULL; //NULL function
|
||||
|
||||
//Start DMA - SPI transaction mentioned in function pointer array
|
||||
//1) Execute sendWriteEnable function
|
||||
//2) Execute waitforWriteReady function
|
||||
//3) Execute writeEEPROM function
|
||||
RunCommandSequence(pFunction);
|
||||
}
|
||||
|
||||
void EEPROM_readTransaction(uint16_t eepromAddr, uint16_t numofBytes)
|
||||
{
|
||||
CS_HIGH;
|
||||
//EEPROM address
|
||||
EEPROM_Transaction.EEPROMAddress = eepromAddr;
|
||||
//Number of bytes to be programmed
|
||||
EEPROM_Transaction.numofBytes = numofBytes;
|
||||
|
||||
//Reset RXbuff pointer to default value
|
||||
SPI_DMA_Handle.pSPIRXDMA->pbuffer = &DMARXbuff[0];
|
||||
SPI_DMA_Handle.RXdata = 0;
|
||||
|
||||
functionPointer pFunction[5U];
|
||||
|
||||
//////////////////////////////////////////////////////
|
||||
// 1) Read EEPROM Read Status Register (RDSR) and
|
||||
// wait till EEPROM is ready to be read
|
||||
// 2) Read EEPROM and store in RXbuff
|
||||
//////////////////////////////////////////////////////
|
||||
pFunction[0] = waitforReadReady; //1st function to be executed
|
||||
pFunction[1] = readEEPROM; //2nd function to be executed
|
||||
pFunction[2] = NULL; //NULL function
|
||||
pFunction[3] = NULL; //NULL function
|
||||
pFunction[4] = NULL; //NULL function
|
||||
|
||||
//Start DMA - SPI transaction mentioned in function pointer array
|
||||
//1) Execute waitforReadReady function
|
||||
//2) Execute readEEPROM function
|
||||
RunCommandSequence(pFunction);
|
||||
}
|
||||
|
||||
//
|
||||
// Function to send the WREN opcode
|
||||
//
|
||||
void sendWriteEnable(void)
|
||||
{
|
||||
SPI_DMA_Handle.TransactionStatus = SPI_DMA_TRANSACTION_STARTED;
|
||||
SPI_DMA_Handle.TransactionType = SPI_DMA_WRITE_ENABLE;
|
||||
|
||||
// Send the WREN opcode.
|
||||
SPI_DMA_TransmitByte(WREN, &SPI_DMA_Handle);
|
||||
|
||||
// Start SPI-DMA transaction
|
||||
SPI_DMA_StartTransaction(&SPI_DMA_Handle, SPI_DMA_Handle.charlength, NO_DELAY);
|
||||
}
|
||||
|
||||
//
|
||||
// Function to read status register and wait for EEPROM
|
||||
// to be ready to write operation
|
||||
//
|
||||
void waitforWriteReady(void)
|
||||
{
|
||||
SPI_DMA_Handle.TransactionStatus = SPI_DMA_TRANSACTION_STARTED;
|
||||
SPI_DMA_Handle.TransactionType = SPI_DMA_READ_STATUS_REGISTER;
|
||||
SPI_DMA_Handle.expectedOutput = MSG_STATUS_WRITE_READY_M;
|
||||
|
||||
//Read EEPROM Read Status register to check write ready bit
|
||||
readStatusRegister(RDSR, &SPI_DMA_Handle);
|
||||
}
|
||||
|
||||
//
|
||||
// Function to read status register and wait for EEPROM
|
||||
// to be ready to read operation
|
||||
//
|
||||
void waitforReadReady(void)
|
||||
{
|
||||
SPI_DMA_Handle.TransactionStatus = SPI_DMA_TRANSACTION_STARTED;
|
||||
SPI_DMA_Handle.TransactionType = SPI_DMA_READ_STATUS_REGISTER;
|
||||
SPI_DMA_Handle.expectedOutput = MSG_STATUS_READY_M;
|
||||
|
||||
//Read EEPROM Read Status register to check read ready bit
|
||||
readStatusRegister(RDSR, &SPI_DMA_Handle);
|
||||
}
|
||||
|
||||
//
|
||||
// Function used to write to EEPROM using transmit buffer
|
||||
//
|
||||
void writeEEPROM(void)
|
||||
{
|
||||
SPI_DMA_Handle.TransactionStatus = SPI_DMA_TRANSACTION_STARTED;
|
||||
SPI_DMA_Handle.TransactionType = SPI_DMA_WRITE_TRANSACTION;
|
||||
|
||||
uint16_t address = EEPROM_Transaction.EEPROMAddress;
|
||||
uint16_t numOfbytes = EEPROM_Transaction.numofBytes;
|
||||
uint16_t *pdata = EEPROM_Transaction.pbuff;
|
||||
|
||||
|
||||
// Send the WRITE opcode.
|
||||
SPI_DMA_TransmitByte(WRITE, &SPI_DMA_Handle);
|
||||
|
||||
// Send EEPROM address to write data
|
||||
SPI_DMA_Transmit16bitWord(address, &SPI_DMA_Handle);
|
||||
|
||||
// Send data to be programmed
|
||||
SPI_DMA_Transmit_NBytes(pdata, numOfbytes, &SPI_DMA_Handle);
|
||||
|
||||
// Configure SPI / DMA and initiate SPI transaction
|
||||
SPI_DMA_StartTransaction(&SPI_DMA_Handle, SPI_DMA_Handle.charlength, NO_DELAY);
|
||||
}
|
||||
|
||||
|
||||
|
||||
//
|
||||
// Function used to read to EEPROM
|
||||
// Receive buffer pointer stored in SPI_DMA_Handle.pSPIRXDMA->pbuffer
|
||||
//
|
||||
void readEEPROM(void)
|
||||
{
|
||||
uint16_t counter = 0;
|
||||
|
||||
SPI_DMA_Handle.TransactionStatus = SPI_DMA_TRANSACTION_STARTED;
|
||||
SPI_DMA_Handle.TransactionType = SPI_DMA_READ_TRANSACTION;
|
||||
|
||||
SPI_DMA_Handle.endianess = SPI_DATA_BIG_ENDIAN;
|
||||
|
||||
uint16_t address = EEPROM_Transaction.EEPROMAddress;
|
||||
uint16_t numOfbytes = EEPROM_Transaction.numofBytes;
|
||||
|
||||
// Send the READ opcode.
|
||||
SPI_DMA_TransmitByte(READ, &SPI_DMA_Handle); counter++;
|
||||
|
||||
// Send EEPROM address to write data
|
||||
SPI_DMA_Transmit16bitWord(address, &SPI_DMA_Handle); counter+=2;
|
||||
|
||||
SPI_DMA_Handle.offsetRXbuff = counter;
|
||||
|
||||
// Receive length number of bytes
|
||||
SPI_DMA_Receive_NBytes(numOfbytes, &SPI_DMA_Handle);
|
||||
|
||||
// Configure SPI / DMA and initiate SPI transaction
|
||||
SPI_DMA_StartTransaction(&SPI_DMA_Handle, SPI_DMA_Handle.charlength, NO_DELAY);
|
||||
}
|
||||
|
||||
//
|
||||
// Function to send RDSR opcode and return the status of the EEPROM
|
||||
//
|
||||
void readStatusRegister(uint16_t statusRegister, struct SPI_DMA_handle *pSPI_DMA_Handle)
|
||||
{
|
||||
uint16_t counter = 0;
|
||||
|
||||
// Send RDSR opcode
|
||||
SPI_DMA_TransmitByte(statusRegister, pSPI_DMA_Handle); counter++;
|
||||
|
||||
// Send dummy data to read status register.
|
||||
SPI_DMA_ReceiveByte(DUMMY_DATA, pSPI_DMA_Handle); counter++;
|
||||
|
||||
// Configure SPI / DMA and initiate SPI transaction
|
||||
SPI_DMA_StartTransaction(pSPI_DMA_Handle, pSPI_DMA_Handle->charlength, NO_DELAY);
|
||||
|
||||
// offset RXbuffer correction
|
||||
pSPI_DMA_Handle->offsetRXbuff = counter-1;
|
||||
|
||||
}
|
||||
|
||||
|
||||
@@ -0,0 +1,28 @@
|
||||
/**
|
||||
* Import the modules used in this configuration.
|
||||
*/
|
||||
const gpio = scripting.addModule("/driverlib/gpio.js", {}, false);
|
||||
const gpio1 = gpio.addInstance();
|
||||
const spi = scripting.addModule("/driverlib/spi.js", {}, false);
|
||||
const spi1 = spi.addInstance();
|
||||
|
||||
/**
|
||||
* Write custom configuration values to the imported modules.
|
||||
*/
|
||||
gpio1.$name = "SPI_CS_GPIO";
|
||||
gpio1.direction = "GPIO_DIR_MODE_OUT";
|
||||
gpio1.gpioPin.$assign = "GPIO11";
|
||||
|
||||
spi1.$name = "SPI_EEPROM";
|
||||
spi1.useCase = "CUSTOM";
|
||||
spi1.useInterfacePins = ["SPI@_CLK","SPI@_SIMO","SPI@_SOMI"];
|
||||
spi1.transferProtocol = "SPI_PROT_POL0PHA1";
|
||||
spi1.mode = "SPI_MODE_CONTROLLER";
|
||||
spi1.bitRate = 1000000;
|
||||
spi1.dataWidth = "8";
|
||||
spi1.useInterrupts = false;
|
||||
spi1.useFifo = false;
|
||||
spi1.spi.$assign = "SPIA";
|
||||
spi1.spi.spi_picoPin.$assign = "GPIO16";
|
||||
spi1.spi.spi_pociPin.$assign = "GPIO17";
|
||||
spi1.spi.spi_clkPin.$assign = "GPIO18";
|
||||
Reference in New Issue
Block a user