Update repo
This commit is contained in:
+33
@@ -0,0 +1,33 @@
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//###########################################################################
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//
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// FILE: cla_data_rom_lnk.cmd
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//
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// TITLE: CLA data rom linker command file
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//
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//###########################################################################
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||||
// $TI Release: $
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||||
// $Release Date: $
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//###########################################################################
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MEMORY
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{
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PAGE 1 :
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CLA1_DATAROM_RESERVED : origin = 0x01001000, length = 0x000870, fill=0xFFFF
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CLA1_DATAROM : origin = 0x01001870, length = 0x00078a, fill = 0xFFFF
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CROM_VERSION : origin = 0x01001FFA, length = 0x000006, fill = 0xFFFF
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/* CLA1_DATAROM : origin = 0x01001000, length = 0x001000*/
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}
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SECTIONS
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{
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CLA1mathTables : load = CLA1_DATAROM, PAGE = 1
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.CROMVersion : load = CROM_VERSION, PAGE = 1
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}
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/*
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//===========================================================================
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// End of file.
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//===========================================================================
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*/
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+22
@@ -0,0 +1,22 @@
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;; TI File $Revision: /main/1 $
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;; Checkin $Date: August 14, 2012 12:48:33 $
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;;###########################################################################
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;;
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;; FILE: cla_rom_version.asm
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;;
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;; TITLE: CLA data ROM Version and checksum values.
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;;
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;; Functions:
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;;
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;;
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;; Notes:
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;;
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;;###########################################################################
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;; $TI Release: F2837x Boot ROM Version 0 $
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;; $Release Date: Oct 1, 2013 $
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;;###########################################################################
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.sect ".CROMVersion"
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.word 0x0100 ; Boot ROM Version v1.0
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.word 0x0413 ; Month/Year: (ex: 0x0109 = 1/09 = Jan 2009)
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+231
@@ -0,0 +1,231 @@
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;******************************************************************************
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;
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; FILE: CLASinCosTable.asm
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;
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; DESCRIPTION: Sine and Cosine Tables
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;
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;******************************************************************************
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; $TI Release: $
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||||
; $Release Date: $
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||||
;******************************************************************************
|
||||
; This software is licensed for use with Texas Instruments C28x
|
||||
; family DSCs. This license was provided to you prior to installing
|
||||
; the software. You may review this license by consulting a copy of
|
||||
; the agreement in the doc directory of this library.
|
||||
; ------------------------------------------------------------------------
|
||||
; Copyright (C) 2010-2011 Texas Instruments, Incorporated.
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; All Rights Reserved.
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;******************************************************************************
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;############################################################################
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;/*! \defgroup CLAMATH_TABLES (Math Tables)
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; @{
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;*/
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;############################################################################
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.def _CLAsincosTable
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.def _CLAsinTable
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.def _CLAsincosTable_Sin0
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.def _CLAcosTable
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.def _CLAsincosTable_Cos0
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.def _CLAsinTableEnd
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.def _CLAcosTableEnd
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.def _CLAsincosTable_TABLE_SIZE
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.def _CLAsincosTable_TABLE_SIZEDivTwoPi
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.def _CLAsincosTable_TwoPiDivTABLE_SIZE
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.def _CLAsincosTable_TABLE_MASK
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.def _CLAsincosTable_Coef0
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.def _CLAsincosTable_Coef1
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.def _CLAsincosTable_Coef1_pos
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.def _CLAsincosTable_Coef2
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.def _CLAsincosTable_Coef3
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.def _CLAsincosTable_Coef3_neg
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.def _CLAsincosTableEnd
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.sect "CLA1mathTables"
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_CLAsincosTable:
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_CLAsinTable:
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_CLAsincosTable_Sin0:
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.float 0.0; ; sin( 0 * 2*pi/TABLE_SIZE)
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.float 0.04906767432742; ; sin( 1 * 2*pi/TABLE_SIZE)
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.float 0.09801714032956; ; sin( 2 * 2*pi/TABLE_SIZE)
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.float 0.1467304744553; ; sin( 3 * 2*pi/TABLE_SIZE)
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||||
.float 0.1950903220162; ; sin( 4 * 2*pi/TABLE_SIZE)
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.float 0.2429801799032; ; sin( 5 * 2*pi/TABLE_SIZE)
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||||
.float 0.2902846772544; ; sin( 6 * 2*pi/TABLE_SIZE)
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.float 0.3368898533922; ; sin( 7 * 2*pi/TABLE_SIZE)
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.float 0.3826834323651; ; sin( 8 * 2*pi/TABLE_SIZE)
|
||||
.float 0.4275550934303; ; sin( 9 * 2*pi/TABLE_SIZE)
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||||
.float 0.4713967368260; ; sin( 10 * 2*pi/TABLE_SIZE)
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||||
.float 0.5141027441932; ; sin( 11 * 2*pi/TABLE_SIZE)
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||||
.float 0.5555702330196; ; sin( 12 * 2*pi/TABLE_SIZE)
|
||||
.float 0.5956993044925; ; sin( 13 * 2*pi/TABLE_SIZE)
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||||
.float 0.6343932841637; ; sin( 14 * 2*pi/TABLE_SIZE)
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.float 0.6715589548470; ; sin( 15 * 2*pi/TABLE_SIZE)
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||||
.float 0.7071067811865; ; sin( 16 * 2*pi/TABLE_SIZE)
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.float 0.7409511253549; ; sin( 17 * 2*pi/TABLE_SIZE)
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.float 0.7730104533627; ; sin( 18 * 2*pi/TABLE_SIZE)
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||||
.float 0.8032075314806; ; sin( 19 * 2*pi/TABLE_SIZE)
|
||||
.float 0.8314696123026; ; sin( 20 * 2*pi/TABLE_SIZE)
|
||||
.float 0.8577286100001; ; sin( 21 * 2*pi/TABLE_SIZE)
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||||
.float 0.8819212643481; ; sin( 22 * 2*pi/TABLE_SIZE)
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.float 0.9039892931235; ; sin( 23 * 2*pi/TABLE_SIZE)
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||||
.float 0.9238795325113; ; sin( 24 * 2*pi/TABLE_SIZE)
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.float 0.9415440651832; ; sin( 25 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9569403357322; ; sin( 26 * 2*pi/TABLE_SIZE)
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.float 0.9700312531945; ; sin( 27 * 2*pi/TABLE_SIZE)
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||||
.float 0.9807852804033; ; sin( 28 * 2*pi/TABLE_SIZE)
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||||
.float 0.9891765099649; ; sin( 29 * 2*pi/TABLE_SIZE)
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.float 0.9951847266721; ; sin( 30 * 2*pi/TABLE_SIZE)
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.float 0.9987954562052; ; sin( 31 * 2*pi/TABLE_SIZE)
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_CLAcosTable:
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_CLAsincosTable_Cos0:
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.float 1.0; ; sin( 32 * 2*pi/TABLE_SIZE)
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.float 0.9987954562052; ; sin( 33 * 2*pi/TABLE_SIZE)
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||||
.float 0.9951847266721; ; sin( 34 * 2*pi/TABLE_SIZE)
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||||
.float 0.9891765099649; ; sin( 35 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9807852804033; ; sin( 36 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9700312531945; ; sin( 37 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9569403357322; ; sin( 38 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9415440651832; ; sin( 39 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9238795325113; ; sin( 40 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9039892931235; ; sin( 41 * 2*pi/TABLE_SIZE)
|
||||
.float 0.8819212643481; ; sin( 42 * 2*pi/TABLE_SIZE)
|
||||
.float 0.8577286100001; ; sin( 43 * 2*pi/TABLE_SIZE)
|
||||
.float 0.8314696123026; ; sin( 44 * 2*pi/TABLE_SIZE)
|
||||
.float 0.8032075314806; ; sin( 45 * 2*pi/TABLE_SIZE)
|
||||
.float 0.7730104533627; ; sin( 46 * 2*pi/TABLE_SIZE)
|
||||
.float 0.7409511253549; ; sin( 47 * 2*pi/TABLE_SIZE)
|
||||
.float 0.7071067811865; ; sin( 48 * 2*pi/TABLE_SIZE)
|
||||
.float 0.6715589548470; ; sin( 49 * 2*pi/TABLE_SIZE)
|
||||
.float 0.6343932841637; ; sin( 50 * 2*pi/TABLE_SIZE)
|
||||
.float 0.5956993044925; ; sin( 51 * 2*pi/TABLE_SIZE)
|
||||
.float 0.5555702330196; ; sin( 52 * 2*pi/TABLE_SIZE)
|
||||
.float 0.5141027441932; ; sin( 53 * 2*pi/TABLE_SIZE)
|
||||
.float 0.4713967368260; ; sin( 54 * 2*pi/TABLE_SIZE)
|
||||
.float 0.4275550934303; ; sin( 55 * 2*pi/TABLE_SIZE)
|
||||
.float 0.3826834323651; ; sin( 56 * 2*pi/TABLE_SIZE)
|
||||
.float 0.3368898533922; ; sin( 57 * 2*pi/TABLE_SIZE)
|
||||
.float 0.2902846772544; ; sin( 58 * 2*pi/TABLE_SIZE)
|
||||
.float 0.2429801799032; ; sin( 59 * 2*pi/TABLE_SIZE)
|
||||
.float 0.1950903220162; ; sin( 60 * 2*pi/TABLE_SIZE)
|
||||
.float 0.1467304744553; ; sin( 61 * 2*pi/TABLE_SIZE)
|
||||
.float 0.09801714032956; ; sin( 62 * 2*pi/TABLE_SIZE)
|
||||
.float 0.04906767432742; ; sin( 63 * 2*pi/TABLE_SIZE)
|
||||
.float 0.0; ; sin( 64 * 2*pi/TABLE_SIZE)
|
||||
.float -0.04906767432742; ; sin( 65 * 2*pi/TABLE_SIZE)
|
||||
.float -0.09801714032956; ; sin( 66 * 2*pi/TABLE_SIZE)
|
||||
.float -0.1467304744553; ; sin( 67 * 2*pi/TABLE_SIZE)
|
||||
.float -0.1950903220162; ; sin( 68 * 2*pi/TABLE_SIZE)
|
||||
.float -0.2429801799032; ; sin( 69 * 2*pi/TABLE_SIZE)
|
||||
.float -0.2902846772544; ; sin( 70 * 2*pi/TABLE_SIZE)
|
||||
.float -0.3368898533922; ; sin( 71 * 2*pi/TABLE_SIZE)
|
||||
.float -0.3826834323651; ; sin( 72 * 2*pi/TABLE_SIZE)
|
||||
.float -0.4275550934303; ; sin( 73 * 2*pi/TABLE_SIZE)
|
||||
.float -0.4713967368260; ; sin( 74 * 2*pi/TABLE_SIZE)
|
||||
.float -0.5141027441932; ; sin( 75 * 2*pi/TABLE_SIZE)
|
||||
.float -0.5555702330196; ; sin( 76 * 2*pi/TABLE_SIZE)
|
||||
.float -0.5956993044925; ; sin( 77 * 2*pi/TABLE_SIZE)
|
||||
.float -0.6343932841637; ; sin( 78 * 2*pi/TABLE_SIZE)
|
||||
.float -0.6715589548470; ; sin( 79 * 2*pi/TABLE_SIZE)
|
||||
.float -0.7071067811865; ; sin( 80 * 2*pi/TABLE_SIZE)
|
||||
.float -0.7409511253549; ; sin( 81 * 2*pi/TABLE_SIZE)
|
||||
.float -0.7730104533627; ; sin( 82 * 2*pi/TABLE_SIZE)
|
||||
.float -0.8032075314806; ; sin( 83 * 2*pi/TABLE_SIZE)
|
||||
.float -0.8314696123026; ; sin( 84 * 2*pi/TABLE_SIZE)
|
||||
.float -0.8577286100001; ; sin( 85 * 2*pi/TABLE_SIZE)
|
||||
.float -0.8819212643481; ; sin( 86 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9039892931235; ; sin( 87 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9238795325113; ; sin( 88 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9415440651832; ; sin( 89 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9569403357322; ; sin( 90 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9700312531945; ; sin( 91 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9807852804033; ; sin( 92 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9891765099649; ; sin( 93 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9951847266721; ; sin( 94 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9987954562052; ; sin( 95 * 2*pi/TABLE_SIZE)
|
||||
.float -1.0; ; sin( 96 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9987954562052; ; sin( 97 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9951847266721; ; sin( 98 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9891765099649; ; sin( 99 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9807852804033; ; sin(100 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9700312531945; ; sin(101 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9569403357322; ; sin(102 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9415440651832; ; sin(103 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9238795325113; ; sin(104 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9039892931235; ; sin(105 * 2*pi/TABLE_SIZE)
|
||||
.float -0.8819212643481; ; sin(106 * 2*pi/TABLE_SIZE)
|
||||
.float -0.8577286100001; ; sin(107 * 2*pi/TABLE_SIZE)
|
||||
.float -0.8314696123026; ; sin(108 * 2*pi/TABLE_SIZE)
|
||||
.float -0.8032075314806; ; sin(109 * 2*pi/TABLE_SIZE)
|
||||
.float -0.7730104533627; ; sin(110 * 2*pi/TABLE_SIZE)
|
||||
.float -0.7409511253549; ; sin(111 * 2*pi/TABLE_SIZE)
|
||||
.float -0.7071067811865; ; sin(112 * 2*pi/TABLE_SIZE)
|
||||
.float -0.6715589548470; ; sin(113 * 2*pi/TABLE_SIZE)
|
||||
.float -0.6343932841637; ; sin(114 * 2*pi/TABLE_SIZE)
|
||||
.float -0.5956993044925; ; sin(115 * 2*pi/TABLE_SIZE)
|
||||
.float -0.5555702330196; ; sin(116 * 2*pi/TABLE_SIZE)
|
||||
.float -0.5141027441932; ; sin(117 * 2*pi/TABLE_SIZE)
|
||||
.float -0.4713967368260; ; sin(118 * 2*pi/TABLE_SIZE)
|
||||
.float -0.4275550934303; ; sin(119 * 2*pi/TABLE_SIZE)
|
||||
.float -0.3826834323651; ; sin(120 * 2*pi/TABLE_SIZE)
|
||||
.float -0.3368898533922; ; sin(121 * 2*pi/TABLE_SIZE)
|
||||
.float -0.2902846772544; ; sin(122 * 2*pi/TABLE_SIZE)
|
||||
.float -0.2429801799032; ; sin(123 * 2*pi/TABLE_SIZE)
|
||||
.float -0.1950903220162; ; sin(124 * 2*pi/TABLE_SIZE)
|
||||
.float -0.1467304744553; ; sin(125 * 2*pi/TABLE_SIZE)
|
||||
.float -0.09801714032956; ; sin(126 * 2*pi/TABLE_SIZE)
|
||||
.float -0.04906767432742; ; sin(127 * 2*pi/TABLE_SIZE)
|
||||
_CLAsinTableEnd:
|
||||
.float 0.0; ; sin( 0 * 2*pi/TABLE_SIZE)
|
||||
.float 0.04906767432742; ; sin( 1 * 2*pi/TABLE_SIZE)
|
||||
.float 0.09801714032956; ; sin( 2 * 2*pi/TABLE_SIZE)
|
||||
.float 0.1467304744553; ; sin( 3 * 2*pi/TABLE_SIZE)
|
||||
.float 0.1950903220162; ; sin( 4 * 2*pi/TABLE_SIZE)
|
||||
.float 0.2429801799032; ; sin( 5 * 2*pi/TABLE_SIZE)
|
||||
.float 0.2902846772544; ; sin( 6 * 2*pi/TABLE_SIZE)
|
||||
.float 0.3368898533922; ; sin( 7 * 2*pi/TABLE_SIZE)
|
||||
.float 0.3826834323651; ; sin( 8 * 2*pi/TABLE_SIZE)
|
||||
.float 0.4275550934303; ; sin( 9 * 2*pi/TABLE_SIZE)
|
||||
.float 0.4713967368260; ; sin( 10 * 2*pi/TABLE_SIZE)
|
||||
.float 0.5141027441932; ; sin( 11 * 2*pi/TABLE_SIZE)
|
||||
.float 0.5555702330196; ; sin( 12 * 2*pi/TABLE_SIZE)
|
||||
.float 0.5956993044925; ; sin( 13 * 2*pi/TABLE_SIZE)
|
||||
.float 0.6343932841637; ; sin( 14 * 2*pi/TABLE_SIZE)
|
||||
.float 0.6715589548470; ; sin( 15 * 2*pi/TABLE_SIZE)
|
||||
.float 0.7071067811865; ; sin( 16 * 2*pi/TABLE_SIZE)
|
||||
.float 0.7409511253549; ; sin( 17 * 2*pi/TABLE_SIZE)
|
||||
.float 0.7730104533627; ; sin( 18 * 2*pi/TABLE_SIZE)
|
||||
.float 0.8032075314806; ; sin( 19 * 2*pi/TABLE_SIZE)
|
||||
.float 0.8314696123026; ; sin( 20 * 2*pi/TABLE_SIZE)
|
||||
.float 0.8577286100001; ; sin( 21 * 2*pi/TABLE_SIZE)
|
||||
.float 0.8819212643481; ; sin( 22 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9039892931235; ; sin( 23 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9238795325113; ; sin( 24 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9415440651832; ; sin( 25 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9569403357322; ; sin( 26 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9700312531945; ; sin( 27 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9807852804033; ; sin( 28 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9891765099649; ; sin( 29 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9951847266721; ; sin( 30 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9987954562052; ; sin( 31 * 2*pi/TABLE_SIZE)
|
||||
.float 1.0; ; sin( 32 * 2*pi/TABLE_SIZE)
|
||||
_CLAcosTableEnd:
|
||||
|
||||
|
||||
_CLAsincosTable_TABLE_SIZE .float 128.0
|
||||
_CLAsincosTable_TABLE_SIZEDivTwoPi .float 20.37183271576
|
||||
_CLAsincosTable_TwoPiDivTABLE_SIZE .float 0.04908738521234
|
||||
_CLAsincosTable_TABLE_MASK .long 0x0000007F;
|
||||
_CLAsincosTable_Coef0 .float -0.5;
|
||||
_CLAsincosTable_Coef1 .float -0.1666666666666;
|
||||
_CLAsincosTable_Coef1_pos .float 0.1666666666666;
|
||||
_CLAsincosTable_Coef2 .float 4.1666666666666e-2;
|
||||
_CLAsincosTable_Coef3 .float 8.3333333333333e-3;
|
||||
_CLAsincosTable_Coef3_neg .float -8.3333333333333e-3;
|
||||
_CLAsincosTableEnd:
|
||||
|
||||
;############################################################################
|
||||
;//! @}
|
||||
;############################################################################
|
||||
+235
@@ -0,0 +1,235 @@
|
||||
;******************************************************************************
|
||||
;
|
||||
; FILE: CLAacosineTable.asm
|
||||
;
|
||||
; DESCRIPTION: acosine Tables
|
||||
;
|
||||
;******************************************************************************
|
||||
; $TI Release: $
|
||||
; $Release Date: $
|
||||
;******************************************************************************
|
||||
; This software is licensed for use with Texas Instruments C28x
|
||||
; family DSCs. This license was provided to you prior to installing
|
||||
; the software. You may review this license by consulting a copy of
|
||||
; the agreement in the doc directory of this library.
|
||||
; ------------------------------------------------------------------------
|
||||
; Copyright (C) 2010-2011 Texas Instruments, Incorporated.
|
||||
; All Rights Reserved.
|
||||
;******************************************************************************
|
||||
|
||||
;############################################################################
|
||||
;/*! \addtogroup CLAMATH_TABLES
|
||||
; @{
|
||||
;*/
|
||||
;############################################################################
|
||||
|
||||
.def _CLAacosinHalfPITable
|
||||
.def _CLAacosinTable
|
||||
.def _CLAacosinTableEnd
|
||||
|
||||
.sect "CLA1mathTables"
|
||||
|
||||
_CLAacosinHalfPITable:
|
||||
.float 2.0 ; 2.0
|
||||
.float 3.141592653589 ; PI
|
||||
|
||||
_CLAacosinTable:
|
||||
.float 1.570795690593 ;
|
||||
.float -0.999877862610 ;
|
||||
.float -0.007815361896 ;
|
||||
.float 1.570791227101 ;
|
||||
.float -0.999510644409 ;
|
||||
.float -0.015647916155 ;
|
||||
.float 1.570779058483 ;
|
||||
.float -0.998895919094 ;
|
||||
.float -0.023514960332 ;
|
||||
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|
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
|
||||
|
||||
_CLAacosinTableEnd:
|
||||
|
||||
;############################################################################
|
||||
;//! @}
|
||||
;############################################################################
|
||||
+238
@@ -0,0 +1,238 @@
|
||||
;******************************************************************************
|
||||
;
|
||||
; FILE: CLAasineTable.asm
|
||||
;
|
||||
; DESCRIPTION: asine Tables
|
||||
;
|
||||
;******************************************************************************
|
||||
; $TI Release: $
|
||||
; $Release Date: $
|
||||
;******************************************************************************
|
||||
; This software is licensed for use with Texas Instruments C28x
|
||||
; family DSCs. This license was provided to you prior to installing
|
||||
; the software. You may review this license by consulting a copy of
|
||||
; the agreement in the doc directory of this library.
|
||||
; ------------------------------------------------------------------------
|
||||
; Copyright (C) 2010-2011 Texas Instruments, Incorporated.
|
||||
; All Rights Reserved.
|
||||
;******************************************************************************
|
||||
|
||||
;############################################################################
|
||||
;/*! \addtogroup CLAMATH_TABLES
|
||||
; @{
|
||||
;*/
|
||||
;############################################################################
|
||||
|
||||
.def _CLAasinHalfPITable
|
||||
.def _CLAasinTable
|
||||
.def _CLAasinTableEnd
|
||||
|
||||
.sect "CLA1mathTables"
|
||||
|
||||
_CLAasinHalfPITable:
|
||||
.float 2.0 ; 2.0
|
||||
.float 1.570796327 ; PI/2
|
||||
|
||||
_CLAasinTable:
|
||||
|
||||
.float 0.0
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
.float 1.5707963267948966192313216916398
|
||||
.float 0
|
||||
.float 0
|
||||
|
||||
_CLAasinTableEnd:
|
||||
;############################################################################
|
||||
;//! @}
|
||||
;############################################################################
|
||||
+246
@@ -0,0 +1,246 @@
|
||||
;******************************************************************************
|
||||
;
|
||||
; FILE: CLAatanTable.asm
|
||||
;
|
||||
; DESCRIPTION: atan Tables
|
||||
;
|
||||
;******************************************************************************
|
||||
; $TI Release: $
|
||||
; $Release Date: $
|
||||
;******************************************************************************
|
||||
; This software is licensed for use with Texas Instruments C28x
|
||||
; family DSCs. This license was provided to you prior to installing
|
||||
; the software. You may review this license by consulting a copy of
|
||||
; the agreement in the doc directory of this library.
|
||||
; ------------------------------------------------------------------------
|
||||
; Copyright (C) 2010-2011 Texas Instruments, Incorporated.
|
||||
; All Rights Reserved.
|
||||
;******************************************************************************
|
||||
|
||||
;############################################################################
|
||||
;/*! \addtogroup CLAMATH_TABLES
|
||||
; @{
|
||||
;*/
|
||||
;############################################################################
|
||||
|
||||
.def _CLAatan2HalfPITable
|
||||
.def _CLAINV2PI
|
||||
.def _CLAatan2Table
|
||||
.def _CLAatan2TableEnd
|
||||
|
||||
.sect "CLA1mathTables"
|
||||
|
||||
_CLAatan2HalfPITable:
|
||||
.float 2.0 ; 2.0
|
||||
.float 1.570796327 ; PI/2
|
||||
_CLAINV2PI:
|
||||
.float 0.159154943 ;1 / {2*PI}
|
||||
|
||||
_CLAatan2Table:
|
||||
.float 0.000000000000 ; 0 x0 = 0.000000000000 -> a0 = 0.000000000000
|
||||
.float 1.000040679675 ; 0 x1 = 0.007812500000 -> a1 = 1.000040679675
|
||||
.float -0.007811069750 ; 0 x2 = 0.015625000000 -> a2 = -0.007811069750
|
||||
|
||||
.float -0.000003807022 ; 1 x0 = 0.015625000000 -> a0 = -0.000003807022
|
||||
.float 1.000528067772 ; 1 x1 = 0.023437500000 -> a1 = 1.000528067772
|
||||
.float -0.023410345493 ; 1 x2 = 0.031250000000 -> a2 = -0.023410345493
|
||||
|
||||
.float -0.000018968310 ; 2 x0 = 0.031250000000 -> a0 = -0.000018968310
|
||||
.float 1.001498568106 ; 2 x1 = 0.039062500000 -> a1 = 1.001498568106
|
||||
.float -0.038941197075 ; 2 x2 = 0.046875000000 -> a2 = -0.038941197075
|
||||
|
||||
.float -0.000052831927 ; 3 x0 = 0.046875000000 -> a0 = -0.000052831927
|
||||
.float 1.002943680965 ; 3 x1 = 0.054687500000 -> a1 = 1.002943680965
|
||||
.float -0.054358563160 ; 3 x2 = 0.062500000000 -> a2 = -0.054358563160
|
||||
|
||||
.float -0.000112417996 ; 4 x0 = 0.062500000000 -> a0 = -0.000112417996
|
||||
.float 1.004850785788 ; 4 x1 = 0.070312500000 -> a1 = 1.004850785788
|
||||
.float -0.069618206649 ; 4 x2 = 0.078125000000 -> a2 = -0.069618206649
|
||||
|
||||
.float -0.000204295885 ; 5 x0 = 0.078125000000 -> a0 = -0.000204295885
|
||||
.float 1.007203293243 ; 5 x1 = 0.085937500000 -> a1 = 1.007203293243
|
||||
.float -0.084677028723 ; 5 x2 = 0.093750000000 -> a2 = -0.084677028723
|
||||
.float -0.000334469493 ; 6 x0 = 0.093750000000 -> a0 = -0.000334469493
|
||||
.float 1.009980843501 ; 6 x1 = 0.101562500000 -> a1 = 1.009980843501
|
||||
.float -0.099493367628 ; 6 x2 = 0.109375000000 -> a2 = -0.099493367628
|
||||
.float -0.000508272606 ; 7 x0 = 0.109375000000 -> a0 = -0.000508272606
|
||||
.float 1.013159547023 ; 7 x1 = 0.117187500000 -> a1 = 1.013159547023
|
||||
.float -0.114027278430 ; 7 x2 = 0.125000000000 -> a2 = -0.114027278430
|
||||
.float -0.000730276035 ; 8 x0 = 0.125000000000 -> a0 = -0.000730276035
|
||||
.float 1.016712263449 ; 8 x1 = 0.132812500000 -> a1 = 1.016712263449
|
||||
.float -0.128240790343 ; 8 x2 = 0.140625000000 -> a2 = -0.128240790343
|
||||
.float -0.001004207980 ; 9 x0 = 0.140625000000 -> a0 = -0.001004207980
|
||||
.float 1.020608913557 ; 9 x1 = 0.148437500000 -> a1 = 1.020608913557
|
||||
.float -0.142098138715 ; 9 x2 = 0.156250000000 -> a2 = -0.142098138715
|
||||
.float -0.001332888717 ; 10 x0 = 0.156250000000 -> a0 = -0.001332888717
|
||||
.float 1.024816818801 ; 10 x1 = 0.164062500000 -> a1 = 1.024816818801
|
||||
.float -0.155565969259 ; 10 x2 = 0.171875000000 -> a2 = -0.155565969259
|
||||
.float -0.001718180431 ; 11 x0 = 0.171875000000 -> a0 = -0.001718180431
|
||||
.float 1.029301062569 ; 11 x1 = 0.179687500000 -> a1 = 1.029301062569
|
||||
.float -0.168613512667 ; 11 x2 = 0.187500000000 -> a2 = -0.168613512667
|
||||
.float -0.002160952612 ; 12 x0 = 0.187500000000 -> a0 = -0.002160952612
|
||||
.float 1.034024867135 ; 12 x1 = 0.195312500000 -> a1 = 1.034024867135
|
||||
.float -0.181212728329 ; 12 x2 = 0.203125000000 -> a2 = -0.181212728329
|
||||
.float -0.002661063159 ; 13 x0 = 0.203125000000 -> a0 = -0.002661063159
|
||||
.float 1.038949980222 ; 13 x1 = 0.210937500000 -> a1 = 1.038949980222
|
||||
.float -0.193338416410 ; 13 x2 = 0.218750000000 -> a2 = -0.193338416410
|
||||
.float -0.003217354977 ; 14 x0 = 0.218750000000 -> a0 = -0.003217354977
|
||||
.float 1.044037065160 ; 14 x1 = 0.226562500000 -> a1 = 1.044037065160
|
||||
.float -0.204968298146 ; 14 x2 = 0.234375000000 -> a2 = -0.204968298146
|
||||
.float -0.003827667546 ; 15 x0 = 0.234375000000 -> a0 = -0.003827667546
|
||||
.float 1.049246088868 ; 15 x1 = 0.242187500000 -> a1 = 1.049246088868
|
||||
.float -0.216083064706 ; 15 x2 = 0.250000000000 -> a2 = -0.216083064706
|
||||
.float -0.004488862702 ; 16 x0 = 0.250000000000 -> a0 = -0.004488862702
|
||||
.float 1.054536702192 ; 16 x1 = 0.257812500000 -> a1 = 1.054536702192
|
||||
.float -0.226666395507 ; 16 x2 = 0.265625000000 -> a2 = -0.226666395507
|
||||
.float -0.005196863579 ; 17 x0 = 0.265625000000 -> a0 = -0.005196863579
|
||||
.float 1.059868607573 ; 17 x1 = 0.273437500000 -> a1 = 1.059868607573
|
||||
.float -0.236704947279 ; 17 x2 = 0.281250000000 -> a2 = -0.236704947279
|
||||
.float -0.005946705500 ; 18 x0 = 0.281250000000 -> a0 = -0.005946705500
|
||||
.float 1.065201909527 ; 18 x1 = 0.289062500000 -> a1 = 1.065201909527
|
||||
.float -0.246188315613 ; 18 x2 = 0.296875000000 -> a2 = -0.246188315613
|
||||
.float -0.006732597422 ; 19 x0 = 0.296875000000 -> a0 = -0.006732597422
|
||||
.float 1.070497443994 ; 19 x1 = 0.304687500000 -> a1 = 1.070497443994
|
||||
.float -0.255108971022 ; 19 x2 = 0.312500000000 -> a2 = -0.255108971022
|
||||
.float -0.007547992413 ; 20 x0 = 0.312500000000 -> a0 = -0.007547992413
|
||||
.float 1.075717083222 ; 20 x1 = 0.320312500000 -> a1 = 1.075717083222
|
||||
.float -0.263462171840 ; 20 x2 = 0.328125000000 -> a2 = -0.263462171840
|
||||
.float -0.008385665599 ; 21 x0 = 0.328125000000 -> a0 = -0.008385665599
|
||||
.float 1.080824013499 ; 21 x1 = 0.335937500000 -> a1 = 1.080824013499
|
||||
.float -0.271245856476 ; 21 x2 = 0.343750000000 -> a2 = -0.271245856476
|
||||
.float -0.009237797924 ; 22 x0 = 0.343750000000 -> a0 = -0.009237797924
|
||||
.float 1.085782983693 ; 22 x1 = 0.351562500000 -> a1 = 1.085782983693
|
||||
.float -0.278460517693 ; 22 x2 = 0.359375000000 -> a2 = -0.278460517693
|
||||
.float -0.010096064139 ; 23 x0 = 0.359375000000 -> a0 = -0.010096064139
|
||||
.float 1.090560523211 ; 23 x1 = 0.367187500000 -> a1 = 1.090560523211
|
||||
.float -0.285109061650 ; 23 x2 = 0.375000000000 -> a2 = -0.285109061650
|
||||
.float -0.010951723407 ; 24 x0 = 0.375000000000 -> a0 = -0.010951723407
|
||||
.float 1.095125128557 ; 24 x1 = 0.382812500000 -> a1 = 1.095125128557
|
||||
.float -0.291196654447 ; 24 x2 = 0.390625000000 -> a2 = -0.291196654447
|
||||
.float -0.011795711029 ; 25 x0 = 0.390625000000 -> a0 = -0.011795711029
|
||||
.float 1.099447418304 ; 25 x1 = 0.398437500000 -> a1 = 1.099447418304
|
||||
.float -0.296730558920 ; 25 x2 = 0.406250000000 -> a2 = -0.296730558920
|
||||
.float -0.012618729873 ; 26 x0 = 0.406250000000 -> a0 = -0.012618729873
|
||||
.float 1.103500256784 ; 26 x1 = 0.414062500000 -> a1 = 1.103500256784
|
||||
.float -0.301719964310 ; 26 x2 = 0.421875000000 -> a2 = -0.301719964310
|
||||
.float -0.013411340199 ; 27 x0 = 0.421875000000 -> a0 = -0.013411340199
|
||||
.float 1.107258847274 ; 27 x1 = 0.429687500000 -> a1 = 1.107258847274
|
||||
.float -0.306175811325 ; 27 x2 = 0.437500000000 -> a2 = -0.306175811325
|
||||
.float -0.014164046711 ; 28 x0 = 0.437500000000 -> a0 = -0.014164046711
|
||||
.float 1.110700795887 ; 28 x1 = 0.445312500000 -> a1 = 1.110700795887
|
||||
.float -0.310110614947 ; 28 x2 = 0.453125000000 -> a2 = -0.310110614947
|
||||
.float -0.014867381831 ; 29 x0 = 0.453125000000 -> a0 = -0.014867381831
|
||||
.float 1.113806147717 ; 29 x1 = 0.460937500000 -> a1 = 1.113806147717
|
||||
.float -0.313538287176 ; 29 x2 = 0.468750000000 -> a2 = -0.313538287176
|
||||
.float -0.015511984298 ; 30 x0 = 0.468750000000 -> a0 = -0.015511984298
|
||||
.float 1.116557397059 ; 30 x1 = 0.476562500000 -> a1 = 1.116557397059
|
||||
.float -0.316473961655 ; 30 x2 = 0.484375000000 -> a2 = -0.316473961655
|
||||
.float -0.016088672395 ; 31 x0 = 0.484375000000 -> a0 = -0.016088672395
|
||||
.float 1.118939473766 ; 31 x1 = 0.492187500000 -> a1 = 1.118939473766
|
||||
.float -0.318933821948 ; 31 x2 = 0.500000000000 -> a2 = -0.318933821948
|
||||
.float -0.016588511229 ; 32 x0 = 0.500000000000 -> a0 = -0.016588511229
|
||||
.float 1.120939707956 ; 32 x1 = 0.507812500000 -> a1 = 1.120939707956
|
||||
.float -0.320934934991 ; 32 x2 = 0.515625000000 -> a2 = -0.320934934991
|
||||
.float -0.017002873645 ; 33 x0 = 0.515625000000 -> a0 = -0.017002873645
|
||||
.float 1.122547775367 ; 33 x1 = 0.523437500000 -> a1 = 1.122547775367
|
||||
.float -0.322495091022 ; 33 x2 = 0.531250000000 -> a2 = -0.322495091022
|
||||
.float -0.017323494499 ; 34 x0 = 0.531250000000 -> a0 = -0.017323494499
|
||||
.float 1.123755625749 ; 34 x1 = 0.539062500000 -> a1 = 1.123755625749
|
||||
.float -0.323632651068 ; 34 x2 = 0.546875000000 -> a2 = -0.323632651068
|
||||
.float -0.017542518140 ; 35 x0 = 0.546875000000 -> a0 = -0.017542518140
|
||||
.float 1.124557396633 ; 35 x1 = 0.554687500000 -> a1 = 1.124557396633
|
||||
.float -0.324366402860 ; 35 x2 = 0.562500000000 -> a2 = -0.324366402860
|
||||
.float -0.017652539065 ; 36 x0 = 0.562500000000 -> a0 = -0.017652539065
|
||||
.float 1.124949314810 ; 36 x1 = 0.570312500000 -> a1 = 1.124949314810
|
||||
.float -0.324715425833 ; 36 x2 = 0.578125000000 -> a2 = -0.324715425833
|
||||
.float -0.017646635823 ; 37 x0 = 0.578125000000 -> a0 = -0.017646635823
|
||||
.float 1.124929587773 ; 37 x1 = 0.585937500000 -> a1 = 1.124929587773
|
||||
.float -0.324698965683 ; 37 x2 = 0.593750000000 -> a2 = -0.324698965683
|
||||
.float -0.017518398344 ; 38 x0 = 0.593750000000 -> a0 = -0.017518398344
|
||||
.float 1.124498287266 ; 38 x1 = 0.601562500000 -> a1 = 1.124498287266
|
||||
.float -0.324336318787 ; 38 x2 = 0.609375000000 -> a2 = -0.324336318787
|
||||
.float -0.017261948920 ; 39 x0 = 0.609375000000 -> a0 = -0.017261948920
|
||||
.float 1.123657226955 ; 39 x1 = 0.617187500000 -> a1 = 1.123657226955
|
||||
.float -0.323646726613 ; 39 x2 = 0.625000000000 -> a2 = -0.323646726613
|
||||
.float -0.016871957164 ; 40 x0 = 0.625000000000 -> a0 = -0.016871957164
|
||||
.float 1.122409836098 ; 40 x1 = 0.632812500000 -> a1 = 1.122409836098
|
||||
.float -0.322649280139 ; 40 x2 = 0.640625000000 -> a2 = -0.322649280139
|
||||
.float -0.016343649294 ; 41 x0 = 0.640625000000 -> a0 = -0.016343649294
|
||||
.float 1.120761030918 ; 41 x1 = 0.648437500000 -> a1 = 1.120761030918
|
||||
.float -0.321362834119 ; 41 x2 = 0.656250000000 -> a2 = -0.321362834119
|
||||
.float -0.015672812166 ; 42 x0 = 0.656250000000 -> a0 = -0.015672812166
|
||||
.float 1.118717085258 ; 42 x1 = 0.664062500000 -> a1 = 1.118717085258
|
||||
.float -0.319805931024 ; 42 x2 = 0.671875000000 -> a2 = -0.319805931024
|
||||
.float -0.014855792451 ; 43 x0 = 0.671875000000 -> a0 = -0.014855792451
|
||||
.float 1.116285501852 ; 43 x1 = 0.679687500000 -> a1 = 1.116285501852
|
||||
.float -0.317996734279 ; 43 x2 = 0.687500000000 -> a2 = -0.317996734279
|
||||
.float -0.013889491441 ; 44 x0 = 0.687500000000 -> a0 = -0.013889491441
|
||||
.float 1.113474885484 ; 44 x1 = 0.695312500000 -> a1 = 1.113474885484
|
||||
.float -0.315952970460 ; 44 x2 = 0.703125000000 -> a2 = -0.315952970460
|
||||
.float -0.012771355912 ; 45 x0 = 0.703125000000 -> a0 = -0.012771355912
|
||||
.float 1.110294819035 ; 45 x1 = 0.710937500000 -> a1 = 1.110294819035
|
||||
.float -0.313691879968 ; 45 x2 = 0.718750000000 -> a2 = -0.313691879968
|
||||
.float -0.011499365513 ; 46 x0 = 0.718750000000 -> a0 = -0.011499365513
|
||||
.float 1.106755743329 ; 46 x1 = 0.726562500000 -> a1 = 1.106755743329
|
||||
.float -0.311230175714 ; 46 x2 = 0.734375000000 -> a2 = -0.311230175714
|
||||
.float -0.010072017131 ; 47 x0 = 0.734375000000 -> a0 = -0.010072017131
|
||||
.float 1.102868841531 ; 47 x1 = 0.742187500000 -> a1 = 1.102868841531
|
||||
.float -0.308584009287 ; 47 x2 = 0.750000000000 -> a2 = -0.308584009287
|
||||
.float -0.008488306656 ; 48 x0 = 0.750000000000 -> a0 = -0.008488306656
|
||||
.float 1.098645928648 ; 48 x1 = 0.757812500000 -> a1 = 1.098645928648
|
||||
.float -0.305768944066 ; 48 x2 = 0.765625000000 -> a2 = -0.305768944066
|
||||
.float -0.006747708579 ; 49 x0 = 0.765625000000 -> a0 = -0.006747708579
|
||||
.float 1.094099346648 ; 49 x1 = 0.773437500000 -> a1 = 1.094099346648
|
||||
.float -0.302799934724 ; 49 x2 = 0.781250000000 -> a2 = -0.302799934724
|
||||
.float -0.004850153815 ; 50 x0 = 0.781250000000 -> a0 = -0.004850153815
|
||||
.float 1.089241865523 ; 50 x1 = 0.789062500000 -> a1 = 1.089241865523
|
||||
.float -0.299691312610 ; 50 x2 = 0.796875000000 -> a2 = -0.299691312610
|
||||
.float -0.002796006119 ; 51 x0 = 0.796875000000 -> a0 = -0.002796006119
|
||||
.float 1.084086590517 ; 51 x1 = 0.804687500000 -> a1 = 1.084086590517
|
||||
.float -0.296456776409 ; 51 x2 = 0.812500000000 -> a2 = -0.296456776409
|
||||
.float -0.000586037441 ; 52 x0 = 0.812500000000 -> a0 = -0.000586037441
|
||||
.float 1.078646875666 ; 52 x1 = 0.820312500000 -> a1 = 1.078646875666
|
||||
.float -0.293109387609 ; 52 x2 = 0.828125000000 -> a2 = -0.293109387609
|
||||
.float 0.001778597452 ; 53 x0 = 0.828125000000 -> a0 = 0.001778597452
|
||||
.float 1.072936243727 ; 53 x1 = 0.835937500000 -> a1 = 1.072936243727
|
||||
.float -0.289661570229 ; 53 x2 = 0.843750000000 -> a2 = -0.289661570229
|
||||
.float 0.004296386804 ; 54 x0 = 0.843750000000 -> a0 = 0.004296386804
|
||||
.float 1.066968312440 ; 54 x1 = 0.851562500000 -> a1 = 1.066968312440
|
||||
.float -0.286125114351 ; 54 x2 = 0.859375000000 -> a2 = -0.286125114351
|
||||
.float 0.006965487894 ; 55 x0 = 0.859375000000 -> a0 = 0.006965487894
|
||||
.float 1.060756727064 ; 55 x1 = 0.867187500000 -> a1 = 1.060756727064
|
||||
.float -0.282511182960 ; 55 x2 = 0.875000000000 -> a2 = -0.282511182960
|
||||
.float 0.009783753017 ; 56 x0 = 0.875000000000 -> a0 = 0.009783753017
|
||||
.float 1.054315099009 ; 56 x1 = 0.882812500000 -> a1 = 1.054315099009
|
||||
.float -0.278830321668 ; 56 x2 = 0.890625000000 -> a2 = -0.278830321668
|
||||
.float 0.012748755207 ; 57 x0 = 0.890625000000 -> a0 = 0.012748755207
|
||||
.float 1.047656950440 ; 57 x1 = 0.898437500000 -> a1 = 1.047656950440
|
||||
.float -0.275092470943 ; 57 x2 = 0.906250000000 -> a2 = -0.275092470943
|
||||
.float 0.015857813546 ; 58 x0 = 0.906250000000 -> a0 = 0.015857813546
|
||||
.float 1.040795664582 ; 58 x1 = 0.914062500000 -> a1 = 1.040795664582
|
||||
.float -0.271306980411 ; 58 x2 = 0.921875000000 -> a2 = -0.271306980411
|
||||
.float 0.019108017893 ; 59 x0 = 0.921875000000 -> a0 = 0.019108017893
|
||||
.float 1.033744441476 ; 59 x1 = 0.929687500000 -> a1 = 1.033744441476
|
||||
.float -0.267482624928 ; 59 x2 = 0.937500000000 -> a2 = -0.267482624928
|
||||
.float 0.022496252887 ; 60 x0 = 0.937500000000 -> a0 = 0.022496252887
|
||||
.float 1.026516258989 ; 60 x1 = 0.945312500000 -> a1 = 1.026516258989
|
||||
.float -0.263627622089 ; 60 x2 = 0.953125000000 -> a2 = -0.263627622089
|
||||
.float 0.026019221162 ; 61 x0 = 0.953125000000 -> a0 = 0.026019221162
|
||||
.float 1.019123838651 ; 61 x1 = 0.960937500000 -> a1 = 1.019123838651
|
||||
.float -0.259749650860 ; 61 x2 = 0.968750000000 -> a2 = -0.259749650860
|
||||
.float 0.029673465636 ; 62 x0 = 0.968750000000 -> a0 = 0.029673465636
|
||||
.float 1.011579616186 ; 62 x1 = 0.976562500000 -> a1 = 1.011579616186
|
||||
.float -0.255855871106 ; 62 x2 = 0.984375000000 -> a2 = -0.255855871106
|
||||
|
||||
.float 0.033455390838 ; 63 x0 = 0.984375000000 -> a0 = 0.033455390838
|
||||
.float 1.003895716322 ; 63 x1 = 0.992187500000 -> a1 = 1.003895716322
|
||||
.float -0.251952943763 ; 63 x2 = 1.000000000000 -> a2 = -0.251952943763
|
||||
|
||||
.float 0.037361283212 ; 64 x0 = 1.000000000000 -> a0 = 0.037361283212
|
||||
.float 0.996083931611 ; 64 x1 = 1.007812500000 -> a1 = 0.996083931611
|
||||
.float -0.248047051426 ; 64 x2 = 1.015625000000 -> a2 = -0.248047051426
|
||||
_CLAatan2TableEnd:
|
||||
|
||||
;############################################################################
|
||||
;//! @}
|
||||
;############################################################################
|
||||
+142
@@ -0,0 +1,142 @@
|
||||
;******************************************************************************
|
||||
;
|
||||
; FILE: CLAexpTable.asm
|
||||
;
|
||||
; DESCRIPTION: Exponential Tables
|
||||
;
|
||||
;******************************************************************************
|
||||
; $TI Release: $
|
||||
; $Release Date: $
|
||||
;******************************************************************************
|
||||
; This software is licensed for use with Texas Instruments C28x
|
||||
; family DSCs. This license was provided to you prior to installing
|
||||
; the software. You may review this license by consulting a copy of
|
||||
; the agreement in the doc directory of this library.
|
||||
; ------------------------------------------------------------------------
|
||||
; Copyright (C) 2010-2011 Texas Instruments, Incorporated.
|
||||
; All Rights Reserved.
|
||||
;******************************************************************************
|
||||
|
||||
;############################################################################
|
||||
;/*! \addtogroup CLAMATH_TABLES
|
||||
; @{
|
||||
;*/
|
||||
;############################################################################
|
||||
|
||||
.def _CLAINV1
|
||||
.def _CLAINV2
|
||||
.def _CLAINV3
|
||||
.def _CLAINV4
|
||||
.def _CLAINV5
|
||||
.def _CLAINV6
|
||||
.def _CLAINV7
|
||||
.def _CLALOG10
|
||||
.def _CLAExpTable
|
||||
.def _CLAExpTableEnd
|
||||
|
||||
.sect "CLA1mathTables"
|
||||
_CLAINV1 .float 1
|
||||
_CLAINV2 .float 0.5 ;1/2
|
||||
_CLAINV3 .float 0.333333333333333333 ;1/3
|
||||
_CLAINV4 .float 0.25 ;1/4
|
||||
_CLAINV5 .float 0.20 ;1/5
|
||||
_CLAINV6 .float 0.166666666666666666 ;1/6
|
||||
_CLAINV7 .float 0.142857142857142857 ;1/7
|
||||
|
||||
_CLALOG10 .float 2.302585092 ;LOG10(e)
|
||||
|
||||
_CLAExpTable:
|
||||
.float 1.0; exp(0)
|
||||
.float 2.7182818285e+0; exp(1)
|
||||
.float 7.3890560989e+0; exp(2)
|
||||
.float 2.0085536923e+1; exp(3)
|
||||
.float 5.4598150033e+1; exp(4)
|
||||
.float 1.484131591e+2; exp(5)
|
||||
.float 4.0342879349e+2; exp(6)
|
||||
.float 1.0966331584e+3; exp(7)
|
||||
.float 2.980957987e+3; exp(8)
|
||||
.float 8.1030839276e+3; exp(9)
|
||||
.float 2.2026465795e+4; exp(10)
|
||||
.float 5.9874141715e+4; exp(11)
|
||||
.float 1.6275479142e+5; exp(12)
|
||||
.float 4.4241339201e+5; exp(13)
|
||||
.float 1.2026042842e+6; exp(14)
|
||||
.float 3.2690173725e+6; exp(15)
|
||||
.float 8.8861105205e+6; exp(16)
|
||||
.float 2.4154952754e+7; exp(17)
|
||||
.float 6.5659969137e+7; exp(18)
|
||||
.float 1.7848230096e+8; exp(19)
|
||||
.float 4.8516519541e+8; exp(20)
|
||||
.float 1.3188157345e+9; exp(21)
|
||||
.float 3.5849128461e+9; exp(22)
|
||||
.float 9.7448034462e+9; exp(23)
|
||||
.float 2.648912213e+10; exp(24)
|
||||
.float 7.2004899337e+10; exp(25)
|
||||
.float 1.9572960943e+11; exp(26)
|
||||
.float 5.320482406e+11; exp(27)
|
||||
.float 1.4462570643e+12; exp(28)
|
||||
.float 3.9313342971e+12; exp(29)
|
||||
.float 1.0686474582e+13; exp(30)
|
||||
.float 2.9048849665e+13; exp(31)
|
||||
.float 7.8962960183e+13; exp(32)
|
||||
.float 2.1464357979e+14; exp(33)
|
||||
.float 5.8346174253e+14; exp(34)
|
||||
.float 1.5860134523e+15; exp(35)
|
||||
.float 4.3112315471e+15; exp(36)
|
||||
.float 1.1719142373e+16; exp(37)
|
||||
.float 3.1855931757e+16; exp(38)
|
||||
.float 8.6593400424e+16; exp(39)
|
||||
.float 2.3538526684e+17; exp(40)
|
||||
.float 6.3984349353e+17; exp(41)
|
||||
.float 1.7392749415e+18; exp(42)
|
||||
.float 4.7278394682e+18; exp(43)
|
||||
.float 1.2851600114e+19; exp(44)
|
||||
.float 3.4934271057e+19; exp(45)
|
||||
.float 9.4961194206e+19; exp(46)
|
||||
.float 2.5813128862e+20; exp(47)
|
||||
.float 7.0167359121e+20; exp(48)
|
||||
.float 1.9073465725e+21; exp(49)
|
||||
.float 5.1847055286e+21; exp(50)
|
||||
.float 1.4093490824e+22; exp(51)
|
||||
.float 3.8310080007e+22; exp(52)
|
||||
.float 1.0413759433e+23; exp(53)
|
||||
.float 2.8307533033e+23; exp(54)
|
||||
.float 7.6947852651e+23; exp(55)
|
||||
.float 2.091659496e+24; exp(56)
|
||||
.float 5.6857199993e+24; exp(57)
|
||||
.float 1.5455389356e+25; exp(58)
|
||||
.float 4.2012104038e+25; exp(59)
|
||||
.float 1.1420073898e+26; exp(60)
|
||||
.float 3.1042979357e+26; exp(61)
|
||||
.float 8.4383566687e+26; exp(62)
|
||||
.float 2.2937831595e+27; exp(63)
|
||||
.float 6.2351490808e+27; exp(64)
|
||||
.float 1.6948892444e+28; exp(65)
|
||||
.float 4.6071866343e+28; exp(66)
|
||||
.float 1.2523631708e+29; exp(67)
|
||||
.float 3.4042760499e+29; exp(68)
|
||||
.float 9.2537817256e+29; exp(69)
|
||||
.float 2.5154386709e+30; exp(70)
|
||||
.float 6.8376712298e+30; exp(71)
|
||||
.float 1.8586717453e+31; exp(72)
|
||||
.float 5.0523936303e+31; exp(73)
|
||||
.float 1.3733829795e+32; exp(74)
|
||||
.float 3.7332419968e+32; exp(75)
|
||||
.float 1.0148003881e+33; exp(76)
|
||||
.float 2.7585134545e+33; exp(77)
|
||||
.float 7.498416997e+33; exp(78)
|
||||
.float 2.0382810665e+34; exp(79)
|
||||
.float 5.5406223844e+34; exp(80)
|
||||
.float 1.5060973146e+35; exp(81)
|
||||
.float 4.0939969621e+35; exp(82)
|
||||
.float 1.1128637548e+36; exp(83)
|
||||
.float 3.0250773222e+36; exp(84)
|
||||
.float 8.2230127146e+36; exp(85)
|
||||
.float 2.2352466037e+37; exp(86)
|
||||
.float 6.0760302251e+37; exp(87)
|
||||
.float 1.651636255e+38; exp(88)
|
||||
|
||||
_CLAExpTableEnd:
|
||||
;############################################################################
|
||||
;//! @}
|
||||
;############################################################################
|
||||
+149
@@ -0,0 +1,149 @@
|
||||
;******************************************************************************
|
||||
;
|
||||
; FILE: CLAlnTable.asm
|
||||
;
|
||||
; DESCRIPTION: Natural Logarithm Tables
|
||||
;
|
||||
;******************************************************************************
|
||||
; $TI Release: $
|
||||
; $Release Date: $
|
||||
;******************************************************************************
|
||||
; This software is licensed for use with Texas Instruments C28x
|
||||
; family DSCs. This license was provided to you prior to installing
|
||||
; the software. You may review this license by consulting a copy of
|
||||
; the agreement in the doc directory of this library.
|
||||
; ------------------------------------------------------------------------
|
||||
; Copyright (C) 2010-2011 Texas Instruments, Incorporated.
|
||||
; All Rights Reserved.
|
||||
;******************************************************************************
|
||||
|
||||
;############################################################################
|
||||
;/*! \addtogroup CLAMATH_TABLES
|
||||
; @{
|
||||
;*/
|
||||
;############################################################################
|
||||
.def _CLALNV2
|
||||
.def _CLALNVe
|
||||
.def _CLALNV10
|
||||
.def _CLABIAS
|
||||
.def _CLALN_TABLE_MASK1
|
||||
.def _CLALN_TABLE_MASK2
|
||||
.def _CLALnTable
|
||||
.def _CLALnTableEnd
|
||||
|
||||
.sect "CLA1mathTables"
|
||||
|
||||
_CLALNV2 .float 0.693147180559 ;
|
||||
_CLALNVe .float 1.0 ;
|
||||
_CLALNV10 .float 0.4342944819032;
|
||||
_CLABIAS .float 127.0 ;
|
||||
_CLALN_TABLE_MASK1 .long 0x3FFFFFFF ;
|
||||
_CLALN_TABLE_MASK2 .long 0x3F800000 ;
|
||||
|
||||
|
||||
_CLALnTable:
|
||||
.float 0 ;
|
||||
.float 1 ;
|
||||
.float -0.5 ;
|
||||
.float 9.49154e-06 ;
|
||||
.float 0.999081726 ;
|
||||
.float -0.470156107 ;
|
||||
.float 7.09886e-05 ;
|
||||
.float 0.996539792 ;
|
||||
.float -0.442906574 ;
|
||||
.float 0.000224404 ;
|
||||
.float 0.992653061 ;
|
||||
.float -0.417959184 ;
|
||||
.float 0.000499085 ;
|
||||
.float 0.987654321 ;
|
||||
.float -0.395061728 ;
|
||||
.float 0.000916122 ;
|
||||
.float 0.981738495 ;
|
||||
.float -0.373995617 ;
|
||||
.float 0.001490146 ;
|
||||
.float 0.975069252 ;
|
||||
.float -0.354570637 ;
|
||||
.float 0.00223074 ;
|
||||
.float 0.967784352 ;
|
||||
.float -0.336620644 ;
|
||||
.float 0.003143551 ;
|
||||
.float 0.96 ;
|
||||
.float -0.32 ;
|
||||
.float 0.004231167 ;
|
||||
.float 0.951814396 ;
|
||||
.float -0.304580607 ;
|
||||
.float 0.005493806 ;
|
||||
.float 0.943310658 ;
|
||||
.float -0.290249433 ;
|
||||
.float 0.00692987 ;
|
||||
.float 0.934559221 ;
|
||||
.float -0.276906436 ;
|
||||
.float 0.008536376 ;
|
||||
.float 0.925619835 ;
|
||||
.float -0.26446281 ;
|
||||
.float 0.010309303 ;
|
||||
.float 0.91654321 ;
|
||||
.float -0.252839506 ;
|
||||
.float 0.012243868 ;
|
||||
.float 0.907372401 ;
|
||||
.float -0.241965974 ;
|
||||
.float 0.014334741 ;
|
||||
.float 0.898143957 ;
|
||||
.float -0.231779086 ;
|
||||
.float 0.016576219 ;
|
||||
.float 0.888888889 ;
|
||||
.float -0.222222222 ;
|
||||
.float 0.018962363 ;
|
||||
.float 0.879633486 ;
|
||||
.float -0.213244481 ;
|
||||
.float 0.021487103 ;
|
||||
.float 0.8704 ;
|
||||
.float -0.2048 ;
|
||||
.float 0.024144324 ;
|
||||
.float 0.861207228 ;
|
||||
.float -0.196847366 ;
|
||||
.float 0.026927934 ;
|
||||
.float 0.852071006 ;
|
||||
.float -0.189349112 ;
|
||||
.float 0.02983191 ;
|
||||
.float 0.843004628 ;
|
||||
.float -0.182271271 ;
|
||||
.float 0.032850339 ;
|
||||
.float 0.834019204 ;
|
||||
.float -0.17558299 ;
|
||||
.float 0.035977448 ;
|
||||
.float 0.825123967 ;
|
||||
.float -0.169256198 ;
|
||||
.float 0.039207625 ;
|
||||
.float 0.816326531 ;
|
||||
.float -0.163265306 ;
|
||||
.float 0.042535433 ;
|
||||
.float 0.807633118 ;
|
||||
.float -0.15758695 ;
|
||||
.float 0.045955621 ;
|
||||
.float 0.799048751 ;
|
||||
.float -0.152199762 ;
|
||||
.float 0.049463133 ;
|
||||
.float 0.79057742 ;
|
||||
.float -0.147084171 ;
|
||||
.float 0.053053104 ;
|
||||
.float 0.782222222 ;
|
||||
.float -0.142222222 ;
|
||||
.float 0.056720869 ;
|
||||
.float 0.773985488 ;
|
||||
.float -0.13759742 ;
|
||||
.float 0.060461958 ;
|
||||
.float 0.765868887 ;
|
||||
.float -0.133194589 ;
|
||||
.float 0.064272091 ;
|
||||
.float 0.75787352 ;
|
||||
.float -0.128999748 ;
|
||||
.float 0.068147181 ;
|
||||
.float 0.75 ;
|
||||
.float -0.125 ;
|
||||
|
||||
|
||||
_CLALnTableEnd:
|
||||
;############################################################################
|
||||
;//! @}
|
||||
;############################################################################
|
||||
+52
@@ -0,0 +1,52 @@
|
||||
//USB boot loader support definitions
|
||||
|
||||
#ifndef __USB_BOOT_FUNCS_H__
|
||||
#define __USB_BOOT_FUNCS_H__
|
||||
|
||||
#include "c1_bootrom.h"
|
||||
#include "USB_Regs.h"
|
||||
#include "USB_Structs.h"
|
||||
|
||||
|
||||
//Truth and falsehood
|
||||
#define true 1
|
||||
#define false 0
|
||||
|
||||
|
||||
//Max packet size for endpoint 0
|
||||
#define EP0_MAX_PACKET_SIZE 64
|
||||
|
||||
|
||||
//USB endpoint state enum
|
||||
typedef enum
|
||||
{
|
||||
USB_STATE_IDLE, //Waiting for a request from the host controller
|
||||
USB_STATE_TX, //Sending data to the host due to an IN request
|
||||
USB_STATE_RX, //Receiving data from the host due to an OUT request
|
||||
USB_STATE_STALL, //Waiting for the host to acknowledge a stall condition
|
||||
USB_STATE_STATUS //Waiting for the host to acknowledge completion of an IN or OUT request
|
||||
} eEndpointState;
|
||||
|
||||
|
||||
//DATAEND selector enum
|
||||
typedef enum
|
||||
{
|
||||
USB_MORE_DATA, //Do not set the DATAEND bit
|
||||
USB_END_DATA //Set the DATAEND bit
|
||||
} eDataEnd;
|
||||
|
||||
//Function prototypes
|
||||
extern interrupt void UsbIntHandler();
|
||||
extern void AckUsbInterrupt();
|
||||
static void UsbEndpointStateMachine();
|
||||
static eEndpointState HandleControlRequest(const sUsbRequestPacket *req);
|
||||
static void CopyStringDescriptor(const sUsbStringDescriptor *strDesc, Uint16 *buffer);
|
||||
void ResetUsbDriver();
|
||||
void TxDataEp0(const Uint16 *data, Uint16 length8, eDataEnd dataEnd);
|
||||
Uint16 RxDataEp0(Uint16 *data);
|
||||
static void StallEp0();
|
||||
|
||||
extern void AckEp0(eDataEnd dataEnd);
|
||||
|
||||
|
||||
#endif //__USB_BOOT_FUNCS_H__
|
||||
+148
@@ -0,0 +1,148 @@
|
||||
//USB register definitions and helper macros
|
||||
|
||||
#ifndef __USB_REGS_H__
|
||||
#define __USB_REGS_H__
|
||||
|
||||
//Register read/write helper functions, mostly to provide 8-bit reads on C28x
|
||||
#define USB0_BASE_ADDR 0x00040000
|
||||
#define USBREG32(r) (*(volatile unsigned long *)(USB0_BASE_ADDR + (r)))
|
||||
#define USBREG16(r) (*(volatile unsigned short *)(USB0_BASE_ADDR + (r)))
|
||||
#define USBREG8(r) __byte((int *)(USB0_BASE_ADDR + (r)), 0)
|
||||
|
||||
|
||||
//Register offsets
|
||||
#define USB_O_FADDR 0x00000000 // USB Device Functional Address
|
||||
#define USB_O_POWER 0x00000001 // USB Power
|
||||
#define USB_O_TXIS 0x00000002 // USB Transmit Interrupt Status
|
||||
#define USB_O_RXIS 0x00000004 // USB Receive Interrupt Status
|
||||
#define USB_O_TXIE 0x00000006 // USB Transmit Interrupt Enable
|
||||
#define USB_O_RXIE 0x00000008 // USB Receive Interrupt Enable
|
||||
#define USB_O_IS 0x0000000A // USB General Interrupt Status
|
||||
#define USB_O_IE 0x0000000B // USB Interrupt Enable
|
||||
#define USB_O_FRAME 0x0000000C // USB Frame Value
|
||||
#define USB_O_EPIDX 0x0000000E // USB Endpoint Index
|
||||
#define USB_O_TEST 0x0000000F // USB Test Mode
|
||||
|
||||
#define USB_O_FIFO0 0x00000020 // USB FIFO Endpoint 0
|
||||
#define USB_O_FIFO1 0x00000024 // USB FIFO Endpoint 1
|
||||
#define USB_O_FIFO2 0x00000028 // USB FIFO Endpoint 2
|
||||
#define USB_O_FIFO3 0x0000002C // USB FIFO Endpoint 3
|
||||
|
||||
#define USB_O_DEVCTL 0x00000060 // USB Device Control
|
||||
#define USB_O_TXFIFOSZ 0x00000062 // USB Transmit Dynamic FIFO Sizing
|
||||
#define USB_O_RXFIFOSZ 0x00000063 // USB Receive Dynamic FIFO Sizing
|
||||
#define USB_O_TXFIFOADD 0x00000064 // USB Transmit FIFO Start Address
|
||||
#define USB_O_RXFIFOADD 0x00000066 // USB Receive FIFO Start Address
|
||||
#define USB_O_CONTIM 0x0000007A // USB Connect Timing
|
||||
#define USB_O_FSEOF 0x0000007D // USB Full-Speed Last Transaction to End of Frame Timing
|
||||
#define USB_O_LSEOF 0x0000007E // USB Low-Speed Last Transaction to End of Frame Timing
|
||||
|
||||
#define USB_O_TXFUNCADDR0 0x00000080 // USB Transmit Functional Address Endpoint 0
|
||||
#define USB_O_TXHUBADDR0 0x00000082 // USB Transmit Hub Address Endpoint 0
|
||||
#define USB_O_TXHUBPORT0 0x00000083 // USB Transmit Hub Port Endpoint 0
|
||||
#define USB_O_TXFUNCADDR1 0x00000088 // USB Transmit Functional Address Endpoint 1
|
||||
#define USB_O_TXHUBADDR1 0x0000008A // USB Transmit Hub Address Endpont 1
|
||||
#define USB_O_TXHUBPORT1 0x0000008B // USB Transmit Hub Port Endpoint 1
|
||||
#define USB_O_RXFUNCADDR1 0x0000008C // USB Receive Functional Address Endpoint 1
|
||||
#define USB_O_RXHUBADDR1 0x0000008E // USB Receive Hub Address Endpoint 1
|
||||
#define USB_O_RXHUBPORT1 0x0000008F // USB Receive Hub Port Endpoint 1
|
||||
#define USB_O_TXFUNCADDR2 0x00000090 // USB Transmit Functional Address Endpoint 2
|
||||
#define USB_O_TXHUBADDR2 0x00000092 // USB Transmit Hub Address Endpoint 2
|
||||
#define USB_O_TXHUBPORT2 0x00000093 // USB Transmit Hub Port Endpoint 2
|
||||
#define USB_O_RXFUNCADDR2 0x00000094 // USB Receive Functional Address Endpoint 2
|
||||
#define USB_O_RXHUBADDR2 0x00000096 // USB Receive Hub Address Endpoint 2
|
||||
#define USB_O_RXHUBPORT2 0x00000097 // USB Receive Hub Port Endpoint 2
|
||||
#define USB_O_TXFUNCADDR3 0x00000098 // USB Transmit Functional Address Endpoint 3
|
||||
#define USB_O_TXHUBADDR3 0x0000009A // USB Transmit Hub Address Endpoint 3
|
||||
#define USB_O_TXHUBPORT3 0x0000009B // USB Transmit Hub Port Endpoint 3
|
||||
#define USB_O_RXFUNCADDR3 0x0000009C // USB Receive Functional Address Endpoint 3
|
||||
#define USB_O_RXHUBADDR3 0x0000009E // USB Receive Hub Address Endpoint 3
|
||||
#define USB_O_RXHUBPORT3 0x0000009F // USB Receive Hub Port Endpoint 3
|
||||
|
||||
#define USB_O_CSRL0 0x00000102 // USB Control and Status Endpoint 0 Low
|
||||
#define USB_O_CSRH0 0x00000103 // USB Control and Status Endpoint 0 High
|
||||
#define USB_O_COUNT0 0x00000108 // USB Receive Byte Count Endpoint 0
|
||||
#define USB_O_TYPE0 0x0000010A // USB Type Endpoint 0
|
||||
#define USB_O_NAKLMT 0x0000010B // USB NAK Limit
|
||||
#define USB_O_TXMAXP1 0x00000110 // USB Maximum Transmit Data Endpoint 1
|
||||
#define USB_O_TXCSRL1 0x00000112 // USB Transmit Control and Status Endpoint 1 Low
|
||||
#define USB_O_TXCSRH1 0x00000113 // USB Transmit Control and Status Endpoint 1 High
|
||||
#define USB_O_RXMAXP1 0x00000114 // USB Maximum Receive Data Endpoint 1
|
||||
#define USB_O_RXCSRL1 0x00000116 // USB Receive Control and Status Endpoint 1 Low
|
||||
#define USB_O_RXCSRH1 0x00000117 // USB Receive Control and Status Endpoint 1 High
|
||||
#define USB_O_RXCOUNT1 0x00000118 // USB Receive Byte Count Endpoint 1
|
||||
#define USB_O_TXTYPE1 0x0000011A // USB Host Transmit Configure Type Endpoint 1
|
||||
#define USB_O_TXINTERVAL1 0x0000011B // USB Host Transmit Interval Endpoint 1
|
||||
#define USB_O_RXTYPE1 0x0000011C // USB Host Configure Receive Type Endpoint 1
|
||||
#define USB_O_RXINTERVAL1 0x0000011D // USB Host Receive Polling Interval Endpoint 1
|
||||
#define USB_O_TXMAXP2 0x00000120 // USB Maximum Transmit Data Endpoint 2
|
||||
#define USB_O_TXCSRL2 0x00000122 // USB Transmit Control and Status Endpoint 2 Low
|
||||
#define USB_O_TXCSRH2 0x00000123 // USB Transmit Control and Status Endpoint 2 High
|
||||
#define USB_O_RXMAXP2 0x00000124 // USB Maximum Receive Data Endpoint 2
|
||||
#define USB_O_RXCSRL2 0x00000126 // USB Receive Control and Status Endpoint 2 Low
|
||||
#define USB_O_RXCSRH2 0x00000127 // USB Receive Control and Status Endpoint 2 High
|
||||
#define USB_O_RXCOUNT2 0x00000128 // USB Receive Byte Count Endpoint 2
|
||||
#define USB_O_TXTYPE2 0x0000012A // USB Host Transmit Configure Type Endpoint 2
|
||||
#define USB_O_TXINTERVAL2 0x0000012B // USB Host Transmit Interval Endpoint 2
|
||||
#define USB_O_RXTYPE2 0x0000012C // USB Host Configure Receive Type Endpoint 2
|
||||
#define USB_O_RXINTERVAL2 0x0000012D // USB Host Receive Polling Interval Endpoint 2
|
||||
#define USB_O_TXMAXP3 0x00000130 // USB Maximum Transmit Data Endpoint 3
|
||||
#define USB_O_TXCSRL3 0x00000132 // USB Transmit Control and Status Endpoint 3 Low
|
||||
#define USB_O_TXCSRH3 0x00000133 // USB Transmit Control and Status Endpoint 3 High
|
||||
#define USB_O_RXMAXP3 0x00000134 // USB Maximum Receive Data Endpoint 3
|
||||
#define USB_O_RXCSRL3 0x00000136 // USB Receive Control and Status Endpoint 3 Low
|
||||
#define USB_O_RXCSRH3 0x00000137 // USB Receive Control and Status Endpoint 3 High
|
||||
#define USB_O_RXCOUNT3 0x00000138 // USB Receive Byte Count Endpoint 3
|
||||
#define USB_O_TXTYPE3 0x0000013A // USB Host Transmit Configure Type Endpoint 3
|
||||
#define USB_O_TXINTERVAL3 0x0000013B // USB Host Transmit Interval Endpoint 3
|
||||
#define USB_O_RXTYPE3 0x0000013C // USB Host Configure Receive Type Endpoint 3
|
||||
#define USB_O_RXINTERVAL3 0x0000013D // USB Host Receive Polling Interval Endpoint 3
|
||||
#define USB_O_RQPKTCOUNT1 0x00000304 // USB Request Packet Count in Block Transfer Endpoint 1
|
||||
#define USB_O_RQPKTCOUNT2 0x00000308 // USB Request Packet Count in Block Transfer Endpoint 2
|
||||
#define USB_O_RQPKTCOUNT3 0x0000030C // USB Request Packet Count in Block Transfer Endpoint 3
|
||||
|
||||
#define USB_O_RXDPKTBUFDIS 0x00000340 // USB Receive Double Packet Buffer Disable
|
||||
#define USB_O_TXDPKTBUFDIS 0x00000342 // USB Transmit Double Packet Buffer Disable
|
||||
#define USB_O_EPC 0x00000400 // USB External Power Control
|
||||
#define USB_O_EPCRIS 0x00000404 // USB External Power Control Raw Interrupt Status
|
||||
#define USB_O_EPCIM 0x00000408 // USB External Power Control Interrupt Mask
|
||||
#define USB_O_EPCISC 0x0000040C // USB External Power Control Interrupt Status and Clear
|
||||
#define USB_O_DRRIS 0x00000410 // USB Device RESUME Raw Interrupt Status
|
||||
#define USB_O_DRIM 0x00000414 // USB Device RESUME Interrupt Mask
|
||||
#define USB_O_DRISC 0x00000418 // USB Device RESUME Interrupt Status and Clear
|
||||
#define USB_O_GPCS 0x0000041C // USB General-Purpose Control and Status
|
||||
#define USB_O_IDVISC 0x0000444C // USB ID Valid Detect Interrupt status and clear
|
||||
#define USB_O_DMASEL 0x00000450 // USB DMA Select
|
||||
|
||||
|
||||
//Bit definitions for USB_O_POWER
|
||||
#define USB_POWER_ISOUP 0x00000080 // Isochronous Update
|
||||
#define USB_POWER_SOFTCONN 0x00000040 // Soft Connect/Disconnect
|
||||
#define USB_POWER_RESET 0x00000008 // RESET Signaling
|
||||
#define USB_POWER_RESUME 0x00000004 // RESUME Signaling
|
||||
#define USB_POWER_SUSPEND 0x00000002 // SUSPEND Mode
|
||||
#define USB_POWER_PWRDNPHY 0x00000001 // Power Down PHY
|
||||
|
||||
//Bit definitions for USB_O_IE
|
||||
#define USB_IE_VBUSERR 0x00000080 // Enable VBUS Error Interrupt
|
||||
#define USB_IE_SESREQ 0x00000040 // Enable Session Request
|
||||
#define USB_IE_DISCON 0x00000020 // Enable Disconnect Interrupt
|
||||
#define USB_IE_CONN 0x00000010 // Enable Connect Interrupt
|
||||
#define USB_IE_SOF 0x00000008 // Enable Start-of-Frame Interrupt
|
||||
#define USB_IE_RESET 0x00000004 // Enable RESET Interrupt
|
||||
#define USB_IE_RESUME 0x00000002 // Enable RESUME Interrupt
|
||||
#define USB_IE_SUSPND 0x00000001 // Enable SUSPEND Interrupt
|
||||
|
||||
//Bit definitions for USB_O_CSRL0
|
||||
#define USB_CSRL0_RXRDY 0x01 // Received packet is ready
|
||||
#define USB_CSRL0_TXRDY 0x02 // Transmit FIFO is ready for transmission
|
||||
#define USB_CSRL0_STALLED 0x04 // Stall handshake has been sent
|
||||
#define USB_CSRL0_DATAEND 0x08 // Set to indicate no more TX/RX data
|
||||
#define USB_CSRL0_SETEND 0x10 // Control transfer ended prematurely
|
||||
#define USB_CSRL0_STALL 0x20 // Send a stall
|
||||
#define USB_CSRL0_RXRDYC 0x40 // Clear the RXRDY bit
|
||||
#define USB_CSRL0_SETENDC 0x80 // Clear the SETEND bit
|
||||
|
||||
|
||||
|
||||
#endif //__USB_REGS_H__
|
||||
+222
@@ -0,0 +1,222 @@
|
||||
//USB descriptor structure definitions
|
||||
|
||||
#ifndef __USB_STRUCTS_H__
|
||||
#define __USB_STRUCTS_H__
|
||||
|
||||
#include "c1_bootrom.h"
|
||||
|
||||
|
||||
//Descriptor types
|
||||
#define USB_DTYPE_DEVICE 0x01
|
||||
#define USB_DTYPE_CONFIG 0x02
|
||||
#define USB_DTYPE_STRING 0x03
|
||||
#define USB_DTYPE_INTERFACE 0x04
|
||||
#define USB_DTYPE_ENDPOINT 0x05
|
||||
#define USB_DTYPE_DEVICE_QUAL 0x06
|
||||
#define USB_DTYPE_OSPEED_CONF 0x07
|
||||
#define USB_DTYPE_INTERFACE_PWR 0x08
|
||||
#define USB_DTYPE_DFU_FUNC 0x21
|
||||
|
||||
|
||||
//Device descriptor
|
||||
typedef struct
|
||||
{
|
||||
Uint16 bDescriptorType_bLength; //[7:0] Descriptor length in bytes (18 for device)
|
||||
//[15:8] Descriptor type (0x01 for device)
|
||||
Uint16 bcdUSB; //USB specification number -- 0x0110 for low/full speed
|
||||
Uint16 bDeviceSubClass_bDeviceClass; //[7:0] Subclass code
|
||||
//[15:8] Class code -- 0x00 for interface-specific, 0xFF for vendor-specific
|
||||
Uint16 bMaxPacketSize_bDeviceProtocol; //[7:0] Protocol code
|
||||
//[15:8] Maximum packet size for EP0
|
||||
Uint16 idVendor; //Vendor ID code -- 0x1CBE for TI
|
||||
Uint16 idProduct; //Product ID code -- assigned by manufacturer
|
||||
Uint16 bcdDevice; //Device release number
|
||||
Uint16 iProduct_iManufacturer; //[7:0] Index of manufacturer string descriptor
|
||||
//[15:8] Index of product string descriptor
|
||||
Uint16 bNumConfigurations_iSerialNumber;//[7:0] Index of serial number string descriptor
|
||||
//[15:8] Number of possible configurations
|
||||
} sUsbDeviceDescriptor;
|
||||
|
||||
|
||||
//Configuration descriptor
|
||||
typedef struct
|
||||
{
|
||||
Uint16 bDescriptorType_bLength; //[7:0] Descriptor length in bytes (9+1 for configuration)
|
||||
//[15:8] Descriptor type (0x02 for configuration)
|
||||
Uint16 wTotalLength; //Total length of config, interface, and endpoint descriptors
|
||||
Uint16 bConfigurationValue_bNumInterfaces; //[7:0] Number of interfaces in this descriptor
|
||||
//[15:8] ID number of this configuration
|
||||
Uint16 bmAttributes_iConfiguration; //[7:0] Index of configuration string descriptor
|
||||
//[15] Reserved, set to 1
|
||||
//[14] Self-powered
|
||||
//[13] Remote wake-up
|
||||
//[12:8] Reserved, set to 0
|
||||
Uint16 padding_bMaxPower; //[7:0] Max power consumption in 2mA units
|
||||
//[15:8] Unused -- only present for alignment
|
||||
} sUsbConfigDescriptor;
|
||||
|
||||
|
||||
//Interface descriptor
|
||||
typedef struct
|
||||
{
|
||||
Uint16 bDescriptorType_bLength; //[7:0] Descriptor length in bytes (9+1 for interface)
|
||||
//[15:8] Descriptor type (0x04 for interface)
|
||||
Uint16 bAlternateSetting_bInterfaceNumber; //[7:0] Alternate interface number for SetInterface
|
||||
//[15:8] ID number of this interface
|
||||
Uint16 bInterfaceClass_bNumEndpoints; //[7:0] Number of endpoints used by this interface
|
||||
//[15:8] Interface-specific class code
|
||||
Uint16 bInterfaceProtocol_bInterfaceSubclass; //[7:0] Interface-specific subclass code
|
||||
//[15:8] Interface-specific protocol code
|
||||
Uint16 padding_iInterface; //[7:0] Index of interface string descriptor
|
||||
//[15:8] Unused -- only present for alignment
|
||||
} sUsbInterfaceDescriptor;
|
||||
|
||||
|
||||
//Endpoint descriptor
|
||||
typedef struct
|
||||
{
|
||||
Uint16 bDescriptorType_bLength; //[7:0] Descriptor length in bytes (7+1 for endpoint)
|
||||
//[15:8] Descriptor type (0x05 for interface)
|
||||
struct
|
||||
{
|
||||
//bEndpointAddress
|
||||
Uint16 endpointNumber : 4; //Endpoint number
|
||||
Uint16 rsvd1 : 3; //Reserved -- set to 0
|
||||
Uint16 direction : 1; //0: OUT, 1: IN (ignored for control endpoints)
|
||||
|
||||
//bmAttributes
|
||||
Uint16 transferType : 2; //0x0: Control, 0x1: Isochronous, 0x2: Bulk, 0x3: Interrupt
|
||||
Uint16 syncMode : 2; //Synchronization mode (isochronous only)
|
||||
Uint16 usageType : 2; //Usage type (isochronous only)
|
||||
Uint16 rsvd2 : 2; //Reserved
|
||||
} bmAttributes_bEndpointAddress;
|
||||
|
||||
Uint16 wMaxPacketSize; //Maximum packet size this endpoint can send or receive
|
||||
Uint16 padding_bInterval; //[7:0] Interval for polling data transfers (ignored for bulk and control)
|
||||
//[15:0] Unused -- only present for alignment
|
||||
} sUsbEndpointDescriptor;
|
||||
|
||||
|
||||
//DFU functional descriptor. The 16-bit fields are not 16-bit aligned.
|
||||
//This makes the C28x implementation... awkward.
|
||||
typedef struct
|
||||
{
|
||||
Uint16 bLength_padding; //[15:8] Descriptor length in bytes (9 for DFU functional)
|
||||
//[7:0] Unused -- only present for alignment
|
||||
Uint16 bmAttributes_bDescriptorType; //[15:8] Descriptor type (0x21 for DFU functional)
|
||||
//[7:4] Reserved
|
||||
//[3] bitWillDetach
|
||||
//[2] bitManifestationTolerant
|
||||
//[1] bitCanUpload
|
||||
//[0] bitCanDnload
|
||||
Uint16 wDetachTimeout; //Millisecond timeout after DFU_DETACH
|
||||
Uint16 wTransferSize; //Max control transfer size in bytes
|
||||
Uint16 bcdDFUVersion; //DFU version (1.1 = 0x0110)
|
||||
} sPrepadDfuFunctionalDescriptor;
|
||||
|
||||
|
||||
//Full configuration structure for transmisssion. Consists of the configuration,
|
||||
//interface, and functional descriptors.
|
||||
typedef struct
|
||||
{
|
||||
sUsbConfigDescriptor config;
|
||||
sUsbInterfaceDescriptor interface;
|
||||
sPrepadDfuFunctionalDescriptor func;
|
||||
} sUsbFullConfigDescriptor;
|
||||
|
||||
|
||||
//String descriptor
|
||||
typedef struct
|
||||
{
|
||||
Uint16 bDescriptorType_bLength; //[7:0] Descriptor length in bytes (2+L for string)
|
||||
//[15:8] Descriptor type (0x03 for string)
|
||||
const char *bString; //Pointer to the actual string
|
||||
} sUsbStringDescriptor;
|
||||
|
||||
|
||||
//Standard control request identifiers
|
||||
#define USB_REQ_GET_STATUS 0x00
|
||||
#define USB_REQ_CLEAR_FEATURE 0x01
|
||||
#define USB_REQ_SET_FEATURE 0x03
|
||||
#define USB_REQ_SET_ADDRESS 0x05
|
||||
#define USB_REQ_GET_DESCRIPTOR 0x06
|
||||
#define USB_REQ_SET_DESCRIPTOR 0x07
|
||||
#define USB_REQ_GET_CONFIG 0x08
|
||||
#define USB_REQ_SET_CONFIG 0x09
|
||||
#define USB_REQ_GET_INTERFACE 0x0A
|
||||
#define USB_REQ_SET_INTERFACE 0x0B
|
||||
|
||||
//DFU request identifiers
|
||||
#define USB_REQ_DFU_DETACH 0x00
|
||||
#define USB_REQ_DFU_DNLOAD 0x01
|
||||
#define USB_REQ_DFU_UPLOAD 0x02
|
||||
#define USB_REQ_DFU_GETSTATUS 0x03
|
||||
#define USB_REQ_DFU_CLRSTATUS 0x04
|
||||
#define USB_REQ_DFU_GETSTATE 0x05
|
||||
#define USB_REQ_DFU_ABORT 0x06
|
||||
|
||||
//Control request types
|
||||
#define USB_REQTYPE_STD 0x0
|
||||
#define USB_REQTYPE_CLASS 0x1
|
||||
#define USB_REQTYPE_VENDOR 0x2
|
||||
|
||||
//Control request receipients
|
||||
#define USB_REQREC_DEVICE 0x0
|
||||
#define USB_REQREC_INTERFACE 0x1
|
||||
#define USB_REQREC_ENDPOINT 0x2
|
||||
#define USB_REQREC_OTHER 0x3
|
||||
|
||||
//Control request data packet format (received from host during enumeration)
|
||||
typedef struct
|
||||
{
|
||||
struct
|
||||
{
|
||||
Uint16 recipient : 5; //[4:0] Recipient (0: device, 1: interface, 2: endpoint, 3: other)
|
||||
Uint16 reqType : 2; //[6:5] Request type (00: standard, 01: class-specific, 10: vendor-specific)
|
||||
Uint16 dataDir : 1; //[7] Direction of data flow (0: OUT, 1: IN)
|
||||
Uint16 bRequest : 8; //[15:8] Request identifier
|
||||
} bmRequestType_bRequest;
|
||||
Uint16 wValue; //Extra request-specific information
|
||||
Uint16 wIndex; //Extra request-specific information
|
||||
Uint16 wLength; //Max number of bytes expected in the follow-up data packet (0: no data packet)
|
||||
} sUsbRequestPacket;
|
||||
|
||||
|
||||
//DFU states
|
||||
#define DFU_STATE_IDLE 0x02
|
||||
#define DFU_STATE_DNLOAD_SYNC 0x03
|
||||
#define DFU_STATE_BUSY 0x04
|
||||
#define DFU_STATE_DNLOAD_IDLE 0x05
|
||||
#define DFU_STATE_MANIFEST_SYNC 0x06
|
||||
#define DFU_STATE_MANIFEST 0x07
|
||||
#define DFU_STATE_MANIFEST_WAIT 0x08
|
||||
#define DFU_STATE_UPLOAD_IDLE 0x09
|
||||
#define DFU_STATE_ERROR 0x0A
|
||||
|
||||
//DFU status request data packet format (sent by device upon request).
|
||||
//We're not handling any errors, so the status will always be 0x00 (OK).
|
||||
typedef struct
|
||||
{
|
||||
Uint32 bwPollTimeout_bStatus; //[7:0] Status after executing the most recent request
|
||||
//[31:8] Time in milliseconds to wait before requesting another status update
|
||||
Uint16 iString_bState; //[7:0] Next DFU state the device will enter after transmission
|
||||
//[15:8] Index of string descriptor with description of status
|
||||
} sUsbDfuStatusPacket;
|
||||
|
||||
|
||||
//Implementations for use in the control request handler
|
||||
extern const sUsbDeviceDescriptor dfuDeviceDescriptor;
|
||||
extern const sUsbFullConfigDescriptor dfuFullConfigDescriptor;
|
||||
extern const sUsbStringDescriptor langDescriptor;
|
||||
extern const sUsbStringDescriptor mfgDescriptor;
|
||||
extern const sUsbStringDescriptor prodDescriptor;
|
||||
extern const sUsbStringDescriptor serialDescriptor;
|
||||
extern const sUsbStringDescriptor dfuStringDescriptor;
|
||||
extern const sUsbStringDescriptor * const stringDescriptors[];
|
||||
|
||||
|
||||
//Function externs
|
||||
extern void CombineUsbDescriptors(Uint16 *buffer);
|
||||
|
||||
|
||||
#endif //__USB_STRUCTS_H__
|
||||
+553
@@ -0,0 +1,553 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// bl_usbfuncs.h - Prototypes for the subset of USB library functions used in
|
||||
// the USB DFU boot loader.
|
||||
//
|
||||
// Copyright (c) 2008 Texas Instruments Incorporated. All rights reserved.
|
||||
// TI Information - Selective Disclosure
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __BL_USBFUNCS_H__
|
||||
#define __BL_USBFUNCS_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \addtogroup bl_usb_api
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following macro allows compiler-independent syntax to be used to
|
||||
// define packed structures. A typical structure definition using these
|
||||
// macros will look similar to the following example:
|
||||
//
|
||||
// #ifdef ewarm
|
||||
// #pragma pack(1)
|
||||
// #endif
|
||||
//
|
||||
// typedef struct _PackedStructName
|
||||
// {
|
||||
// unsigned long ulFirstField;
|
||||
// char cCharMember;
|
||||
// unsigned short usShort;
|
||||
// }
|
||||
// PACKED tPackedStructName;
|
||||
//
|
||||
// #ifdef ewarm
|
||||
// #pragma pack()
|
||||
// #endif
|
||||
//
|
||||
// The conditional blocks related to ewarm include the #pragma pack() lines
|
||||
// only if the IAR Embedded Workbench compiler is being used. Unfortunately,
|
||||
// it is not possible to emit a #pragma from within a macro definition so this
|
||||
// must be done explicitly.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined(ccs) || \
|
||||
defined(codered) || \
|
||||
defined(gcc) || \
|
||||
defined(rvmdk) || \
|
||||
defined(__ARMCC_VERSION) || \
|
||||
defined(sourcerygxx)
|
||||
#define PACKED //__attribute__ ((packed))
|
||||
#elif defined(ewarm)
|
||||
#define PACKED
|
||||
#else
|
||||
#error Unrecognized COMPILER!
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! This struct is used to ensure that data passed up from the driver layer
|
||||
//! is interpretted correctly by the protocol stack. This is a workaround
|
||||
//! specifically for C2000 devices.
|
||||
//
|
||||
//*****************************************************************************
|
||||
typedef struct
|
||||
{
|
||||
unsigned short LSB;
|
||||
unsigned short MSB;
|
||||
} tShort;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! This struct is used to ensure that data passed up from the driver layer
|
||||
//! is interpretted correctly by the protocol stack. This is a workaround
|
||||
//! specifically for C2000 devices.
|
||||
//
|
||||
//*****************************************************************************
|
||||
typedef struct
|
||||
{
|
||||
tShort LSW;
|
||||
tShort MSW;
|
||||
} tLong;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! This define is used to write data to a tShort variable. This is a
|
||||
//! is a workaround specific to C2000 devices.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define writeShort(ptr, value) {((tShort *)ptr)->LSB = value & 0xFF; ((tShort *)ptr)->MSB = (value & 0xFF00) >> 8;}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! This define is used to read data from a tShort variable. This is a
|
||||
//! is a workaround specific to C2000 devices.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define readShort(ptr) ((unsigned short)(((tShort *)ptr)->LSB | ((tShort *)ptr)->MSB << 8))
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! This define is used to write data to a tLong variable. This is a
|
||||
//! is a workaround specific to C2000 devices.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define writeLong(ptr, value) {writeShort(&((tLong *)ptr)->LSW, (unsigned short) value & 0xFFFF); writeShort(&((tLong *)ptr)->MSW, (unsigned short)((value & 0xFFFF0000) >> 16));}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! This define is used to read data from a tLong variable. This is a
|
||||
//! is a workaround specific to C2000 devices.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define readLong(ptr) (((unsigned long) readShort(&((tLong *)ptr)->LSW)) | ((unsigned long) readShort(&((tLong *)ptr)->MSW) << 16))
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Standard USB descriptor types. These values are passed in the upper bytes
|
||||
// of tUSBRequest.wValue on USBREQ_GET_DESCRIPTOR and also appear in the
|
||||
// bDescriptorType field of standard USB descriptors.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define USB_DTYPE_DEVICE 1
|
||||
#define USB_DTYPE_CONFIGURATION 2
|
||||
#define USB_DTYPE_STRING 3
|
||||
#define USB_DTYPE_INTERFACE 4
|
||||
#define USB_DTYPE_ENDPOINT 5
|
||||
#define USB_DTYPE_DEVICE_QUAL 6
|
||||
#define USB_DTYPE_OSPEED_CONF 7
|
||||
#define USB_DTYPE_INTERFACE_PWR 8
|
||||
|
||||
#define USBShort(usValue) (usValue & 0xff), (usValue >> 8)
|
||||
|
||||
#define USB_LANG_EN_US 0x0409 // English (United States)
|
||||
|
||||
#define USB_EP_DEV_IN 0x00002000 // Device IN endpoint
|
||||
#define USB_EP_DEV_OUT 0x00001000 // Device OUT endpoint
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// All structures defined in this section of the header require byte packing of
|
||||
// fields. This is usually accomplished using the PACKED macro but, for IAR
|
||||
// Embedded Workbench, this requires a pragma.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef ewarm
|
||||
#pragma pack(1)
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Definitions related to standard USB device requests (sections 9.3 & 9.4)
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! The standard USB request header as defined in section 9.3 of the USB 2.0
|
||||
//! specification.
|
||||
//
|
||||
//*****************************************************************************
|
||||
typedef struct
|
||||
{
|
||||
//
|
||||
//! Determines the type and direction of the request.
|
||||
//
|
||||
unsigned char bmRequestType;
|
||||
|
||||
//
|
||||
//! Identifies the specific request being made.
|
||||
//
|
||||
unsigned char bRequest;
|
||||
|
||||
//
|
||||
//! Word-sized field that varies according to the request.
|
||||
//
|
||||
tShort wValue;
|
||||
|
||||
//
|
||||
//! Word-sized field that varies according to the request; typically used
|
||||
//! to pass an index or offset.
|
||||
//
|
||||
tShort wIndex;
|
||||
|
||||
//
|
||||
//! The number of bytes to transfer if there is a data stage to the
|
||||
//! request.
|
||||
//
|
||||
tShort wLength;
|
||||
|
||||
}
|
||||
PACKED tUSBRequest;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following defines are used with the bmRequestType member of tUSBRequest.
|
||||
//
|
||||
// Request types have 3 bit fields:
|
||||
// 4:0 - Is the recipient type.
|
||||
// 6:5 - Is the request type.
|
||||
// 7 - Is the direction of the request.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define USB_RTYPE_DIR_IN 0x80
|
||||
#define USB_RTYPE_DIR_OUT 0x00
|
||||
|
||||
#define USB_RTYPE_TYPE_M 0x60
|
||||
#define USB_RTYPE_VENDOR 0x40
|
||||
#define USB_RTYPE_CLASS 0x20
|
||||
#define USB_RTYPE_STANDARD 0x00
|
||||
|
||||
#define USB_RTYPE_RECIPIENT_M 0x1f
|
||||
#define USB_RTYPE_OTHER 0x03
|
||||
#define USB_RTYPE_ENDPOINT 0x02
|
||||
#define USB_RTYPE_INTERFACE 0x01
|
||||
#define USB_RTYPE_DEVICE 0x00
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Standard USB requests IDs used in the bRequest field of tUSBRequest.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define USBREQ_GET_STATUS 0x00
|
||||
#define USBREQ_CLEAR_FEATURE 0x01
|
||||
#define USBREQ_SET_FEATURE 0x03
|
||||
#define USBREQ_SET_ADDRESS 0x05
|
||||
#define USBREQ_GET_DESCRIPTOR 0x06
|
||||
#define USBREQ_SET_DESCRIPTOR 0x07
|
||||
#define USBREQ_GET_CONFIG 0x08
|
||||
#define USBREQ_SET_CONFIG 0x09
|
||||
#define USBREQ_GET_INTERFACE 0x0a
|
||||
#define USBREQ_SET_INTERFACE 0x0b
|
||||
#define USBREQ_SYNC_FRAME 0x0c
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Data returned from a USBREQ_GET_STATUS request to a device.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define USB_STATUS_SELF_PWR 0x0001 // Currently self powered.
|
||||
#define USB_STATUS_BUS_PWR 0x0000 // Currently bus-powered.
|
||||
#define USB_STATUS_PWR_M 0x0001 // Mask for power mode.
|
||||
#define USB_STATUS_REMOTE_WAKE 0x0002 // Remote wake-up is currently enabled.
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! This structure describes the USB configuration descriptor as defined in
|
||||
//! USB 2.0 specification section 9.6.3. This structure also applies to the
|
||||
//! USB other speed configuration descriptor defined in section 9.6.4.
|
||||
//
|
||||
//*****************************************************************************
|
||||
typedef struct
|
||||
{
|
||||
//
|
||||
//! The length of this descriptor in bytes. All configuration descriptors
|
||||
//! are 9 bytes long.
|
||||
//
|
||||
unsigned char bLength;
|
||||
|
||||
//
|
||||
//! The type of the descriptor. For a configuration descriptor, this will
|
||||
//! be USB_DTYPE_CONFIGURATION (2).
|
||||
//
|
||||
unsigned char bDescriptorType;
|
||||
|
||||
//
|
||||
//! The total length of data returned for this configuration. This
|
||||
//! includes the combined length of all descriptors (configuration,
|
||||
//! interface, endpoint and class- or vendor-specific) returned for this
|
||||
//! configuration.
|
||||
//
|
||||
tShort wTotalLength;
|
||||
|
||||
//
|
||||
//! The number of interface supported by this configuration.
|
||||
//
|
||||
unsigned char bNumInterfaces;
|
||||
|
||||
//
|
||||
//! The value used as an argument to the SetConfiguration standard request
|
||||
//! to select this configuration.
|
||||
//
|
||||
unsigned char bConfigurationValue;
|
||||
|
||||
//
|
||||
//! The index of a string descriptor describing this configuration.
|
||||
//
|
||||
unsigned char iConfiguration;
|
||||
|
||||
//
|
||||
//! Attributes of this configuration.
|
||||
//
|
||||
unsigned char bmAttributes;
|
||||
|
||||
//
|
||||
//! The maximum power consumption of the USB device from the bus in this
|
||||
//! configuration when the device is fully operational. This is expressed
|
||||
//! in units of 2mA so, for example, 100 represents 200mA.
|
||||
//
|
||||
unsigned char bMaxPower;
|
||||
}
|
||||
PACKED tConfigDescriptor;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Flags used in constructing the value assigned to the field
|
||||
// tConfigDescriptor.bmAttributes. Note that bit 7 is reserved and must be set
|
||||
// to 1.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define USB_CONF_ATTR_PWR_M 0xC0
|
||||
|
||||
#define USB_CONF_ATTR_SELF_PWR 0xC0
|
||||
#define USB_CONF_ATTR_BUS_PWR 0x80
|
||||
#define USB_CONF_ATTR_RWAKE 0xA0
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Feature Selectors (tUSBRequest.wValue) passed on USBREQ_CLEAR_FEATURE and
|
||||
// USBREQ_SET_FEATURE.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define USB_FEATURE_EP_HALT 0x0000 // Endpoint halt feature.
|
||||
#define USB_FEATURE_REMOTE_WAKE 0x0001 // Remote wake feature, device only.
|
||||
#define USB_FEATURE_TEST_MODE 0x0002 // Test mode
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! This structure describes the USB string descriptor for index 0 as defined
|
||||
//! in USB 2.0 specification section 9.6.7. Note that the number of language
|
||||
//! IDs is variable and can be determined by examining bLength. The number of
|
||||
//! language IDs present in the descriptor is given by ((bLength - 2) / 2).
|
||||
//
|
||||
//*****************************************************************************
|
||||
typedef struct
|
||||
{
|
||||
//
|
||||
//! The length of this descriptor in bytes. This value will vary
|
||||
//! depending upon the number of language codes provided in the descriptor.
|
||||
//
|
||||
unsigned char bLength;
|
||||
|
||||
//
|
||||
//! The type of the descriptor. For a string descriptor, this will be
|
||||
//! USB_DTYPE_STRING (3).
|
||||
//
|
||||
unsigned char bDescriptorType;
|
||||
|
||||
//
|
||||
//! The language code (LANGID) for the first supported language. Note that
|
||||
//! this descriptor may support multiple languages, in which case, the
|
||||
//! number of elements in the wLANGID array will increase and bLength will
|
||||
//! be updated accordingly.
|
||||
//
|
||||
tShort wLANGID[1];
|
||||
}
|
||||
PACKED tString0Descriptor;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! This structure describes the USB string descriptor for all string indexes
|
||||
//! other than 0 as defined in USB 2.0 specification section 9.6.7.
|
||||
//
|
||||
//*****************************************************************************
|
||||
typedef struct
|
||||
{
|
||||
//
|
||||
//! The length of this descriptor in bytes. This value will be 2 greater
|
||||
//! than the number of bytes comprising the UNICODE string that the
|
||||
//! descriptor contains.
|
||||
//
|
||||
unsigned char bLength;
|
||||
|
||||
//
|
||||
//! The type of the descriptor. For a string descriptor, this will be
|
||||
//! USB_DTYPE_STRING (3).
|
||||
//
|
||||
unsigned char bDescriptorType;
|
||||
|
||||
//
|
||||
//! The first byte of the UNICODE string. This string is not NULL
|
||||
//! terminated. Its length (in bytes) can be computed by subtracting 2
|
||||
//! from the value in the bLength field.
|
||||
//
|
||||
unsigned char bString;
|
||||
}
|
||||
PACKED tStringDescriptor;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Return to default packing when using the IAR Embedded Workbench compiler.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef ewarm
|
||||
#pragma pack()
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Some standard USB class definitions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define USB_CLASS_APP_SPECIFIC 0xfe
|
||||
#define USB_CLASS_VEND_SPECIFIC 0xff
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that are returned from USBEndpointStatus(). The
|
||||
// USB_HOST_* values are used when the USB controller is in host mode and the
|
||||
// USB_DEV_* values are used when the USB controller is in device mode.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define USB_DEV_RX_SENT_STALL 0x00400000 // Stall was sent on this endpoint
|
||||
#define USB_DEV_RX_DATA_ERROR 0x00080000 // CRC error on the data
|
||||
#define USB_DEV_RX_OVERRUN 0x00040000 // OUT packet was not loaded due to
|
||||
// a full FIFO
|
||||
#define USB_DEV_RX_FIFO_FULL 0x00020000 // RX FIFO full
|
||||
#define USB_DEV_RX_PKT_RDY 0x00010000 // Data packet ready
|
||||
#define USB_DEV_TX_NOT_COMP 0x00000080 // Large packet split up, more data
|
||||
// to come
|
||||
#define USB_DEV_TX_SENT_STALL 0x00000020 // Stall was sent on this endpoint
|
||||
#define USB_DEV_TX_UNDERRUN 0x00000004 // IN received with no data ready
|
||||
#define USB_DEV_TX_FIFO_NE 0x00000002 // The TX FIFO is not empty
|
||||
#define USB_DEV_TX_TXPKTRDY 0x00000001 // Transmit still being transmitted
|
||||
#define USB_DEV_EP0_SETUP_END 0x00000010 // Control transaction ended before
|
||||
// Data End seen
|
||||
#define USB_DEV_EP0_SENT_STALL 0x00000004 // Stall was sent on this endpoint
|
||||
#define USB_DEV_EP0_IN_PKTPEND 0x00000002 // Transmit data packet pending
|
||||
#define USB_DEV_EP0_OUT_PKTRDY 0x00000001 // Receive data packet ready
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// This value specifies the maximum size of transfers on endpoint 0 as 64
|
||||
// bytes. This value is fixed in hardware as the FIFO size for endpoint 0.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define MAX_PACKET_SIZE_EP0 64
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// These values are used to indicate which endpoint to access.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define USB_EP_0 0x00000000 // Endpoint 0
|
||||
#define NUM_USB_EP 4 // Number of supported endpoints
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// These macros allow conversion between 0-based endpoint indices and the
|
||||
// USB_EP_x values required when calling various USB APIs.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define INDEX_TO_USB_EP(x) ((x) << 4)
|
||||
#define USB_EP_TO_INDEX(x) ((x) >> 4)
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed to USBEndpointDataSend() as the
|
||||
// ulTransType parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define USB_TRANS_OUT 0x00000102 // Normal OUT transaction
|
||||
#define USB_TRANS_IN 0x00000102 // Normal IN transaction
|
||||
#define USB_TRANS_IN_LAST 0x0000010a // Final IN transaction (for
|
||||
// endpoint 0 in device mode)
|
||||
#define USB_TRANS_SETUP 0x0000110a // Setup transaction (for endpoint
|
||||
// 0)
|
||||
#define USB_TRANS_STATUS 0x00000142 // Status transaction (for endpoint
|
||||
// 0)
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Function prototype for any standard USB request.
|
||||
//
|
||||
//*****************************************************************************
|
||||
typedef void (* tStdRequest)(tUSBRequest *pUSBRequest);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Data structures defined in bl_usb.c but referenced elsewhere.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern const unsigned char g_pDFUConfigDescriptor[];
|
||||
extern const unsigned char g_pDFUDeviceDescriptor[];
|
||||
extern const unsigned char * const g_pStringDescriptors[];
|
||||
|
||||
#define NUM_STRING_DESCRIPTORS 4
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes of the various USB handler functions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void HandleRequests(tUSBRequest *pUSBRequest);
|
||||
extern void HandleConfigChange(unsigned long ulInfo);
|
||||
extern void HandleEP0Data(unsigned long ulInfo);
|
||||
extern void HandleReset(void);
|
||||
extern void HandleDisconnect(void);
|
||||
extern void HandleSetAddress(void);
|
||||
extern void USB0DeviceIntHandler(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes for the APIs.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void USBDevEndpoint0DataAck(tBoolean bIsLastPacket);
|
||||
extern long USBEndpoint0DataGet(unsigned char *pucData, unsigned long *pulSize);
|
||||
extern long USBEndpoint0DataPut(unsigned char *pucData, unsigned long ulSize);
|
||||
extern long USBEndpoint0DataSend(unsigned long ulTransType);
|
||||
extern void USBBLInit(void);
|
||||
extern void USBBLStallEP0(void);
|
||||
extern void USBBLRequestDataEP0(unsigned char *pucData, unsigned long ulSize);
|
||||
extern void USBBLSendDataEP0(unsigned char *pucData, unsigned long ulSize);
|
||||
extern void USBDeviceEnumHandler(void);
|
||||
extern void USBDeviceEnumResetHandler(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Close the Doxygen group.
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
#endif // __BL_USBFUNCS_H__
|
||||
|
||||
|
||||
|
||||
+256
@@ -0,0 +1,256 @@
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 13, 2012 11:53:30 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: c1_bootrom.h
|
||||
//
|
||||
// TITLE: C1-BootROM Definitions.
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F2837x Boot ROM Version 0 $
|
||||
// $Release Date: Oct 1, 2013 $
|
||||
//###########################################################################
|
||||
|
||||
|
||||
|
||||
#ifndef C_BOOTROM_H_
|
||||
#define C_BOOTROM_H_
|
||||
|
||||
#include "F2837x_Device.h"
|
||||
#include "driver_incs.h"
|
||||
#include "c1_bootrom_ipc_commands.h"
|
||||
|
||||
/* some defines used by C-BootROM*/
|
||||
|
||||
#ifndef IS_TRUE
|
||||
#define IS_TRUE 1
|
||||
#endif
|
||||
|
||||
#ifndef IS_FALSE
|
||||
#define IS_FALSE 0
|
||||
#endif
|
||||
|
||||
#ifndef IS_SUCCESS
|
||||
#define IS_SUCCESS IS_TRUE
|
||||
#endif
|
||||
|
||||
#ifndef IS_FAILURE
|
||||
#define IS_FAILURE IS_FALSE
|
||||
#endif
|
||||
|
||||
extern Uint16 EmuKey;
|
||||
extern Uint16 EmuBMode;
|
||||
|
||||
#define KEY_VAL 0x5A
|
||||
|
||||
|
||||
#define STAND_ALONE_BOOT_TYPE 1
|
||||
#define EMU_BOOT_TYPE 2
|
||||
#define HIB_BOOT_TYPE 3
|
||||
|
||||
#define EMULATE_TRUE_BOOT 0xFF // follow stand-alone boot with emulator connected
|
||||
#define EMULATE_BOOTPIN_MODE 0xFE // Get the boot pin info from EMUBMODE CTRL reg and follow it
|
||||
|
||||
#define PARALLEL_BOOT 0x0
|
||||
|
||||
#define SCI_BOOT 0x1
|
||||
#define SCI_BOOT_ALTERNATE 0x81
|
||||
|
||||
#define WAIT_BOOT 0x2
|
||||
#define GET_BOOT 0x3
|
||||
|
||||
#define SPI_BOOT 0x4
|
||||
#define SPI_BOOT_ALTERNATE 0x84
|
||||
|
||||
#define I2C_BOOT 0x5
|
||||
#define I2C_BOOT_ALTERNATE 0x85
|
||||
|
||||
//#define OTP_BOOT 0x6
|
||||
#define CAN_BOOT 0x07
|
||||
#define CAN_BOOT_ALTERNATE 0x87
|
||||
#define CAN_BOOT_TEST_DEFAULT 0x47 //enables tx of two packets for bit rate calcs - default io
|
||||
#define CAN_BOOT_TEST_ALT 0xC7 //enables tx of two packets for bit rate calcs - alternate io
|
||||
|
||||
#define RAM_BOOT 0xA
|
||||
#define FLASH_BOOT 0xB
|
||||
|
||||
#define USB_BOOT 0xC
|
||||
#define USB_BOOT_ALTERNATE 0x8C //reserved for now - defaults to flash
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
// Fixed boot entry points:
|
||||
//
|
||||
#define FLASH_ENTRY_POINT 0x080000 /**/
|
||||
#define RAM_ENTRY_POINT 0x000000 /*M0 start address*/
|
||||
//#define OTP_ENTRY_POINT 0x070BFE /*end of CPU2 mapped to CPU1*/
|
||||
|
||||
#define ERROR 1
|
||||
#define NO_ERROR 0
|
||||
|
||||
#define BROM_EIGHT_BIT_HEADER 0x08AA
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
#define TI_OTP_PARTID_L *(volatile uint32_t *)(0x70200)
|
||||
#define TI_OTP_PARTID_H *(volatile uint32_t *)(0x70202)
|
||||
|
||||
|
||||
#define TI_OTP_DCX_REG_BASE_ADDRESS 0x70204
|
||||
#define TI_OTP_REG_DC00 *(volatile uint32_t *)(TI_OTP_DCX_REG_BASE_ADDRESS)
|
||||
#define TI_OTP_REG_DC01 *(volatile uint32_t *)(TI_OTP_DCX_REG_BASE_ADDRESS + 2)
|
||||
#define TI_OTP_REG_DC02 *(volatile uint32_t *)(TI_OTP_DCX_REG_BASE_ADDRESS + 4)
|
||||
#define TI_OTP_REG_DC03 *(volatile uint32_t *)(TI_OTP_DCX_REG_BASE_ADDRESS + 6)
|
||||
#define TI_OTP_REG_DC04 *(volatile uint32_t *)(TI_OTP_DCX_REG_BASE_ADDRESS + 8)
|
||||
#define TI_OTP_REG_DC05 *(volatile uint32_t *)(TI_OTP_DCX_REG_BASE_ADDRESS + 10)
|
||||
#define TI_OTP_REG_DC06 *(volatile uint32_t *)(TI_OTP_DCX_REG_BASE_ADDRESS + 12)
|
||||
#define TI_OTP_REG_DC07 *(volatile uint32_t *)(TI_OTP_DCX_REG_BASE_ADDRESS + 14)
|
||||
#define TI_OTP_REG_DC08 *(volatile uint32_t *)(TI_OTP_DCX_REG_BASE_ADDRESS + 16)
|
||||
#define TI_OTP_REG_DC09 *(volatile uint32_t *)(TI_OTP_DCX_REG_BASE_ADDRESS + 18)
|
||||
#define TI_OTP_REG_DC10 *(volatile uint32_t *)(TI_OTP_DCX_REG_BASE_ADDRESS + 20)
|
||||
#define TI_OTP_REG_DC11 *(volatile uint32_t *)(TI_OTP_DCX_REG_BASE_ADDRESS + 22)
|
||||
#define TI_OTP_REG_DC12 *(volatile uint32_t *)(TI_OTP_DCX_REG_BASE_ADDRESS + 24)
|
||||
#define TI_OTP_REG_DC13 *(volatile uint32_t *)(TI_OTP_DCX_REG_BASE_ADDRESS + 26)
|
||||
#define TI_OTP_REG_DC14 *(volatile uint32_t *)(TI_OTP_DCX_REG_BASE_ADDRESS + 28)
|
||||
#define TI_OTP_REG_DC15 *(volatile uint32_t *)(TI_OTP_DCX_REG_BASE_ADDRESS + 30)
|
||||
#define TI_OTP_REG_DC16 *(volatile uint32_t *)(TI_OTP_DCX_REG_BASE_ADDRESS + 32)
|
||||
#define TI_OTP_REG_DC17 *(volatile uint32_t *)(TI_OTP_DCX_REG_BASE_ADDRESS + 34)
|
||||
#define TI_OTP_REG_DC18 *(volatile uint32_t *)(TI_OTP_DCX_REG_BASE_ADDRESS + 36)
|
||||
#define TI_OTP_REG_DC19 *(volatile uint32_t *)(TI_OTP_DCX_REG_BASE_ADDRESS + 38)
|
||||
#define TI_OTP_REG_DC20 *(volatile uint32_t *)(TI_OTP_DCX_REG_BASE_ADDRESS + 40)
|
||||
#define TI_OTP_REG_PERCNF1 *(volatile uint32_t *)(TI_OTP_DCX_REG_BASE_ADDRESS + 42)
|
||||
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
|
||||
|
||||
typedef Uint16 (* uint16fptr)();
|
||||
extern uint16fptr GetWordData;
|
||||
|
||||
#define DEVICE_CAL_LOCATION 0x70280
|
||||
#define C1BROM_DEVCAL (void (*)(void))(DEVICE_CAL_LOCATION)
|
||||
|
||||
#define OTP_CPU_ID_VERSION (Uint16)(*(volatile Uint16 *)(0x7026D))
|
||||
|
||||
// bit 1,0 = 01 means enable PLL, else don't
|
||||
// bit 7:2 = PLL divider to use - default will be all 1's, but PLL wont be used when default
|
||||
// bit 9,8 = 01 means, ENABLE IPC in WAIT boot mode, else nope.
|
||||
// bits 31:24 = 0x5A means the WORD is good/valid else not valid or not good
|
||||
|
||||
#define OTP_BOOT_CONFIGURE_WORD (Uint32)(*(volatile Uint32 *)(Uint32)(0x703EE))
|
||||
|
||||
|
||||
#define OTP_BOOT_ESCAPE_TABLE_END 0x703EC
|
||||
|
||||
//extern void otp_func_refs();
|
||||
#define TI_OTP_C1BROM_ESCAPE_POINT_15 (Uint32)(*(volatile Uint32 *)((Uint32)(OTP_BOOT_ESCAPE_TABLE_END)-28))
|
||||
#define TI_OTP_C1BROM_ESCAPE_POINT_14 (Uint32)(*(volatile Uint32 *)((Uint32)(OTP_BOOT_ESCAPE_TABLE_END)-26))
|
||||
#define TI_OTP_C1BROM_ESCAPE_POINT_13 (Uint32)(*(volatile Uint32 *)((Uint32)(OTP_BOOT_ESCAPE_TABLE_END)-24))
|
||||
#define TI_OTP_C1BROM_ESCAPE_POINT_12 (Uint32)(*(volatile Uint32 *)((Uint32)(OTP_BOOT_ESCAPE_TABLE_END)-22))
|
||||
#define TI_OTP_C1BROM_ESCAPE_POINT_11 (Uint32)(*(volatile Uint32 *)((Uint32)(OTP_BOOT_ESCAPE_TABLE_END)-20))
|
||||
#define TI_OTP_C1BROM_ESCAPE_POINT_10 (Uint32)(*(volatile Uint32 *)((Uint32)(OTP_BOOT_ESCAPE_TABLE_END)-18))
|
||||
#define TI_OTP_C1BROM_ESCAPE_POINT_9 (Uint32)(*(volatile Uint32 *)((Uint32)(OTP_BOOT_ESCAPE_TABLE_END)-16))
|
||||
#define TI_OTP_C1BROM_ESCAPE_POINT_8 (Uint32)(*(volatile Uint32 *)((Uint32)(OTP_BOOT_ESCAPE_TABLE_END)-14))
|
||||
#define TI_OTP_C1BROM_ESCAPE_POINT_7 (Uint32)(*(volatile Uint32 *)((Uint32)(OTP_BOOT_ESCAPE_TABLE_END)-12))
|
||||
#define TI_OTP_C1BROM_ESCAPE_POINT_6 (Uint32)(*(volatile Uint32 *)((Uint32)(OTP_BOOT_ESCAPE_TABLE_END)-10))
|
||||
#define TI_OTP_C1BROM_ESCAPE_POINT_5 (Uint32)(*(volatile Uint32 *)((Uint32)(OTP_BOOT_ESCAPE_TABLE_END)-8))
|
||||
#define TI_OTP_C1BROM_ESCAPE_POINT_4 (Uint32)(*(volatile Uint32 *)((Uint32)(OTP_BOOT_ESCAPE_TABLE_END)-6))
|
||||
#define TI_OTP_C1BROM_ESCAPE_POINT_3 (Uint32)(*(volatile Uint32 *)((Uint32)(OTP_BOOT_ESCAPE_TABLE_END)-4))
|
||||
#define TI_OTP_C1BROM_ESCAPE_POINT_2 (Uint32)(*(volatile Uint32 *)((Uint32)(OTP_BOOT_ESCAPE_TABLE_END)-2))
|
||||
#define TI_OTP_C1BROM_ESCAPE_POINT_1 (Uint32)(*(volatile Uint32 *)(Uint32)(OTP_BOOT_ESCAPE_TABLE_END))
|
||||
|
||||
|
||||
#define TI_OTP_PMM_LC_TRIM_KEY (Uint16)(*(volatile Uint16 *)(Uint32)(0x70274))
|
||||
#define TI_OTP_PMM_LC_BGSLOPE_VAL_IREF_TRIM (Uint16)(*(volatile Uint16 *)(Uint32)(0x70270))
|
||||
#define TI_OTP_PMM_LC_VMON_TRIM (Uint16)(*(volatile Uint16 *)(Uint32)(0x70271))
|
||||
#define TI_OTP_PMM_LC_VREG_TRIM (Uint32)(*(volatile Uint32 *)(Uint32)(0x70272))
|
||||
|
||||
#define TI_OTP_OSC_TRIM_KEY (Uint16)(*(volatile Uint16 *)(Uint32)(0x70275))
|
||||
#define TI_OTP_OSC_REF_TRIM (Uint32)(*(volatile Uint32 *)(Uint32)(0x70276))
|
||||
#define TI_OTP_OSC1_TRIM (Uint32)(*(volatile Uint32 *)(Uint32)(0x70278))
|
||||
#define TI_OTP_OSC2_TRIM (Uint32)(*(volatile Uint32 *)(Uint32)(0x7027A))
|
||||
|
||||
|
||||
/*internal Macors used by C1-BootROM*/
|
||||
|
||||
/* MACRO to ACK IPC command
|
||||
* should acknowledge both IPC Flag31 and IPC Flag0 if the IPC command is compelted successfully
|
||||
*/
|
||||
#define C1BROM_C2C1_IPC_COMMAND_ACK IpcRegs.IPCACK.all = 0x80000001
|
||||
|
||||
|
||||
/* MACROS to NAK asn IPC command with error code
|
||||
* Aria will acknowledge only IPC Flag1 if the command is invalid/resulted in error or cannot be executed
|
||||
*/
|
||||
|
||||
#define C1BROM_C2C1_IPC_COMMAND_NAK(error_code) IpcRegs.IPCACK.bit.IPC0 = 0x01; \
|
||||
IpcRegs.IPCLOCALREPLY = (Uint32)error_code;
|
||||
|
||||
/*Macros to ACK PIE IPC interrupt*/
|
||||
|
||||
#define C1BROM_C2C1_IPC_INT1_ACK PieCtrlRegs.PIEACK.all = PIEACK_GROUP1
|
||||
|
||||
/*macros to check if IPC flags are set properly*/
|
||||
|
||||
#define C1BROM_CHECK_C2C1_IPC_COMMAND_FLAGS_SET ((IpcRegs.IPCSTS.bit.IPC0) && (IpcRegs.IPCSTS.bit.IPC31))
|
||||
|
||||
|
||||
//typedefs
|
||||
|
||||
/*below data structure stores the current mtoa ipc command being processed by C-BootROM*/
|
||||
|
||||
typedef struct current_c2c1_ipc_status
|
||||
{
|
||||
command_status_t status; /*status of the current command*/
|
||||
uint32_t command; /*current command value*/
|
||||
}cur_c2c1_ipc_cmd_sts_t;
|
||||
|
||||
|
||||
/*function prototypes*/
|
||||
extern command_status_t c1brom_c2c1_ipc_set_bits_16(void);
|
||||
extern command_status_t c1brom_c2c1_ipc_set_bits_32(void);
|
||||
extern command_status_t c1brom_c2c1_ipc_clear_bits_16(void);
|
||||
extern command_status_t c1brom_c2c1_ipc_clear_bits_32(void);
|
||||
extern command_status_t c1brom_c2c1_ipc_write_data_16(void);
|
||||
extern command_status_t c1brom_c2c1_ipc_write_data_32(void);
|
||||
extern command_status_t c1brom_c2c1_ipc_read_data_16(void);
|
||||
extern command_status_t c1brom_c2c1_ipc_read_data_32(void);
|
||||
|
||||
extern command_status_t c1brom_c2c1_ipc_set_bits_protected_16(void);
|
||||
extern command_status_t c1brom_c2c1_ipc_set_bits_protected_32(void);
|
||||
extern command_status_t c1brom_c2c1_ipc_clear_bits_protected_16(void);
|
||||
extern command_status_t c1brom_c2c1_ipc_clear_bits_protected_32(void);
|
||||
extern command_status_t c1brom_c2c1_ipc_write_data_protected_16(void);
|
||||
extern command_status_t c1brom_c2c1_ipc_write_data_protected_32(void);
|
||||
extern command_status_t c1brom_c2c1_ipc_read_data_protected_16(void);
|
||||
extern command_status_t c1brom_c2c1_ipc_read_data_protected_32(void);
|
||||
|
||||
void c1brom_init_pie_control(void);
|
||||
void c1brom_init_pie_vect_table(void);
|
||||
|
||||
extern interrupt void c1brom_itrap_isr(void);
|
||||
extern interrupt void c1brom_c2c1_ipc_int1_isr(void);
|
||||
extern interrupt void c1brom_handle_nmi();
|
||||
extern void c1brom_pie_vect_mismatch_handler();
|
||||
extern void c1brom_handle_nmi_at_start();
|
||||
extern void c1brom_enable_pie_in_boot(uint16_t mode);
|
||||
|
||||
|
||||
extern uint16_t c1brom_read_otp_bootmode();
|
||||
extern uint16_t c1brom_evaluate_bootmode(uint16_t bootmode, uint16_t bootmode_type);
|
||||
extern uint16_t c1brom_read_otp_bootpinconfig();
|
||||
extern uint16_t c1brom_decode_bootpins(uint16_t pinconfig);
|
||||
|
||||
|
||||
extern Uint32 I2C_Boot(Uint32 BootMode);
|
||||
extern Uint32 SCI_Boot(Uint32 BootMode);
|
||||
extern Uint32 SPI_Boot(Uint32 BootMode);
|
||||
extern Uint32 DCAN_Boot(Uint32 BootMode);
|
||||
extern Uint32 SPI_Alternate_IO_Boot();
|
||||
extern Uint32 Parallel_Boot();
|
||||
extern Uint32 USB_Boot(Uint16 bootMode);
|
||||
|
||||
|
||||
extern Uint16 SelectBootMode(void);
|
||||
|
||||
#endif /*C_BOOTROM_H_*/
|
||||
+108
@@ -0,0 +1,108 @@
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 13, 2012 11:53:32 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: c1_bootrom_ipc_commands.h
|
||||
//
|
||||
// TITLE: C1-BootROM IPC command Definitions.
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F2837x Boot ROM Version 0 $
|
||||
// $Release Date: Oct 1, 2013 $
|
||||
//###########################################################################
|
||||
|
||||
|
||||
#ifndef C_BOOTROM_IPC_COMMANDS_H_
|
||||
#define C_BOOTROM_IPC_COMMANDS_H_
|
||||
|
||||
|
||||
/* C1-BootROM health status:
|
||||
* The below will be given to user in xTOCIPCDATAR[31:8], in case of an IPC NAK
|
||||
* and also always in CTOMBOOTSTS[31:8], whenever boot status is written
|
||||
*/
|
||||
#define C1_BOOTROM_START_BOOT 0x00000100 //set during the initialization phase of A-bootROM
|
||||
#define C1_BOOTROM_IN_FLASH_BOOT 0x00000200
|
||||
#define C1_BOOTROM_DCSM_INIT_DONE 0x00000400
|
||||
#define C1_BOOTROM_RESC_HANDLED 0x00000800
|
||||
#define C1_BOOTROM_HANDLED_HIBRESET 0x00001000 //set if C-BootROM detects an iTRAP
|
||||
#define C1_BOOTROM_HANDLED_HWBISTRESET 0x00002000 //set if C-BootROM detects an iTRAP
|
||||
#define C1_BOOTROM_HANDLED_XRSN 0x00004000 //set if C-BootROM detects an iTRAP
|
||||
#define C1_BOOTROM_HANDLED_POR 0x00008000 //set if C-BootROM detects an iTRAP
|
||||
#define C1_BOOTROM_IN_AN_ITRAP 0x00020000 //set if C-BootROM detects an iTRAP
|
||||
#define C1_BOOTROM_IN_C1TOC2_BRANCH 0x00040000 //set if C-BootROM is doing a mtoc branch
|
||||
#define C1_BOOTROM_GOT_A_PIEMISMATCH 0x00080000 //set if C-BootROM is starting an application after boot
|
||||
#define C1_BOOTROM_GOT_A_OVF_NMI 0x00100000 //set if C-BootROM is starting an application after boot
|
||||
#define C1_BOOTROM_GOT_A_CPU2NMIWDRST_NMI 0x00200000 //set if C-BootROM is starting an application after boot
|
||||
#define C1_BOOTROM_GOT_A_CPU2WDRST_NMI 0x00400000 //set if C-BootROM is starting an application after boot
|
||||
#define C1_BOOTROM_GOT_A_RL_NMI 0x00800000 //set if C-BootROM is starting an application after boot
|
||||
#define C1_BOOTROM_GOT_A_SYSDBG_NMI 0x01000000 //set if C-BootROM is starting an application after boot
|
||||
#define C1_BOOTROM_GOT_A_PIEVECTERR_NMI 0x02000000 //set if C-BootROM is starting an application after boot
|
||||
#define C1_BOOTROM_GOT_A_C2BISTERR_NMI 0x04000000 //set if C-BootROM is starting an application after boot
|
||||
#define C1_BOOTROM_GOT_A_C1BISTERR_NMI 0x08000000 //set if C-BootROM is starting an application after boot
|
||||
#define C1_BOOTROM_GOT_A_FLASH_UNCERR_NMI 0x10000000 //set if C-BootROM is starting an application after boot
|
||||
#define C1_BOOTROM_GOT_A_RAM_UNCERR_NMI 0x20000000 //set if C-BootROM is starting an application after boot
|
||||
#define C1_BOOTROM_GOT_A_MCLK_NMI 0x40000000 //set if C-BootROM is starting an application after boot
|
||||
#define C1_BOOTROM_BOOT_COMPLETE 0x80000000 //set if C-BootROM is starting an application after boot
|
||||
|
||||
/* xTOCIPCDATAR[15:0] register values, when Control system NAK's an IPC
|
||||
* xTOCIPCDATAR[31:16] register value stores the C-BootROM health status */
|
||||
|
||||
#define C1BROM_NAK_STATUS_INVALID_VALUE 0x00000000 //invalid value or value when not set
|
||||
#define C1BROM_NAK_STATUS_CMD_NOT_SUPPORTED 0x00000001 //NAK STATUS command not supported
|
||||
#define C1BROM_NAK_STATUS_CMD_NOT_SET_PROPERLY 0x00000002 //NAK Status command not set properly , for ex: IPC1 set but IPC32 not set
|
||||
#define C1BROM_NAK_STATUS_ALREADY_BUSY_WITH_YOUR_CMD 0x00000003 //NAK status when master is trying to send a second command before first one could complete
|
||||
#define C1BROM_NAK_STATUS_CMD_RESULTED_IN_ERROR 0x00000004 //NAK status command execution resulted in an error
|
||||
#define C1BROM_NAK_STATUS_CMD_CANNOT_BE_EXECUTED_NOW 0x00000005 //NAK status - command cannot be executed now in the current state of bootROM
|
||||
#define C1BROM_NAK_STATUS_MAX_SUPPRT_VALUE 0x00000006 //one less than this value are valid values
|
||||
|
||||
|
||||
/* C-BootROM uses the below enum values to fill in CTOMIPCCOM register*/
|
||||
|
||||
#define C1_BOOTROM_IPC_CTOM_COMMAND_ILLEGAL 0x00000000 //invalid command value - default value when starting boot
|
||||
#define C1_BOOTROM_IPC_CTOM_CONTROL_SYSTEM_IN_ITRAP 0xFFFFFFFE //message tells Master that B.C28x CPU has got an iTRAP, address where iTrap occured will be in IPC ADDR register
|
||||
#define C1_BOOTROM_IPC_CTOM_PIE_INTERRUPT_NOT_SUPPORTED 0xFFFFFFFD //message tells Master that B.C28x CPU got a spurious PIE interrupt, intr no. will be in IPCDATAW register
|
||||
#define C1_BOOTROM_IPC_CTOM_PIE_VECTOR_ADDRESS_MISMATCH 0xFFFFFFFC //message tells Master that B.C28x CPU got a PIE vector mismatch error
|
||||
#define C1_BOOTROM_IPC_CTOM_CONTROL_SYSTEM_IN_FLUNCERR 0xFFFFFFFB //message tells Master that B.C28x CPU got a Flash uncorrectable error
|
||||
#define C1_BOOTROM_IPC_CTOM_CONTROL_SYSTEM_IN_RAMUNCERR 0xFFFFFFFA //message tells Master that B.C28x CPU got a RAM uncorrectable error
|
||||
|
||||
|
||||
/*C2TOC1IPC commands
|
||||
* Below IPC commands are can be sent from C1BROM to C2BROM
|
||||
*/
|
||||
|
||||
#define C2C1_BROM_IPC_COMMAND_ILLEGAL 0x00000000 //illegal command or command not set
|
||||
#define C2C1_BROM_IPC_SET_BITS_16 0x00000001 //set bits(max. 16 bit wide) in a 16 bit addressable location/register
|
||||
#define C2C1_BROM_IPC_SET_BITS_32 0x00000002 //set bits(max. 32 bit wide) in a 32 bit addressable location/register
|
||||
#define C2C1_BROM_IPC_CLEAR_BITS_16 0x00000003 //clear bits(max. 16 bit wide) in a 16 bit addressable location/register
|
||||
#define C2C1_BROM_IPC_CLEAR_BITS_32 0x00000004 //clear bits(max. 32 bit wide) in a 32 bit addressable location/register
|
||||
#define C2C1_BROM_IPC_DATA_WRITE_16 0x00000005 //write 16 bit data to a 16 bit addressable location/register
|
||||
#define C2C1_BROM_IPC_DATA_WRITE_32 0x00000006 //write 32 bit data to a 32 bit addressable location/register
|
||||
#define C2C1_BROM_IPC_DATA_READ_16 0x00000007 //read 16 bit data from a 16 bit addressable location/register
|
||||
#define C2C1_BROM_IPC_DATA_READ_32 0x00000008 //read 32 bit data from a 32 bit addressable location/register
|
||||
#define C2C1_BROM_IPC_SET_BITS_PROTECTED_16 0x00000009 //set bits(max. 16 bit wide) in a 16 bit addressable (EALLOW)protected location/register
|
||||
#define C2C1_BROM_IPC_SET_BITS_PROTECTED_32 0x0000000A //set bits(max. 32 bit wide) in a 32 bit addressable (EALLOW)protected location/register
|
||||
#define C2C1_BROM_IPC_CLEAR_BITS_PROTECTED_16 0x0000000B //clear bits(max. 16 bit wide) in a 16 bit addressable (EALLOW)protected location/register
|
||||
#define C2C1_BROM_IPC_CLEAR_BITS_PROTECTED_32 0x0000000C //clear bits(max. 32 bit wide) in a 32 bit addressable (EALLOW)protected location/register
|
||||
#define C2C1_BROM_IPC_DATA_WRITE_PROTECTED_16 0x0000000D //write 16 bit data to a 16 bit addressable (EALLOW)protected location/register
|
||||
#define C2C1_BROM_IPC_DATA_WRITE_PROTECTED_32 0x0000000E //write 32 bit data to a 32 bit addressable (EALLOW)protected location/register
|
||||
#define C2C1_BROM_IPC_DATA_READ_PROTECTED_16 0x0000000F //read 16 bit data from a 16 bit addressable (EALLOW)protected location/register
|
||||
#define C2C1_BROM_IPC_DATA_READ_PROTECTED_32 0x00000010 //read 32 bit data from a 32 bit addressable (EALLOW)protected location/register
|
||||
#define C2C1_BROM_IPC_BRANCH_CALL 0x00000011 //master requests a branch operation
|
||||
#define C2C1_BROM_IPC_FUNCTION_CALL 0x00000012 //master requests a function call operation
|
||||
#define C2C1_BROM_IPC_EXECUTE_BOOTMODE_CMD 0x00000013 //master requests control system to execute MTOCBOOTMODE CMD
|
||||
#define C2C1_BROM_IPC_MAX_SUPPORT_VALUE 0x00000014 //one less than this value are supported/valid values
|
||||
|
||||
|
||||
/*enum to tell the command status*/
|
||||
|
||||
typedef enum
|
||||
{
|
||||
COMMAND_STATUS_INVALID = 0, /*current command status is in-valid*/
|
||||
COMMAND_PENDING, /*current ipc command is under processing*/
|
||||
COMMAND_COMPLETE_SUCCESS, /*current ipc command has compelted successfully*/
|
||||
COMMAND_COMPLETE_FAILURE /*current ipc command has completed, but failed*/
|
||||
}command_status_t;
|
||||
|
||||
|
||||
|
||||
#endif /*C_BOOTROM_IPC_COMMANDS_H_*/
|
||||
+90
@@ -0,0 +1,90 @@
|
||||
/*
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 13, 2012 11:53:39 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: F2837x_cpu01_boot_rom_lnk.cmd
|
||||
//
|
||||
// TITLE: boot rom linker command file
|
||||
//
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F2837x Boot ROM Version 0 $
|
||||
// $Release Date: Oct 1, 2013 $
|
||||
//###########################################################################
|
||||
*/
|
||||
|
||||
MEMORY
|
||||
{
|
||||
PAGE 0 :
|
||||
ROM_SIGNATURE : origin = 0x3F8000, length = 0x000002, fill = 0xFFFF
|
||||
SYSBIOS_ROM : origin = 0x3F8002, length = 0x001E0E
|
||||
PLCTABLES : origin = 0x3F9E10, length = 0x003A08 , fill = 0xFFFF
|
||||
BOOT : origin = 0x3FD818, length = 0x00271A , fill = 0xFFFF
|
||||
CRCTABLE_ROM : origin = 0x3FFF32, length = 0x000008 , fill = 0xFFFF
|
||||
BIST_SIGNATURE : origin = 0x3FFF3A, length = 0x000040
|
||||
VERSION : origin = 0x3FFF7A, length = 0x000002
|
||||
CHECKSUM : origin = 0x3FFF7C, length = 0x000042
|
||||
VECS : origin = 0x3FFFBE, length = 0x000042
|
||||
SYSBIOS_FLASH : origin = 0x00080010, length = 0x1FF0
|
||||
|
||||
|
||||
PAGE 1 :
|
||||
EBSS : origin = 0x002, length = 0x000040
|
||||
STACK : origin = 0x042, length = 0x000080
|
||||
SYSBIOS_RAM : origin = 0x780, length = 0x000080
|
||||
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
primeRxPreamble : load = PLCTABLES, PAGE = 0, ALIGN(2)
|
||||
primeTxPreamble : load = PLCTABLES, PAGE = 0, ALIGN(2)
|
||||
primePrefTable : load = PLCTABLES, PAGE = 0, ALIGN(2)
|
||||
tf512pFFTTable : load = PLCTABLES, PAGE = 0, ALIGN(2)
|
||||
tf384pFFTTable : load = PLCTABLES, PAGE = 0, ALIGN(2)
|
||||
rsEXP_LUT : load = PLCTABLES, PAGE = 0, ALIGN(2)
|
||||
rsLOG_LUT : load = PLCTABLES, PAGE = 0, ALIGN(2)
|
||||
rsGFMult_LUT : load = PLCTABLES, PAGE = 0, ALIGN(2)
|
||||
PLC_TABLE : load = PLCTABLES, PAGE = 0, ALIGN(2)
|
||||
sunPhyTable : load = PLCTABLES, PAGE = 0, ALIGN(2)
|
||||
twiddleFactors : load = PLCTABLES, PAGE = 0, ALIGN(2)
|
||||
|
||||
.test_signature1: load = ROM_SIGNATURE PAGE = 0
|
||||
.crctable_forsecrom : load = CRCTABLE_ROM, PAGE = 0
|
||||
.InitBoot : load = BOOT, PAGE = 0
|
||||
.text : load = BOOT, PAGE = 0
|
||||
.CKSUMFUNCS : load = BOOT, PAGE = 0, ALIGN(2)
|
||||
.Isr : load = BOOT, PAGE = 0
|
||||
.BootVecs : load = VECS, PAGE = 0
|
||||
.CKSUMLOC : load = CHECKSUM, PAGE = 0, ALIGN(2)
|
||||
.Version : load = VERSION, PAGE = 0
|
||||
.bist_signature : load = BIST_SIGNATURE PAGE = 0
|
||||
.stack : load = STACK, PAGE = 1
|
||||
.ebss : load = EBSS, PAGE = 1
|
||||
.econst : load = BOOT, PAGE = 0, ALIGN(2)
|
||||
|
||||
|
||||
SYSBIOSROM : load = SYSBIOS_ROM, PAGE = 0
|
||||
{
|
||||
-l rom.obj(.sysbios_rom)
|
||||
}
|
||||
|
||||
SYSBIOSFLASH : load = SYSBIOS_FLASH, PAGE = 0
|
||||
{
|
||||
-l rom.obj(.sysbios_flash)
|
||||
}
|
||||
|
||||
SYSBIOSRAM : load = SYSBIOS_RAM, PAGE = 1
|
||||
{
|
||||
-l rom.obj(.sysbios_ram)
|
||||
}
|
||||
|
||||
SYSBIO_NOLOAD : load = 0, PAGE = 1, type = DSECT
|
||||
{
|
||||
-l rom.obj(.*)
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
+234
@@ -0,0 +1,234 @@
|
||||
//DCAN boot loader functions
|
||||
|
||||
#include "c1_bootrom.h"
|
||||
|
||||
//------CAN bit rate timing parameters------//
|
||||
//WARNING: There is very little sanity checking in these calculations. See DCAN spec section 1.16
|
||||
//for additional requirements. Among other things, you must ensure that one bit takes between
|
||||
//8 and 25 time quanta, and that Tseg1 and Tseg2 can fit into their respective register fields.
|
||||
//The main user-controllable parameters here are:
|
||||
//
|
||||
//Bit rate (bits/sec) CAN bit rate -- must match the rest of the CAN network
|
||||
//SYSCLK (hertz) System clock frequency, which feeds the DCAN module
|
||||
//BRP - Bit rate prescaler, which divides down SYSCLK to provide the bit clock
|
||||
#define DCAN_BOOT_RATE 50000L
|
||||
#define DCAN_BOOT_SYSCLK 10000000L
|
||||
#define DCAN_BOOT_BRP 10L
|
||||
|
||||
//Other parameters are defined according to the instructions in section 1.16.2.1
|
||||
//of the DCAN spec. Exception: This code rounds PhSeg1 up and PhSeg2 down since
|
||||
//a later sample time works better on most networks. This is implemented by rounding
|
||||
//down PhSeg2 first, then computing PhSeg1 as Tphase - PhSeg2. Calculating in this
|
||||
//order also lets us limit Tseg2 to 8 so it will fit in the register.
|
||||
//
|
||||
//Bit clock (hertz) Equal to SYSCLK / BRP by definition; each bit clock is one time quantum (Tq)
|
||||
//Bit time (Tq) Number of time quanta per bit; the ratio of bit clock frequency to bit rate
|
||||
//Tsync (Tq) Synchronization time delay: Fixed at 1 Tq by the CAN protocol
|
||||
//Tprop (Tq) Propagation delay: <2 microseconsd for a <1000 foot bus; assumed to be <2 Tq
|
||||
//Tphase (Tq) Phase compensation buffer for oscillator tolerance: The remainder of the bit time
|
||||
//PhSeg1 (Tq) Phase segment 1: Pre-sample buffer; half of the phase time, rounded up (<=16)
|
||||
//PhSeg2 (Tq) Phase segment 2: Post-sample buffer; half of the phase time, rounded down (<=8)
|
||||
#define DCAN_BOOT_BITCLK (DCAN_BOOT_SYSCLK / DCAN_BOOT_BRP)
|
||||
#define DCAN_BOOT_BITTIME (DCAN_BOOT_BITCLK / DCAN_BOOT_RATE)
|
||||
#if (DCAN_BOOT_BITTIME > 25)
|
||||
#error "DCAN boot loader config error: bit time cannot exceed 25 time quanta!"
|
||||
#endif
|
||||
#define DCAN_BOOT_TSYNC 1L
|
||||
#define DCAN_BOOT_TPROP 2L
|
||||
#define DCAN_BOOT_TPHASE (DCAN_BOOT_BITTIME - (DCAN_BOOT_TSYNC + DCAN_BOOT_TPROP))
|
||||
#define DCAN_BOOT_PHSEG2 ((DCAN_BOOT_TPHASE / 2L <= 8) ? DCAN_BOOT_TPHASE / 2L : 8)
|
||||
#define DCAN_BOOT_PHSEG1 (DCAN_BOOT_TPHASE - DCAN_BOOT_PHSEG2)
|
||||
|
||||
//These parameters are then converted into register values. All parameters
|
||||
//are -1 in the register:
|
||||
//
|
||||
//Tseg1 (Tq) Everything between sync and sample: Tprop + PhSeg1; MUST BE LESS THAN 8
|
||||
//Tseg2 (Tq) Everything between sample and next time: PhSeg2; MUST BE LESS THAN 16
|
||||
//Tsjw (Tq) Synchronization jump width: The lesser of 4 and PhSeg1
|
||||
//BRPEREG - Upper 4 bits of bit prescaler; SUBTRACT ONE FROM BRP BEFORE COMPUTING THIS
|
||||
//BRPREG - Lower 6 bits of bit prescaler; SUBTRACT ONE FROM BRP BEFORE COMPUTING THIS
|
||||
#define DCAN_BOOT_TSEG1 ((DCAN_BOOT_PHSEG1 + DCAN_BOOT_TPROP) - 1)
|
||||
#define DCAN_BOOT_TSEG2 (DCAN_BOOT_PHSEG2 - 1)
|
||||
#define DCAN_BOOT_TSJW (((DCAN_BOOT_PHSEG1 > 4L) ? 4L : DCAN_BOOT_PHSEG1) - 1)
|
||||
#define DCAN_BOOT_BRPEREG ((DCAN_BOOT_BRP - 1L) / 64L)
|
||||
#define DCAN_BOOT_BRPREG ((DCAN_BOOT_BRP - 1L) % 64L)
|
||||
#define DCAN_BOOT_BTRREG (DCAN_BOOT_BRPEREG<<16 | DCAN_BOOT_TSEG2<<12 | DCAN_BOOT_TSEG1<<8 | DCAN_BOOT_TSJW<<6 | DCAN_BOOT_BRPREG)
|
||||
|
||||
|
||||
//Boot mode flag definitions
|
||||
#define DCAN_BOOT_ALTGPIO 0x80 //Switch from the standard GPIO70/71 to GPIO62/63
|
||||
#define DCAN_BOOT_SENDTEST 0x40 //Send two 16-bit data frames on startup for bit rate measurement
|
||||
|
||||
|
||||
void DCAN_Boot_Gpio(Uint16 gpioSelect);
|
||||
void DCAN_Boot_Init();
|
||||
Uint16 DCAN_GetWordData();
|
||||
void DCAN_SendWordData(Uint16 data);
|
||||
extern void CopyData();
|
||||
extern Uint32 GetLongData();
|
||||
extern void ReadReservedFn();
|
||||
|
||||
|
||||
Uint32 DCAN_Boot(Uint32 bootMode)
|
||||
{
|
||||
Uint32 entryAddr = FLASH_ENTRY_POINT;
|
||||
|
||||
//If DCAN-A is not enabled, bypass the bootloader
|
||||
#ifdef CPU1
|
||||
if (DevCfgRegs.DC11.bit.CAN_A != 1)
|
||||
return FLASH_ENTRY_POINT;
|
||||
#endif
|
||||
|
||||
//Assign the DCAN data reader function to the global
|
||||
//function pointer for loading data.
|
||||
GetWordData = &DCAN_GetWordData;
|
||||
|
||||
//Set up the GPIO muxes for either standard (GPIO70/71) or alternate (GPIO62/63) pinout
|
||||
#ifdef CPU1
|
||||
if (bootMode & DCAN_BOOT_ALTGPIO)
|
||||
DCAN_Boot_Gpio(6263);
|
||||
else
|
||||
DCAN_Boot_Gpio(7071);
|
||||
#endif
|
||||
|
||||
//Set up the DCAN to receive data
|
||||
DCAN_Boot_Init();
|
||||
|
||||
entryAddr = TI_OTP_C1BROM_ESCAPE_POINT_9;
|
||||
if((entryAddr != 0xFFFFFFFF) &&
|
||||
(entryAddr != 0x00000000))
|
||||
{
|
||||
/*if OTP is programmed, then call OTP function*/
|
||||
((void (*)(void))entryAddr)();
|
||||
}
|
||||
|
||||
//Send two test frames if the OTP says so
|
||||
if (bootMode & DCAN_BOOT_SENDTEST)
|
||||
{
|
||||
DCAN_SendWordData(0x0320);
|
||||
DCAN_SendWordData(0x2837);
|
||||
}
|
||||
|
||||
//The first data word should be a valid key. If it's not,
|
||||
//bypass the bootloader.
|
||||
if (DCAN_GetWordData() != 0x08AA)
|
||||
return FLASH_ENTRY_POINT;
|
||||
|
||||
//Use the shared utility functions to load the data.
|
||||
ReadReservedFn();
|
||||
entryAddr = GetLongData();
|
||||
CopyData();
|
||||
|
||||
return entryAddr;
|
||||
}
|
||||
|
||||
|
||||
//Select which GPIOs to use for DCAN-A
|
||||
void DCAN_Boot_Gpio(Uint16 gpioSelect)
|
||||
{
|
||||
#ifdef CPU1
|
||||
EALLOW;
|
||||
if (gpioSelect == 6263)
|
||||
{
|
||||
//Set up the GPIO mux to bring out CANATX on GPIO63 and CANARX on GPIO62
|
||||
GpioCtrlRegs.GPBLOCK.all = 0x00000000; //Unlock GPIOs 32-63
|
||||
GpioCtrlRegs.GPBCSEL4.bit.GPIO63 = 0x0; //Give CPU1 control just in case
|
||||
GpioCtrlRegs.GPBGMUX2.bit.GPIO63 = 0x1; //Set the extended mux to 0x6
|
||||
GpioCtrlRegs.GPBMUX2.bit.GPIO63 = 0x2;
|
||||
GpioCtrlRegs.GPBCSEL4.bit.GPIO63 = 0x3; //Set qualification to async just in case
|
||||
|
||||
GpioCtrlRegs.GPBCSEL4.bit.GPIO62 = 0x0; //Give CPU1 control just in case
|
||||
GpioCtrlRegs.GPBGMUX2.bit.GPIO62 = 0x1; //Set the extended mux to 0x6
|
||||
GpioCtrlRegs.GPBMUX2.bit.GPIO62 = 0x2;
|
||||
GpioCtrlRegs.GPBCSEL4.bit.GPIO62 = 0x3; //Set qualification to async just in case
|
||||
GpioCtrlRegs.GPBLOCK.all = 0xFFFFFFFF; //Lock GPIOs 32-63
|
||||
} else if (gpioSelect == 1819)
|
||||
{
|
||||
GpioCtrlRegs.GPALOCK.all = 0x00000000; //Unlock GPIOs 0-31
|
||||
GpioCtrlRegs.GPACSEL3.bit.GPIO19 = 0x0; //Give CPU1 control just in case
|
||||
GpioCtrlRegs.GPAGMUX2.bit.GPIO19 = 0x0; //Set the extended mux to bring out CANATX
|
||||
GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 0x3;
|
||||
GpioCtrlRegs.GPAQSEL2.bit.GPIO19 = 0x3; //Set qualification to async just in case
|
||||
|
||||
GpioCtrlRegs.GPACSEL3.bit.GPIO18 = 0x0; //Give CPU1 control just in case
|
||||
GpioCtrlRegs.GPAGMUX2.bit.GPIO18 = 0x0; //Set the extended mux to bring out CANARX
|
||||
GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 0x3;
|
||||
GpioCtrlRegs.GPAQSEL2.bit.GPIO18 = 0x3; //Set qualification to async just in case
|
||||
GpioCtrlRegs.GPALOCK.all = 0xFFFFFFFF; //Lock GPIOs 0-31
|
||||
} else
|
||||
{
|
||||
//Set up the GPIO mux to bring out CANATX on GPIO71 and CANARX on GPIO70
|
||||
GpioCtrlRegs.GPCLOCK.all = 0x00000000; //Unlock GPIOs 64-95
|
||||
GpioCtrlRegs.GPCCSEL1.bit.GPIO71 = 0x0; //Give CPU1 control just in case
|
||||
GpioCtrlRegs.GPCGMUX1.bit.GPIO71 = 0x1; //Set the extended mux to 0x5
|
||||
GpioCtrlRegs.GPCMUX1.bit.GPIO71 = 0x1;
|
||||
GpioCtrlRegs.GPCQSEL1.bit.GPIO71 = 0x3; //Set qualification to async just in case
|
||||
|
||||
GpioCtrlRegs.GPCLOCK.all = 0x00000000; //Unlock GPIOs 64-95
|
||||
GpioCtrlRegs.GPCCSEL1.bit.GPIO70 = 0x0; //Give CPU1 control just in case
|
||||
GpioCtrlRegs.GPCGMUX1.bit.GPIO70 = 0x1; //Set the extended mux to bring out CANATX
|
||||
GpioCtrlRegs.GPCMUX1.bit.GPIO70 = 0x1;
|
||||
GpioCtrlRegs.GPCQSEL1.bit.GPIO70 = 0x3; //Set qualification to async just in case
|
||||
GpioCtrlRegs.GPCLOCK.all = 0xFFFFFFFF; //Lock GPIOs 64-95
|
||||
}
|
||||
|
||||
//Set the DCAN_A clock source to SYSCLK
|
||||
ClkCfgRegs.CLKSRCCTL2.bit.CANABCLKSEL = 0x0;
|
||||
EDIS;
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
//Initialize the CAN_A module
|
||||
void DCAN_Boot_Init()
|
||||
{
|
||||
//Turn on the clock to the DCAN module
|
||||
EALLOW;
|
||||
CpuSysRegs.PCLKCR10.bit.CAN_A = 1;
|
||||
EDIS;
|
||||
|
||||
//Issue a software reset to DCAN_A -- shut down communication via INIT, then reset via SWR
|
||||
DcanaRegs.CAN_CTL.all = 0x1;
|
||||
DcanaRegs.CAN_CTL.all = 0x8000;
|
||||
|
||||
//Bit timing configuration. See the large comment at the top for details.
|
||||
DcanaRegs.CAN_CTL.all = 0x1441; //Initialize, disable parity, and enable config register access
|
||||
DcanaRegs.CAN_BTR.all = DCAN_BOOT_BTRREG;
|
||||
DcanaRegs.CAN_CTL.all = 0x1400; //Finish initialization and disable config register access
|
||||
|
||||
//Set up a receive object via interface 1, then transfer to message RAM
|
||||
DcanaRegs.CAN_IF1ARB.all = 0x80040000; //MsgVal set, MsgID = 1 (11-bit)
|
||||
DcanaRegs.CAN_IF1MCTL.all = 0x2; //Data length = 2 bytes
|
||||
DcanaRegs.CAN_IF1CMD.all = 0x00F80001; //Transfer configuration to message object 1
|
||||
while (DcanaRegs.CAN_IF1CMD.all & 0x8000) {;} //Wait for message RAM copy
|
||||
|
||||
//Set up a transmit object via interface 2 for debug
|
||||
DcanaRegs.CAN_IF2ARB.all = 0xA0080000; //MsgVal set, MsgID = 2 (11-bit)
|
||||
DcanaRegs.CAN_IF2MCTL.all = 0x2; //Data length = 2 bytes
|
||||
DcanaRegs.CAN_IF2CMD.all = 0x00F80002; //Transfer configuration to message object 2
|
||||
while (DcanaRegs.CAN_IF2CMD.all & 0x8000) {;} //Wait for message RAM copy
|
||||
}
|
||||
|
||||
|
||||
//Read 16 bits from an incoming DCAN message to ID#1
|
||||
Uint16 DCAN_GetWordData()
|
||||
{
|
||||
//Wait for a new CAN message to be received in mailbox 1
|
||||
while (DcanaRegs.CAN_NDAT_21 != 0x1) {;}
|
||||
|
||||
//Transfer the message from IF1
|
||||
DcanaRegs.CAN_IF1CMD.all = 0x00070001;
|
||||
while (DcanaRegs.CAN_IF1CMD.all & 0x8000) {;}
|
||||
return (Uint16)DcanaRegs.CAN_IF1DATA.all;
|
||||
|
||||
}
|
||||
|
||||
|
||||
//Write 16 bits for external data rate measurement
|
||||
void DCAN_SendWordData(Uint16 data)
|
||||
{
|
||||
DcanaRegs.CAN_IF2DATA.all = data;
|
||||
DcanaRegs.CAN_IF2CMD.all = 0x00870002;
|
||||
while (DcanaRegs.CAN_IF2CMD.all & 0x8000) {;}
|
||||
while (DcanaRegs.CAN_TXRQ_21 & 0x2) {;}
|
||||
}
|
||||
+336
@@ -0,0 +1,336 @@
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 13, 2012 11:53:51 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: I2C_Boot.c
|
||||
//
|
||||
// TITLE: I2C Boot mode routines
|
||||
//
|
||||
// Functions:
|
||||
//
|
||||
// Uint32 I2C_Boot(void)
|
||||
// inline Uint16 I2C_CheckKeyVal(void)
|
||||
// inline void I2C_ReservedFn(void)
|
||||
// Uint16 I2C_GetWord(void)
|
||||
//
|
||||
// Notes:
|
||||
// The I2C code contained here is specifically steamlined for the
|
||||
// bootloader. It can be used to load code via the I2C port into the
|
||||
// RAM and jump to an entry point within that code.
|
||||
//
|
||||
// Features/Limitations:
|
||||
// - The I2C boot loader code is written to communicate with an EEPROM
|
||||
// device at address 0x50. The EEPROM must adhere to conventional I2C
|
||||
// EEPROM protocol (see the boot rom documentation) with a 16-bit
|
||||
// base address architecture (as opposed to 8-bits). The base address
|
||||
// of the code should be contained at address 0x0000 in the EEPROM.
|
||||
// - At boot, the internal osciallator will run at 10Mhz. The boot ROM
|
||||
// will configure the DIVSEL to be /1 for a 10Mhz system clock.
|
||||
// This is due to a requirement that the I2C clock be between 7Mhz
|
||||
// and 12Mhz to meet all of the I2C specification timing requirements.
|
||||
// The I2CPSC default value is hardcoded to 0 so that the I2C
|
||||
// clock will not be divided down from the system clock.
|
||||
// The I2CPSC value can be modified after receiving
|
||||
// the first few bytes from the EEPROM (see the boot rom documentation),
|
||||
// but it is advisable not to, as this can cause the I2C to operate out
|
||||
// of specification with a system clock between 7Mhz and 12Mhz.
|
||||
// - The bit period prescalers (I2CCLKH and I2CCLKL) are configured to
|
||||
// run the I2C at 50% duty cycle at 100kHz bit rate (standard I2C mode)
|
||||
// when the system clock is 12Mhz. These registers can be modified after
|
||||
// receiving the first few bytes from the EEPROM (see the boot rom
|
||||
// documentation). This allows the communication to be increased up to
|
||||
// a 400kHz bit rate (fast I2C mode) during the remaining data reads.
|
||||
// - Arbitration, bus busy, and slave signals are not checked. Therefore,
|
||||
// no other master is allowed to control the bus during this
|
||||
// initialization phase. If the application requires another master
|
||||
// during I2C boot mode, that master must be configured to hold off
|
||||
// sending any I2C messages until the F280x application software
|
||||
// signals that it is past the bootloader portion of initialization.
|
||||
// - The non-acknowledgement bit is only checked during the first message
|
||||
// sent to initialize the EEPROM base address. This ensures that an
|
||||
// EEPROM is present at address 0x50 before continuing on. If an EEPROM
|
||||
// is not present, code will jump to the Flash entry point. The
|
||||
// non-acknowledgement bit is not checked during the address phase of
|
||||
// the data read messages (I2C_GetWord). If a non-acknowledge is
|
||||
// received during the data read messages, the I2C bus will hang.
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F28M35X Boot ROM V1.0 $
|
||||
// $Release Date: January 22, 2009 $
|
||||
//###########################################################################
|
||||
|
||||
|
||||
#include "c1_bootrom.h"
|
||||
|
||||
|
||||
// Private functions
|
||||
inline Uint16 I2C_CheckKeyVal(void);
|
||||
inline void I2C_ReservedFn(void);
|
||||
Uint16 I2C_GetWord(void);
|
||||
|
||||
// External functions
|
||||
extern void CopyData(void);
|
||||
extern Uint32 GetLongData(void);
|
||||
|
||||
void I2C_Pinmux_Option1(void);
|
||||
void I2C_Pinmux_Option2(void);
|
||||
|
||||
//#################################################
|
||||
// Uint32 I2C_Boot(void)
|
||||
//--------------------------------------------
|
||||
// This module is the main I2C boot routine.
|
||||
// It will load code via the I2C-A port.
|
||||
//
|
||||
// It will return an entry point address back
|
||||
// to the ExitBoot routine.
|
||||
//--------------------------------------------
|
||||
|
||||
Uint32 I2C_Boot(Uint32 BootMode)
|
||||
{
|
||||
Uint32 EntryAddr;
|
||||
|
||||
/*read CCNF0 register to check if I2C is enabled or not*/
|
||||
if(DevCfgRegs.DC10.bit.I2C_A != 0x01)
|
||||
{
|
||||
return 0xFFFFFFFF;
|
||||
}
|
||||
|
||||
|
||||
// Assign GetWordData to the I2C-A version of the
|
||||
// function. GetWordData is a pointer to a function.
|
||||
GetWordData = I2C_GetWord;
|
||||
|
||||
// Init I2C pins, clock, and registers
|
||||
// I2C_Init();
|
||||
//----------------------------------------------
|
||||
// Initialize the I2C-A port for communications
|
||||
// with the host.
|
||||
//----------------------------------------------
|
||||
// Configure I2C pins and turn on I2C clock
|
||||
EALLOW;
|
||||
CpuSysRegs.PCLKCR9.bit.I2C_A = 1; // Turn I2C module clock on
|
||||
EDIS;
|
||||
|
||||
// Initialize I2C in master transmitter mode
|
||||
I2caRegs.I2CSAR = 0x0050; // Slave address - EEPROM control code
|
||||
I2caRegs.I2CPSC.all = 0; // I2C clock should be between 7Mhz-12Mhz
|
||||
I2caRegs.I2CCLKL = 43; // Prescalers set for 100kHz bit rate
|
||||
I2caRegs.I2CCLKH = 43; // at a 10Mhz I2C clock
|
||||
|
||||
I2caRegs.I2CMDR.all = 0x0620; // Master transmitter
|
||||
// Take I2C out of reset
|
||||
// Stop when suspended
|
||||
|
||||
I2caRegs.I2CFFTX.all = 0x6000; // Enable FIFO mode and TXFIFO
|
||||
I2caRegs.I2CFFRX.all = 0x2000; // Enable RXFIFO
|
||||
|
||||
//GPIO INIT
|
||||
EntryAddr = TI_OTP_C1BROM_ESCAPE_POINT_5;
|
||||
if((EntryAddr == 0xFFFFFFFF) ||
|
||||
(EntryAddr == 0x00000000))
|
||||
{
|
||||
/*if OTP is not programmed with an entry point-go with default*/
|
||||
if((BootMode & 0xF0) == 0x0)
|
||||
{
|
||||
/*
|
||||
* SDAA -> GPIO91, C28.Per1
|
||||
* SCLA -> GPIO92, C28.Per1
|
||||
*/
|
||||
I2C_Pinmux_Option1();
|
||||
}
|
||||
else
|
||||
{
|
||||
/*
|
||||
* SDAA -> GPIO32, C28.Per1
|
||||
* SCLA -> GPIO33, C28.Per1
|
||||
*/
|
||||
I2C_Pinmux_Option2();
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/*if OTP is programmed, then call OTP function*/
|
||||
((void (*)(void))EntryAddr)();
|
||||
}
|
||||
|
||||
|
||||
// Check for 0x08AA data header, else go to flash
|
||||
if (I2C_CheckKeyVal() == ERROR) { return FLASH_ENTRY_POINT; }
|
||||
|
||||
// Check for clock and prescaler speed changes and reserved words
|
||||
I2C_ReservedFn();
|
||||
EDIS;
|
||||
// Get point of entry address after load
|
||||
EntryAddr = GetLongData();
|
||||
|
||||
// Receive and copy one or more code sections to destination addresses
|
||||
CopyData();
|
||||
|
||||
return EntryAddr;
|
||||
}
|
||||
|
||||
//#################################################
|
||||
// Uint16 I2C_CheckKeyVal(void)
|
||||
//-----------------------------------------------
|
||||
// This routine sets up the starting address in the
|
||||
// EEPROM by writing two bytes (0x0000) via the
|
||||
// I2C-A port to slave address 0x50. Without
|
||||
// sending a stop bit, the communication is then
|
||||
// restarted and two bytes are read from the EEPROM.
|
||||
// If these two bytes read do not equal 0x08AA
|
||||
// (little endian), an error is returned.
|
||||
//-----------------------------------------------
|
||||
|
||||
inline Uint16 I2C_CheckKeyVal(void)
|
||||
{
|
||||
// To read a word from the EEPROM, an address must be given first in
|
||||
// master transmitter mode. Then a restart is performed and data can
|
||||
// be read back in master receiver mode.
|
||||
I2caRegs.I2CCNT = 0x02; // Setup how many bytes to send
|
||||
I2caRegs.I2CDXR = 0x00; // Configure fifo data for byte
|
||||
I2caRegs.I2CDXR = 0x00; // address of 0x0000
|
||||
|
||||
I2caRegs.I2CMDR.all = 0x2620; // Send data to setup EEPROM address
|
||||
|
||||
while (I2caRegs.I2CSTR.bit.ARDY == 0) // Wait until communication
|
||||
{ // complete and registers ready
|
||||
//I2caRegs.I2CMDR.all = 0x2620; // Send data to setup EEPROM address
|
||||
}
|
||||
|
||||
if (I2caRegs.I2CSTR.bit.NACK == 1) // Set stop bit & return error if
|
||||
{ // NACK received
|
||||
I2caRegs.I2CMDR.bit.STP = 1;
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
// Check to make sure key value received is correct
|
||||
if (I2C_GetWord() != 0x08AA) {return ERROR;}
|
||||
|
||||
return NO_ERROR;
|
||||
}
|
||||
|
||||
|
||||
//#################################################
|
||||
// void I2C_ReservedFn(void)
|
||||
//-------------------------------------------------
|
||||
// This function reads 8 reserved words in the header.
|
||||
// 1st word - parameters for I2CPSC register
|
||||
// 2nd word - parameters for I2CCLKH register
|
||||
// 3rd word - parameters for I2CCLKL register
|
||||
//
|
||||
// The remaining reserved words are read and discarded
|
||||
// and then program execution returns to the main routine.
|
||||
//-------------------------------------------------
|
||||
|
||||
inline void I2C_ReservedFn(void)
|
||||
{
|
||||
Uint16 I2CPrescaler;
|
||||
Uint16 I2cClkHData;
|
||||
Uint16 I2cClkLData;
|
||||
Uint16 i;
|
||||
|
||||
// Get I2CPSC, I2CCLKH, and I2CCLKL values
|
||||
I2CPrescaler = I2C_GetWord();
|
||||
I2cClkHData = I2C_GetWord();
|
||||
I2cClkLData = I2C_GetWord();
|
||||
|
||||
// Store I2C clock prescalers
|
||||
I2caRegs.I2CMDR.bit.IRS = 0;
|
||||
I2caRegs.I2CCLKL = I2cClkLData;
|
||||
I2caRegs.I2CCLKH = I2cClkHData;
|
||||
I2caRegs.I2CPSC.all = I2CPrescaler;
|
||||
I2caRegs.I2CMDR.bit.IRS = 1;
|
||||
|
||||
// Read and discard the next 5 reserved words
|
||||
for (i=1; i<=5; i++)
|
||||
{
|
||||
I2cClkHData = I2C_GetWord();
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
//#################################################
|
||||
// Uint16 I2C_GetWord(void)
|
||||
//-----------------------------------------------
|
||||
// This routine fetches two bytes from the I2C-A
|
||||
// port and puts them together little endian style
|
||||
// to form a single 16-bit value.
|
||||
//-----------------------------------------------
|
||||
|
||||
Uint16 I2C_GetWord(void)
|
||||
{
|
||||
Uint16 LowByte;
|
||||
|
||||
I2caRegs.I2CCNT = 2; // Setup how many bytes to expect
|
||||
I2caRegs.I2CMDR.all = 0x2C20; // Send start as master receiver
|
||||
|
||||
// Wait until communication done
|
||||
while (I2caRegs.I2CMDR.bit.STP == 1) {}
|
||||
|
||||
// Combine two bytes to one word & return
|
||||
LowByte = I2caRegs.I2CDRR;
|
||||
return (LowByte | (I2caRegs.I2CDRR<<8));
|
||||
}
|
||||
|
||||
//#################################################
|
||||
// void I2C_Pinmux_Option1(void)
|
||||
//-----------------------------------------------
|
||||
// This routine configures GPIO91 and GPIO92
|
||||
// as I2C pins :-
|
||||
// 1) Pull up enabled on GPIO91 & GPIO92
|
||||
// 2) Configure GPIO91 as SDAA pin
|
||||
// 3) Configure GPIO92 as SCLA pin
|
||||
// 4) Configure GPIO91 & GPIO92 as asynchronous I/O's
|
||||
//-----------------------------------------------
|
||||
|
||||
void I2C_Pinmux_Option1(void)
|
||||
{
|
||||
EALLOW;
|
||||
GpioCtrlRegs.GPCPUD.all &= 0xE7FFFFFF;
|
||||
|
||||
GpioCtrlRegs.GPCGMUX2.all |= 0x01400000;
|
||||
GpioCtrlRegs.GPCMUX2.all |= 0x02800000;
|
||||
|
||||
GpioCtrlRegs.GPCQSEL2.all |= 0x03C00000;
|
||||
EDIS;
|
||||
}
|
||||
|
||||
//#################################################
|
||||
// void I2C_Pinmux_Option2(void)
|
||||
//-----------------------------------------------
|
||||
// This routine configures GPIO32 and GPIO32
|
||||
// as I2C pins :-
|
||||
// 1) Pull up enabled on GPIO32 & GPIO33
|
||||
// 2) Configure GPIO32 as SDAA pin
|
||||
// 3) Configure GPIO33 as SCLA pin
|
||||
// 4) Configure GPIO32 & GPIO33 as asynchronous I/O's
|
||||
//-----------------------------------------------
|
||||
void I2C_Pinmux_Option2(void)
|
||||
{
|
||||
EALLOW;
|
||||
GpioCtrlRegs.GPBPUD.all &= 0xFFFFFFFC;
|
||||
|
||||
GpioCtrlRegs.GPBMUX1.all |= 0x00000005;
|
||||
|
||||
GpioCtrlRegs.GPBQSEL1.all |= 0x0000000F;
|
||||
EDIS;
|
||||
|
||||
/*
|
||||
GpioCtrlRegs.GPBPUD.bit.GPIO42 = 0;
|
||||
GpioCtrlRegs.GPBPUD.bit.GPIO43 = 0;
|
||||
|
||||
GpioCtrlRegs.GPBMUX1.bit.GPIO42 = 2; GpioCtrlRegs.GPBGMUX1.bit.GPIO42 = 1;
|
||||
GpioCtrlRegs.GPBMUX1.bit.GPIO43 = 2; GpioCtrlRegs.GPBGMUX1.bit.GPIO43 = 1;
|
||||
|
||||
GpioCtrlRegs.GPBQSEL1.bit.GPIO42 = 3;
|
||||
GpioCtrlRegs.GPBQSEL1.bit.GPIO43 = 3;
|
||||
*/
|
||||
|
||||
}
|
||||
|
||||
|
||||
//===========================================================================
|
||||
// No more.
|
||||
//===========================================================================
|
||||
+186
@@ -0,0 +1,186 @@
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 13, 2012 11:53:53 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: Parallel_Boot.c
|
||||
//
|
||||
// TITLE: Parallel Port I/O boot routines
|
||||
//
|
||||
// Functions:
|
||||
//
|
||||
// Uint32 Parallel_Boot(void)
|
||||
// inline void Parallel_GPIOSelect(void)
|
||||
// inline Uint16 Parallel_CheckKeyVal(void)
|
||||
// Uint16 Parallel_GetWordData_8bit()
|
||||
// Uint16 Parallel_GetWordData_16bit()
|
||||
// void Parallel_WaitHostRdy(void)
|
||||
// void Parallel_HostHandshake(void)
|
||||
// Notes:
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F2837x Boot ROM Version 0 $
|
||||
// $Release Date: Oct 1, 2013 $
|
||||
//###########################################################################
|
||||
|
||||
|
||||
#include "c1_bootrom.h"
|
||||
|
||||
|
||||
// Private function definitions
|
||||
Uint16 Parallel_GetWordData_8bit(void);
|
||||
|
||||
// External function definitions
|
||||
extern void CopyData(void);
|
||||
extern Uint32 GetLongData(void);
|
||||
extern void ReadReservedFn(void);
|
||||
|
||||
#define HOST_CTRL GPIO70 // GPIO70 is the host control signal (will be configured as input pin)
|
||||
#define DSP_CTRL GPIO69 // GPIO26 is the DSP's control signal (will be configured as output pin)
|
||||
|
||||
#define HOST_DATA_NOT_RDY GpioDataRegs.GPCDAT.bit.HOST_CTRL!=0
|
||||
#define WAIT_HOST_ACK GpioDataRegs.GPCDAT.bit.HOST_CTRL!=1
|
||||
|
||||
// Set (DSP_ACK) or Clear (DSP_RDY) GPIO69
|
||||
#define DSP_ACK GpioDataRegs.GPCSET.bit.DSP_CTRL = 1;
|
||||
#define DSP_RDY GpioDataRegs.GPCCLEAR.bit.DSP_CTRL = 1;
|
||||
#define DATA ((GpioDataRegs.GPBDAT.all & 0xFC000000)>>24|(GpioDataRegs.GPCDAT.bit.GPIO64<<1)|(GpioDataRegs.GPCDAT.bit.GPIO65))
|
||||
|
||||
void Parallel_GPIOSelect(void);
|
||||
|
||||
//#################################################
|
||||
// Uint32 Parallel_Boot(void)
|
||||
//--------------------------------------------
|
||||
// This module is the main Parallel boot routine.
|
||||
// It will load code via GP I/Os.
|
||||
//
|
||||
// This boot mode accepts 8-bit data.
|
||||
// 8-bit data is expected to be the order LSB
|
||||
// followed by MSB.
|
||||
//
|
||||
// This function returns a entry point address back
|
||||
// to the InitBoot routine which in turn calls
|
||||
// the ExitBoot routine.
|
||||
//--------------------------------------------
|
||||
|
||||
Uint32 Parallel_Boot()
|
||||
{
|
||||
|
||||
Uint32 EntryAddr;
|
||||
Uint16 wordData;
|
||||
|
||||
// Setup for Parallel boot
|
||||
Parallel_GPIOSelect();
|
||||
|
||||
// Check for the key value. This version only
|
||||
// supports 8-bit data.
|
||||
GetWordData = Parallel_GetWordData_8bit;
|
||||
wordData = GetWordData();
|
||||
if(wordData != BROM_EIGHT_BIT_HEADER) return FLASH_ENTRY_POINT;
|
||||
// Read and discard the reserved words
|
||||
ReadReservedFn();
|
||||
// Get the entry point address
|
||||
EntryAddr = GetLongData();
|
||||
// Load the data
|
||||
CopyData();
|
||||
|
||||
return EntryAddr;
|
||||
|
||||
}
|
||||
|
||||
//#################################################
|
||||
// Uint16 Parallel_GetWordData_8bit()/
|
||||
// The _8bit function is used if the input stream is
|
||||
// an 8-bit input stream and the upper 8-bits of the
|
||||
// GP I/O port are ignored. In the 8-bit case the
|
||||
// first fetches the LSB and then the MSB from the
|
||||
// GPIO port. These two bytes are then put together to
|
||||
// form a single 16-bit word that is then passed back
|
||||
// to the host. Note that in this case, the input stream
|
||||
// from the host is in the order LSB followed by MSB
|
||||
//-----------------------------------------------
|
||||
Uint16 Parallel_GetWordData_8bit()
|
||||
{
|
||||
Uint16 wordData;
|
||||
|
||||
// Get LSB.
|
||||
// Parallel_WaitHostRdy();
|
||||
// This routine tells the host that the DSP is ready to
|
||||
// recieve data. The DSP then waits for the host to
|
||||
// signal that data is ready on the GP I/O port.
|
||||
DSP_RDY;
|
||||
while(HOST_DATA_NOT_RDY) { }
|
||||
|
||||
wordData = DATA;
|
||||
|
||||
// Parallel_HostHandshake();
|
||||
// This routine tells the host that the DSP has recieved
|
||||
// the data. The DSP then waits for the host to acknowledge
|
||||
// the reciept before continuing.
|
||||
DSP_ACK;
|
||||
while(WAIT_HOST_ACK) { }
|
||||
|
||||
// Fetch the MSB.
|
||||
wordData = wordData & 0x00FF;
|
||||
|
||||
// Parallel_WaitHostRdy();
|
||||
// This routine tells the host that the DSP is ready to
|
||||
// recieve data. The DSP then waits for the host to
|
||||
// signal that data is ready on the GP I/O port.
|
||||
DSP_RDY;
|
||||
while(HOST_DATA_NOT_RDY) { }
|
||||
|
||||
wordData |= (DATA << 8);
|
||||
|
||||
// Parallel_HostHandshake();
|
||||
// This routine tells the host that the DSP has recieved
|
||||
// the data. The DSP then waits for the host to acknowledge
|
||||
// the reciept before continuing.
|
||||
DSP_ACK;
|
||||
while(WAIT_HOST_ACK) {}
|
||||
|
||||
return wordData;
|
||||
}
|
||||
|
||||
void Parallel_GPIOSelect(void)
|
||||
{
|
||||
|
||||
// GPIO58 Bit 2 (will be configured as input pin)
|
||||
// GPIO59 Bit 3 (will be configured as input pin)
|
||||
// GPIO60 Bit 4 (will be configured as input pin)
|
||||
// GPIO61 Bit 5 (will be configured as input pin)
|
||||
// GPIO62 Bit 6 (will be configured as input pin)
|
||||
// GPIO63 Bit 7 (will be configured as input pin)
|
||||
// GPIO64 Bit 1 (will be configured as input pin)
|
||||
// GPIO65 Bit 0 (will be configured as input pin)
|
||||
|
||||
// GPIO70 HOST_CTRL (will be configured as input pin)
|
||||
// GPIO69 DSP_CTRL (will be configured as output pin)
|
||||
|
||||
EALLOW;
|
||||
/* Configure GPIO58-GPIO65 as input pin */
|
||||
GpioCtrlRegs.GPBMUX2.all = 0x0; GpioCtrlRegs.GPBGMUX2.all = 0x0;
|
||||
GpioCtrlRegs.GPCMUX1.all = 0x0; GpioCtrlRegs.GPCGMUX1.all = 0x0;
|
||||
|
||||
/* Configure GPIO69 and GPIO70 as GPIO pin */
|
||||
GpioCtrlRegs.GPCMUX1.bit.DSP_CTRL = 0; GpioCtrlRegs.GPCGMUX1.bit.DSP_CTRL = 0;
|
||||
GpioCtrlRegs.GPCMUX1.bit.HOST_CTRL = 0; GpioCtrlRegs.GPCGMUX1.bit.HOST_CTRL = 0;
|
||||
|
||||
// HOST_CTRL is an input control from the Host
|
||||
// to the DSP Ack/Rdy
|
||||
// - may require an external pull-up
|
||||
// DSP_CTRL is an output from the DSP Ack/Rdy
|
||||
// - may require an external pull-up for host to
|
||||
// correctly read "1" initially.
|
||||
// DSP_CTRL set to 1 initially
|
||||
// 0 = input 1 = output
|
||||
GpioCtrlRegs.GPCDIR.bit.DSP_CTRL = 1; //GPIO69 configured as output pin
|
||||
GpioCtrlRegs.GPCDIR.bit.HOST_CTRL = 0; //GPIO70 configured as input pin
|
||||
|
||||
EDIS;
|
||||
|
||||
}
|
||||
|
||||
// EOF --------
|
||||
|
||||
|
||||
|
||||
+236
@@ -0,0 +1,236 @@
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 13, 2012 11:53:54 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: SCI_Boot.c
|
||||
//
|
||||
// TITLE: SCI Boot mode routines
|
||||
//
|
||||
// Functions:
|
||||
//
|
||||
// Uint32 SCI_Boot(void)
|
||||
// inline void SCIA_Init(void)
|
||||
// inline void SCIA_AutobaudLock(void)
|
||||
// Uint32 SCIA_GetWordData(void)
|
||||
//
|
||||
// Notes:
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F2837x Boot ROM Version 0 $
|
||||
// $Release Date: Oct 1, 2013 $
|
||||
//###########################################################################
|
||||
|
||||
#include "c1_bootrom.h"
|
||||
|
||||
|
||||
// Private functions
|
||||
Uint16 SCIA_GetWordData(void);
|
||||
|
||||
// External functions
|
||||
extern void CopyData(void);
|
||||
Uint32 GetLongData(void);
|
||||
extern void ReadReservedFn(void);
|
||||
|
||||
void SCI_Pinmux_Option1(void);
|
||||
void SCI_Pinmux_Option2(void);
|
||||
|
||||
//#################################################
|
||||
// Uint32 SCI_Boot(void)
|
||||
//--------------------------------------------
|
||||
// This module is the main SCI boot routine.
|
||||
// It will load code via the SCI-A port.
|
||||
//
|
||||
// It will return a entry point address back
|
||||
// to the InitBoot routine which in turn calls
|
||||
// the ExitBoot routine.
|
||||
//--------------------------------------------
|
||||
|
||||
Uint32 SCI_Boot(Uint32 BootMode)
|
||||
{
|
||||
Uint32 EntryAddr;
|
||||
Uint16 byteData;
|
||||
|
||||
/*read CCNF0 register to check if SCI is enabled or not*/
|
||||
if((DevCfgRegs.DC8.bit.SCI_A != 0x01))
|
||||
{
|
||||
return 0xFFFFFFFF;
|
||||
}
|
||||
|
||||
|
||||
// Asign GetWordData to the SCI-A version of the
|
||||
// function. GetWordData is a pointer to a function.
|
||||
GetWordData = SCIA_GetWordData;
|
||||
|
||||
//----------------------------------------------
|
||||
// Initialize the SCI-A port for communications
|
||||
// with the host.
|
||||
//----------------------------------------------
|
||||
|
||||
// Enable the SCI-A clocks
|
||||
EALLOW;
|
||||
CpuSysRegs.PCLKCR7.bit.SCI_A = 1;
|
||||
ClkCfgRegs.LOSPCP.all = 0x0002;
|
||||
|
||||
SciaRegs.SCIFFTX.all=0x8000;
|
||||
// 1 stop bit, No parity, 8-bit character
|
||||
// No loopback
|
||||
SciaRegs.SCICCR.all = 0x0007;
|
||||
// Enable TX, RX, Use internal SCICLK
|
||||
SciaRegs.SCICTL1.all = 0x0003;
|
||||
// Disable RxErr, Sleep, TX Wake,
|
||||
// Diable Rx Interrupt, Tx Interrupt
|
||||
SciaRegs.SCICTL2.all = 0x0000;
|
||||
// Relinquish SCI-A from reset
|
||||
SciaRegs.SCICTL1.all = 0x0023;
|
||||
EDIS;
|
||||
|
||||
//GPIO INIT
|
||||
EntryAddr = TI_OTP_C1BROM_ESCAPE_POINT_6;
|
||||
if((EntryAddr == 0xFFFFFFFF) ||
|
||||
(EntryAddr == 0x00000000))
|
||||
{
|
||||
/*if OTP is not programmed with an entry point-go with default*/
|
||||
if((BootMode & 0xF0) == 0x0)
|
||||
{
|
||||
//Configure GPIO84 as SCITXDA (Output pin)
|
||||
//Configure GPIO85 as SCIRXDA (Input pin)
|
||||
SCI_Pinmux_Option1();
|
||||
}
|
||||
else
|
||||
{
|
||||
//Configure GPIO29 as SCITXDA (Output pin)
|
||||
//Configure GPIO28 as SCIRXDA (Input pin)
|
||||
SCI_Pinmux_Option2();
|
||||
}
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
/*if OTP is programmed, then call OTP function*/
|
||||
((void (*)(void))EntryAddr)();
|
||||
}
|
||||
|
||||
|
||||
//------------------------------------------------
|
||||
// Perform autobaud lock with the host.
|
||||
// Note that if autobaud never occurs
|
||||
// the program will hang in this routine as there
|
||||
// is no timeout mechanism included.
|
||||
//------------------------------------------------
|
||||
|
||||
// Must prime baud register with >= 1
|
||||
SciaRegs.SCILBAUD = 1;
|
||||
// Prepare for autobaud detection
|
||||
// Set the CDC bit to enable autobaud detection
|
||||
// and clear the ABD bit
|
||||
SciaRegs.SCIFFCT.bit.CDC = 1;
|
||||
SciaRegs.SCIFFCT.bit.ABDCLR = 1;
|
||||
// Wait until we correctly read an
|
||||
// 'A' or 'a' and lock
|
||||
while(SciaRegs.SCIFFCT.bit.ABD != 1) {}
|
||||
// After autobaud lock, clear the ABD and CDC bits
|
||||
SciaRegs.SCIFFCT.bit.ABDCLR = 1;
|
||||
SciaRegs.SCIFFCT.bit.CDC = 0;
|
||||
while(SciaRegs.SCIRXST.bit.RXRDY != 1) { }
|
||||
byteData = SciaRegs.SCIRXBUF.bit.RXDT;
|
||||
SciaRegs.SCITXBUF = byteData;
|
||||
|
||||
// If the KeyValue was invalid, abort the load
|
||||
// and return the flash entry point.
|
||||
if (SCIA_GetWordData() != 0x08AA) return FLASH_ENTRY_POINT;
|
||||
|
||||
ReadReservedFn();
|
||||
|
||||
EntryAddr = GetLongData();
|
||||
|
||||
CopyData();
|
||||
|
||||
return EntryAddr;
|
||||
}
|
||||
|
||||
//#################################################
|
||||
// Uint16 SCIA_GetWordData(void)
|
||||
//-----------------------------------------------
|
||||
// This routine fetches two bytes from the SCI-A
|
||||
// port and puts them together to form a single
|
||||
// 16-bit value. It is assumed that the host is
|
||||
// sending the data in the order LSB followed by MSB.
|
||||
//-----------------------------------------------
|
||||
|
||||
|
||||
Uint16 SCIA_GetWordData()
|
||||
{
|
||||
Uint16 wordData;
|
||||
Uint16 byteData;
|
||||
|
||||
wordData = 0x0000;
|
||||
byteData = 0x0000;
|
||||
|
||||
// Fetch the LSB and verify back to the host
|
||||
while(SciaRegs.SCIRXST.bit.RXRDY != 1) { }
|
||||
wordData = (Uint16)SciaRegs.SCIRXBUF.bit.RXDT;
|
||||
SciaRegs.SCITXBUF = wordData;
|
||||
|
||||
// Fetch the MSB and verify back to the host
|
||||
while(SciaRegs.SCIRXST.bit.RXRDY != 1) { }
|
||||
byteData = (Uint16)SciaRegs.SCIRXBUF.bit.RXDT;
|
||||
SciaRegs.SCITXBUF = byteData;
|
||||
|
||||
// form the wordData from the MSB:LSB
|
||||
wordData |= (byteData << 8);
|
||||
|
||||
return wordData;
|
||||
}
|
||||
|
||||
|
||||
//#################################################
|
||||
// void SCI_Pinmux_Option1(void)
|
||||
//-----------------------------------------------
|
||||
// This routine configures GPIO84 and GPIO85
|
||||
// as SCI pins :-
|
||||
// 1) Configure GPIO84 as SCITXDA pin
|
||||
// 2) Configure GPIO85 as SCIRXDA pin
|
||||
// 3) Configure GPIO85 as asynchronous pin
|
||||
//-----------------------------------------------
|
||||
|
||||
void SCI_Pinmux_Option1(void)
|
||||
{
|
||||
EALLOW;
|
||||
//Configure GPIO84 as SCITXDA (Output pin)
|
||||
//Configure GPIO85 as SCIRXDA (Input pin)
|
||||
GpioCtrlRegs.GPCGMUX2.bit.GPIO84 = 1; GpioCtrlRegs.GPCMUX2.bit.GPIO84 = 1;
|
||||
GpioCtrlRegs.GPCGMUX2.bit.GPIO85 = 1; GpioCtrlRegs.GPCMUX2.bit.GPIO85 = 1;
|
||||
|
||||
// Configure GPIO85 (SCIRXRA) as async pin
|
||||
GpioCtrlRegs.GPCQSEL2.bit.GPIO85 = 3;
|
||||
EDIS;
|
||||
|
||||
}
|
||||
|
||||
|
||||
//#################################################
|
||||
// void SCI_Pinmux_Option2(void)
|
||||
//-----------------------------------------------
|
||||
// This routine configures GPIO84 and GPIO85
|
||||
// as SCI pins :-
|
||||
// 1) Configure GPIO29 as SCITXDA pin
|
||||
// 2) Configure GPIO28 as SCIRXDA pin
|
||||
// 3) Configure GPIO28 as asynchronous pin
|
||||
//-----------------------------------------------
|
||||
|
||||
void SCI_Pinmux_Option2(void)
|
||||
{
|
||||
EALLOW;
|
||||
//Configure GPIO29 as SCITXDA (Output pin)
|
||||
//Configure GPIO28 as SCIRXDA (Input pin)
|
||||
GpioCtrlRegs.GPAMUX2.bit.GPIO28 = 1;
|
||||
GpioCtrlRegs.GPAMUX2.bit.GPIO29 = 1;
|
||||
|
||||
// Configure GPIO28 (SCIRXRA) as async pin
|
||||
GpioCtrlRegs.GPAQSEL2.bit.GPIO28 = 3;
|
||||
EDIS;
|
||||
|
||||
}
|
||||
|
||||
// EOF-------
|
||||
|
||||
+336
@@ -0,0 +1,336 @@
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 13, 2012 11:53:57 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: SPI_Boot.c
|
||||
//
|
||||
// TITLE: SPI Boot mode routines
|
||||
//
|
||||
// Functions:
|
||||
//
|
||||
// Uint32 SPI_Boot(void)
|
||||
// Uint16 SPIA_SetAddress_KeyChk(void)
|
||||
// inline void SPIA_Transmit(u16 cmdData)
|
||||
// inline void SPIA_ReservedFn(void);
|
||||
// Uint32 SPIA_GetWordData(void)
|
||||
//
|
||||
// Notes:
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F2837x Boot ROM Version 0 $
|
||||
// $Release Date: Oct 1, 2013 $
|
||||
//###########################################################################
|
||||
|
||||
#include "c1_bootrom.h"
|
||||
|
||||
// Private functions
|
||||
inline Uint16 SPIA_Transmit(Uint16 cmdData);
|
||||
inline void SPIA_ReservedFn(void);
|
||||
Uint16 SPIA_GetWordData(void);
|
||||
Uint16 SPIA_SetAddress_KeyChk(void);
|
||||
|
||||
// External functions
|
||||
extern void CopyData(void);
|
||||
Uint32 GetLongData(void);
|
||||
Uint32 SPI_start_Boot(void);
|
||||
|
||||
void SPIA_Init(void);
|
||||
void SPI_Pinmux_Option1(void);
|
||||
void SPI_Pinmux_Option2(void);
|
||||
|
||||
//#################################################
|
||||
// Uint32 SPI_Boot(void)
|
||||
//--------------------------------------------
|
||||
// This module is the main SPI boot routine.
|
||||
// It will load code via the SPI-A port.
|
||||
//
|
||||
// It will return a entry point address back
|
||||
// to the ExitBoot routine.
|
||||
//--------------------------------------------
|
||||
|
||||
Uint32 SPI_Boot(Uint32 BootMode)
|
||||
{
|
||||
Uint32 EntryAddr;
|
||||
|
||||
/*read CCNF0 register to check if SPI is enabled or not*/
|
||||
if(!(DevCfgRegs.DC9.bit.SPI_A & 0x01))
|
||||
{
|
||||
return 0xFFFFFFFF;
|
||||
}
|
||||
|
||||
// Asign GetWordData to the SPI-A version of the
|
||||
// function. GetWordData is a pointer to a function.
|
||||
GetWordData = SPIA_GetWordData;
|
||||
// 1. Init SPI-A and set
|
||||
// EEPROM chip enable - low
|
||||
|
||||
SPIA_Init();
|
||||
|
||||
//GPIO INIT
|
||||
EntryAddr = TI_OTP_C1BROM_ESCAPE_POINT_7;
|
||||
if((EntryAddr == 0xFFFFFFFF) ||
|
||||
(EntryAddr == 0x00000000))
|
||||
{
|
||||
/*if OTP is not programmed with an entry point-go with default*/
|
||||
if((BootMode & 0xF0) == 0x0)
|
||||
{
|
||||
/*
|
||||
GPIO58 as SPISIMOA pin
|
||||
GPIO59 as SPISOMIA pin
|
||||
GPIO60 as SPICLKA pin
|
||||
GPIO61 as SPISTEA pin
|
||||
*/
|
||||
SPI_Pinmux_Option1();
|
||||
}
|
||||
else
|
||||
{
|
||||
/*
|
||||
GPIO16 as SPISIMOA pin
|
||||
GPIO17 as SPISOMIA pin
|
||||
GPIO18 as SPICLKA pin
|
||||
GPIO19 as SPISTEA pin
|
||||
*/
|
||||
SPI_Pinmux_Option2();
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/*if OTP is programmed, then call OTP function*/
|
||||
((void (*)(void))EntryAddr)();
|
||||
}
|
||||
|
||||
return SPI_start_Boot();
|
||||
}
|
||||
|
||||
Uint32 SPI_start_Boot()
|
||||
{
|
||||
Uint32 EntryAddr;
|
||||
|
||||
// 2. Enable EEPROM and send EEPROM Read Command
|
||||
SPIA_Transmit(0x0300);
|
||||
// 3. Send Starting Address for Serial EEPROM (16-bit - 0x0000,0000)
|
||||
// or Serial Flash (24-bit - 0x0000,0000,0000)
|
||||
// Then check for 0x08AA data header, else go to flash
|
||||
if(SPIA_SetAddress_KeyChk() != 0x08AA) return FLASH_ENTRY_POINT;
|
||||
// 4.Check for Clock speed change and reserved words
|
||||
SPIA_ReservedFn();
|
||||
// 5. Get point of entry address after load
|
||||
EntryAddr = GetLongData();
|
||||
// 6. Receive and copy one or more code sections to destination addresses
|
||||
CopyData();
|
||||
// 7. Disable EEPROM chip enable - high
|
||||
// Chip enable - high
|
||||
GpioDataRegs.GPASET.bit.GPIO19 = 1;
|
||||
|
||||
return EntryAddr;
|
||||
}
|
||||
|
||||
//#################################################
|
||||
// Uint16 SPIA_SetAddress_KeyChk(void)
|
||||
//-----------------------------------------------
|
||||
// This routine sends either a 16-bit address to
|
||||
// Serial EEPROM or a 24-bit address to Serial
|
||||
// FLASH. It then fetches the 2 bytes that make
|
||||
// up the key value from the SPI-A port and
|
||||
// puts them together to form a single
|
||||
// 16-bit value. It is assumed that the host is
|
||||
// sending the data in the form MSB:LSB.
|
||||
//-----------------------------------------------
|
||||
|
||||
Uint16 SPIA_SetAddress_KeyChk()
|
||||
{
|
||||
Uint16 keyValue;
|
||||
// Transmit first byte of Serial Memory address
|
||||
SPIA_Transmit(0x0000);
|
||||
// Transmit second byte of Serial Memory address
|
||||
SPIA_Transmit(0x0000);
|
||||
// Transmit third byte of Serial Memory address (0x00) if using Serial Flash
|
||||
// or receive first byte of key value if using Serial EEPROM.
|
||||
keyValue = SPIA_Transmit(0x0000);
|
||||
// If previously received LSB of key value (Serial EEPROM), then fetch MSB of key value
|
||||
if (keyValue == 0x00AA)
|
||||
{
|
||||
keyValue |= (SPIA_Transmit(0x0000)<<8);
|
||||
}
|
||||
else
|
||||
{
|
||||
// Serial Flash is being used - keyValue will be received after 24-bit address in the next 2 bytes
|
||||
// Fetch Key Value LSB (after 24-bit addressing)
|
||||
keyValue = SPIA_Transmit(0x0000);
|
||||
// Fetch Key Value MSB (after 24-bit addressing)
|
||||
keyValue |= (SPIA_Transmit(0x0000)<<8);
|
||||
}
|
||||
return keyValue;
|
||||
}
|
||||
|
||||
|
||||
//#################################################
|
||||
// Uint16 SPIA_Transmit(Uint16 cmdData)
|
||||
//------------------------------------------------
|
||||
// Send a byte/words through SPI transmit channel
|
||||
//------------------------------------------------
|
||||
|
||||
inline Uint16 SPIA_Transmit(Uint16 cmdData)
|
||||
{
|
||||
Uint16 recvData;
|
||||
// Send Read command/dummy word to EEPROM to fetch a byte
|
||||
SpiaRegs.SPITXBUF = cmdData;
|
||||
while( (SpiaRegs.SPISTS.bit.INT_FLAG) !=1);
|
||||
// Clear SPIINT flag and capture received byte
|
||||
recvData = SpiaRegs.SPIRXBUF;
|
||||
return recvData;
|
||||
}
|
||||
|
||||
//#################################################
|
||||
// void SPIA_ReservedFn(void)
|
||||
//-------------------------------------------------
|
||||
// This function reads 8 reserved words in the header.
|
||||
// The first word has parameters for LOSPCP
|
||||
// and SPIBRR register 0xMSB:LSB, LSB = is a three
|
||||
// bit field for LOSPCP change MSB = is a 6bit field
|
||||
// for SPIBRR register update
|
||||
//
|
||||
// If either byte is the default value of the register
|
||||
// then no speed change occurs. The default values
|
||||
// are LOSPCP = 0x02 and SPIBRR = 0x7F
|
||||
// The remaining reserved words are read and discarded
|
||||
// and then returns to the main routine.
|
||||
//-------------------------------------------------
|
||||
|
||||
inline void SPIA_ReservedFn()
|
||||
{
|
||||
Uint16 speedData;
|
||||
Uint16 i;
|
||||
|
||||
// update LOSPCP register
|
||||
speedData = SPIA_Transmit((Uint16)0x0000);
|
||||
EALLOW;
|
||||
ClkCfgRegs.LOSPCP.all = speedData;
|
||||
EDIS;
|
||||
asm(" RPT #0x0F ||NOP");
|
||||
|
||||
// update SPIBRR register
|
||||
speedData = SPIA_Transmit((Uint16)0x0000);
|
||||
SpiaRegs.SPIBRR = speedData;
|
||||
asm(" RPT #0x0F ||NOP");
|
||||
|
||||
// Read and discard the next 7 reserved words.
|
||||
for(i = 1; i <= 7; i++)
|
||||
{
|
||||
SPIA_GetWordData();
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
//#################################################
|
||||
// Uint16 SPIA_GetWordData(void)
|
||||
//-----------------------------------------------
|
||||
// This routine fetches two bytes from the SPI-A
|
||||
// port and puts them together to form a single
|
||||
// 16-bit value. It is assumed that the host is
|
||||
// sending the data in the form MSB:LSB.
|
||||
//-----------------------------------------------
|
||||
|
||||
Uint16 SPIA_GetWordData()
|
||||
{
|
||||
Uint16 wordData;
|
||||
// Fetch the LSB
|
||||
wordData = SPIA_Transmit(0x0000);
|
||||
// Fetch the MSB
|
||||
wordData |= (SPIA_Transmit(0x0000) << 8);
|
||||
return wordData;
|
||||
}
|
||||
|
||||
//#################################################
|
||||
// void SPI_Pinmux_Option1(void)
|
||||
//-----------------------------------------------
|
||||
// This routine configures GPIO58/59/60/61
|
||||
// as SPI pins :-
|
||||
// 1) Pull up enabled on GPIO58/59/60/61
|
||||
// 2) Configure GPIO58 as SPISIMOA pin
|
||||
// 3) Configure GPIO59 as SPISOMIA pin
|
||||
// 4) Configure GPIO60 as SPICLKA pin
|
||||
// 5) Configure GPIO61 as SPISTEA pin
|
||||
// 6) Configure GPIO58/59/60/61 as asynchronous I/O's
|
||||
//-----------------------------------------------
|
||||
|
||||
void SPI_Pinmux_Option1(void)
|
||||
{
|
||||
EALLOW;
|
||||
// Enable pull-ups on SPISIMO/SPISOMI/SPICLK/SPISTE pins
|
||||
GpioCtrlRegs.GPBPUD.all &= 0xC3FFFFFF;
|
||||
|
||||
// Enable SPISIMO/SPISOMI/SPICLK pins
|
||||
GpioCtrlRegs.GPBGMUX2.all |= 0x03F00000;
|
||||
GpioCtrlRegs.GPBMUX2.all |= 0x03F00000;
|
||||
|
||||
// Enable SPISIMO/SPISOMI/SPICLK pins as async
|
||||
GpioCtrlRegs.GPBQSEL2.all |= 0x03F00000;
|
||||
|
||||
// Enable SPISTEAn pin as GPIO (Output pin)
|
||||
GpioCtrlRegs.GPBDIR.all |= 0x20000000;
|
||||
|
||||
// Pull SPISTEAn low to enable chip select
|
||||
GpioDataRegs.GPBCLEAR.bit.GPIO61 = 1;
|
||||
EDIS;
|
||||
}
|
||||
|
||||
|
||||
//#################################################
|
||||
// void SPI_Pinmux_Option2(void)
|
||||
//-----------------------------------------------
|
||||
// This routine configures GPIO16/17/18/19
|
||||
// as SPI pins :-
|
||||
// 1) Pull up enabled on GPIO16/17/18/19
|
||||
// 2) Configure GPIO16 as SPISIMOA pin
|
||||
// 3) Configure GPIO17 as SPISOMIA pin
|
||||
// 4) Configure GPIO18 as SPICLKA pin
|
||||
// 5) Configure GPIO19 as SPISTEA pin
|
||||
// 6) Configure GPIO16/17/18/19 as asynchronous I/O's
|
||||
//-----------------------------------------------
|
||||
|
||||
void SPI_Pinmux_Option2(void)
|
||||
{
|
||||
EALLOW;
|
||||
// Enable pull-ups on SPISIMO/SPISOMI/SPICLK/SPISTE pins
|
||||
GpioCtrlRegs.GPAPUD.all &= 0xFFF0FFFF;
|
||||
|
||||
// Enable SPISIMO/SPISOMI/SPICLK pins
|
||||
GpioCtrlRegs.GPAMUX2.all |= 0x00000015;
|
||||
|
||||
// Enable SPISIMO/SPISOMI/SPICLK pins as async
|
||||
GpioCtrlRegs.GPAQSEL2.all |= 0x0000003F;
|
||||
|
||||
// Enable SPISTEAn pin as GPIO (Output pin)
|
||||
GpioCtrlRegs.GPADIR.bit.GPIO19 = 1;
|
||||
|
||||
// Pull SPISTEAn low to enable chip select
|
||||
GpioDataRegs.GPACLEAR.bit.GPIO19 = 1;
|
||||
EDIS;
|
||||
}
|
||||
|
||||
|
||||
void SPIA_Init(void)
|
||||
{
|
||||
//----------------------------------------------
|
||||
// Initialize the SPI-A port for communications
|
||||
// with the host.
|
||||
//----------------------------------------------
|
||||
|
||||
// Enable SPI-A clocks
|
||||
EALLOW;
|
||||
CpuSysRegs.PCLKCR8.bit.SPI_A = 1;
|
||||
ClkCfgRegs.LOSPCP.all = 0x0002;
|
||||
|
||||
// Enable FIFO reset bit only
|
||||
SpiaRegs.SPIFFTX.all=0x8000;
|
||||
// 8-bit character
|
||||
SpiaRegs.SPICCR.all = 0x0007;
|
||||
// Use internal SPICLK master mode and Talk mode
|
||||
SpiaRegs.SPICTL.all = 0x000E;
|
||||
// Use the slowest baud rate
|
||||
SpiaRegs.SPIBRR = 0x007f;
|
||||
// Relinquish SPI-A from reset
|
||||
SpiaRegs.SPICCR.all = 0x0087;
|
||||
EDIS;
|
||||
}
|
||||
+89
@@ -0,0 +1,89 @@
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 14, 2012 12:51:30 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: SelectMode_Boot.c
|
||||
//
|
||||
// TITLE: Boot Mode selection routines
|
||||
//
|
||||
// Functions:
|
||||
//
|
||||
// Uint32 SelectBootMode(void)
|
||||
//
|
||||
// Notes:
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F2837x Boot ROM Version 0 $
|
||||
// $Release Date: Oct 1, 2013 $
|
||||
//###########################################################################
|
||||
|
||||
#include "c1_bootrom.h"
|
||||
|
||||
Uint16 SelectBootMode(void);
|
||||
|
||||
Uint16 SelectBootMode()
|
||||
{
|
||||
Uint16 BootMode;
|
||||
|
||||
// EALLOW;
|
||||
//
|
||||
// // Watchdog Service
|
||||
// SysCtrlRegs.WDKEY = 0x0055;
|
||||
// SysCtrlRegs.WDKEY = 0x00AA;
|
||||
|
||||
|
||||
|
||||
EALLOW;
|
||||
|
||||
// If GPIO37/TDO is connected to JTAG,
|
||||
// read the EMU_KEY_LOC and EMU_BOOT_LOC
|
||||
// If the key is invalid, assign WAIT to the
|
||||
// boot mode.
|
||||
if(CpuSysRegs.RESC.bit.TRSTn_pin_status == 1)
|
||||
{
|
||||
//EMUKEY.bits7:0 = KEY
|
||||
//EMUKEY.bits15:8 = BMODE
|
||||
//EMUBMODE.bits7:0 = BOOTPIN0
|
||||
//EMUBMODE.bits15:8 = BOOTPIN1
|
||||
if((EmuKey & 0xFF) != 0x5A)
|
||||
{
|
||||
//bad key
|
||||
BootMode = WAIT_BOOT;
|
||||
}
|
||||
else
|
||||
{
|
||||
//in EMUBOOT MODE we don't decode boot pins by default
|
||||
//0x82 is to emulate bootmode GPIO via EmuBmode locations
|
||||
//user can use this feature before programming the pin config in OTP
|
||||
if(((EmuKey & 0xFF00) >> 8) == EMULATE_BOOTPIN_MODE)
|
||||
{
|
||||
BootMode = c1brom_decode_bootpins(EmuBMode);
|
||||
}
|
||||
else if(((EmuKey & 0xFF00) >> 8) == EMULATE_TRUE_BOOT) //0xFF is emulate TRUEBOOT mode)
|
||||
{
|
||||
BootMode = c1brom_decode_bootpins(c1brom_read_otp_bootpinconfig());
|
||||
}
|
||||
else
|
||||
{
|
||||
BootMode = ((EmuKey & 0xFF00) >> 8); //no need to evaluate in EMUMODE
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
|
||||
BootMode = c1brom_decode_bootpins(c1brom_read_otp_bootpinconfig());
|
||||
EmuKey = ((BootMode << 8) | 0x5A);
|
||||
}
|
||||
|
||||
EDIS;
|
||||
|
||||
// sysctl_wdog_disable();
|
||||
if(BootMode == GET_BOOT)
|
||||
{
|
||||
BootMode = c1brom_read_otp_bootmode();
|
||||
}
|
||||
|
||||
return BootMode;
|
||||
|
||||
}
|
||||
+120
@@ -0,0 +1,120 @@
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 13, 2012 11:53:56 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: Shared_Boot.c
|
||||
//
|
||||
// TITLE: Boot loader shared functions
|
||||
//
|
||||
// Functions:
|
||||
//
|
||||
// void CopyData(void)
|
||||
// Uint32 GetLongData(void)
|
||||
// void ReadReservedFn(void)
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F2837x Boot ROM Version 0 $
|
||||
// $Release Date: Oct 1, 2013 $
|
||||
//###########################################################################
|
||||
|
||||
|
||||
#include "c1_bootrom.h"
|
||||
|
||||
|
||||
// GetWordData is a pointer to the function that interfaces to the peripheral.
|
||||
// Each loader assigns this pointer to it's particular GetWordData function.
|
||||
uint16fptr GetWordData;
|
||||
|
||||
// Function prototypes
|
||||
Uint32 GetLongData();
|
||||
void CopyData(void);
|
||||
void ReadReservedFn(void);
|
||||
|
||||
//#################################################
|
||||
// void CopyData(void)
|
||||
//-----------------------------------------------------
|
||||
// This routine copies multiple blocks of data from the host
|
||||
// to the specified RAM locations. There is no error
|
||||
// checking on any of the destination addresses.
|
||||
// That is it is assumed all addresses and block size
|
||||
// values are correct.
|
||||
//
|
||||
// Multiple blocks of data are copied until a block
|
||||
// size of 00 00 is encountered.
|
||||
//
|
||||
//-----------------------------------------------------
|
||||
|
||||
void CopyData()
|
||||
{
|
||||
|
||||
struct HEADER {
|
||||
Uint16 BlockSize;
|
||||
Uint32 DestAddr;
|
||||
} BlockHeader;
|
||||
|
||||
Uint16 wordData;
|
||||
Uint16 i;
|
||||
|
||||
// Get the size in words of the first block
|
||||
BlockHeader.BlockSize = (*GetWordData)();
|
||||
|
||||
// While the block size is > 0 copy the data
|
||||
// to the DestAddr. There is no error checking
|
||||
// as it is assumed the DestAddr is a valid
|
||||
// memory location
|
||||
|
||||
while(BlockHeader.BlockSize != (Uint16)0x0000)
|
||||
{
|
||||
BlockHeader.DestAddr = GetLongData();
|
||||
for(i = 1; i <= BlockHeader.BlockSize; i++)
|
||||
{
|
||||
wordData = (*GetWordData)();
|
||||
*(Uint16 *)BlockHeader.DestAddr++ = wordData;
|
||||
}
|
||||
|
||||
// Get the size of the next block
|
||||
BlockHeader.BlockSize = (*GetWordData)();
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
//#################################################
|
||||
// Uint32 GetLongData(void)
|
||||
//-----------------------------------------------------
|
||||
// This routine fetches a 32-bit value from the peripheral
|
||||
// input stream.
|
||||
//-----------------------------------------------------
|
||||
|
||||
Uint32 GetLongData()
|
||||
{
|
||||
Uint32 longData;
|
||||
|
||||
// Fetch the upper 1/2 of the 32-bit value
|
||||
longData = ( (Uint32)(*GetWordData)() << 16);
|
||||
|
||||
// Fetch the lower 1/2 of the 32-bit value
|
||||
longData |= (Uint32)(*GetWordData)();
|
||||
|
||||
return longData;
|
||||
}
|
||||
|
||||
//#################################################
|
||||
// void Read_ReservedFn(void)
|
||||
//-------------------------------------------------
|
||||
// This function reads 8 reserved words in the header.
|
||||
// None of these reserved words are used by the
|
||||
// this boot loader at this time, they may be used in
|
||||
// future devices for enhancments. Loaders that use
|
||||
// these words use their own read function.
|
||||
//-------------------------------------------------
|
||||
|
||||
void ReadReservedFn()
|
||||
{
|
||||
Uint16 i;
|
||||
// Read and discard the 8 reserved words.
|
||||
for(i = 1; i <= 8; i++)
|
||||
{
|
||||
GetWordData();
|
||||
}
|
||||
return;
|
||||
}
|
||||
+201
@@ -0,0 +1,201 @@
|
||||
//USB boot loader functions
|
||||
|
||||
|
||||
#include "c1_bootrom.h"
|
||||
#include "USB_Boot_Funcs.h"
|
||||
|
||||
|
||||
|
||||
void USB_Boot_Init();
|
||||
Uint16 USB_GetWordData();
|
||||
extern void CopyData();
|
||||
extern Uint32 GetLongData();
|
||||
extern void ReadReservedFn();
|
||||
|
||||
extern Uint16 *g_UsbRxBuffer;
|
||||
extern Uint16 g_UsbRxDataLength;
|
||||
extern Uint16 g_UsbRxPacketLength;
|
||||
|
||||
|
||||
Uint32 USB_Boot(Uint16 bootMode)
|
||||
{
|
||||
uint32_t entryAddr = FLASH_ENTRY_POINT;
|
||||
uint32_t EntryAddr = 0xFFFFFFFF;
|
||||
|
||||
//If the USB module is not enabled, bypass the bootloader
|
||||
if (DevCfgRegs.DC12.bit.USB_A == 0)
|
||||
return FLASH_ENTRY_POINT;
|
||||
|
||||
//Assign the USB data reader function to the global
|
||||
//function pointer for loading data.
|
||||
GetWordData = &USB_GetWordData;
|
||||
|
||||
//Set up the USB to receive data
|
||||
USB_Boot_Init();
|
||||
|
||||
EntryAddr = TI_OTP_C1BROM_ESCAPE_POINT_13;
|
||||
if((EntryAddr != 0xFFFFFFFF) &&
|
||||
(EntryAddr != 0x00000000))
|
||||
{
|
||||
/*if OTP is programmed, then call OTP function*/
|
||||
((void (*)(void))EntryAddr)();
|
||||
}
|
||||
|
||||
//The first data word should be a valid key. If it's not,
|
||||
//bypass the bootloader.
|
||||
if (USB_GetWordData() != 0x08AA)
|
||||
return FLASH_ENTRY_POINT;
|
||||
|
||||
//Use the shared utility functions to load the data.
|
||||
ReadReservedFn();
|
||||
entryAddr = GetLongData();
|
||||
CopyData();
|
||||
|
||||
//Disconnect from the bus, disable USB interrupts, and
|
||||
//reset the USB module.
|
||||
USBREG8(USB_O_POWER) &= ~USB_POWER_SOFTCONN;
|
||||
EALLOW;
|
||||
PieCtrlRegs.PIEIER9.bit.INTx15 = 0;
|
||||
IER &= ~M_INT9;
|
||||
DevCfgRegs.SOFTPRES11.bit.USB_A = 1;
|
||||
DevCfgRegs.SOFTPRES11.bit.USB_A = 0;
|
||||
EDIS;
|
||||
|
||||
//Bypass and disable the main PLL
|
||||
EALLOW;
|
||||
ClkCfgRegs.SYSPLLCTL1.bit.PLLCLKEN = 0;
|
||||
ClkCfgRegs.SYSPLLCTL1.bit.PLLEN = 0;
|
||||
EDIS;
|
||||
|
||||
EntryAddr = TI_OTP_C1BROM_ESCAPE_POINT_13;
|
||||
if((EntryAddr != 0xFFFFFFFF) &&
|
||||
(EntryAddr != 0x00000000))
|
||||
{
|
||||
/*if OTP is programmed, then call OTP function*/
|
||||
((void (*)(void))EntryAddr)();
|
||||
}
|
||||
|
||||
|
||||
return entryAddr;
|
||||
}
|
||||
|
||||
|
||||
//Initialize the USB module
|
||||
void USB_Boot_Init()
|
||||
{
|
||||
uint32_t EntryAddr = 0xFFFFFFFF;
|
||||
//Soprano
|
||||
//Lock the main PLL< aux PLL and enable the USB module clock
|
||||
//
|
||||
//USBCLK = 120 MHz / 2, sourced from INTOSC
|
||||
//(the /2 comes from AUXCLKDIVSEL, which is assumed to be at its reset value)
|
||||
//
|
||||
//SYSCLK must be greater than USBCLK / 2, according to Design. At this
|
||||
//point it should already be using INTOSC2 as a source. The PLL minimum
|
||||
//Fout is 110 MHz, so let's use the same multiplier as the aux PLL and
|
||||
//keep PLLSYSCLKDIV set to 1. This gives 120 MHz.
|
||||
EALLOW;
|
||||
ClkCfgRegs.SYSPLLCTL1.bit.PLLEN = 1; //Enable the main PLL
|
||||
ClkCfgRegs.SYSPLLMULT.all = 12; //Set IMULT to 12, clear FMULT
|
||||
while (ClkCfgRegs.SYSPLLSTS.bit.LOCKS != 1) {;} //Wait for the PLL to lock
|
||||
ClkCfgRegs.SYSPLLCTL1.bit.PLLCLKEN = 1; //Turn off the main PLL bypass
|
||||
|
||||
ClkCfgRegs.CLKSRCCTL2.bit.AUXOSCCLKSRCSEL = 0x0; //Use INTOSC2 (10 MHz) as the aux PLL clock source
|
||||
ClkCfgRegs.AUXPLLCTL1.bit.PLLEN = 1; //Enable the aux PLL
|
||||
ClkCfgRegs.AUXPLLMULT.all = 12; //Set IMULT to 12, clear FMULT
|
||||
ClkCfgRegs.AUXCLKDIVSEL.bit.AUXPLLDIV = 2/2; //Set AUXPLLDIV to 2
|
||||
while (ClkCfgRegs.AUXPLLSTS.bit.LOCKS != 1) {;} //Wait for the PLL to lock
|
||||
ClkCfgRegs.AUXPLLCTL1.bit.PLLCLKEN = 1; //Turn off aux PLL bypass
|
||||
CpuSysRegs.PCLKCR11.bit.USB_A = 1; //Enable the clock to the USB module
|
||||
EDIS;
|
||||
|
||||
c1brom_enable_pie_in_boot(0);
|
||||
|
||||
//Register the USB interrupt handler and enable CPU interrupts
|
||||
EALLOW;
|
||||
PieVectTable.USBA_INT = &UsbIntHandler;
|
||||
PieCtrlRegs.PIEIER9.bit.INTx15 = 1;
|
||||
EDIS;
|
||||
IER |= M_INT9;
|
||||
EINT;
|
||||
|
||||
EntryAddr = TI_OTP_C1BROM_ESCAPE_POINT_13;
|
||||
if((EntryAddr != 0xFFFFFFFF) &&
|
||||
(EntryAddr != 0x00000000))
|
||||
{
|
||||
/*if OTP is programmed, then call OTP function*/
|
||||
((void (*)(void))EntryAddr)();
|
||||
}
|
||||
|
||||
//Octave
|
||||
//Lock the aux PLL: USBCLK = 120 MHz / 2, sourced from INTOSC
|
||||
/* InitPll2(0, 12, 0);
|
||||
|
||||
//Register the USB interrupt handler
|
||||
EALLOW;
|
||||
PieVectTable.USB0_INT = &UsbIntHandler;
|
||||
PieCtrlRegs.PIEIER5.bit.INTx8 = 1;
|
||||
EDIS;
|
||||
IER |= M_INT5;
|
||||
|
||||
//Enable the USB module and CPU interrupts
|
||||
EALLOW;
|
||||
SysCtrlRegs.PCLKCR3.bit.USB0ENCLK = 1;
|
||||
GpioCtrlRegs.GPACTRL2.bit.USB0IOEN = 1;
|
||||
EDIS;
|
||||
EINT;
|
||||
*/
|
||||
|
||||
|
||||
//Reset the USB driver's global variables
|
||||
ResetUsbDriver();
|
||||
|
||||
//The USB module is in device mode on reset, so we shouldn't need to do much configuration
|
||||
//Clear active interrupts
|
||||
USBREG16(USB_O_TXIS);
|
||||
USBREG16(USB_O_RXIS);
|
||||
USBREG8(USB_O_IS);
|
||||
|
||||
//Enable USB interrupts for endpoint 0 transmit, disconnection, and reset
|
||||
USBREG16(USB_O_TXIE) = 0x0001;
|
||||
USBREG8(USB_O_IE) = (USB_IE_DISCON | USB_IE_RESET);
|
||||
|
||||
//Attach the USB PHY to the bus
|
||||
USBREG8(USB_O_POWER) |= USB_POWER_SOFTCONN;
|
||||
}
|
||||
|
||||
|
||||
//Read 16 bits from an incoming USB message
|
||||
Uint16 USB_GetWordData()
|
||||
{
|
||||
Uint16 retVal;
|
||||
|
||||
//Wait for the USB receive buffer to be refilled
|
||||
while (g_UsbRxBuffer == 0) {;}
|
||||
|
||||
//Read the next data value, update the buffer pointer and length,
|
||||
//and do end-of-packet handling.
|
||||
retVal = *g_UsbRxBuffer++;
|
||||
g_UsbRxPacketLength -= 2;
|
||||
if (g_UsbRxPacketLength == 0)
|
||||
{
|
||||
g_UsbRxBuffer = 0;
|
||||
if (g_UsbRxDataLength == 0)
|
||||
AckEp0(USB_END_DATA);
|
||||
else
|
||||
AckEp0(USB_MORE_DATA);
|
||||
}
|
||||
|
||||
return retVal;
|
||||
}
|
||||
|
||||
//Acknowledge the USB interrupt. Defining a separate function for this keeps the
|
||||
//driver library device-independent.
|
||||
void AckUsbInterrupt()
|
||||
{
|
||||
//Soprano
|
||||
PieCtrlRegs.PIEACK.all = PIEACK_GROUP9;
|
||||
|
||||
//Octave
|
||||
// PieCtrlRegs.PIEACK.all = PIEACK_GROUP5;
|
||||
}
|
||||
+351
@@ -0,0 +1,351 @@
|
||||
//USB boot loader support functions -- mainly the interrupt handler
|
||||
//and its sub-functions.
|
||||
|
||||
#include "USB_Boot_Funcs.h"
|
||||
|
||||
//Global state for the request processor
|
||||
static eEndpointState g_UsbEp0State;
|
||||
static Uint16 g_UsbAddress;
|
||||
static Uint16 *g_UsbTxData;
|
||||
static Uint16 g_UsbTxLength;
|
||||
static Uint16 g_DfuExpectData;
|
||||
|
||||
//Global buffer for boot loader data
|
||||
Uint16 *g_UsbRxBuffer;
|
||||
Uint16 g_UsbRxPacketLength;
|
||||
Uint16 g_UsbRxDataLength;
|
||||
|
||||
|
||||
//Main USB interrupt handler
|
||||
interrupt void UsbIntHandler()
|
||||
{
|
||||
Uint16 txStatus, genStatus;
|
||||
|
||||
txStatus = USBREG16(USB_O_TXIS);
|
||||
genStatus = USBREG8(USB_O_IS);
|
||||
|
||||
//Check for a reset from the host or device disconnection. If we find one, reset any global variables.
|
||||
if ((genStatus & USB_IE_RESET) || (genStatus & USB_IE_DISCON))
|
||||
ResetUsbDriver();
|
||||
|
||||
//If all else is in order, check for activity on endpoint 0
|
||||
if (txStatus & 0x0001)
|
||||
UsbEndpointStateMachine();
|
||||
|
||||
//Acknowledge the interrupt
|
||||
AckUsbInterrupt();
|
||||
}
|
||||
|
||||
|
||||
//USB endpoint 0 state machine. Here's a state transition diagram:
|
||||
//
|
||||
//USB_STATE_IDLE -*--> USB_STATE_TX -*-> USB_STATE_STATUS -*->USB_STATE_IDLE
|
||||
// | | |
|
||||
// |--> USB_STATE_RX - |
|
||||
// | |
|
||||
// |--> USB_STATE_STALL ---------->---------
|
||||
static void UsbEndpointStateMachine()
|
||||
{
|
||||
static Uint16 rxBuffer[EP0_MAX_PACKET_SIZE/2];
|
||||
Uint16 epStatus, rxLength;
|
||||
|
||||
//Get the current status of endpoint 0
|
||||
epStatus = USBREG8(USB_O_CSRL0);
|
||||
|
||||
//Transit the states
|
||||
switch (g_UsbEp0State)
|
||||
{
|
||||
case USB_STATE_IDLE:
|
||||
//If there's a new packet waiting, handle it
|
||||
if (epStatus & USB_CSRL0_RXRDY)
|
||||
{
|
||||
RxDataEp0(rxBuffer);
|
||||
g_UsbEp0State = HandleControlRequest((sUsbRequestPacket *)rxBuffer);
|
||||
}
|
||||
break;
|
||||
case USB_STATE_TX:
|
||||
//Continue sending data to the host
|
||||
if (g_UsbTxLength > EP0_MAX_PACKET_SIZE)
|
||||
{
|
||||
TxDataEp0(g_UsbTxData, EP0_MAX_PACKET_SIZE, USB_MORE_DATA);
|
||||
g_UsbTxData += EP0_MAX_PACKET_SIZE/2;
|
||||
g_UsbTxLength -= EP0_MAX_PACKET_SIZE;
|
||||
} else
|
||||
{
|
||||
TxDataEp0(g_UsbTxData, g_UsbTxLength, USB_END_DATA);
|
||||
g_UsbEp0State = USB_STATE_IDLE;
|
||||
}
|
||||
break;
|
||||
case USB_STATE_RX:
|
||||
//Okay, this is where things get complicated. We're processing DFU
|
||||
//download data from the host. This could be one of two things:
|
||||
//
|
||||
//1. A TI-specific protocol extension command disguised as data
|
||||
//2. Actual boot loader data
|
||||
//
|
||||
//This is easy enough to handle, because TI command 0x01 indicates
|
||||
//that the data is coming next. The bigger problem is that we can't
|
||||
//ACK until the current packet's data is processed by the boot loader,.
|
||||
//but that only happens outside the interrupt handler via multiple
|
||||
//calls to USB_GetWordData()! This means that USB_GetWordData() must
|
||||
//track its buffer usage and ACK when it's ready for another packet.
|
||||
//The handler must reset the buffer pointer and data length whenever
|
||||
//a new packet arrives.
|
||||
rxLength = RxDataEp0(rxBuffer);
|
||||
g_UsbRxDataLength -= rxLength;
|
||||
|
||||
//Reset the state at the end of the transfer
|
||||
if (g_DfuExpectData)
|
||||
{
|
||||
//Assumption: all TI commands from the host will fit in one packet,
|
||||
//so we only need to handle boot loader data here.
|
||||
g_UsbRxBuffer = rxBuffer;
|
||||
g_UsbRxPacketLength = rxLength;
|
||||
}
|
||||
if (g_UsbRxDataLength == 0)
|
||||
{
|
||||
g_UsbEp0State = USB_STATE_IDLE;
|
||||
if (g_DfuExpectData)
|
||||
{
|
||||
g_DfuExpectData = false;
|
||||
} else
|
||||
{
|
||||
AckEp0(USB_END_DATA);
|
||||
|
||||
if ((rxBuffer[0] & 0xff) == 0x01)
|
||||
g_DfuExpectData = true;
|
||||
}
|
||||
}
|
||||
break;
|
||||
case USB_STATE_STALL:
|
||||
//If a stall handshake has been completely sent, clear the status bit and go idle
|
||||
if (epStatus & USB_CSRL0_STALLED)
|
||||
{
|
||||
USBREG8(USB_O_CSRL0) &= ~USB_CSRL0_STALLED;
|
||||
g_UsbEp0State = USB_STATE_IDLE;
|
||||
}
|
||||
break;
|
||||
case USB_STATE_STATUS:
|
||||
//If there's a pending address, write it to the register
|
||||
USBREG8(USB_O_FADDR) = g_UsbAddress;
|
||||
|
||||
//If there's a new packet waiting, handle it, otherwise
|
||||
//go back to the idle state.
|
||||
if (epStatus & USB_CSRL0_RXRDY)
|
||||
{
|
||||
RxDataEp0(rxBuffer);
|
||||
HandleControlRequest((sUsbRequestPacket *)rxBuffer);
|
||||
} else
|
||||
{
|
||||
g_UsbEp0State = USB_STATE_IDLE;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
//Error out?
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
//Handle a control request
|
||||
static eEndpointState HandleControlRequest(const sUsbRequestPacket *req)
|
||||
{
|
||||
sUsbDfuStatusPacket dfuStatus;
|
||||
Uint16 stringBuf[50];
|
||||
|
||||
if (req->bmRequestType_bRequest.reqType == USB_REQTYPE_STD)
|
||||
{
|
||||
//Standard requests
|
||||
switch (req->bmRequestType_bRequest.bRequest)
|
||||
{
|
||||
case USB_REQ_GET_DESCRIPTOR:
|
||||
switch (req->wValue >> 8)
|
||||
{
|
||||
case USB_DTYPE_DEVICE:
|
||||
g_UsbTxData = (Uint16 *)&dfuDeviceDescriptor;
|
||||
g_UsbTxLength = dfuDeviceDescriptor.bDescriptorType_bLength & 0xFF;
|
||||
break;
|
||||
case USB_DTYPE_CONFIG:
|
||||
CombineUsbDescriptors(stringBuf);
|
||||
g_UsbTxData = stringBuf;
|
||||
g_UsbTxLength = stringBuf[1];
|
||||
break;
|
||||
case USB_DTYPE_STRING:
|
||||
//Check for an invalid string index
|
||||
if ((req->wValue & 0xFF) > 4)
|
||||
{
|
||||
StallEp0();
|
||||
return USB_STATE_STALL;
|
||||
}
|
||||
CopyStringDescriptor(stringDescriptors[req->wValue & 0xFF], stringBuf);
|
||||
g_UsbTxData = stringBuf;
|
||||
g_UsbTxLength = stringBuf[0] & 0xFF;
|
||||
break;
|
||||
case USB_DTYPE_INTERFACE:
|
||||
case USB_DTYPE_DFU_FUNC:
|
||||
default:
|
||||
StallEp0();
|
||||
return USB_STATE_STALL;
|
||||
}
|
||||
AckEp0(USB_MORE_DATA);
|
||||
if (g_UsbTxLength > req->wLength)
|
||||
g_UsbTxLength = req->wLength;
|
||||
if (g_UsbTxLength > EP0_MAX_PACKET_SIZE)
|
||||
{
|
||||
TxDataEp0(g_UsbTxData, EP0_MAX_PACKET_SIZE, USB_MORE_DATA);
|
||||
g_UsbTxData += EP0_MAX_PACKET_SIZE/2;
|
||||
g_UsbTxLength -= EP0_MAX_PACKET_SIZE;
|
||||
return USB_STATE_TX;
|
||||
} else
|
||||
{
|
||||
TxDataEp0(g_UsbTxData, g_UsbTxLength, USB_END_DATA);
|
||||
return USB_STATE_IDLE;
|
||||
}
|
||||
//Always returns
|
||||
case USB_REQ_SET_ADDRESS:
|
||||
//Ack the request, but the address can't be set until the host
|
||||
//sends a zero-length packet to follow up. Save it for later.
|
||||
AckEp0(USB_END_DATA);
|
||||
g_UsbAddress = req->wValue;
|
||||
return USB_STATE_STATUS;
|
||||
case USB_REQ_GET_STATUS:
|
||||
//The only relevant status bit is the bit 0 (self-powered), so
|
||||
//just send that.
|
||||
AckEp0(USB_MORE_DATA);
|
||||
stringBuf[0] = 0x0001;
|
||||
TxDataEp0(stringBuf, 2, USB_END_DATA);
|
||||
return USB_STATE_IDLE;
|
||||
case USB_REQ_SET_CONFIG:
|
||||
//There's only one configuration, so cheat and just ack the request
|
||||
AckEp0(USB_END_DATA);
|
||||
return USB_STATE_IDLE;
|
||||
case USB_REQ_CLEAR_FEATURE:
|
||||
case USB_REQ_SET_FEATURE:
|
||||
case USB_REQ_SET_DESCRIPTOR:
|
||||
case USB_REQ_GET_CONFIG:
|
||||
case USB_REQ_GET_INTERFACE:
|
||||
case USB_REQ_SET_INTERFACE:
|
||||
default:
|
||||
StallEp0();
|
||||
return USB_STATE_STALL;
|
||||
}
|
||||
} else if (req->bmRequestType_bRequest.reqType == USB_REQTYPE_CLASS)
|
||||
{
|
||||
//DFU requests
|
||||
switch (req->bmRequestType_bRequest.bRequest)
|
||||
{
|
||||
case USB_REQ_DFU_DNLOAD:
|
||||
AckEp0(USB_MORE_DATA);
|
||||
g_UsbRxDataLength = req->wLength;
|
||||
return USB_STATE_RX;
|
||||
case USB_REQ_DFU_GETSTATUS:
|
||||
//Placeholder to test the dfuProg sequence
|
||||
AckEp0(USB_MORE_DATA);
|
||||
dfuStatus.bwPollTimeout_bStatus = (0x001<<8) | 0x00;
|
||||
dfuStatus.iString_bState = (0<<8) | DFU_STATE_IDLE;
|
||||
TxDataEp0((Uint16 *)&dfuStatus, 6, USB_END_DATA);
|
||||
return USB_STATE_IDLE;
|
||||
case 0x42:
|
||||
//TI-specific command -- hack to make dfuProg work
|
||||
AckEp0(USB_MORE_DATA);
|
||||
stringBuf[0] = 0x4c4d;
|
||||
stringBuf[1] = 0x0001;
|
||||
TxDataEp0(stringBuf, 4, USB_END_DATA);
|
||||
return USB_STATE_IDLE;
|
||||
case USB_REQ_DFU_UPLOAD:
|
||||
//This is test code and shouldn't be here
|
||||
AckEp0(USB_MORE_DATA);
|
||||
TxDataEp0(stringBuf, 20, USB_END_DATA);
|
||||
return USB_STATE_IDLE;
|
||||
case USB_REQ_DFU_DETACH:
|
||||
case USB_REQ_DFU_CLRSTATUS:
|
||||
case USB_REQ_DFU_GETSTATE:
|
||||
case USB_REQ_DFU_ABORT:
|
||||
default:
|
||||
StallEp0();
|
||||
return USB_STATE_STALL;
|
||||
}
|
||||
} else
|
||||
{
|
||||
//Unknown request
|
||||
StallEp0();
|
||||
return USB_STATE_STALL;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
//Copy a string descriptor into a temporary buffer
|
||||
static void CopyStringDescriptor(const sUsbStringDescriptor *strDesc, Uint16 *buffer)
|
||||
{
|
||||
Uint16 strLen, c;
|
||||
|
||||
strLen = (strDesc->bDescriptorType_bLength & 0xFF) - 2;
|
||||
buffer[0] = strDesc->bDescriptorType_bLength;
|
||||
for (c = 0; c < strLen; c++)
|
||||
{
|
||||
__byte((int *)buffer, c+2) = __byte((int *)strDesc->bString, c);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
//Reset all of the global variables. This is also called by USB_Boot() since
|
||||
//we don't get initialization for free in the boot ROM.
|
||||
void ResetUsbDriver()
|
||||
{
|
||||
|
||||
g_UsbEp0State = USB_STATE_IDLE;
|
||||
g_UsbAddress = 0;
|
||||
g_UsbTxData = 0;
|
||||
g_UsbTxLength = 0;
|
||||
g_DfuExpectData = 0;
|
||||
|
||||
g_UsbRxBuffer = 0;
|
||||
g_UsbRxPacketLength = 0;
|
||||
g_UsbRxDataLength = 0;
|
||||
|
||||
}
|
||||
|
||||
//Transmit data from USB endpoint 0
|
||||
void TxDataEp0(const Uint16 *data, Uint16 length8, eDataEnd dataEnd)
|
||||
{
|
||||
Uint16 c;
|
||||
|
||||
//Write the data to the FIFO
|
||||
for (c = 0; c < length8; c++)
|
||||
{
|
||||
USBREG8(USB_O_FIFO0) = __byte((int *)data, c);
|
||||
}
|
||||
|
||||
//Kick off the transmission. If there's no more data, set the end bit.
|
||||
USBREG8(USB_O_CSRL0) = (dataEnd == USB_END_DATA) ? (USB_CSRL0_TXRDY | USB_CSRL0_DATAEND) : USB_CSRL0_TXRDY;
|
||||
}
|
||||
|
||||
|
||||
//Receive data from USB endpoint 0
|
||||
Uint16 RxDataEp0(Uint16 *data)
|
||||
{
|
||||
Uint16 length8, c;
|
||||
|
||||
length8 = USBREG8(USB_O_COUNT0);
|
||||
|
||||
for (c = 0; c < length8; c++)
|
||||
{
|
||||
__byte((int *)data, c) = USBREG8(USB_O_FIFO0);
|
||||
}
|
||||
|
||||
return length8;
|
||||
}
|
||||
|
||||
|
||||
//Send an ACK from USB endpoint 0 with an optional DATAEND
|
||||
void AckEp0(eDataEnd dataEnd)
|
||||
{
|
||||
USBREG8(USB_O_CSRL0) = (dataEnd == USB_END_DATA) ? (USB_CSRL0_RXRDYC | USB_CSRL0_DATAEND) : USB_CSRL0_RXRDYC;
|
||||
}
|
||||
|
||||
|
||||
//Stall USB endpoint 0
|
||||
static void StallEp0()
|
||||
{
|
||||
USBREG8(USB_O_CSRL0) = (USB_CSRL0_STALL | USB_CSRL0_RXRDYC);
|
||||
}
|
||||
+134
@@ -0,0 +1,134 @@
|
||||
//USB descriptor implementations for the boot loader
|
||||
|
||||
#include "USB_Structs.h"
|
||||
|
||||
//Device descriptor for DFU
|
||||
const sUsbDeviceDescriptor dfuDeviceDescriptor =
|
||||
{
|
||||
USB_DTYPE_DEVICE<<8 | 2*sizeof(sUsbDeviceDescriptor),
|
||||
0x0110,
|
||||
0x00<<8 | 0xFF,
|
||||
64<<8 | 0x00,
|
||||
0x1CBE,
|
||||
0x00FF,
|
||||
0x0001,
|
||||
2<<8 | 1,
|
||||
1<<8 | 3
|
||||
};
|
||||
|
||||
//Configuration, interface, and functional descriptors for DFU.
|
||||
//The wTotalLength must be set in software based on the total
|
||||
//set of descriptors sent to the host.
|
||||
const sUsbConfigDescriptor dfuConfigDescriptor =
|
||||
{
|
||||
USB_DTYPE_CONFIG<<8 | (2*sizeof(sUsbConfigDescriptor) - 1),
|
||||
0,
|
||||
1<<8 | 1,
|
||||
0xC0<<8 | 0,
|
||||
150
|
||||
};
|
||||
const sUsbInterfaceDescriptor dfuInterfaceDescriptor =
|
||||
{
|
||||
USB_DTYPE_INTERFACE<<8 | (2*sizeof(sUsbInterfaceDescriptor) - 1),
|
||||
0<<8 | 0,
|
||||
0xFE<<8 | 0,
|
||||
0x02<<8 | 0x01,
|
||||
4
|
||||
};
|
||||
const sPrepadDfuFunctionalDescriptor dfuFunctionalDescriptor =
|
||||
{
|
||||
(2*sizeof(sPrepadDfuFunctionalDescriptor) - 1)<<8 | 0,
|
||||
0x05<<8 | USB_DTYPE_DFU_FUNC,
|
||||
0xFFFF,
|
||||
1024,
|
||||
0x0110
|
||||
};
|
||||
|
||||
//Combine the configuration, interface, and functional descriptors into a
|
||||
//single block, stripping out the 16-bit alignment padding in the process.
|
||||
void CombineUsbDescriptors(Uint16 *buffer)
|
||||
{
|
||||
Uint16 b, d, byteLength;
|
||||
|
||||
b = d = 0;
|
||||
byteLength = dfuConfigDescriptor.bDescriptorType_bLength & 0xFF;
|
||||
while (byteLength--)
|
||||
{
|
||||
__byte((int *)buffer, b) = __byte((int *)&dfuConfigDescriptor, d);
|
||||
b++; d++;
|
||||
}
|
||||
|
||||
d = 0;
|
||||
byteLength = dfuInterfaceDescriptor.bDescriptorType_bLength & 0xFF;
|
||||
while (byteLength--)
|
||||
{
|
||||
__byte((int *)buffer, b) = __byte((int *)&dfuInterfaceDescriptor, d);
|
||||
b++; d++;
|
||||
}
|
||||
|
||||
//Skip the first byte of padding in the functional descriptor
|
||||
d = 1;
|
||||
byteLength = dfuFunctionalDescriptor.bLength_padding >> 8;
|
||||
while (byteLength--)
|
||||
{
|
||||
__byte((int *)buffer, b) = __byte((int *)&dfuFunctionalDescriptor, d);
|
||||
b++; d++;
|
||||
}
|
||||
|
||||
//Set wTotalLength
|
||||
buffer[1] = (dfuConfigDescriptor.bDescriptorType_bLength & 0xFF) +
|
||||
(dfuInterfaceDescriptor.bDescriptorType_bLength & 0xFF) +
|
||||
(dfuFunctionalDescriptor.bLength_padding >> 8);
|
||||
}
|
||||
|
||||
|
||||
|
||||
//String descriptor strings. These are variable-length and thus cannot be
|
||||
//part of a structure.
|
||||
const char langID = 0x0409; //US English
|
||||
const char manufacturerString[] = "Texas Instruments";
|
||||
const char productString[] = "TMS320F28x7x USB DFU Boot Loader";
|
||||
const char serialString[] = "1";
|
||||
const char dfuString[] = "SUPER-BOOT";
|
||||
|
||||
//String descriptor structures. Each consists of a header followed by a
|
||||
//pointer to the actual string. The full descriptor must be constructed
|
||||
//at run-time by copying the header and the string into a temporary buffer.
|
||||
const sUsbStringDescriptor langDescriptor =
|
||||
{
|
||||
USB_DTYPE_STRING<<8 | (2 + 2*sizeof(langID)),
|
||||
&langID
|
||||
};
|
||||
const sUsbStringDescriptor mfgDescriptor =
|
||||
{
|
||||
USB_DTYPE_STRING<<8 | (2 + 2*sizeof(manufacturerString)),
|
||||
manufacturerString
|
||||
};
|
||||
const sUsbStringDescriptor prodDescriptor =
|
||||
{
|
||||
USB_DTYPE_STRING<<8 | (2 + 2*sizeof(productString)),
|
||||
productString
|
||||
};
|
||||
const sUsbStringDescriptor serialDescriptor =
|
||||
{
|
||||
USB_DTYPE_STRING<<8 | (2 + 2*sizeof(serialString)),
|
||||
serialString
|
||||
};
|
||||
const sUsbStringDescriptor dfuStringDescriptor =
|
||||
{
|
||||
USB_DTYPE_STRING<<8 | (2 + 2*sizeof(dfuString)),
|
||||
dfuString
|
||||
};
|
||||
|
||||
//String descriptor array. Used to provide indexing for descriptor requests.
|
||||
//This needs to be a constant array of constant pointers to keep it out of
|
||||
//the .cinit section.
|
||||
const sUsbStringDescriptor * const stringDescriptors[] =
|
||||
{
|
||||
&langDescriptor,
|
||||
&mfgDescriptor,
|
||||
&prodDescriptor,
|
||||
&serialDescriptor,
|
||||
&dfuStringDescriptor
|
||||
};
|
||||
|
||||
+70
@@ -0,0 +1,70 @@
|
||||
|
||||
;; TI File $Revision: /main/1 $
|
||||
;; Checkin $Date: August 13, 2012 11:54:19 $
|
||||
;;###########################################################################
|
||||
;;
|
||||
;; FILE: Vectors_Boot.h
|
||||
;;
|
||||
;; TITLE: Boot Rom vector table.
|
||||
;;
|
||||
;; Functions:
|
||||
;;
|
||||
;; This section of code populates the vector table in the boot ROM. The reset
|
||||
;; vector at 0x3FFFC0 points to the entry into the boot loader functions (InitBoot())
|
||||
;; The rest of the vectors are populated for test purposes only.
|
||||
;;
|
||||
;;###########################################################################
|
||||
;; $TI Release: F2837x Boot ROM Version 0 $
|
||||
;; $Release Date: Oct 1, 2013 $
|
||||
;;###########################################################################
|
||||
;-----------------------------------------------------------
|
||||
; The vector table located in boot ROM at 0x3F FFC0 - 0x3F FFFF
|
||||
; will be filled with the following data.
|
||||
;
|
||||
; Only the reset vector, which points to the InitBoot
|
||||
; routine will be used during normal operation. The remaining
|
||||
; vectors are set for internal testing purposes and will not be
|
||||
; fetched from this location during normal operation.
|
||||
;
|
||||
; On reset vector is always fetched from this table.
|
||||
;
|
||||
;----------------------------------------------------------
|
||||
.ref _InitBoot
|
||||
.ref _c1brom_handle_nmi
|
||||
.ref _c1brom_itrap_isr
|
||||
.ref _c1brom_pie_vect_mismatch_handler
|
||||
.sect ".BootVecs"
|
||||
BF _c1brom_pie_vect_mismatch_handler, UNC ;pie vect mismatch handler at address 0x3fffbe
|
||||
.long _InitBoot ;Reset
|
||||
.long 0x000042
|
||||
.long 0x000044
|
||||
.long 0x000046
|
||||
.long 0x000048
|
||||
.long 0x00004a
|
||||
.long 0x00004c
|
||||
.long 0x00004e
|
||||
.long 0x000050
|
||||
.long 0x000052
|
||||
.long 0x000054
|
||||
.long 0x000056
|
||||
.long 0x000058
|
||||
.long 0x00005a
|
||||
.long 0x00005c
|
||||
.long 0x00005e
|
||||
.long 0x000060
|
||||
.long 0x000062
|
||||
.long _c1brom_handle_nmi ;NMI
|
||||
.long _c1brom_itrap_isr ;ITRAP
|
||||
.long 0x000068
|
||||
.long 0x00006a
|
||||
.long 0x00006c
|
||||
.long 0x00006e
|
||||
.long 0x000070
|
||||
.long 0x000072
|
||||
.long 0x000074
|
||||
.long 0x000076
|
||||
.long 0x000078
|
||||
.long 0x00007a
|
||||
.long 0x00007c
|
||||
.long 0x00007e
|
||||
|
||||
+475
@@ -0,0 +1,475 @@
|
||||
;; TI File $Revision: /main/1 $
|
||||
;; Checkin $Date: August 13, 2012 11:53:42 $
|
||||
;;###########################################################################
|
||||
;;
|
||||
;; FILE: c1brom_Init_Boot.asm
|
||||
;;
|
||||
;; TITLE: Boot Rom Initialization and Exit routines.
|
||||
;;
|
||||
;; Functions:
|
||||
;;
|
||||
;; _InitBoot
|
||||
;; _ExitBoot
|
||||
;;
|
||||
;; Notes:
|
||||
;;
|
||||
;;###########################################################################
|
||||
;; $TI Release: F2837x Boot ROM Version 0 $
|
||||
;; $Release Date: Oct 1, 2013 $
|
||||
;;###########################################################################
|
||||
|
||||
.global _InitBoot
|
||||
.ref _c1brom_system_init
|
||||
.ref _c1brom_handle_fuse_err_if_any
|
||||
.ref _c1brom_configure_device_for_fast_boot
|
||||
.ref _c1brom_device_config
|
||||
.ref _sysctl_wdog_disable
|
||||
; .ref _deviceCal
|
||||
|
||||
.sect ".bist_signature"
|
||||
.global c1_bist_signatures_base
|
||||
|
||||
c1_bist_signatures_base:
|
||||
;; 99% coverage
|
||||
.long 0xb118ff21 ;;c28x_bist_signature1_bits_31_0:
|
||||
.long 0xaad1c534 ;;c28x_bist_signature1_bits_63_32:
|
||||
.long 0xf3c29406 ;;c28x_bist_signature1_bits_95_64:
|
||||
.long 0xaa4ea0e6 ;;c28x_bist_signature1_bits_127_96:
|
||||
.long 0xc2008cdd ;;c28x_bist_signature1_bits_159_128:
|
||||
.long 0x48dff8ed ;;c28x_bist_signature1_bits_192_160:
|
||||
.long 0x2ce37ad1 ;;c28x_bist_signature1_bits_223_192:
|
||||
.long 0xaf0f02ba ;;c28x_bist_signature1_bits_255_224:
|
||||
.long 0x2739afc0 ;;c28x_bist_signature1_bits_287_256:
|
||||
.long 0x5977869f ;;c28x_bist_signature1_bits_319_288:
|
||||
.long 0x92af9366 ;;c28x_bist_signature1_bits_351_320:
|
||||
.long 0x323cfebe ;;c28x_bist_signature1_bits_383_352:
|
||||
.long 0xf8efbcb1 ;;c28x_bist_signature1_bits_415_384:
|
||||
.long 0xe76ce166 ;;c28x_bist_signature1_bits_447_416:
|
||||
.long 0x84c38125 ;;c28x_bist_signature1_bits_479_448:
|
||||
.long 0xe80932f3 ;;c28x_bist_signature1_bits_511_480:
|
||||
|
||||
;; 95% coverage
|
||||
.long 0xed486881 ;;c28x_bist_signature2_bits_31_0:
|
||||
.long 0x6046b177 ;;c28x_bist_signature2_bits_63_32:
|
||||
.long 0x9c0d6cfa ;;c28x_bist_signature2_bits_95_64:
|
||||
.long 0xa0073876 ;;c28x_bist_signature2_bits_127_96:
|
||||
.long 0xb0970d09 ;;c28x_bist_signature2_bits_159_128:
|
||||
.long 0x626890cb ;;c28x_bist_signature2_bits_192_160:
|
||||
.long 0xc31dfc59 ;;c28x_bist_signature2_bits_223_192:
|
||||
.long 0x6d54176f ;;c28x_bist_signature2_bits_255_224:
|
||||
.long 0x16d6d787 ;;c28x_bist_signature2_bits_287_256:
|
||||
.long 0xc3787dc3 ;;c28x_bist_signature2_bits_319_288:
|
||||
.long 0x4ee3e09b ;;c28x_bist_signature2_bits_351_320:
|
||||
.long 0xaa8e8df4 ;;c28x_bist_signature2_bits_383_352:
|
||||
.long 0xb66f6261 ;;c28x_bist_signature2_bits_415_384:
|
||||
.long 0xf78d1893 ;;c28x_bist_signature2_bits_447_416:
|
||||
.long 0xeb38773b ;;c28x_bist_signature2_bits_479_448:
|
||||
.long 0x55ee198f ;;c28x_bist_signature2_bits_511_480:
|
||||
|
||||
.sect ".test_signature1"
|
||||
.long 0xFFFFFF81 ;;~(*(0x3FFFFE)) - used for production testing
|
||||
|
||||
.sect ".Version"
|
||||
.global _c1brom_version
|
||||
c1brom_version:
|
||||
.word 0x0100 ; Boot ROM Version v0.1
|
||||
.word 0x0413 ; Month/Year: (ex: 0x0109 = 1/09 = Jan 2009)
|
||||
|
||||
; .sect ".otp_entry_points"
|
||||
; .global _otp_func_refs
|
||||
;_otp_func_refs:
|
||||
; .ref _ccore_brom_otp_dummy_branch_begin_boot
|
||||
; .long _ccore_brom_otp_dummy_branch_begin_boot
|
||||
; .ref _ccore_brom_otp_dummy_branch_end_boot
|
||||
; .long _ccore_brom_otp_dummy_branch_end_boot
|
||||
; .ref _ccore_brom_otp_pie_vector_mismatch_handler
|
||||
; .long _ccore_brom_otp_pie_vector_mismatch_handler
|
||||
; .ref _ccore_brom_otp_unsupported_bmode_handler
|
||||
; .long _ccore_brom_otp_unsupported_bmode_handler
|
||||
; .ref _ccore_brom_otp_hw_bist_reset_handler
|
||||
; .long _ccore_brom_otp_hw_bist_reset_handler
|
||||
; .ref _I2C_gpio_init_for_boot
|
||||
; .long _I2C_gpio_init_for_boot
|
||||
; .ref _SCI_gpio_init_for_boot
|
||||
; .long _SCI_gpio_init_for_boot
|
||||
; .ref _SPI_gpio_init_for_boot
|
||||
; .long _SPI_gpio_init_for_boot
|
||||
; .ref _SPI_alt_gpio_init_for_boot
|
||||
; .long _SPI_alt_gpio_init_for_boot
|
||||
|
||||
.sect ".InitBoot"
|
||||
|
||||
;-----------------------------------------------
|
||||
; _InitBoot
|
||||
;-----------------------------------------------
|
||||
;-----------------------------------------------
|
||||
; This function performs the initial boot routine
|
||||
; for the boot ROM.
|
||||
;
|
||||
; This module performs the following actions:
|
||||
;
|
||||
; 1) Initalizes the stack pointer
|
||||
; 2) Sets the device for C28x operating mode
|
||||
; 3) Calls the main boot functions
|
||||
; 4) Calls an exit routine
|
||||
;-----------------------------------------------
|
||||
_InitBoot:
|
||||
|
||||
; Initalize the stack pointer.
|
||||
|
||||
__stack: .usect ".stack",0
|
||||
;; calcualte the Count for 75 uS at 15/4 MHz untrimmed clock, with buffer
|
||||
;. This would result in 83uS blank window for count of 311
|
||||
MOV @T,#311
|
||||
RPT @T
|
||||
||NOP
|
||||
|
||||
; MOV @T,#56
|
||||
; RPT @T
|
||||
; ||NOP
|
||||
|
||||
MOV SP, #__stack ; Initalize the stack pointer
|
||||
|
||||
; Initalize the device for running in C28x mode.
|
||||
|
||||
C28OBJ ; Select C28x object mode
|
||||
C28ADDR ; Select C27x/C28x addressing
|
||||
C28MAP ; Set blocks M0/M1 for C28x mode
|
||||
CLRC PAGE0 ; Always use stack addressing mode
|
||||
MOVW DP,#0 ; Initialize DP to point to the low 64 K
|
||||
CLRC OVM
|
||||
|
||||
; Set PM shift of 0
|
||||
|
||||
SPM 0
|
||||
; for debug
|
||||
; SB 0, UNC
|
||||
c1brom_hwbist_resc_check:
|
||||
; ADDB SP, #4
|
||||
;Uint32 EntryAddr = 0xFFFFFFFF;
|
||||
; MOVB ACC, #0
|
||||
; SUBB ACC, #1
|
||||
; MOVL *-SP[2], ACC
|
||||
;57 Uint32 hw_bist_addr = 0xFFFFFFFF;
|
||||
; MOVB ACC, #0
|
||||
; SUBB ACC, #1
|
||||
; MOVL *-SP[4], ACC
|
||||
; 59 if((CpuSysRegs.RESC.bit.HWBISTn) & 0x1)
|
||||
MOVW DP, #0x174e
|
||||
AND AL, @0x0, #0x20
|
||||
LSR AL, 5
|
||||
|
||||
TBIT @AL, #0x0
|
||||
SBF c1brom_hwbist_resc_done, NTC
|
||||
; 61 EntryAddr = TI_OTP_C1BROM_ESCAPE_POINT_8;
|
||||
MOVL XAR4, #0x703DE
|
||||
; MOVL ACC, *+XAR4[0]
|
||||
; MOVL *-SP[2], ACC
|
||||
MOVL XAR5, *+XAR4[0]
|
||||
; 62 if((EntryAddr != 0xFFFFFFFF) && (EntryAddr != 0x00000000))
|
||||
MOVB ACC, #0
|
||||
SUBB ACC, #1
|
||||
; CMPL ACC, *-SP[2]
|
||||
CMPL ACC, XAR5
|
||||
SBF c1brom_hwbist_resc_no_escape, EQ
|
||||
; MOVL ACC, *-SP[2]
|
||||
MOVL ACC, XAR5
|
||||
SBF c1brom_hwbist_resc_no_escape, EQ
|
||||
; 66 ((void (*)(void))EntryAddr)();
|
||||
; MOVL XAR7, *-SP[2]
|
||||
; LCR *XAR7
|
||||
LCR *XAR5
|
||||
c1brom_hwbist_resc_no_escape:
|
||||
; Accumualtor = HwbistRegs.CSTCRET.all;
|
||||
EALLOW
|
||||
MOVW DP, #0x1780
|
||||
MOVL ACC, @0x1A
|
||||
SBF c1brom_hwbist_resc_done, EQ ; check if not ZERO
|
||||
MOVL XAR5, ACC
|
||||
SPM #0
|
||||
LCR *XAR5
|
||||
|
||||
; 76 }
|
||||
c1brom_hwbist_resc_done:
|
||||
; SUBB SP, #4
|
||||
|
||||
; LCR _c1brom_handle_fuse_err_if_any
|
||||
MOVW DP, #0x1741
|
||||
MOVL ACC, @0x34
|
||||
SBF c1brom_fuseerr_nope, EQ
|
||||
MOVB ACC, #21
|
||||
CMPL ACC, @0x34
|
||||
SBF c1brom_fuseerr_reset, NEQ
|
||||
SB c1brom_fuseerr_nope, UNC
|
||||
; 37 EALLOW;
|
||||
c1brom_fuseerr_reset:
|
||||
EALLOW
|
||||
; 38 WdRegs.WDCR.all = 0x028;
|
||||
MOVW DP, #0x1c0
|
||||
MOVB @0x29, #0x28, UNC
|
||||
; 39 EDIS;
|
||||
EDIS
|
||||
ESTOP0 ; to let execution stop here when debugger is connected
|
||||
; 40 while(1);
|
||||
SB 0, UNC
|
||||
c1brom_fuseerr_nope:
|
||||
; disable WDOG, else we need to keep it feeding
|
||||
c1brom_disable_wdog:
|
||||
EALLOW
|
||||
; 38 WdRegs.WDCR.all = 0x028; - to enable WDOG
|
||||
; WdRegs.WDCR.all = 0x068; - to disable WDOG
|
||||
MOVW DP, #0x1c0
|
||||
MOVB @0x29, #0x68, UNC
|
||||
; 39 EDIS;//get the WDOG enable code in assembly
|
||||
EDIS
|
||||
|
||||
; check reset cause
|
||||
|
||||
; if NOT debugger or SCC reset
|
||||
|
||||
; change SYSDIVSEL to /1
|
||||
|
||||
; change PSLEEP for 10 MHZ
|
||||
|
||||
; read OTP to power up flash
|
||||
|
||||
; restore default PSLEEP
|
||||
|
||||
; OTP PMM TRIM LOAD
|
||||
; see if we will enable PLL
|
||||
; end if
|
||||
LCR _c1brom_configure_device_for_fast_boot
|
||||
|
||||
; OTP device Config
|
||||
LCR _c1brom_device_config
|
||||
|
||||
; check reset cause
|
||||
|
||||
;119 {
|
||||
c1brom_handle_ram_inits:
|
||||
;124 if(CpuSysRegs.RESC.all & (SYSCTL_RESC_POR | SYSCTL_RESC_XRSN ))
|
||||
MOVW DP, #0x174e
|
||||
MOVL ACC, @0x0
|
||||
MOVB AH, #0x0
|
||||
ANDB AL, #0x3
|
||||
TEST ACC
|
||||
SBF c1brom_ram_init_for_hib_resc, EQ
|
||||
;127 EALLOW;
|
||||
EALLOW
|
||||
;129 MemCfgRegs.DxINIT.all = 0x000F;// bit0-M0, 1-M1,2-D0,3-D1
|
||||
MOVB ACC, #15
|
||||
MOVW DP, #0x17d0
|
||||
MOVL @0x12, ACC
|
||||
;130 MemCfgRegs.LSxINIT.all = 0x003F; //LS0 - LS5
|
||||
MOVB ACC, #63
|
||||
MOVL @0x32, ACC
|
||||
; *(int *)0x5F452 =0xFFFF; /* RAM INIT FOR GS0..GS15 Memory */
|
||||
MOVW DP, #0x17d1
|
||||
MOV ACC, #0xFFFF
|
||||
MOVL @0x12, ACC
|
||||
|
||||
;163 MemCfgRegs.MSGxINIT.all = 0x0007;
|
||||
MOVB ACC, #7
|
||||
MOVL @0x32, ACC
|
||||
;133 EDIS;
|
||||
EDIS
|
||||
ram_init_wait1: ;; wait 2048 + 32(=buffer)cycles for RAM init to complete
|
||||
MOV @T,#2080
|
||||
RPT @T
|
||||
||NOP
|
||||
;137 }
|
||||
SB c1brom_handle_ram_inits_done, UNC
|
||||
;138 else if((CpuSysRegs.RESC.bit.HIBRESETn /*sysctl_reset_cause_check(SYSCTL_RESC_HIB)*/) == true) {
|
||||
c1brom_ram_init_for_hib_resc:
|
||||
AND AL, @0x0, #0x40
|
||||
LSR AL, 6
|
||||
CMPB AL, #0x1
|
||||
SBF stack_init, NEQ
|
||||
;140 if((CpuSysRegs.LPMCR.bit.M0M1MODE == 0x01) || (CpuSysRegs.LPMCR.bit.M0M1MODE == 0x3)) {
|
||||
MOVW DP, #0x174d
|
||||
MOV AL, @0x37
|
||||
ANDB AL, #0x3
|
||||
CMPB AL, #0x1
|
||||
SBF c1brom_all_ram_init_for_hib_resc, EQ
|
||||
MOV AL, @0x37
|
||||
ANDB AL, #0x3
|
||||
CMPB AL, #0x3
|
||||
SBF c1brom_skip_mx_ram_init_for_hib_resc, NEQ
|
||||
;142 EALLOW;
|
||||
c1brom_all_ram_init_for_hib_resc:
|
||||
EALLOW
|
||||
;146 MemCfgRegs.DxINIT.all = 0x000F;// bit0-M0, 1-M1,2-D0,3-D1
|
||||
MOVB ACC, #15
|
||||
MOVW DP, #0x17d0
|
||||
MOVL @0x12, ACC
|
||||
;147 MemCfgRegs.LSxINIT.all = 0x003F; //LS0 - LS5
|
||||
MOVB ACC, #63
|
||||
MOVL @0x32, ACC
|
||||
; *(int *)0x5F452 =0xFFFF; /* RAM INIT FOR GS0..GS15 Memory */
|
||||
MOVW DP, #0x17d1
|
||||
MOV ACC, #0xFFFF
|
||||
MOVL @0x12, ACC
|
||||
;163 MemCfgRegs.MSGxINIT.all = 0x0007;
|
||||
MOVB ACC, #7
|
||||
MOVL @0x32, ACC
|
||||
;150 EDIS;
|
||||
EDIS
|
||||
ram_init_wait2: ;; wait 2048 + 32(=buffer)cycles for RAM init to complete
|
||||
MOV @T,#2080
|
||||
RPT @T
|
||||
||NOP
|
||||
;154 }
|
||||
SB c1brom_handle_ram_inits_done, UNC
|
||||
;157 EALLOW;
|
||||
c1brom_skip_mx_ram_init_for_hib_resc:
|
||||
EALLOW
|
||||
;160 MemCfgRegs.DxINIT.all = 0x000C;// bit0-M0, 1-M1,2-D0,3-D1
|
||||
MOVB ACC, #12
|
||||
MOVW DP, #0x17d0
|
||||
MOVL @0x12, ACC
|
||||
;161 MemCfgRegs.LSxINIT.all = 0x003F; //LS0 - LS5
|
||||
MOVB ACC, #63
|
||||
MOVL @0x32, ACC
|
||||
|
||||
; *(int *)0x5F452 =0xFFFF; /* RAM INIT FOR GS0..GS15 Memory */
|
||||
MOVW DP, #0x17d1
|
||||
MOV ACC, #0xFFFF
|
||||
MOVL @0x12, ACC
|
||||
;163 MemCfgRegs.MSGxINIT.all = 0x0007;
|
||||
MOVB ACC, #7
|
||||
MOVL @0x32, ACC
|
||||
;164 EDIS;
|
||||
EDIS
|
||||
ram_init_wait3: ;; wait 2048 + 32(=buffer)cycles for RAM init to complete
|
||||
MOV @T,#2080
|
||||
RPT @T
|
||||
||NOP
|
||||
;170 }
|
||||
SB c1brom_handle_ram_inits_done, UNC
|
||||
|
||||
stack_init: ;; here means this is not POR, so just zero out the stack, 128 words
|
||||
MOV AL, #0x80
|
||||
MOV AH, #0
|
||||
ram_zero_loop:
|
||||
MOV *SP++,#0 ;;zero stack
|
||||
SUBB ACC, #1
|
||||
BF ram_zero_loop,GEQ
|
||||
stack_init_done:
|
||||
MOV SP, #__stack ; re-Initalize the stack pointer
|
||||
|
||||
c1brom_handle_ram_inits_done: ; C$L9:
|
||||
; Start C-bootROM
|
||||
MOVW DP,#0 ; Initialize DP to point to the low 64 K
|
||||
CLRC OVM
|
||||
|
||||
; Set PM shift of 0
|
||||
|
||||
SPM 0
|
||||
|
||||
LCR _c1brom_system_init
|
||||
|
||||
; Cleanup and exit. At this point the EntryAddr
|
||||
; is located in the ACC register
|
||||
BF _ExitBoot,UNC
|
||||
|
||||
;-----------------------------------------------
|
||||
; _ExitBoot
|
||||
;-----------------------------------------------
|
||||
;-----------------------------------------------
|
||||
;This module cleans up after the boot loader
|
||||
;
|
||||
; 1) Make sure the stack is deallocated.
|
||||
; SP = 0x400 after exiting the boot
|
||||
; loader
|
||||
; 2) Push 0 onto the stack so RPC will be
|
||||
; 0 after using LRETR to jump to the
|
||||
; entry point
|
||||
; 2) Load RPC with the entry point
|
||||
; 3) Clear all XARn registers
|
||||
; 4) Clear ACC, P and XT registers
|
||||
; 5) LRETR - this will also clear the RPC
|
||||
; register since 0 was on the stack
|
||||
;-----------------------------------------------
|
||||
|
||||
_ExitBoot:
|
||||
|
||||
;-----------------------------------------------
|
||||
; Insure that the stack is deallocated
|
||||
;-----------------------------------------------
|
||||
|
||||
MOV SP,#__stack
|
||||
|
||||
;-----------------------------------------------
|
||||
; Clear the bottom of the stack. This will endup
|
||||
; in RPC when we are finished
|
||||
;-----------------------------------------------
|
||||
|
||||
MOV *SP++,#0
|
||||
MOV *SP++,#0
|
||||
|
||||
;-----------------------------------------------
|
||||
; Load RPC with the entry point as determined
|
||||
; by the boot mode. This address will be returned
|
||||
; in the ACC register.
|
||||
;-----------------------------------------------
|
||||
|
||||
PUSH ACC
|
||||
POP RPC
|
||||
|
||||
;-----------------------------------------------
|
||||
; Put registers back in their reset state.
|
||||
;
|
||||
; Clear all the XARn, ACC, XT, and P and DP
|
||||
; registers
|
||||
;
|
||||
; NOTE: Leave the device in C28x operating mode
|
||||
; (OBJMODE = 1, AMODE = 0)
|
||||
;-----------------------------------------------
|
||||
ZAPA
|
||||
MOVL XT,ACC
|
||||
MOVZ AR0,AL
|
||||
MOVZ AR1,AL
|
||||
MOVZ AR2,AL
|
||||
MOVZ AR3,AL
|
||||
MOVZ AR4,AL
|
||||
MOVZ AR5,AL
|
||||
MOVZ AR6,AL
|
||||
MOVZ AR7,AL
|
||||
MOVW DP, #0
|
||||
|
||||
;------------------------------------------------
|
||||
; Restore ST0 and ST1. Note OBJMODE is
|
||||
; the only bit not restored to its reset state.
|
||||
; OBJMODE is left set for C28x object operating
|
||||
; mode.
|
||||
;
|
||||
; ST0 = 0x0000 ST1 = 0x0A0B
|
||||
; 15:10 OVC = 0 15:13 ARP = 0
|
||||
; 9: 7 PM = 0 12 XF = 0
|
||||
; 6 V = 0 11 M0M1MAP = 1
|
||||
; 5 N = 0 10 reserved
|
||||
; 4 Z = 0 9 OBJMODE = 1
|
||||
; 3 C = 0 8 AMODE = 0
|
||||
; 2 TC = 0 7 IDLESTAT = 0
|
||||
; 1 OVM = 0 6 EALLOW = 0
|
||||
; 0 SXM = 0 5 LOOP = 0
|
||||
; 4 SPA = 0
|
||||
; 3 VMAP = 1
|
||||
; 2 PAGE0 = 0
|
||||
; 1 DBGM = 1
|
||||
; 0 INTM = 1
|
||||
;-----------------------------------------------
|
||||
|
||||
MOV *SP++,#0
|
||||
MOV *SP++,#0x0A0B
|
||||
POP ST1
|
||||
POP ST0
|
||||
|
||||
;------------------------------------------------
|
||||
; Jump to the EntryAddr as defined by the
|
||||
; boot mode selected and continue execution
|
||||
;-----------------------------------------------
|
||||
|
||||
LRETR
|
||||
|
||||
;eof ----------
|
||||
+739
@@ -0,0 +1,739 @@
|
||||
//###########################################################################
|
||||
// FILE: c1brom_boot.c
|
||||
// TITLE: F28X7x Boot ROM Sources.
|
||||
//
|
||||
//! \addtogroup
|
||||
//! <h1> </h1>
|
||||
//!
|
||||
//! CPU1 Boot ROM main Source file
|
||||
//!
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F2837x Boot ROM Version 0 $
|
||||
// $Release Date: Oct 1, 2013 $
|
||||
//###########################################################################
|
||||
|
||||
|
||||
//the below line should start at line 18 for source level debug
|
||||
#include "c1_bootrom.h"
|
||||
|
||||
/*variable to store MTOAIPCCOM register value*/
|
||||
cur_c2c1_ipc_cmd_sts_t c1brom_current_c2c1_ipc;
|
||||
|
||||
Uint32 c1brom_status;
|
||||
extern Uint32 iTrap_addr;
|
||||
|
||||
void WaitBoot(void);
|
||||
|
||||
void c1brom_change_clock_dividers_powerup_flash()
|
||||
{
|
||||
EALLOW;
|
||||
|
||||
// set the 1.6 multiplier bit
|
||||
AnalogSubsysRegs.INTOSC1CSR.bit.OSCCONFIG |= 0x2;
|
||||
// --NEED 20 uS settling time after the bit is written with 5-15 MHz clock
|
||||
|
||||
asm(" MOV @T,#90 ");
|
||||
asm(" RPT @T \
|
||||
||NOP ");
|
||||
|
||||
//set the divider to /1 to make flash init faster
|
||||
ClkCfgRegs.SYSCLKDIVSEL.bit.PLLSYSCLKDIV = 0;
|
||||
|
||||
|
||||
ClkCfgRegs.SYSPLLMULT.bit.IMULT = 12;
|
||||
ClkCfgRegs.SYSPLLCTL1.bit.PLLEN = 0x1;
|
||||
|
||||
// set RWAIT to 0x3
|
||||
FlashCtrlRegs.FRDCNTL.bit.RWAIT = 0x3;
|
||||
//save the default PSLEEP value
|
||||
//change the PSLEEP VALUE for (15 * 1.6) MHZ...?
|
||||
FlashCtrlRegs.FPAC1.bit.PSLEEP = 0x120;
|
||||
|
||||
//access OTP - read OTP revision or something to power up flash
|
||||
OTP_CPU_ID_VERSION;
|
||||
//change the PSLEEP value back to default
|
||||
|
||||
FlashCtrlRegs.FPAC1.bit.PSLEEP = 0x860;
|
||||
FlashCtrlRegs.FRDCNTL.bit.RWAIT = 0xF;
|
||||
|
||||
EDIS;
|
||||
|
||||
}
|
||||
|
||||
void c1brom_pmm_trim_config()
|
||||
{
|
||||
|
||||
if(TI_OTP_PMM_LC_TRIM_KEY != 0x5A5A)
|
||||
return;
|
||||
|
||||
EALLOW;
|
||||
AnalogSubsysRegs.PMMREFTRIM.all = TI_OTP_PMM_LC_BGSLOPE_VAL_IREF_TRIM;
|
||||
AnalogSubsysRegs.PMMVREGTRIM.all = TI_OTP_PMM_LC_VREG_TRIM; //this loads both VSINK and VREG and VREG2 TRIM
|
||||
AnalogSubsysRegs.PMMVMONTRIM.all = TI_OTP_PMM_LC_VMON_TRIM;
|
||||
EDIS;
|
||||
|
||||
if(CpuSysRegs.RESC.all & (SYSCTL_RESC_POR | SYSCTL_RESC_XRSN))
|
||||
{
|
||||
// calculate the Count for 75 uS at 10MHz +/- 7% MHz efuse trimmed clock, with buffer
|
||||
// which is 1385, This would result in 81uS blank window
|
||||
|
||||
//on Hibernate the blanking window will be at HIB RESC clearing
|
||||
asm(" MOV @T,#1385 ");
|
||||
asm(" RPT @T \
|
||||
||NOP ");
|
||||
}
|
||||
|
||||
|
||||
|
||||
}
|
||||
|
||||
void c1brom_intosc_trim_config()
|
||||
{
|
||||
if(TI_OTP_OSC_TRIM_KEY != 0x5A5A)
|
||||
return;
|
||||
|
||||
EALLOW;
|
||||
AnalogSubsysRegs.OSCREFTRIM.all = TI_OTP_OSC_REF_TRIM;
|
||||
AnalogSubsysRegs.INTOSC1TRIM.all = TI_OTP_OSC1_TRIM;
|
||||
AnalogSubsysRegs.INTOSC2TRIM.all = TI_OTP_OSC2_TRIM;
|
||||
EDIS;
|
||||
|
||||
}
|
||||
|
||||
void c1brom_enable_pll_ouput_to_clock()
|
||||
{
|
||||
if(((OTP_BOOT_CONFIGURE_WORD & 0xFF000000) >> 24) != 0x5A) //simply return if key match fails
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
if(((OTP_BOOT_CONFIGURE_WORD & 0x3) == 0x1) && (ClkCfgRegs.SYSPLLSTS.bit.LOCKS == 1))
|
||||
{
|
||||
EALLOW;
|
||||
ClkCfgRegs.SYSCLKDIVSEL.bit.PLLSYSCLKDIV = ((OTP_BOOT_CONFIGURE_WORD & 0x00FC) >> 2); //0x1; //set it to /2 before enabling PLL
|
||||
//if bits 1:0 of OTP_BOOT_CONFIGURE_WORD are equal to 01b then enable PLL else NO
|
||||
ClkCfgRegs.SYSPLLCTL1.bit.PLLCLKEN = 1;
|
||||
EDIS;
|
||||
}
|
||||
}
|
||||
|
||||
void c1brom_configure_device_for_fast_boot()
|
||||
{
|
||||
uint32_t EntryAddr = 0xFFFFFFFF;
|
||||
|
||||
if(CpuSysRegs.RESC.all & (SYSCTL_RESC_POR | SYSCTL_RESC_XRSN |
|
||||
SYSCTL_RESC_HIB))
|
||||
{
|
||||
//change dividers, set 1.6 multiplier, power up PLL, modify RWAIT and PSLEEP and wake up flash
|
||||
c1brom_change_clock_dividers_powerup_flash();
|
||||
|
||||
c1brom_pmm_trim_config();
|
||||
|
||||
c1brom_enable_pll_ouput_to_clock();
|
||||
}
|
||||
|
||||
EntryAddr = TI_OTP_C1BROM_ESCAPE_POINT_11;
|
||||
if((EntryAddr != 0xFFFFFFFF) &&
|
||||
(EntryAddr != 0x00000000))
|
||||
{
|
||||
/*if OTP is programmed, then call OTP function*/
|
||||
((void (*)(void))EntryAddr)();
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
void c1brom_device_config()
|
||||
{
|
||||
//PARTIDL
|
||||
DevCfgRegs.PARTIDL = TI_OTP_PARTID_L;
|
||||
DevCfgRegs.PARTIDH.all = TI_OTP_PARTID_H; //should we write only PARTIDH bits?
|
||||
|
||||
//DC0 to DC20
|
||||
DevCfgRegs.DC0.all = TI_OTP_REG_DC00;
|
||||
DevCfgRegs.DC1.all = TI_OTP_REG_DC01;
|
||||
DevCfgRegs.DC2.all = TI_OTP_REG_DC02;
|
||||
DevCfgRegs.DC3.all = TI_OTP_REG_DC03;
|
||||
DevCfgRegs.DC4.all = TI_OTP_REG_DC04;
|
||||
DevCfgRegs.DC5.all = TI_OTP_REG_DC05;
|
||||
DevCfgRegs.DC6.all = TI_OTP_REG_DC06;
|
||||
DevCfgRegs.DC7.all = TI_OTP_REG_DC07;
|
||||
DevCfgRegs.DC8.all = TI_OTP_REG_DC08;
|
||||
DevCfgRegs.DC9.all = TI_OTP_REG_DC09;
|
||||
DevCfgRegs.DC10.all = TI_OTP_REG_DC10;
|
||||
DevCfgRegs.DC11.all = TI_OTP_REG_DC11;
|
||||
DevCfgRegs.DC12.all = TI_OTP_REG_DC12;
|
||||
DevCfgRegs.DC13.all = TI_OTP_REG_DC13;
|
||||
DevCfgRegs.DC14.all = TI_OTP_REG_DC14;
|
||||
DevCfgRegs.DC15.all = TI_OTP_REG_DC15;
|
||||
// DevCfgRegs.DC16.all = TI_OTP_REG_DC16; - This is reserved
|
||||
DevCfgRegs.DC17.all = TI_OTP_REG_DC17;
|
||||
DevCfgRegs.DC18.all = TI_OTP_REG_DC18;
|
||||
DevCfgRegs.DC19.all = TI_OTP_REG_DC19;
|
||||
DevCfgRegs.DC20.all = TI_OTP_REG_DC20;
|
||||
|
||||
//PERCNF1
|
||||
DevCfgRegs.PERCNF1.all = TI_OTP_REG_PERCNF1;
|
||||
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Function to initialize C-BootROM environment
|
||||
*/
|
||||
void c1brom_init_boot_env()
|
||||
{
|
||||
|
||||
/*set C-BootROM health status to indicate that boot started*/
|
||||
c1brom_status |= C1_BOOTROM_START_BOOT;
|
||||
|
||||
/*initialize current command variables to default values*/
|
||||
c1brom_current_c2c1_ipc.command = C2C1_BROM_IPC_COMMAND_ILLEGAL;
|
||||
c1brom_current_c2c1_ipc.status = COMMAND_STATUS_INVALID;
|
||||
|
||||
/* initialize iTrap address, and branch address variables to default values*/
|
||||
iTrap_addr = 0xFFFFFFFF;
|
||||
|
||||
}
|
||||
|
||||
|
||||
//Read the GPyDAT register bit for the specified pin.
|
||||
uint16_t c1brom_GPIO_ReadPin(uint16_t pin)
|
||||
{
|
||||
volatile uint32_t *gpioDataReg = (void *)0;
|
||||
uint16_t pinVal = 0;
|
||||
|
||||
gpioDataReg = (volatile uint32_t *)&GpioDataRegs + (pin/32)*GPY_DATA_OFFSET;
|
||||
pinVal = (gpioDataReg[GPYDAT] >> (pin % 32)) & 0x1;
|
||||
|
||||
return pinVal;
|
||||
}
|
||||
|
||||
//Set the GPyDAT register bit for the specified pin.
|
||||
void c1brom_GPIO_WritePin(uint16_t pin, uint16_t outVal)
|
||||
{
|
||||
volatile uint32_t *gpioDataReg = (void *)0;
|
||||
uint32_t pinMask = 0;
|
||||
|
||||
gpioDataReg = (volatile uint32_t *)&GpioDataRegs + (pin/32)*GPY_DATA_OFFSET;
|
||||
pinMask = 1 << (pin % 32);
|
||||
|
||||
if (outVal == 0)
|
||||
gpioDataReg[GPYCLEAR] = pinMask;
|
||||
else
|
||||
gpioDataReg[GPYSET] = pinMask;
|
||||
}
|
||||
|
||||
uint16_t c1brom_read_otp_bootpinconfig()
|
||||
{
|
||||
uint16_t pinconfig = 0;
|
||||
|
||||
if(DcsmRegsZ1.Z1_BOOTCTRL.bit.KEY != KEY_VAL)
|
||||
{
|
||||
/*Z1 OTP BootMode Key not programmed, look for Z2 Key*/
|
||||
if(DcsmRegsZ2.Z2_BOOTCTRL.bit.KEY != KEY_VAL)
|
||||
{
|
||||
pinconfig = 0x0;
|
||||
}
|
||||
else
|
||||
{
|
||||
pinconfig = ((DcsmRegsZ2.Z2_BOOTCTRL.bit.BOOTPIN1 << 8)
|
||||
| (DcsmRegsZ2.Z2_BOOTCTRL.bit.BOOTPIN0));
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
pinconfig = ((DcsmRegsZ1.Z1_BOOTCTRL.bit.BOOTPIN1 << 8)
|
||||
| (DcsmRegsZ1.Z1_BOOTCTRL.bit.BOOTPIN0));
|
||||
}
|
||||
|
||||
return pinconfig;
|
||||
}
|
||||
|
||||
uint16_t c1brom_read_otp_bootmode()
|
||||
{
|
||||
uint16_t BootMode = 0;
|
||||
|
||||
if(DcsmRegsZ1.Z1_BOOTCTRL.bit.KEY != KEY_VAL)
|
||||
{
|
||||
/*Z1 OTP BootMode Key not programmed, look for Z2 Key*/
|
||||
if(DcsmRegsZ2.Z2_BOOTCTRL.bit.KEY != KEY_VAL)
|
||||
{
|
||||
BootMode = FLASH_BOOT;
|
||||
}
|
||||
else
|
||||
{
|
||||
BootMode = DcsmRegsZ2.Z2_BOOTCTRL.bit.BMODE;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
BootMode = DcsmRegsZ1.Z1_BOOTCTRL.bit.BMODE;
|
||||
}
|
||||
|
||||
return BootMode;
|
||||
}
|
||||
|
||||
|
||||
uint16_t c1brom_decode_bootpins(uint16_t pinconfig)
|
||||
{
|
||||
uint16_t bootpin0 = 0;
|
||||
uint16_t bootpin1 = 0;
|
||||
uint16_t bmode = 0;
|
||||
//default boot pins - mode0 is GPIO84, mode1 is GPIO72
|
||||
|
||||
if((pinconfig &0xFF) == 0x0)
|
||||
{
|
||||
bootpin0 = 84;
|
||||
}
|
||||
else
|
||||
{
|
||||
bootpin0 = (pinconfig & 0xFF) - 1;
|
||||
}
|
||||
|
||||
if(((pinconfig & 0xFF00) >> 8) == 0x0)
|
||||
{
|
||||
bootpin1 = 72;
|
||||
}
|
||||
else
|
||||
{
|
||||
bootpin1 = ((pinconfig & 0xFF00) >> 8) - 1;
|
||||
}
|
||||
|
||||
if(bootpin0 > 168)
|
||||
{
|
||||
//restrict the max pin to be used to GPIO168
|
||||
bootpin0 = 84;
|
||||
}
|
||||
|
||||
if(bootpin1 > 168)
|
||||
{
|
||||
//restrict the max pin to be used to GPIO168
|
||||
bootpin1 = 72;
|
||||
}
|
||||
|
||||
bmode = (c1brom_GPIO_ReadPin(bootpin1) << 1);
|
||||
bmode |= c1brom_GPIO_ReadPin(bootpin0);
|
||||
|
||||
return bmode;
|
||||
}
|
||||
|
||||
//#################################################
|
||||
// void InitDCSM(void)
|
||||
//--------------------------------------------
|
||||
// This function initializes code security module, until this function is executed
|
||||
// all access to RAM and JTAG is blocked.
|
||||
//
|
||||
// Note that when this function is called by PreBoot(), stack is set to PIE RAM
|
||||
//--------------------------------------------
|
||||
|
||||
void InitDCSM()
|
||||
{
|
||||
int i = 0;
|
||||
unsigned long LinkPointer = 0;
|
||||
unsigned long *Z1_ZoneSelBlockPtr = (void *)0;
|
||||
unsigned long *Z2_ZoneSelBlockPtr = (void *)0;
|
||||
unsigned long dummy_read = 0;
|
||||
|
||||
int bitpos = 28;
|
||||
int zerofound = 0;
|
||||
|
||||
dummy_read = *(unsigned long *)0x703F0; /* Dummy read of SECDC REGISTER */
|
||||
|
||||
dummy_read = *(unsigned long *)0x78000; /* Dummy read of Z1 - LinkPointer1 */
|
||||
dummy_read = *(unsigned long *)0x78004; /* Dummy read of Z1 - LinkPointer2 */
|
||||
dummy_read = *(unsigned long *)0x78008; /* Dummy read of Z1 - LinkPointer3 */
|
||||
dummy_read = *(unsigned long *)0x78200; /* Dummy read of Z2 - LinkPointer1 */
|
||||
dummy_read = *(unsigned long *)0x78204; /* Dummy read of Z2 - LinkPointer2 */
|
||||
dummy_read = *(unsigned long *)0x78208; /* Dummy read of Z2 - LinkPointer3 */
|
||||
|
||||
dummy_read = *(unsigned long *)0x78010; /* Dummy read of Z1 - PSWDLOCK */
|
||||
dummy_read = *(unsigned long *)0x78210; /* Dummy read of Z2 - PSWDLOCK */
|
||||
|
||||
dummy_read = *(unsigned long *)0x78014; /* Dummy read of Z1 - CRCLOCK */
|
||||
dummy_read = *(unsigned long *)0x78214; /* Dummy read of Z2 - CRCLOCK */
|
||||
|
||||
dummy_read = *(unsigned long *)0x78018; /* Dummy read of Z1 - JTAGLOCK */
|
||||
dummy_read = *(unsigned long *)0x78218; /* Dummy read of Z2 - JTAGLOCK */
|
||||
|
||||
dummy_read = *(unsigned long *)0x7801E; /* Dummy read of Z1 - BOOTCTRL */
|
||||
dummy_read = *(unsigned long *)0x7821E; /* Dummy read of Z2 - BOOTCTRL */
|
||||
|
||||
LinkPointer = *(unsigned long *)0x5F000; /* Read Z1-Linkpointer out of Z1-LINKPOINTER register */
|
||||
LinkPointer = LinkPointer << 3; /* Bits 31,30 and 29 as most-sigificant 0 are invalid LinkPointer options */
|
||||
while ((zerofound == 0) && (bitpos > -1))
|
||||
{
|
||||
if ((LinkPointer & 0x80000000) == 0)
|
||||
{
|
||||
zerofound = 1;
|
||||
Z1_ZoneSelBlockPtr = (unsigned long *)(0x78000 + ((bitpos + 3)*16));
|
||||
}
|
||||
else
|
||||
{
|
||||
bitpos--;
|
||||
LinkPointer = LinkPointer << 1;
|
||||
}
|
||||
}
|
||||
if (zerofound == 0)
|
||||
{
|
||||
Z1_ZoneSelBlockPtr = (unsigned long *)0x78020;
|
||||
}
|
||||
|
||||
bitpos = 28;
|
||||
zerofound = 0;
|
||||
LinkPointer = *(unsigned long *)0x5F040; /* Read Z2-Linkpointer out of Z1-LINKPOINTER register */
|
||||
LinkPointer = LinkPointer << 3; /* Bits 31 and 30 as most-sigificant 0 are invalid LinkPointer options */
|
||||
while ((zerofound == 0) && (bitpos > -1))
|
||||
{
|
||||
if ((LinkPointer & 0x80000000) == 0)
|
||||
{
|
||||
zerofound = 1;
|
||||
Z2_ZoneSelBlockPtr = (unsigned long *)(0x78200 + ((bitpos + 3)*16));
|
||||
}
|
||||
else
|
||||
{
|
||||
bitpos--;
|
||||
LinkPointer = LinkPointer << 1;
|
||||
}
|
||||
}
|
||||
if (zerofound == 0)
|
||||
{
|
||||
Z2_ZoneSelBlockPtr = (unsigned long *)0x78220;
|
||||
}
|
||||
|
||||
/* Perform dummy reads of the Zone Select Block locations */
|
||||
for (i = 0; i < 8; i++)
|
||||
{
|
||||
dummy_read = *Z1_ZoneSelBlockPtr;
|
||||
dummy_read = *Z2_ZoneSelBlockPtr;
|
||||
Z1_ZoneSelBlockPtr++;
|
||||
Z2_ZoneSelBlockPtr++;
|
||||
}
|
||||
|
||||
//to avaoid 'set but never used' error
|
||||
dummy_read = dummy_read;
|
||||
|
||||
//clear local stack before returning
|
||||
i = 0;
|
||||
LinkPointer = 0;
|
||||
Z1_ZoneSelBlockPtr = (void *)0;
|
||||
Z2_ZoneSelBlockPtr = (void *)0;
|
||||
dummy_read = 0;
|
||||
bitpos = 0;
|
||||
zerofound = 0;
|
||||
|
||||
}
|
||||
|
||||
|
||||
uint32_t c1brom_system_init()
|
||||
{
|
||||
uint32_t EntryAddr = 0xFFFFFFFF;
|
||||
uint32_t IoRestoreAddr = 0xFFFFFFFF;
|
||||
uint32_t BootMode = 0xFFFFFFFF;
|
||||
|
||||
EntryAddr = TI_OTP_C1BROM_ESCAPE_POINT_1;
|
||||
if((EntryAddr != 0xFFFFFFFF) &&
|
||||
(EntryAddr != 0x00000000))
|
||||
{
|
||||
/*if OTP is programmed, then call OTP function*/
|
||||
((void (*)(void))EntryAddr)();
|
||||
}
|
||||
|
||||
/* enable C1 NMI*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMICFG.bit.NMIE = 1;
|
||||
c1brom_handle_nmi_at_start();
|
||||
|
||||
InitDCSM();
|
||||
|
||||
//not to trip ECSL if the passwords are ALL_1,
|
||||
//which would be the case with fresh erased parts.
|
||||
EALLOW;
|
||||
DcsmRegsZ1.Z1_CSMKEY0 = 0xFFFFFFFF;
|
||||
DcsmRegsZ1.Z1_CSMKEY1 = 0xFFFFFFFF;
|
||||
DcsmRegsZ1.Z1_CSMKEY2 = 0xFFFFFFFF;
|
||||
DcsmRegsZ1.Z1_CSMKEY3 = 0xFFFFFFFF;
|
||||
DcsmRegsZ2.Z2_CSMKEY0 = 0xFFFFFFFF;
|
||||
DcsmRegsZ2.Z2_CSMKEY1 = 0xFFFFFFFF;
|
||||
DcsmRegsZ2.Z2_CSMKEY2 = 0xFFFFFFFF;
|
||||
DcsmRegsZ2.Z2_CSMKEY3 = 0xFFFFFFFF;
|
||||
EDIS;
|
||||
|
||||
/*set C-BootROM health status to indicate that boot started*/
|
||||
c1brom_status = C1_BOOTROM_DCSM_INIT_DONE;
|
||||
|
||||
c1brom_init_boot_env();
|
||||
|
||||
if(CpuSysRegs.RESC.all & (SYSCTL_RESC_POR | SYSCTL_RESC_XRSN |
|
||||
SYSCTL_RESC_HIB))
|
||||
{
|
||||
//do the below only in this order, don;t dare to change
|
||||
EALLOW;
|
||||
// bypass PLL here
|
||||
if(ClkCfgRegs.SYSPLLCTL1.bit.PLLCLKEN != 0)
|
||||
{
|
||||
ClkCfgRegs.SYSPLLCTL1.bit.PLLCLKEN = 0;
|
||||
}
|
||||
//set PLL multiplier to 0x0
|
||||
if(ClkCfgRegs.SYSPLLMULT.bit.IMULT != 0)
|
||||
{
|
||||
ClkCfgRegs.SYSPLLMULT.bit.IMULT = 0;
|
||||
}
|
||||
//set the divider to /1
|
||||
if(ClkCfgRegs.SYSCLKDIVSEL.bit.PLLSYSCLKDIV != 0)
|
||||
{
|
||||
ClkCfgRegs.SYSCLKDIVSEL.bit.PLLSYSCLKDIV = 0x0; //set it to /1
|
||||
}
|
||||
|
||||
// remove the 1.6 multiplier
|
||||
AnalogSubsysRegs.INTOSC1CSR.bit.OSCCONFIG &= (~(0x2));
|
||||
|
||||
EDIS;
|
||||
c1brom_intosc_trim_config();
|
||||
|
||||
// calculate the Count for 12 uS at 10MHz +/- 7% MHz efuse trimmed clock, with buffer
|
||||
// This would result in 16uS blank window
|
||||
|
||||
asm(" MOV @T,#178 ");
|
||||
asm(" RPT @T \
|
||||
||NOP ");
|
||||
|
||||
}
|
||||
if(((*(uint32_t *)DEVICE_CAL_LOCATION) != 0xFFFFFFFF) &&
|
||||
((*(uint32_t *)DEVICE_CAL_LOCATION) != 0x00000000))
|
||||
{
|
||||
(*C1BROM_DEVCAL)();
|
||||
}
|
||||
|
||||
/*check reset cause, if HIBRESET then call IORESTOREADDR*/
|
||||
if(CpuSysRegs.RESC.bit.HIBRESETn != 0x00)
|
||||
{
|
||||
c1brom_status |= C1_BOOTROM_HANDLED_HIBRESET;
|
||||
EALLOW;
|
||||
|
||||
/*if CRESC.bit[1,0] == 0x00, there was no reset because of C28HWBIST*/
|
||||
|
||||
EntryAddr = TI_OTP_C1BROM_ESCAPE_POINT_3;
|
||||
if((EntryAddr != 0xFFFFFFFF) &&
|
||||
(EntryAddr != 0x00000000))
|
||||
{
|
||||
/*if OTP is programmed, then call OTP function*/
|
||||
((void (*)(void))EntryAddr)();
|
||||
}
|
||||
|
||||
EALLOW;
|
||||
IoRestoreAddr = CpuSysRegs.IORESTOREADDR.all;
|
||||
|
||||
if(IoRestoreAddr != 0x003FFFFF) //not at its default value
|
||||
{
|
||||
((void (*)(void))IoRestoreAddr)();
|
||||
}
|
||||
|
||||
// clear the IO Isolation here, user is supposed to clear this in IoRestoreAddr
|
||||
// function, but doesn't hurt to make sure.
|
||||
EALLOW;
|
||||
CpuSysRegs.LPMCR.bit.IOISODIS = 1;
|
||||
}
|
||||
|
||||
//clear RESC bits so that bootROM would not go into
|
||||
//a unwanted reset handling if it got reset for some reason
|
||||
if (CpuSysRegs.RESC.bit.POR)
|
||||
{
|
||||
|
||||
//clear POR and XRSn
|
||||
CpuSysRegs.RESC.all = (SYSCTL_RESC_POR | SYSCTL_RESC_XRSN);
|
||||
c1brom_status |= (C1_BOOTROM_HANDLED_XRSN | C1_BOOTROM_HANDLED_POR);
|
||||
|
||||
}
|
||||
|
||||
if(CpuSysRegs.RESC.bit.XRSn)
|
||||
{
|
||||
|
||||
CpuSysRegs.RESC.all = SYSCTL_RESC_XRSN;
|
||||
c1brom_status |= (C1_BOOTROM_HANDLED_XRSN);
|
||||
}
|
||||
|
||||
if(CpuSysRegs.RESC.bit.HWBISTn)
|
||||
{
|
||||
CpuSysRegs.RESC.all = SYSCTL_RESC_HWBIST;
|
||||
|
||||
c1brom_status |= (C1_BOOTROM_HANDLED_HWBISTRESET);
|
||||
}
|
||||
|
||||
EntryAddr = TI_OTP_C1BROM_ESCAPE_POINT_4;
|
||||
if((EntryAddr != 0xFFFFFFFF) &&
|
||||
(EntryAddr != 0x00000000))
|
||||
{
|
||||
/*if OTP is programmed, then call OTP function*/
|
||||
((void (*)(void))EntryAddr)();
|
||||
}
|
||||
|
||||
/*read RESC again*/
|
||||
if(CpuSysRegs.RESC.bit.HIBRESETn)
|
||||
{
|
||||
CpuSysRegs.RESC.all = SYSCTL_RESC_HIB; //clear hib reset
|
||||
//PMM trims take effect here so have blanking periods now
|
||||
|
||||
// calculate the Count for 75 uS at worst case clock (efuse untrimmed), with buffer
|
||||
// This would result in app 80uS blank window for count of 1200
|
||||
asm(" MOV @T,#1200 ");
|
||||
asm(" RPT @T \
|
||||
||NOP ");
|
||||
|
||||
EALLOW;
|
||||
BootMode = CpuSysRegs.HIBBOOTMODE;
|
||||
EDIS;
|
||||
|
||||
EALLOW;
|
||||
//bring CPU2 out of reset
|
||||
DevCfgRegs.CPU2RESCTL.all = 0xA5A50000;
|
||||
EDIS;
|
||||
|
||||
//bootmode.bits7:0 = key (0x5A is valid)
|
||||
//bootmode.bits15:8 = boot mode
|
||||
//bootmode.bits16:31 = RESERVED for future
|
||||
if ((BootMode & 0xFF) == 0x5A)
|
||||
{
|
||||
//good key
|
||||
BootMode = ((BootMode & 0xFF00) >> 8);
|
||||
}
|
||||
else
|
||||
{
|
||||
BootMode = SelectBootMode();
|
||||
}
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
EALLOW;
|
||||
//bring CPU2 out of reset
|
||||
DevCfgRegs.CPU2RESCTL.all = 0xA5A50000;
|
||||
|
||||
EDIS;
|
||||
|
||||
BootMode = SelectBootMode();
|
||||
}
|
||||
|
||||
c1brom_status |= C1_BOOTROM_RESC_HANDLED;
|
||||
|
||||
EntryAddr = TI_OTP_C1BROM_ESCAPE_POINT_2;
|
||||
if((EntryAddr != 0xFFFFFFFF) &&
|
||||
(EntryAddr != 0x00000000))
|
||||
{
|
||||
/*if OTP is programmed, then call OTP function*/
|
||||
((void (*)(void))EntryAddr)();
|
||||
}
|
||||
|
||||
|
||||
if(BootMode == FLASH_BOOT)
|
||||
{
|
||||
EntryAddr = FLASH_ENTRY_POINT;
|
||||
//to make sure wathDOG is enabled
|
||||
sysctl_wdog_enable();
|
||||
return EntryAddr;
|
||||
}
|
||||
|
||||
else if(BootMode == RAM_BOOT)
|
||||
{
|
||||
EntryAddr = RAM_ENTRY_POINT; //to make sure wathDOG is enabled
|
||||
sysctl_wdog_enable();
|
||||
return EntryAddr;
|
||||
}
|
||||
else if((BootMode == SCI_BOOT) || (BootMode == SCI_BOOT_ALTERNATE)) EntryAddr = SCI_Boot(BootMode);
|
||||
else if(BootMode == SPI_BOOT|| (BootMode == SPI_BOOT_ALTERNATE)) EntryAddr = SPI_Boot(BootMode);
|
||||
else if(BootMode == I2C_BOOT|| (BootMode == I2C_BOOT_ALTERNATE)) EntryAddr = I2C_Boot(BootMode);
|
||||
else if(BootMode == PARALLEL_BOOT) EntryAddr = Parallel_Boot();
|
||||
else if(BootMode == CAN_BOOT|| (BootMode == CAN_BOOT_TEST_DEFAULT)) EntryAddr = DCAN_Boot(BootMode);
|
||||
else if(BootMode == CAN_BOOT_ALTERNATE|| (BootMode == CAN_BOOT_TEST_ALT)) EntryAddr = DCAN_Boot(BootMode);
|
||||
else if (BootMode == USB_BOOT) EntryAddr = USB_Boot(BootMode);
|
||||
else if(CpuSysRegs.RESC.bit.TRSTn_pin_status == 0)
|
||||
{
|
||||
EntryAddr = TI_OTP_C1BROM_ESCAPE_POINT_12;
|
||||
if((EntryAddr != 0xFFFFFFFF) &&
|
||||
(EntryAddr != 0x00000000))
|
||||
{
|
||||
/*if OTP is programmed, then call OTP function*/
|
||||
((void (*)(void))EntryAddr)();
|
||||
}
|
||||
|
||||
//if not in EMU boot mode then default to flash
|
||||
EntryAddr = FLASH_ENTRY_POINT;
|
||||
}
|
||||
else
|
||||
{
|
||||
WaitBoot();
|
||||
}
|
||||
|
||||
sysctl_wdog_enable();
|
||||
return EntryAddr;
|
||||
}
|
||||
|
||||
|
||||
void c1brom_enable_pie_in_boot(uint16_t mode)
|
||||
{
|
||||
/*enable PIE*/
|
||||
|
||||
// Initialize PIE control registers to their default state.
|
||||
// The default state is all PIE interrupts disabled and flags
|
||||
// are cleared.
|
||||
c1brom_init_pie_control();
|
||||
|
||||
// Disable CPU interrupts and clear all CPU interrupt flags:
|
||||
IER = 0x0000;
|
||||
IFR = 0x0000;
|
||||
|
||||
// Initialize the PIE vector table with pointers to the shell Interrupt
|
||||
// Service Routines (ISR).
|
||||
// This will populate the entire table, even if the interrupt
|
||||
// is not used in this example. This is useful for debug purposes.
|
||||
c1brom_init_pie_vect_table();
|
||||
|
||||
/*install interrupt handlers for MTOCIPCINT1 and ATOCIPCINT1 and iTRAP ISR*/
|
||||
|
||||
EALLOW;
|
||||
|
||||
PieVectTable.NMI_INT = &c1brom_handle_nmi;
|
||||
PieVectTable.ILLEGAL_INT = &c1brom_itrap_isr;
|
||||
|
||||
if(mode == 1)
|
||||
{
|
||||
PieVectTable.CIPC1_INT = &c1brom_c2c1_ipc_int1_isr;
|
||||
/*enable MTOCIPCINT1*/
|
||||
//PieCtrlRegs.PIEIER11.bit.INTx1 = 1;
|
||||
PieCtrlRegs.PIEIER1.bit.INTx13 = 1;
|
||||
|
||||
|
||||
/*enable interrupt 1 for IPC interrupts*/
|
||||
IER |= 0x0001;
|
||||
EINT;
|
||||
}
|
||||
EDIS;
|
||||
EINT; //just to be safe
|
||||
}
|
||||
|
||||
void WaitBoot(void)
|
||||
{
|
||||
// sysctl_wdog_enable(); //- for debug
|
||||
if(((OTP_BOOT_CONFIGURE_WORD & 0xFF000000) >> 24) == 0x5A) //CHECK if key match fails
|
||||
{
|
||||
if(((OTP_BOOT_CONFIGURE_WORD >> 8) & 3) == 0x1)
|
||||
{
|
||||
c1brom_enable_pie_in_boot(1);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
sysctl_wdog_enable();
|
||||
}
|
||||
|
||||
// If the emulator stops here
|
||||
// a) change EMU_KEY to 0x55AA
|
||||
// b) write the appropriate boot mode to EMU_BMODE
|
||||
// c) perform a debugger reset, and run
|
||||
asm(" ESTOP0");
|
||||
|
||||
for(;;)
|
||||
{
|
||||
}
|
||||
}
|
||||
+616
@@ -0,0 +1,616 @@
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: checksum.c
|
||||
//
|
||||
// TITLE: boot ROM checksum generator
|
||||
//
|
||||
// Functions:
|
||||
//
|
||||
//
|
||||
// Notes:
|
||||
//
|
||||
//###########################################################################
|
||||
//
|
||||
// Ver | dd mmm yyyy | Who | Description of changes
|
||||
// =====|=============|==============|=======================================
|
||||
// 0.1 | | LH | Original Release.
|
||||
// | | |
|
||||
//###########################################################################
|
||||
typedef struct {
|
||||
unsigned long firstAddr;
|
||||
unsigned long lastAddr;
|
||||
unsigned short mem_attribute; //initialized to 0 for reserved locations and 1 for valid data locations
|
||||
} memblock;
|
||||
|
||||
|
||||
// Use 4 32-bit values to represent the 64-bit checksum.
|
||||
// This is done such that overflow can be monitored at
|
||||
// each step in the summation. If overflow from the lower
|
||||
// 16-bits occurs, then the overflow is added to the next
|
||||
// significant word.
|
||||
|
||||
typedef struct {
|
||||
unsigned long highHalfMSW;
|
||||
unsigned long highHalfLSW;
|
||||
unsigned long lowHalfMSW;
|
||||
unsigned long lowHalfLSW;
|
||||
} ui64;
|
||||
|
||||
typedef struct checksum_data
|
||||
{
|
||||
unsigned long total_ones;
|
||||
unsigned long bit_column_cksum[8][3];
|
||||
ui64 row_weight_sum;
|
||||
ui64 fact_weight_sum;
|
||||
}composite_checksum_t;
|
||||
|
||||
#pragma DATA_SECTION(csum_rom, ".CKSUMLOC");
|
||||
const composite_checksum_t csum_rom = {
|
||||
0x0003A657, //total_ones
|
||||
0x0000F60B, 0x00001C66, 00000000, //bit_column_cksum[0][3];
|
||||
0x000055CF, 0x0000212C, 00000000, //bit_column_cksum[1][3];
|
||||
0x0000DE00, 0x00001FA2, 00000000, //bit_column_cksum[2][3];
|
||||
0x0000C6E7, 0x00001DEA, 00000000, //bit_column_cksum[3][3];
|
||||
0x00008A82, 0x00001D4A, 00000000, //bit_column_cksum[4][3];
|
||||
0x0000B564, 0x00001C4A, 00000000, //bit_column_cksum[5][3];
|
||||
0x0000A7C0, 0x00001B4D, 00000000, //bit_column_cksum[6][3];
|
||||
0x0000D2D6, 0x00001ADA, 00000000, //bit_column_cksum[7][3];
|
||||
0x00000000, 0x00000007, 0x000056E4, 0x000091B0,//row_weight_sum
|
||||
0x00000000, 0x0000261B, 0x0000C42F, 0x0000CCDA //fact_weight_sum
|
||||
};
|
||||
|
||||
#if 0/// no stable compiler available
|
||||
|
||||
#pragma CODE_SECTION(verify_checksum_onROM, ".CKSUMFUNCS");
|
||||
unsigned short verify_checksum_onROM();
|
||||
|
||||
#pragma CODE_SECTION(calculate_composite_checksum_on_rom, ".CKSUMFUNCS");
|
||||
unsigned short calculate_composite_checksum_on_rom(composite_checksum_t *cksum, memblock *mblock, unsigned int total_mblocks);
|
||||
|
||||
#pragma CODE_SECTION(add_to_factorial_sum, ".CKSUMFUNCS");
|
||||
void add_to_factorial_sum(unsigned long fact_weight, composite_checksum_t *cksum);
|
||||
|
||||
#pragma CODE_SECTION(add_to_row_weight_sum, ".CKSUMFUNCS");
|
||||
void add_to_row_weight_sum(unsigned long ones_weight, composite_checksum_t *cksum);
|
||||
|
||||
#pragma CODE_SECTION(add_to_bitcolumn_checksum, ".CKSUMFUNCS");
|
||||
unsigned long add_to_bitcolumn_checksum(unsigned long bitcolumn, unsigned long bit_weight, composite_checksum_t *cksum);
|
||||
|
||||
#pragma CODE_SECTION(compare_two_composite_checksums, ".CKSUMFUNCS");
|
||||
unsigned short compare_two_composite_checksums(const composite_checksum_t *goldsum, composite_checksum_t *compsum);
|
||||
|
||||
#pragma CODE_SECTION(calculate_checksum, ".CKSUMFUNCS");
|
||||
unsigned long calculate_checksum(unsigned long start, unsigned long end, unsigned long offset, composite_checksum_t *cksum);
|
||||
|
||||
#pragma CODE_SECTION(test_reserved_memory, ".CKSUMFUNCS");
|
||||
unsigned short test_reserved_memory(unsigned long start, unsigned long end);
|
||||
|
||||
|
||||
unsigned short test_reserved_memory(unsigned long start, unsigned long end)
|
||||
{
|
||||
if(start & ~(0x3FFFFF)) //address beyond 22 bits
|
||||
{
|
||||
while(start <=end )
|
||||
{
|
||||
if(__addr32_read_uint16(start++) != (unsigned long)0xFFFF)
|
||||
{
|
||||
return 0xFFFF; //error
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
while(start <=end )
|
||||
{
|
||||
if(* (volatile unsigned short *)start++ != (unsigned long)0xFFFF)
|
||||
{
|
||||
return 0xFFFF; //error
|
||||
}
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
// This main function performs a very simple 64 bit checksum routine.
|
||||
// 4 32-bit values are used to calculate the checksum. This is done so that
|
||||
// no overflow is lost. After each addition, the value is checked to see if
|
||||
// it has overflowed the lower 16-bits. If it has, then the overflow portion
|
||||
// in the upper 16-bits is added to the next most significant portion of the
|
||||
// checksum.
|
||||
//
|
||||
// When the routine completes, the upper 16-bits of each portion of the checksum
|
||||
// will be 0x000 - this portion should be discarded as it was only used to check
|
||||
// for overflow and the checksum is then formed from the lower 16-bits.
|
||||
//
|
||||
// For example:
|
||||
// lowHalfLSW = 0x00001111
|
||||
// lowHalfMSW = 0x00002222
|
||||
// highHalfLSW = 0x00003333
|
||||
// highHalfMSW = 0x00004444
|
||||
//
|
||||
// would result in a 64-bit checksum of 0x44443333 22221111
|
||||
|
||||
unsigned short calculate_composite_checksum_on_rom(composite_checksum_t *cksum, memblock *mblock, unsigned int total_mblocks)
|
||||
{
|
||||
unsigned short i;
|
||||
unsigned long offset = 0;
|
||||
memblock *lmblock = (void *)0;
|
||||
unsigned short result = 0;
|
||||
|
||||
cksum->row_weight_sum.highHalfMSW = 0;
|
||||
cksum->row_weight_sum.highHalfLSW = 0;
|
||||
cksum->row_weight_sum.lowHalfLSW = 0;
|
||||
cksum->row_weight_sum.lowHalfMSW = 0;
|
||||
|
||||
cksum->fact_weight_sum.highHalfMSW = 0;
|
||||
cksum->fact_weight_sum.highHalfLSW = 0;
|
||||
cksum->fact_weight_sum.lowHalfLSW = 0;
|
||||
cksum->fact_weight_sum.lowHalfMSW = 0;
|
||||
|
||||
cksum->total_ones = 0;
|
||||
|
||||
cksum->bit_column_cksum[0][0] = cksum->bit_column_cksum[1][0] = cksum->bit_column_cksum[2][0] = cksum->bit_column_cksum[3][0] = 0;
|
||||
cksum->bit_column_cksum[4][0] = cksum->bit_column_cksum[5][0] = cksum->bit_column_cksum[6][0] = cksum->bit_column_cksum[7][0] = 0;
|
||||
|
||||
cksum->bit_column_cksum[0][1] = cksum->bit_column_cksum[1][1] = cksum->bit_column_cksum[2][1] = cksum->bit_column_cksum[3][1] = 0;
|
||||
cksum->bit_column_cksum[4][1] = cksum->bit_column_cksum[5][1] = cksum->bit_column_cksum[6][1] = cksum->bit_column_cksum[7][1] = 0;
|
||||
|
||||
cksum->bit_column_cksum[0][2] = cksum->bit_column_cksum[1][2] = cksum->bit_column_cksum[2][2] = cksum->bit_column_cksum[3][2] = 0;
|
||||
cksum->bit_column_cksum[4][2] = cksum->bit_column_cksum[5][2] = cksum->bit_column_cksum[6][2] = cksum->bit_column_cksum[7][2] = 0;
|
||||
|
||||
for(i = 0; i < total_mblocks; i++) {
|
||||
lmblock = (memblock *)(&mblock[i]);
|
||||
if (lmblock->mem_attribute == 0)
|
||||
{
|
||||
result = test_reserved_memory((unsigned long)(lmblock->firstAddr), (unsigned long)(lmblock->lastAddr));
|
||||
if(result == 0xFFFF)
|
||||
return 0xFFFF;
|
||||
}
|
||||
else if(lmblock->mem_attribute == 1)
|
||||
{
|
||||
offset = calculate_checksum((unsigned long)(lmblock->firstAddr), (unsigned long)(lmblock->lastAddr), offset, cksum);
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
void add_to_factorial_sum(unsigned long fact_weight, composite_checksum_t *cksum)
|
||||
{
|
||||
// Add in LSW
|
||||
cksum->fact_weight_sum.lowHalfLSW += (fact_weight & (unsigned long)0x0000FFFF);
|
||||
|
||||
// Check for overflow
|
||||
if(cksum->fact_weight_sum.lowHalfLSW >= (unsigned long)0x0000FFFF)
|
||||
{
|
||||
cksum->fact_weight_sum.lowHalfMSW += cksum->fact_weight_sum.lowHalfLSW >> 16;
|
||||
cksum->fact_weight_sum.lowHalfLSW &= (unsigned long)0x0000FFFF;
|
||||
}
|
||||
|
||||
if(cksum->fact_weight_sum.lowHalfMSW >= (unsigned long)0x0000FFFF)
|
||||
{
|
||||
cksum->fact_weight_sum.highHalfLSW += cksum->fact_weight_sum.lowHalfMSW >> 16;
|
||||
cksum->fact_weight_sum.lowHalfMSW &= (unsigned long)0x0000FFFF;
|
||||
}
|
||||
|
||||
if(cksum->fact_weight_sum.highHalfLSW >= (unsigned long)0x0000FFFF)
|
||||
{
|
||||
cksum->fact_weight_sum.highHalfMSW += cksum->fact_weight_sum.lowHalfLSW >> 16;
|
||||
cksum->fact_weight_sum.highHalfLSW &= (unsigned long)0x0000FFFF;
|
||||
}
|
||||
|
||||
// Add in MSW
|
||||
cksum->fact_weight_sum.lowHalfMSW += (fact_weight >> 16);
|
||||
// Check for overflow
|
||||
if(cksum->fact_weight_sum.lowHalfMSW >= (unsigned long)0x0000FFFF)
|
||||
{
|
||||
cksum->fact_weight_sum.highHalfLSW += cksum->fact_weight_sum.lowHalfMSW >> 16;
|
||||
cksum->fact_weight_sum.lowHalfMSW &= (unsigned long)0x0000FFFF;
|
||||
}
|
||||
|
||||
if(cksum->fact_weight_sum.highHalfLSW >= (unsigned long)0x0000FFFF)
|
||||
{
|
||||
cksum->fact_weight_sum.highHalfMSW += cksum->fact_weight_sum.lowHalfLSW >> 16;
|
||||
cksum->fact_weight_sum.highHalfLSW &= (unsigned long)0x0000FFFF;
|
||||
}
|
||||
}
|
||||
|
||||
void add_to_row_weight_sum(unsigned long ones_weight, composite_checksum_t *cksum)
|
||||
{
|
||||
// Add in LSW
|
||||
cksum->row_weight_sum.lowHalfLSW += (ones_weight & (unsigned long)0x0000FFFF);
|
||||
|
||||
// Check for overflow
|
||||
if(cksum->row_weight_sum.lowHalfLSW >= (unsigned long)0x0000FFFF)
|
||||
{
|
||||
cksum->row_weight_sum.lowHalfMSW += cksum->row_weight_sum.lowHalfLSW >> 16;
|
||||
cksum->row_weight_sum.lowHalfLSW &= (unsigned long)0x0000FFFF;
|
||||
}
|
||||
|
||||
if(cksum->row_weight_sum.lowHalfMSW >= (unsigned long)0x0000FFFF)
|
||||
{
|
||||
cksum->row_weight_sum.highHalfLSW += cksum->row_weight_sum.lowHalfMSW >> 16;
|
||||
cksum->row_weight_sum.lowHalfMSW &= (unsigned long)0x0000FFFF;
|
||||
}
|
||||
|
||||
if(cksum->row_weight_sum.highHalfLSW >= (unsigned long)0x0000FFFF)
|
||||
{
|
||||
cksum->row_weight_sum.highHalfMSW += cksum->row_weight_sum.lowHalfLSW >> 16;
|
||||
cksum->row_weight_sum.highHalfLSW &= (unsigned long)0x0000FFFF;
|
||||
}
|
||||
|
||||
// Add in MSW
|
||||
cksum->row_weight_sum.lowHalfMSW += (ones_weight >> 16);
|
||||
// Check for overflow
|
||||
if(cksum->row_weight_sum.lowHalfMSW >= (unsigned long)0x0000FFFF)
|
||||
{
|
||||
cksum->row_weight_sum.highHalfLSW += cksum->row_weight_sum.lowHalfMSW >> 16;
|
||||
cksum->row_weight_sum.lowHalfMSW &= (unsigned long)0x0000FFFF;
|
||||
}
|
||||
|
||||
if(cksum->row_weight_sum.highHalfLSW >= (unsigned long)0x0000FFFF)
|
||||
{
|
||||
cksum->row_weight_sum.highHalfMSW += cksum->row_weight_sum.lowHalfLSW >> 16;
|
||||
cksum->row_weight_sum.highHalfLSW &= (unsigned long)0x0000FFFF;
|
||||
}
|
||||
}
|
||||
|
||||
//returns ones weight of the bit just added - ones weight = 8*(bitweight-1)+bitcolumn.
|
||||
unsigned long add_to_bitcolumn_checksum(unsigned long bitcolumn, unsigned long bit_weight, composite_checksum_t *cksum)
|
||||
{
|
||||
// Add in LSW
|
||||
cksum->bit_column_cksum[bitcolumn][0] += (bit_weight & (unsigned long)0x0000FFFF);
|
||||
|
||||
// Check for overflow
|
||||
if(cksum->bit_column_cksum[bitcolumn][0] >= (unsigned long)0x0000FFFF)
|
||||
{
|
||||
cksum->bit_column_cksum[bitcolumn][1] += cksum->bit_column_cksum[bitcolumn][0] >> 16;
|
||||
cksum->bit_column_cksum[bitcolumn][0] &= (unsigned long)0x0000FFFF;
|
||||
}
|
||||
|
||||
if(cksum->bit_column_cksum[bitcolumn][1] >= (unsigned long)0x0000FFFF)
|
||||
{
|
||||
cksum->bit_column_cksum[bitcolumn][2] += cksum->bit_column_cksum[bitcolumn][1] >> 16;
|
||||
cksum->bit_column_cksum[bitcolumn][1] &= (unsigned long)0x0000FFFF;
|
||||
}
|
||||
|
||||
// Add in MSW
|
||||
cksum->bit_column_cksum[bitcolumn][1] += (bit_weight >> 16);
|
||||
// Check for overflow
|
||||
if(cksum->bit_column_cksum[bitcolumn][1] >= (unsigned long)0x0000FFFF)
|
||||
{
|
||||
cksum->bit_column_cksum[bitcolumn][2] += cksum->bit_column_cksum[bitcolumn][1] >> 16;
|
||||
cksum->bit_column_cksum[bitcolumn][1] &= (unsigned long)0x0000FFFF;
|
||||
}
|
||||
|
||||
return (unsigned long)(8*(bit_weight-1) + bitcolumn);
|
||||
}
|
||||
|
||||
unsigned long calculate_checksum(unsigned long start, unsigned long end, unsigned long offset, composite_checksum_t *cksum)
|
||||
{
|
||||
volatile unsigned short data = 0x0000;
|
||||
volatile unsigned short byte_value = 0;
|
||||
volatile unsigned short byte_count = 0;
|
||||
volatile unsigned long byte_offset = 0;
|
||||
volatile unsigned long ones_weight = 0;
|
||||
volatile unsigned long ones_fact_weight = 0;
|
||||
volatile unsigned long nibble_count = 0;
|
||||
volatile unsigned int nibble_offset = 0;
|
||||
|
||||
while(start <= end)
|
||||
{
|
||||
if(start & ~(0x3FFFFF)) //address beyond 22 bits
|
||||
{
|
||||
data = __addr32_read_uint16(start++);
|
||||
}
|
||||
else
|
||||
{
|
||||
data = *(volatile unsigned short *)start++; //pointer to a 16 bit value
|
||||
}
|
||||
//each offset has 2 bytes of data on C28x CPUs
|
||||
for(byte_count = 1; byte_count < 3; byte_count++)
|
||||
{
|
||||
byte_offset = byte_count+(offset);
|
||||
ones_fact_weight = 1;
|
||||
//get the byte from word
|
||||
byte_value = (data & (0xFF));
|
||||
data = (data >> 8);
|
||||
ones_weight = 0;
|
||||
//seperate the byte into two nibbles
|
||||
for(nibble_offset = 0; nibble_offset <= 4; nibble_offset+=4)
|
||||
{
|
||||
nibble_count++;
|
||||
if((byte_value & 0xF) == 0)
|
||||
{
|
||||
;
|
||||
}
|
||||
else if ((byte_value & 0xF) == 1)
|
||||
{
|
||||
cksum->total_ones += 1;
|
||||
ones_weight += add_to_bitcolumn_checksum(0+nibble_offset,byte_offset, cksum);
|
||||
ones_fact_weight = (nibble_count -1)*(nibble_count + 1);
|
||||
}
|
||||
else if ((byte_value & 0xF) == 2)
|
||||
{
|
||||
cksum->total_ones += 1;
|
||||
ones_weight += add_to_bitcolumn_checksum(1+nibble_offset,byte_offset, cksum);
|
||||
ones_fact_weight = (nibble_count -1)*(nibble_count + 2) ;
|
||||
}
|
||||
else if ((byte_value & 0xF) == 3)
|
||||
{
|
||||
cksum->total_ones += 2;
|
||||
ones_weight += add_to_bitcolumn_checksum(0+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(1+nibble_offset,byte_offset, cksum);
|
||||
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count + 1);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 2);
|
||||
}
|
||||
else if ((byte_value & 0xF) == 4)
|
||||
{
|
||||
cksum->total_ones += 1;
|
||||
ones_weight += add_to_bitcolumn_checksum(2+nibble_offset,byte_offset, cksum);
|
||||
|
||||
ones_fact_weight = (nibble_count -1)*(nibble_count + 3);
|
||||
|
||||
}
|
||||
else if ((byte_value & 0xF) == 5)
|
||||
{
|
||||
cksum->total_ones += 2;
|
||||
ones_weight += add_to_bitcolumn_checksum(0+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(2+nibble_offset,byte_offset, cksum);
|
||||
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count + 1);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 3);
|
||||
}
|
||||
else if ((byte_value & 0xF) == 6)
|
||||
{
|
||||
cksum->total_ones += 2;
|
||||
ones_weight += add_to_bitcolumn_checksum(1+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(2+nibble_offset,byte_offset, cksum);
|
||||
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count + 2);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 3);
|
||||
}
|
||||
else if ((byte_value & 0xF) == 7)
|
||||
{
|
||||
cksum->total_ones += 3;
|
||||
ones_weight += add_to_bitcolumn_checksum(0+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(1+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(2+nibble_offset,byte_offset, cksum);
|
||||
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count + 1);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 2);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 3);
|
||||
}
|
||||
else if ((byte_value & 0xF) == 8)
|
||||
{
|
||||
cksum->total_ones += 1;
|
||||
ones_weight += add_to_bitcolumn_checksum(3+nibble_offset,byte_offset, cksum);
|
||||
|
||||
ones_fact_weight = (nibble_count -1)*(nibble_count + 4);
|
||||
|
||||
}
|
||||
else if ((byte_value & 0xF) == 9)
|
||||
{
|
||||
cksum->total_ones += 2;
|
||||
ones_weight += add_to_bitcolumn_checksum(0+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(3+nibble_offset,byte_offset, cksum);
|
||||
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count + 1);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 4);
|
||||
}
|
||||
|
||||
else if ((byte_value & 0xF) == 10)
|
||||
{
|
||||
cksum->total_ones += 2;
|
||||
ones_weight += add_to_bitcolumn_checksum(1+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(3+nibble_offset,byte_offset, cksum);
|
||||
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count + 2);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 4);
|
||||
}
|
||||
else if ((byte_value & 0xF) == 11)
|
||||
{
|
||||
cksum->total_ones += 3;
|
||||
ones_weight += add_to_bitcolumn_checksum(0+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(1+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(3+nibble_offset,byte_offset, cksum);
|
||||
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count + 1);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 2);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 4);
|
||||
}
|
||||
else if ((byte_value & 0xF) == 12)
|
||||
{
|
||||
cksum->total_ones += 2;
|
||||
ones_weight += add_to_bitcolumn_checksum(2+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(3+nibble_offset,byte_offset, cksum);
|
||||
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count + 3);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 4);
|
||||
}
|
||||
else if ((byte_value & 0xF) == 13)
|
||||
{
|
||||
cksum->total_ones += 3;
|
||||
ones_weight += add_to_bitcolumn_checksum(0+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(2+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(3+nibble_offset,byte_offset, cksum);
|
||||
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count + 1);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 3);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 4);
|
||||
}
|
||||
else if ((byte_value & 0xF) == 14)
|
||||
{
|
||||
cksum->total_ones += 3;
|
||||
ones_weight += add_to_bitcolumn_checksum(1+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(2+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(3+nibble_offset,byte_offset, cksum);
|
||||
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count + 2);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 3);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 4);
|
||||
|
||||
}
|
||||
else if ((byte_value & 0xF) == 15)
|
||||
{
|
||||
cksum->total_ones += 4;
|
||||
ones_weight += add_to_bitcolumn_checksum(0+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(1+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(2+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(3+nibble_offset,byte_offset, cksum);
|
||||
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count + 1);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 2);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 3);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 4);
|
||||
|
||||
}
|
||||
add_to_factorial_sum(ones_fact_weight, cksum);
|
||||
ones_fact_weight = 1;
|
||||
//get the next nibble from byte
|
||||
byte_value = byte_value >> 4;
|
||||
}//for loop on nibble.
|
||||
add_to_row_weight_sum(ones_weight, cksum);
|
||||
} // for loop on bytes in word.
|
||||
offset++;
|
||||
}//while
|
||||
return offset;
|
||||
}
|
||||
|
||||
unsigned short compare_two_composite_checksums(const composite_checksum_t *goldsum, composite_checksum_t *compsum)
|
||||
{
|
||||
|
||||
if((goldsum == (void *)0) || (compsum == (void *)0))
|
||||
return 0xFFFF;
|
||||
|
||||
if(goldsum->total_ones != compsum->total_ones )
|
||||
return 0xFFFE;
|
||||
|
||||
if((goldsum->fact_weight_sum.highHalfMSW != compsum->fact_weight_sum.highHalfMSW )
|
||||
|| (goldsum->fact_weight_sum.highHalfLSW != compsum->fact_weight_sum.highHalfLSW )
|
||||
|| (goldsum->fact_weight_sum.lowHalfMSW != compsum->fact_weight_sum.lowHalfMSW )
|
||||
|| (goldsum->fact_weight_sum.lowHalfLSW != compsum->fact_weight_sum.lowHalfLSW ))
|
||||
{
|
||||
return 0xFFFD;
|
||||
}
|
||||
|
||||
if((goldsum->row_weight_sum.highHalfMSW != compsum->row_weight_sum.highHalfMSW )
|
||||
|| (goldsum->row_weight_sum.highHalfLSW != compsum->row_weight_sum.highHalfLSW)
|
||||
|| (goldsum->row_weight_sum.lowHalfMSW != compsum->row_weight_sum.lowHalfMSW)
|
||||
|| (goldsum->row_weight_sum.lowHalfLSW != compsum->row_weight_sum.lowHalfLSW))
|
||||
{
|
||||
return 0xFFFC;
|
||||
}
|
||||
|
||||
if((goldsum->bit_column_cksum[7][2] != compsum->bit_column_cksum[7][2])
|
||||
|| (goldsum->bit_column_cksum[7][1] != compsum->bit_column_cksum[7][1])
|
||||
|| (goldsum->bit_column_cksum[7][0] != compsum->bit_column_cksum[7][0]))
|
||||
{
|
||||
return 0xFFFB;
|
||||
}
|
||||
|
||||
if((goldsum->bit_column_cksum[6][2] != compsum->bit_column_cksum[6][2])
|
||||
|| (goldsum->bit_column_cksum[6][1] != compsum->bit_column_cksum[6][1])
|
||||
|| (goldsum->bit_column_cksum[6][0] != compsum->bit_column_cksum[6][0]))
|
||||
{
|
||||
return 0xFFFA;
|
||||
}
|
||||
|
||||
if((goldsum->bit_column_cksum[5][2] != compsum->bit_column_cksum[5][2])
|
||||
|| (goldsum->bit_column_cksum[5][1] != compsum->bit_column_cksum[5][1])
|
||||
|| (goldsum->bit_column_cksum[5][0] != compsum->bit_column_cksum[5][0]))
|
||||
{
|
||||
return 0xFFF9;
|
||||
}
|
||||
|
||||
if((goldsum->bit_column_cksum[4][2] != compsum->bit_column_cksum[4][2])
|
||||
|| (goldsum->bit_column_cksum[4][1] != compsum->bit_column_cksum[4][1])
|
||||
|| (goldsum->bit_column_cksum[4][0] != compsum->bit_column_cksum[4][0]))
|
||||
{
|
||||
return 0xFFF8;
|
||||
}
|
||||
|
||||
if((goldsum->bit_column_cksum[3][2] != compsum->bit_column_cksum[3][2])
|
||||
|| (goldsum->bit_column_cksum[3][1] != compsum->bit_column_cksum[3][1])
|
||||
|| (goldsum->bit_column_cksum[3][0] != compsum->bit_column_cksum[3][0]))
|
||||
{
|
||||
return 0xFFF7;
|
||||
}
|
||||
|
||||
if((goldsum->bit_column_cksum[2][2] != compsum->bit_column_cksum[2][2])
|
||||
|| (goldsum->bit_column_cksum[2][1] != compsum->bit_column_cksum[2][1])
|
||||
|| (goldsum->bit_column_cksum[2][0] != compsum->bit_column_cksum[2][0]))
|
||||
{
|
||||
return 0xFFF6;
|
||||
}
|
||||
|
||||
if((goldsum->bit_column_cksum[1][2] != compsum->bit_column_cksum[1][2])
|
||||
|| (goldsum->bit_column_cksum[1][1] != compsum->bit_column_cksum[1][1])
|
||||
|| (goldsum->bit_column_cksum[1][0] != compsum->bit_column_cksum[1][0]))
|
||||
{
|
||||
return 0xFFF5;
|
||||
}
|
||||
|
||||
if((goldsum->bit_column_cksum[0][2] != compsum->bit_column_cksum[0][2])
|
||||
|| (goldsum->bit_column_cksum[0][1] != compsum->bit_column_cksum[0][1])
|
||||
|| (goldsum->bit_column_cksum[0][0] != compsum->bit_column_cksum[0][0]))
|
||||
{
|
||||
return 0xFFF4;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
unsigned short verify_checksum_onROM()
|
||||
{
|
||||
composite_checksum_t rom_cksum;
|
||||
memblock mblock_rom[6];
|
||||
volatile unsigned long *test_signature;
|
||||
volatile unsigned long *alt_test_signature;
|
||||
|
||||
sysctl_wdog_disable();
|
||||
|
||||
mblock_rom[0].firstAddr = 0x003F8002;
|
||||
mblock_rom[0].lastAddr = 0x003febf1;
|
||||
mblock_rom[0].mem_attribute = 1; //data is present
|
||||
|
||||
mblock_rom[1].firstAddr = 0x003febf2;
|
||||
mblock_rom[1].lastAddr = 0X003fff39;
|
||||
mblock_rom[1].mem_attribute = 0; //data is NOT present
|
||||
|
||||
mblock_rom[2].firstAddr = 0x003fff3a;
|
||||
mblock_rom[2].lastAddr = 0x003fff7b;
|
||||
mblock_rom[2].mem_attribute = 1; //data is present
|
||||
|
||||
// .CKSUMLOC
|
||||
// * 0 003fff7c 00000042
|
||||
// 003fff7c 00000042 c1brom_checksum.obj (.CKSUMLOC)
|
||||
|
||||
mblock_rom[3].firstAddr = 0x003fffbe;
|
||||
mblock_rom[3].lastAddr = 0x003fffFF;
|
||||
mblock_rom[3].mem_attribute = 1; //data is present
|
||||
|
||||
mblock_rom[4].firstAddr = 0x01001000;
|
||||
mblock_rom[4].lastAddr = 0x0100186F;
|
||||
mblock_rom[4].mem_attribute = 0; //data is NOT present
|
||||
|
||||
mblock_rom[5].firstAddr = 0x01001870;
|
||||
mblock_rom[5].lastAddr = 0x01001FFF;
|
||||
mblock_rom[5].mem_attribute = 1; //data is present
|
||||
|
||||
test_signature = (volatile unsigned long *)0x3f8000;
|
||||
alt_test_signature = (volatile unsigned long *)0x3ffffe;
|
||||
|
||||
//first check if all the data and address lines mapped to ROM are functional
|
||||
if (*(test_signature) != ~(*(alt_test_signature)))
|
||||
return 0xFFF3;
|
||||
|
||||
if ( 0xFFFF == calculate_composite_checksum_on_rom(&rom_cksum, &mblock_rom[0], 6))
|
||||
return 0xFFF2;
|
||||
|
||||
return compare_two_composite_checksums(&csum_rom, &rom_cksum);
|
||||
}
|
||||
|
||||
// EOF --------
|
||||
#endif //no stable compiler available
|
||||
+697
@@ -0,0 +1,697 @@
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 13, 2012 11:53:47 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: c1brom_interrupts.c
|
||||
//
|
||||
// TITLE: Boot ROM interrupt handlers
|
||||
//
|
||||
// Functions:
|
||||
//
|
||||
// Notes:
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F2837x Boot ROM Version 0 $
|
||||
// $Release Date: Oct 1, 2013 $
|
||||
//###########################################################################
|
||||
|
||||
#include "c1_bootrom.h"
|
||||
|
||||
void c1brom_init_pie_control(void);
|
||||
void c1brom_init_pie_vect_table(void);
|
||||
|
||||
void branch_to_entryaddress(Uint32 *entryaddress);
|
||||
void load_itrap_address (Uint32 *itrapaddress);
|
||||
|
||||
interrupt void c1brom_itrap_isr(void);
|
||||
interrupt void c1brom_c2c1_ipc_int1_isr(void);
|
||||
interrupt void c1brom_handle_nmi();
|
||||
void c1brom_pie_vect_mismatch_handler();
|
||||
|
||||
extern cur_c2c1_ipc_cmd_sts_t c1brom_current_c2c1_ipc;
|
||||
extern Uint32 c1brom_status;
|
||||
|
||||
volatile Uint16 c1brom_nmi_status;
|
||||
Uint32 iTrap_addr;
|
||||
|
||||
/*
|
||||
* Function to handle unsupported PIE interrupts in C-BootROM
|
||||
*/
|
||||
interrupt void c1brom_pie_isr_not_supported()
|
||||
{
|
||||
Uint16 interrupt_num = 0;
|
||||
Uint16 address_offset = 0;
|
||||
|
||||
//PIEVECT of PIECTRL register stores the vector address from the PIE vector table from which the vector was fetched.
|
||||
// (the vector address - base address of PIE vector table)/2 gives the interrupt vector ID
|
||||
address_offset = ((PieCtrlRegs.PIECTRL.all) & (0x00000000FE));
|
||||
interrupt_num = (address_offset >> 1);
|
||||
|
||||
// c1brom_send_ipc_to_master(C_BOOTROM_IPC_CTOM_PIE_INTERRUPT_NOT_SUPPORTED, 0, interrupt_num);
|
||||
|
||||
/*acknowledge the interrupt; don't have to ACK interrupt nos less than 32, its done automatically by interrupt return*/
|
||||
if(interrupt_num >= 32)
|
||||
{
|
||||
/*for PIE multiplexed interrupts INT1 to INT12*/
|
||||
PieCtrlRegs.PIEACK.all |= (0x01 << ((address_offset >> 4) - 4));
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
* Function to handle PIE vector mismatch handler in C-BootROM
|
||||
*/
|
||||
interrupt void c1brom_pie_vect_mismatch_handler()
|
||||
{
|
||||
|
||||
Uint32 EntryAddr = 0xFFFFFFFF;
|
||||
|
||||
|
||||
c1brom_status |= C1_BOOTROM_GOT_A_PIEMISMATCH;
|
||||
|
||||
EALLOW;
|
||||
EntryAddr = (CpuSysRegs.PIEVERRADDR.all);
|
||||
EDIS;
|
||||
|
||||
//commented out to allow debug
|
||||
// EntryAddr = TI_OTP_PIE_MISMATCH_HANDLER_EP;
|
||||
// if((EntryAddr != 0xFFFFFFFF) &&
|
||||
// (EntryAddr != 0x00000000))
|
||||
// {
|
||||
// /*do a dummy branch to OTP - if we later decide not to handler this the way done below*/
|
||||
// /*if OTP is programmed, then call OTP function*/
|
||||
// ((void (*)(void))EntryAddr)();
|
||||
// }
|
||||
|
||||
|
||||
if((EntryAddr != (uint32_t)0x003FFFFF))
|
||||
{
|
||||
((void (*)(void))EntryAddr)();
|
||||
}
|
||||
else
|
||||
{
|
||||
//No need to send this as the other core has already got the NMI
|
||||
// cbrom_send_ipc_to_master(C_BOOTROM_IPC_CTOM_PIE_VECTOR_ADDRESS_MISMATCH, 0, 0);
|
||||
|
||||
// cbrom_handle_nmi_for_pie_mismatch();
|
||||
|
||||
//let watchdog reset the system, if the error happened
|
||||
//not because of NMI fetch, else NMIWD will reset the device
|
||||
if(NmiIntruptRegs.NMIFLG.all == 0x0)
|
||||
{
|
||||
sysctl_wdog_enable();
|
||||
}
|
||||
|
||||
while(1);
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
* Function to handle NMI interrupts in C-BootROM
|
||||
*/
|
||||
void c1brom_handle_nmi_at_start()
|
||||
{
|
||||
uint32_t EntryAddr;
|
||||
|
||||
EntryAddr = TI_OTP_C1BROM_ESCAPE_POINT_10;
|
||||
|
||||
if((EntryAddr != 0xFFFFFFFF) &&
|
||||
(EntryAddr != 0x00000000))
|
||||
{
|
||||
/*do a dummy branch to OTP - if we later decide not to handler this the way done below*/
|
||||
/*if OTP is programmed, then call OTP function*/
|
||||
((void (*)(void))EntryAddr)();
|
||||
}
|
||||
|
||||
/*check if NMI is triggered*/
|
||||
c1brom_nmi_status = NmiIntruptRegs.NMIFLG.all;
|
||||
do
|
||||
{
|
||||
if(c1brom_nmi_status & NMI_INT_CLOCKFAIL) /*check for CLOCKFAIL_NMI*/
|
||||
{
|
||||
c1brom_status |= C1_BOOTROM_GOT_A_MCLK_NMI;
|
||||
c1brom_nmi_status &= ~(NMI_INT_CLOCKFAIL); /*clear bit 1*/
|
||||
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.CLOCKFAIL= 1;
|
||||
EDIS;
|
||||
|
||||
c1brom_nmi_status = NmiIntruptRegs.NMIFLG.all;
|
||||
|
||||
/*continue to run*/
|
||||
if((c1brom_nmi_status) == NMI_INT_FLG)
|
||||
{
|
||||
c1brom_nmi_status &= ~(NMI_INT_FLG); /*clear bit 0*/
|
||||
/* clear the NMIINT flag and return because there is no other NMI set*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.NMIINT = 1;
|
||||
EDIS;
|
||||
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
if(c1brom_nmi_status & NMI_INT_CPU1HWBISTERR) /*check for M3BISTERR NMI */
|
||||
{
|
||||
c1brom_status |= C1_BOOTROM_GOT_A_C1BISTERR_NMI;
|
||||
|
||||
c1brom_nmi_status &= ~(NMI_INT_CPU1HWBISTERR); /*clear bit 4*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.CPU1HWBISTERR = 1;
|
||||
EDIS;
|
||||
}
|
||||
|
||||
if(c1brom_nmi_status & NMI_INT_CPU2HWBISTERR) /*check for C28BISTERR NMI */
|
||||
{
|
||||
c1brom_status |= C1_BOOTROM_GOT_A_C2BISTERR_NMI;
|
||||
|
||||
c1brom_nmi_status &= ~(NMI_INT_CPU2HWBISTERR); /*clear bit 5*/
|
||||
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.CPU2HWBISTERR = 1;
|
||||
EDIS;
|
||||
|
||||
}
|
||||
if(c1brom_nmi_status & NMI_INT_PIEVECTERR) /*check for AERR NMI */
|
||||
{
|
||||
c1brom_status |= C1_BOOTROM_GOT_A_PIEVECTERR_NMI;
|
||||
|
||||
c1brom_nmi_status &= ~(NMI_INT_PIEVECTERR); /*clear bit 6*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.PIEVECTERR = 1;
|
||||
EDIS;
|
||||
}
|
||||
if(c1brom_nmi_status & NMI_INT_SYSDBG) /*check for PIEVECT NMI */
|
||||
{
|
||||
c1brom_status |= C1_BOOTROM_GOT_A_SYSDBG_NMI;
|
||||
|
||||
c1brom_nmi_status &= ~(NMI_INT_SYSDBG); /*clear bit 6*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.SYSDBGNMI = 1;
|
||||
EDIS;
|
||||
}
|
||||
if(c1brom_nmi_status & NMI_INT_RL) /*check for PIEVECT NMI */
|
||||
{
|
||||
c1brom_status |= C1_BOOTROM_GOT_A_RL_NMI;
|
||||
|
||||
c1brom_nmi_status &= ~(NMI_INT_RL); /*clear bit 6*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.RLNMI = 1;
|
||||
EDIS;
|
||||
}
|
||||
if(c1brom_nmi_status & NMI_INT_CPU2WDRST) /*check for PIEVECT NMI */
|
||||
{
|
||||
c1brom_status |= C1_BOOTROM_GOT_A_CPU2WDRST_NMI;
|
||||
|
||||
c1brom_nmi_status &= ~(NMI_INT_CPU2WDRST); /*clear bit 6*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.CPU2WDRSn = 1;
|
||||
EDIS;
|
||||
}
|
||||
|
||||
if(c1brom_nmi_status & NMI_INT_CPU2NMIWDRST) /*check for PIEVECT NMI */
|
||||
{
|
||||
c1brom_status |= C1_BOOTROM_GOT_A_CPU2WDRST_NMI;
|
||||
|
||||
c1brom_nmi_status &= ~(NMI_INT_CPU2NMIWDRST); /*clear bit 6*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.CPU2NMIWDRSn = 1;
|
||||
EDIS;
|
||||
}
|
||||
|
||||
if(c1brom_nmi_status & NMI_INT_OVF) /*check for PIEVECT NMI */
|
||||
{
|
||||
c1brom_status |= C1_BOOTROM_GOT_A_OVF_NMI;
|
||||
|
||||
c1brom_nmi_status &= ~(NMI_INT_OVF); /*clear bit 6*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.OVF = 1;
|
||||
EDIS;
|
||||
}
|
||||
|
||||
//there is a reason to check these two at the end
|
||||
//d owe really need to reset the device - can't it continue to boot?
|
||||
if(c1brom_nmi_status & NMI_INT_RAMUNCERR) /*check for C28RAMUNCERR NMI */
|
||||
{
|
||||
c1brom_status |= C1_BOOTROM_GOT_A_RAM_UNCERR_NMI;
|
||||
|
||||
//if debugger connected - give a chance to user to know the scenario
|
||||
asm(" ESTOP0");
|
||||
//let NMIWD reset the device
|
||||
while(1);
|
||||
|
||||
// c1brom_nmi_status &= ~(0x04); /*clear bit 2*/
|
||||
// EALLOW;
|
||||
// NmiIntruptRegs.NMIFLGCLR.bit.C28RAMUNCERR = 1;
|
||||
// EDIS;
|
||||
}
|
||||
if(c1brom_nmi_status & NMI_INT_FLUNCERR) /*check for C28FLUNCERR NMI */
|
||||
{
|
||||
c1brom_status |= C1_BOOTROM_GOT_A_FLASH_UNCERR_NMI;
|
||||
|
||||
//if debugger connected - give a chance to user to know the scenario
|
||||
asm(" ESTOP0");
|
||||
|
||||
//let NMIWD reset the device
|
||||
while(1);
|
||||
|
||||
// c1brom_nmi_status &= ~(0x08); /*clear bit 3*/
|
||||
// EALLOW;
|
||||
// NmiIntruptRegs.NMIFLGCLR.bit.C28FLUNCERR = 1;
|
||||
// EDIS;
|
||||
}
|
||||
|
||||
c1brom_nmi_status &= ~(0x01); /*clear bit 0*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.NMIINT = 1;
|
||||
EDIS;
|
||||
|
||||
c1brom_nmi_status = NmiIntruptRegs.NMIFLG.all;
|
||||
|
||||
}while(c1brom_nmi_status & 0x01); /*check for NMIINT bit - bit 0*/
|
||||
|
||||
// while(1);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Function to handle NMI interrupts in C-BootROM
|
||||
*/
|
||||
interrupt void c1brom_handle_nmi()
|
||||
{
|
||||
uint32_t EntryAddr;
|
||||
|
||||
EntryAddr = TI_OTP_C1BROM_ESCAPE_POINT_10;
|
||||
|
||||
if((EntryAddr != 0xFFFFFFFF) &&
|
||||
(EntryAddr != 0x00000000))
|
||||
{
|
||||
/*do a dummy branch to OTP - if we later decide not to handler this the way done below*/
|
||||
/*if OTP is programmed, then call OTP function*/
|
||||
((void (*)(void))EntryAddr)();
|
||||
}
|
||||
/*check if NMI is triggered*/
|
||||
c1brom_nmi_status = NmiIntruptRegs.NMIFLG.all;
|
||||
do
|
||||
{
|
||||
if(c1brom_nmi_status & NMI_INT_CLOCKFAIL) /*check for CLOCKFAIL_NMI*/
|
||||
{
|
||||
c1brom_status |= C1_BOOTROM_GOT_A_MCLK_NMI;
|
||||
c1brom_nmi_status &= ~(NMI_INT_CLOCKFAIL); /*clear bit 1*/
|
||||
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.CLOCKFAIL= 1;
|
||||
EDIS;
|
||||
|
||||
c1brom_nmi_status = NmiIntruptRegs.NMIFLG.all;
|
||||
|
||||
/*continue to run*/
|
||||
if((c1brom_nmi_status) == NMI_INT_FLG)
|
||||
{
|
||||
c1brom_nmi_status &= ~(NMI_INT_FLG); /*clear bit 0*/
|
||||
/* clear the NMIINT flag and return because there is no other NMI set*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.NMIINT = 1;
|
||||
EDIS;
|
||||
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
if(c1brom_nmi_status & NMI_INT_CPU1HWBISTERR) /*check for M3BISTERR NMI */
|
||||
{
|
||||
c1brom_status |= C1_BOOTROM_GOT_A_C1BISTERR_NMI;
|
||||
|
||||
c1brom_nmi_status &= ~(NMI_INT_CPU1HWBISTERR); /*clear bit 4*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.CPU1HWBISTERR = 1;
|
||||
EDIS;
|
||||
}
|
||||
|
||||
if(c1brom_nmi_status & NMI_INT_CPU2HWBISTERR) /*check for C28BISTERR NMI */
|
||||
{
|
||||
c1brom_status |= C1_BOOTROM_GOT_A_C2BISTERR_NMI;
|
||||
|
||||
c1brom_nmi_status &= ~(NMI_INT_CPU2HWBISTERR); /*clear bit 5*/
|
||||
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.CPU2HWBISTERR = 1;
|
||||
EDIS;
|
||||
|
||||
}
|
||||
if(c1brom_nmi_status & NMI_INT_PIEVECTERR) /*check for AERR NMI */
|
||||
{
|
||||
c1brom_status |= C1_BOOTROM_GOT_A_PIEVECTERR_NMI;
|
||||
|
||||
c1brom_nmi_status &= ~(NMI_INT_PIEVECTERR); /*clear bit 6*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.PIEVECTERR = 1;
|
||||
EDIS;
|
||||
}
|
||||
if(c1brom_nmi_status & NMI_INT_SYSDBG) /*check for PIEVECT NMI */
|
||||
{
|
||||
c1brom_status |= C1_BOOTROM_GOT_A_SYSDBG_NMI;
|
||||
|
||||
c1brom_nmi_status &= ~(NMI_INT_SYSDBG); /*clear bit 6*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.SYSDBGNMI = 1;
|
||||
EDIS;
|
||||
}
|
||||
if(c1brom_nmi_status & NMI_INT_RL) /*check for PIEVECT NMI */
|
||||
{
|
||||
c1brom_status |= C1_BOOTROM_GOT_A_RL_NMI;
|
||||
|
||||
c1brom_nmi_status &= ~(NMI_INT_RL); /*clear bit 6*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.RLNMI = 1;
|
||||
EDIS;
|
||||
}
|
||||
if(c1brom_nmi_status & NMI_INT_CPU2WDRST) /*check for PIEVECT NMI */
|
||||
{
|
||||
c1brom_status |= C1_BOOTROM_GOT_A_CPU2WDRST_NMI;
|
||||
|
||||
c1brom_nmi_status &= ~(NMI_INT_CPU2WDRST); /*clear bit 6*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.CPU2WDRSn = 1;
|
||||
EDIS;
|
||||
}
|
||||
|
||||
if(c1brom_nmi_status & NMI_INT_CPU2NMIWDRST) /*check for PIEVECT NMI */
|
||||
{
|
||||
c1brom_status |= C1_BOOTROM_GOT_A_CPU2WDRST_NMI;
|
||||
|
||||
c1brom_nmi_status &= ~(NMI_INT_CPU2NMIWDRST); /*clear bit 6*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.CPU2NMIWDRSn = 1;
|
||||
EDIS;
|
||||
}
|
||||
|
||||
if(c1brom_nmi_status & NMI_INT_OVF) /*check for PIEVECT NMI */
|
||||
{
|
||||
c1brom_status |= C1_BOOTROM_GOT_A_OVF_NMI;
|
||||
|
||||
c1brom_nmi_status &= ~(NMI_INT_OVF); /*clear bit 6*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.OVF = 1;
|
||||
EDIS;
|
||||
}
|
||||
|
||||
//there is a reason to check these two at the end
|
||||
//d owe really need to reset the device - can't it continue to boot?
|
||||
if(c1brom_nmi_status & NMI_INT_RAMUNCERR) /*check for C28RAMUNCERR NMI */
|
||||
{
|
||||
c1brom_status |= C1_BOOTROM_GOT_A_RAM_UNCERR_NMI;
|
||||
|
||||
//if debugger connected - give a chance to user to know the scenario
|
||||
asm(" ESTOP0");
|
||||
|
||||
//let NMIWD reset the device
|
||||
while(1);
|
||||
|
||||
// c1brom_nmi_status &= ~(0x04); /*clear bit 2*/
|
||||
// EALLOW;
|
||||
// NmiIntruptRegs.NMIFLGCLR.bit.C28RAMUNCERR = 1;
|
||||
// EDIS;
|
||||
}
|
||||
if(c1brom_nmi_status & NMI_INT_FLUNCERR) /*check for C28FLUNCERR NMI */
|
||||
{
|
||||
c1brom_status |= C1_BOOTROM_GOT_A_FLASH_UNCERR_NMI;
|
||||
|
||||
//if debugger connected - give a chance to user to know the scenario
|
||||
asm(" ESTOP0");
|
||||
|
||||
//let NMIWD reset the device
|
||||
while(1);
|
||||
|
||||
// c1brom_nmi_status &= ~(0x08); /*clear bit 3*/
|
||||
// EALLOW;
|
||||
// NmiIntruptRegs.NMIFLGCLR.bit.C28FLUNCERR = 1;
|
||||
// EDIS;
|
||||
}
|
||||
|
||||
c1brom_nmi_status &= ~(0x01); /*clear bit 0*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.NMIINT = 1;
|
||||
EDIS;
|
||||
|
||||
c1brom_nmi_status = NmiIntruptRegs.NMIFLG.all;
|
||||
|
||||
}while(c1brom_nmi_status & 0x01); /*check for NMIINT bit - bit 0*/
|
||||
|
||||
// while(1);
|
||||
}
|
||||
/*
|
||||
* Function called whenever an illegal interrupt occurs on B.C28X CPU
|
||||
*/
|
||||
interrupt void c1brom_itrap_isr(void)
|
||||
{
|
||||
|
||||
/*set boot status to indicate that B.C28X CPU is in iTRAP ISR, only a reset can pull it out of this*/
|
||||
c1brom_status |= C1_BOOTROM_IN_AN_ITRAP;
|
||||
|
||||
|
||||
|
||||
/*accessing the glob var locally -sets DP pointer for the below inline ASMs*/
|
||||
iTrap_addr = 0xFFFFFFFF;
|
||||
|
||||
/*get the iTrap address (return address from interrupt) stored in stack
|
||||
* This particular return address stored in stack will change according to
|
||||
* compiler optimizations,
|
||||
*/
|
||||
load_itrap_address (&iTrap_addr);
|
||||
|
||||
/*return address from interrupt will be PC location where illegal instruction is executed + 1*/
|
||||
iTrap_addr -= 1;
|
||||
|
||||
|
||||
/*send IPC to master system with iTrap address in ADDR register*/
|
||||
// c1brom_send_ipc_to_master(C_BOOTROM_IPC_CTOM_CONTROL_SYSTEM_IN_ITRAP, iTrap_addr, 0);
|
||||
sysctl_wdog_enable();
|
||||
|
||||
//if debugger connected - give a chance to user to know the scenario
|
||||
asm(" ESTOP0");
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*MTOCIPCINT1_isr()
|
||||
*
|
||||
* interrupt handler which handles all IPC commands from master system
|
||||
*
|
||||
*/
|
||||
|
||||
interrupt void c1brom_c2c1_ipc_int1_isr(void)
|
||||
{
|
||||
|
||||
/*check if IPC flags are set properly*/
|
||||
if(0 == C1BROM_CHECK_C2C1_IPC_COMMAND_FLAGS_SET)
|
||||
{
|
||||
/*if both IPC1 and IPC32 flags are not set then return NAK*/
|
||||
C1BROM_C2C1_IPC_COMMAND_NAK(c1brom_status | C1BROM_NAK_STATUS_CMD_NOT_SET_PROPERLY);
|
||||
|
||||
/*ACK PIE interrupt and return*/
|
||||
C1BROM_C2C1_IPC_INT1_ACK;
|
||||
return;
|
||||
}
|
||||
|
||||
/*see if C-BootROM is already busy processing another MTOCIPC command*/
|
||||
if((c1brom_current_c2c1_ipc.status != COMMAND_STATUS_INVALID) ||
|
||||
(c1brom_current_c2c1_ipc.command != C2C1_BROM_IPC_COMMAND_ILLEGAL))
|
||||
{
|
||||
//return NAK if busy
|
||||
C1BROM_C2C1_IPC_COMMAND_NAK(c1brom_status | C1BROM_NAK_STATUS_ALREADY_BUSY_WITH_YOUR_CMD);
|
||||
C1BROM_C2C1_IPC_INT1_ACK;
|
||||
return;
|
||||
}
|
||||
|
||||
//not busy, then get busy with current command
|
||||
c1brom_current_c2c1_ipc.command = IpcRegs.IPCRECVCOM;
|
||||
c1brom_current_c2c1_ipc.status = COMMAND_PENDING;
|
||||
|
||||
|
||||
/*boundary checks*/
|
||||
if((c1brom_current_c2c1_ipc.command == C2C1_BROM_IPC_COMMAND_ILLEGAL) ||
|
||||
(c1brom_current_c2c1_ipc.command >= C2C1_BROM_IPC_MAX_SUPPORT_VALUE))
|
||||
{
|
||||
c1brom_current_c2c1_ipc.command = C2C1_BROM_IPC_COMMAND_ILLEGAL;
|
||||
c1brom_current_c2c1_ipc.status = COMMAND_STATUS_INVALID;
|
||||
C1BROM_C2C1_IPC_COMMAND_NAK(c1brom_status | C1BROM_NAK_STATUS_CMD_NOT_SUPPORTED);
|
||||
C1BROM_C2C1_IPC_INT1_ACK; // PIE ack for intr group_11 (incl IPC_MTOC_1)
|
||||
return;
|
||||
}
|
||||
|
||||
//parse the command
|
||||
if(c1brom_current_c2c1_ipc.command == C2C1_BROM_IPC_SET_BITS_16)
|
||||
{
|
||||
c1brom_current_c2c1_ipc.status = c1brom_c2c1_ipc_set_bits_16();
|
||||
}
|
||||
else if (c1brom_current_c2c1_ipc.command == C2C1_BROM_IPC_SET_BITS_32)
|
||||
{
|
||||
c1brom_current_c2c1_ipc.status = c1brom_c2c1_ipc_set_bits_32();
|
||||
}
|
||||
else if (c1brom_current_c2c1_ipc.command == C2C1_BROM_IPC_CLEAR_BITS_16)
|
||||
{
|
||||
c1brom_current_c2c1_ipc.status = c1brom_c2c1_ipc_clear_bits_16();
|
||||
}
|
||||
else if (c1brom_current_c2c1_ipc.command == C2C1_BROM_IPC_CLEAR_BITS_32)
|
||||
{
|
||||
c1brom_current_c2c1_ipc.status = c1brom_c2c1_ipc_clear_bits_32();
|
||||
}
|
||||
else if (c1brom_current_c2c1_ipc.command == C2C1_BROM_IPC_DATA_WRITE_16)
|
||||
{
|
||||
c1brom_current_c2c1_ipc.status = c1brom_c2c1_ipc_write_data_16();
|
||||
}
|
||||
else if (c1brom_current_c2c1_ipc.command == C2C1_BROM_IPC_DATA_WRITE_32)
|
||||
{
|
||||
c1brom_current_c2c1_ipc.status = c1brom_c2c1_ipc_write_data_32();
|
||||
}
|
||||
else if (c1brom_current_c2c1_ipc.command == C2C1_BROM_IPC_DATA_READ_16)
|
||||
{
|
||||
c1brom_current_c2c1_ipc.status = c1brom_c2c1_ipc_read_data_16();
|
||||
}
|
||||
else if (c1brom_current_c2c1_ipc.command == C2C1_BROM_IPC_DATA_READ_32)
|
||||
{
|
||||
c1brom_current_c2c1_ipc.status = c1brom_c2c1_ipc_read_data_32();
|
||||
}
|
||||
else if (c1brom_current_c2c1_ipc.command == C2C1_BROM_IPC_SET_BITS_PROTECTED_16)
|
||||
{
|
||||
c1brom_current_c2c1_ipc.status = c1brom_c2c1_ipc_set_bits_protected_16();
|
||||
}
|
||||
else if (c1brom_current_c2c1_ipc.command == C2C1_BROM_IPC_SET_BITS_PROTECTED_32)
|
||||
{
|
||||
c1brom_current_c2c1_ipc.status = c1brom_c2c1_ipc_set_bits_protected_32();
|
||||
}
|
||||
else if (c1brom_current_c2c1_ipc.command == C2C1_BROM_IPC_CLEAR_BITS_PROTECTED_16)
|
||||
{
|
||||
c1brom_current_c2c1_ipc.status = c1brom_c2c1_ipc_clear_bits_protected_16();
|
||||
}
|
||||
else if (c1brom_current_c2c1_ipc.command == C2C1_BROM_IPC_CLEAR_BITS_PROTECTED_32)
|
||||
{
|
||||
c1brom_current_c2c1_ipc.status = c1brom_c2c1_ipc_clear_bits_protected_32();
|
||||
}
|
||||
else if (c1brom_current_c2c1_ipc.command == C2C1_BROM_IPC_DATA_WRITE_PROTECTED_16)
|
||||
{
|
||||
c1brom_current_c2c1_ipc.status = c1brom_c2c1_ipc_write_data_protected_16();
|
||||
}
|
||||
else if (c1brom_current_c2c1_ipc.command == C2C1_BROM_IPC_DATA_WRITE_PROTECTED_32)
|
||||
{
|
||||
c1brom_current_c2c1_ipc.status = c1brom_c2c1_ipc_write_data_protected_32();
|
||||
}
|
||||
else if (c1brom_current_c2c1_ipc.command == C2C1_BROM_IPC_DATA_READ_PROTECTED_16)
|
||||
{
|
||||
c1brom_current_c2c1_ipc.status = c1brom_c2c1_ipc_read_data_protected_16();
|
||||
}
|
||||
else if (c1brom_current_c2c1_ipc.command == C2C1_BROM_IPC_DATA_READ_PROTECTED_32)
|
||||
{
|
||||
c1brom_current_c2c1_ipc.status = c1brom_c2c1_ipc_read_data_protected_32();
|
||||
}
|
||||
else
|
||||
{
|
||||
c1brom_current_c2c1_ipc.status = COMMAND_COMPLETE_FAILURE;
|
||||
}
|
||||
|
||||
//handle command complete
|
||||
if(COMMAND_COMPLETE_SUCCESS == c1brom_current_c2c1_ipc.status)
|
||||
{
|
||||
c1brom_current_c2c1_ipc.command = C2C1_BROM_IPC_COMMAND_ILLEGAL;
|
||||
c1brom_current_c2c1_ipc.status = COMMAND_STATUS_INVALID;
|
||||
C1BROM_C2C1_IPC_COMMAND_ACK;
|
||||
C1BROM_C2C1_IPC_INT1_ACK; // PIE ack for intr group_11 (incl IPC_MTOC_1)
|
||||
}
|
||||
else /*command failure*/
|
||||
{
|
||||
c1brom_current_c2c1_ipc.command = C2C1_BROM_IPC_COMMAND_ILLEGAL;
|
||||
c1brom_current_c2c1_ipc.status = COMMAND_STATUS_INVALID;
|
||||
C1BROM_C2C1_IPC_COMMAND_NAK(c1brom_status | C1BROM_NAK_STATUS_CMD_NOT_SUPPORTED);
|
||||
C1BROM_C2C1_IPC_INT1_ACK; // PIE ack for intr group_11 (incl IPC_MTOC_1)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
// InitPieVectTable:
|
||||
//---------------------------------------------------------------------------
|
||||
// This function initializes the PIE vector table to a known state.
|
||||
// This function must be executed after boot time.
|
||||
//
|
||||
|
||||
void c1brom_init_pie_vect_table(void)
|
||||
{
|
||||
int16 i;
|
||||
Uint32 *Dest = (void *) &PieVectTable;
|
||||
|
||||
i = sizeof(struct PIE_VECT_TABLE);
|
||||
i -= 3;
|
||||
Dest = Dest + 3;
|
||||
|
||||
EALLOW;
|
||||
for(; i > 0; i--)
|
||||
{
|
||||
*Dest++ = (Uint32)&c1brom_pie_isr_not_supported;
|
||||
}
|
||||
EDIS;
|
||||
|
||||
// Enable the PIE Vector Table
|
||||
PieCtrlRegs.PIECTRL.bit.ENPIE = 1;
|
||||
|
||||
}
|
||||
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
// InitPieCtrl:
|
||||
//---------------------------------------------------------------------------
|
||||
// This function initializes the PIE control registers to a known state.
|
||||
//
|
||||
void c1brom_init_pie_control(void)
|
||||
{
|
||||
// Disable Interrupts at the CPU level:
|
||||
DINT;
|
||||
|
||||
// Disable the PIE
|
||||
PieCtrlRegs.PIECTRL.bit.ENPIE = 0;
|
||||
|
||||
// Clear all PIEIER registers:
|
||||
PieCtrlRegs.PIEIER1.all = 0;
|
||||
PieCtrlRegs.PIEIER2.all = 0;
|
||||
PieCtrlRegs.PIEIER3.all = 0;
|
||||
PieCtrlRegs.PIEIER4.all = 0;
|
||||
PieCtrlRegs.PIEIER5.all = 0;
|
||||
PieCtrlRegs.PIEIER6.all = 0;
|
||||
PieCtrlRegs.PIEIER7.all = 0;
|
||||
PieCtrlRegs.PIEIER8.all = 0;
|
||||
PieCtrlRegs.PIEIER9.all = 0;
|
||||
PieCtrlRegs.PIEIER10.all = 0;
|
||||
PieCtrlRegs.PIEIER11.all = 0;
|
||||
PieCtrlRegs.PIEIER12.all = 0;
|
||||
|
||||
// Clear all PIEIFR registers:
|
||||
PieCtrlRegs.PIEIFR1.all = 0;
|
||||
PieCtrlRegs.PIEIFR2.all = 0;
|
||||
PieCtrlRegs.PIEIFR3.all = 0;
|
||||
PieCtrlRegs.PIEIFR4.all = 0;
|
||||
PieCtrlRegs.PIEIFR5.all = 0;
|
||||
PieCtrlRegs.PIEIFR6.all = 0;
|
||||
PieCtrlRegs.PIEIFR7.all = 0;
|
||||
PieCtrlRegs.PIEIFR8.all = 0;
|
||||
PieCtrlRegs.PIEIFR9.all = 0;
|
||||
PieCtrlRegs.PIEIFR10.all = 0;
|
||||
PieCtrlRegs.PIEIFR11.all = 0;
|
||||
PieCtrlRegs.PIEIFR12.all = 0;
|
||||
|
||||
// Enable the PIE
|
||||
PieCtrlRegs.PIECTRL.bit.ENPIE = 1;
|
||||
|
||||
// Enables PIE to drive a pulse into the CPU
|
||||
PieCtrlRegs.PIEACK.all = 0xFFFF;
|
||||
|
||||
// Enable Interrupts at the CPU level
|
||||
EINT;
|
||||
|
||||
}
|
||||
//===========================================================================
|
||||
// End of file.
|
||||
//===========================================================================
|
||||
|
||||
|
||||
+225
@@ -0,0 +1,225 @@
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 13, 2012 11:53:49 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: ccore_bootrom_ipc_commands.c
|
||||
//
|
||||
// TITLE: C-BootROM ipc commands utility function
|
||||
//
|
||||
// Functions:
|
||||
//
|
||||
// Notes:
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F2837x Boot ROM Version 0 $
|
||||
// $Release Date: Oct 1, 2013 $
|
||||
//###########################################################################
|
||||
|
||||
#include "c1_bootrom.h"
|
||||
|
||||
/*function prototypes*/
|
||||
command_status_t c1brom_c2c1_ipc_set_bits_16(void);
|
||||
command_status_t c1brom_c2c1_ipc_set_bits_32(void);
|
||||
command_status_t c1brom_c2c1_ipc_clear_bits_16(void);
|
||||
command_status_t c1brom_c2c1_ipc_clear_bits_32(void);
|
||||
command_status_t c1brom_c2c1_ipc_write_data_16(void);
|
||||
command_status_t c1brom_c2c1_ipc_write_data_32(void);
|
||||
command_status_t c1brom_c2c1_ipc_read_data_16(void);
|
||||
command_status_t c1brom_c2c1_ipc_read_data_32(void);
|
||||
|
||||
command_status_t c1brom_c2c1_ipc_set_bits_protected_16(void);
|
||||
command_status_t c1brom_c2c1_ipc_set_bits_protected_32(void);
|
||||
command_status_t c1brom_c2c1_ipc_clear_bits_protected_16(void);
|
||||
command_status_t c1brom_c2c1_ipc_clear_bits_protected_32(void);
|
||||
command_status_t c1brom_c2c1_ipc_write_data_protected_16(void);
|
||||
command_status_t c1brom_c2c1_ipc_write_data_protected_32(void);
|
||||
command_status_t c1brom_c2c1_ipc_read_data_protected_16(void);
|
||||
command_status_t c1brom_c2c1_ipc_read_data_protected_32(void);
|
||||
|
||||
extern uint32_t c1brom_status;
|
||||
|
||||
/****************************************************************************************
|
||||
*
|
||||
* Functions to handle C2C1 IPC commands
|
||||
*
|
||||
***************************************************************************************/
|
||||
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_SET_BITS_16 command
|
||||
*/
|
||||
|
||||
command_status_t c1brom_c2c1_ipc_set_bits_16(void)
|
||||
{
|
||||
*((uint16_t *)(IpcRegs.IPCRECVADDR)) |= (uint16_t)(IpcRegs.IPCRECVDATA);
|
||||
IpcRegs.IPCLOCALREPLY = *((uint16_t *)(IpcRegs.IPCRECVADDR));
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_SET_BITS_32 command
|
||||
*/
|
||||
|
||||
command_status_t c1brom_c2c1_ipc_set_bits_32(void)
|
||||
{
|
||||
*((Uint32 *)(IpcRegs.IPCRECVADDR)) |= (Uint32)(IpcRegs.IPCRECVDATA);
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint32 *)(IpcRegs.IPCRECVADDR));
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_CLEAR_BITS_16 command
|
||||
*/
|
||||
|
||||
command_status_t c1brom_c2c1_ipc_clear_bits_16(void)
|
||||
{
|
||||
*((Uint16 *)(IpcRegs.IPCRECVADDR)) &= (Uint16)(~(IpcRegs.IPCRECVDATA));
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint16 *)(IpcRegs.IPCRECVADDR));
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_CLEAR_BITS_32 command
|
||||
*/
|
||||
command_status_t c1brom_c2c1_ipc_clear_bits_32(void)
|
||||
{
|
||||
*((Uint32 *)(IpcRegs.IPCRECVADDR)) &= (Uint32)(~(IpcRegs.IPCRECVDATA));
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint32 *)(IpcRegs.IPCRECVADDR));
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_DATA_WRITE_16 command
|
||||
*/
|
||||
command_status_t c1brom_c2c1_ipc_write_data_16(void)
|
||||
{
|
||||
*((Uint16 *)(IpcRegs.IPCRECVADDR)) = (Uint16)(IpcRegs.IPCRECVDATA);
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint16 *)(IpcRegs.IPCRECVADDR));
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_DATA_WRITE_32 command
|
||||
*/
|
||||
command_status_t c1brom_c2c1_ipc_write_data_32(void)
|
||||
{
|
||||
*((Uint32 *)(IpcRegs.IPCRECVADDR)) = (Uint32)(IpcRegs.IPCRECVDATA);
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint32 *)(IpcRegs.IPCRECVADDR));
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_DATA_READ_16 command
|
||||
*/
|
||||
command_status_t c1brom_c2c1_ipc_read_data_16(void)
|
||||
{
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint16 *)(IpcRegs.IPCRECVADDR));
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_DATA_READ_32 command
|
||||
*/
|
||||
command_status_t c1brom_c2c1_ipc_read_data_32(void)
|
||||
{
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint32 *)(IpcRegs.IPCRECVADDR));
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_SET_BITS_PROTECTED_16 command
|
||||
*/
|
||||
command_status_t c1brom_c2c1_ipc_set_bits_protected_16(void)
|
||||
{
|
||||
EALLOW;
|
||||
*((Uint16 *)(IpcRegs.IPCRECVADDR)) |= (Uint16)IpcRegs.IPCRECVDATA;
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint16 *)(IpcRegs.IPCRECVADDR));
|
||||
EDIS;
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_SET_BITS_PROTECTED_32 command
|
||||
*/
|
||||
command_status_t c1brom_c2c1_ipc_set_bits_protected_32(void)
|
||||
{
|
||||
EALLOW;
|
||||
*((Uint32 *)(IpcRegs.IPCRECVADDR)) |= (Uint32)IpcRegs.IPCRECVDATA;
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint32 *)(IpcRegs.IPCRECVADDR));
|
||||
EDIS;
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_CLEAR_BITS_PROTECTED_16 command
|
||||
*/
|
||||
command_status_t c1brom_c2c1_ipc_clear_bits_protected_16(void)
|
||||
{
|
||||
EALLOW;
|
||||
*((Uint16 *)(IpcRegs.IPCRECVADDR)) &= (Uint16)(~(IpcRegs.IPCRECVDATA));
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint16 *)(IpcRegs.IPCRECVADDR));
|
||||
EDIS;
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_CLEAR_BITS_PROTECTED_32 command
|
||||
*/
|
||||
command_status_t c1brom_c2c1_ipc_clear_bits_protected_32(void)
|
||||
{
|
||||
EALLOW;
|
||||
*((Uint32 *)(IpcRegs.IPCRECVADDR)) &= (Uint32)(~(IpcRegs.IPCRECVDATA));
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint32 *)(IpcRegs.IPCRECVADDR));
|
||||
EDIS;
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_DATA_WRITE_PROTECTED_16 command
|
||||
*/
|
||||
command_status_t c1brom_c2c1_ipc_write_data_protected_16(void)
|
||||
{
|
||||
EALLOW;
|
||||
*((Uint16 *)(IpcRegs.IPCRECVADDR)) = (Uint16)(IpcRegs.IPCRECVDATA);
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint16 *)(IpcRegs.IPCRECVADDR));
|
||||
EDIS;
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_DATA_WRITE_PROTECTED_32 command
|
||||
*/
|
||||
command_status_t c1brom_c2c1_ipc_write_data_protected_32(void)
|
||||
{
|
||||
EALLOW;
|
||||
*((Uint32 *)(IpcRegs.IPCRECVADDR)) = (Uint32)(IpcRegs.IPCRECVDATA);
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint32 *)(IpcRegs.IPCRECVADDR));
|
||||
EDIS;
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_DATA_READ_PROTECTED_16 command
|
||||
*/
|
||||
command_status_t c1brom_c2c1_ipc_read_data_protected_16(void)
|
||||
{
|
||||
EALLOW;
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint16 *)(IpcRegs.IPCRECVADDR));
|
||||
EDIS;
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_DATA_READ_PROTECTED_32 command
|
||||
*/
|
||||
command_status_t c1brom_c2c1_ipc_read_data_protected_32(void)
|
||||
{
|
||||
EALLOW;
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint32 *)(IpcRegs.IPCRECVADDR));
|
||||
EDIS;
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
+44
@@ -0,0 +1,44 @@
|
||||
;; TI File $Revision: /main/1 $
|
||||
;; Checkin $Date: August 13, 2012 11:53:45 $
|
||||
;;###########################################################################
|
||||
;;
|
||||
;; FILE: cbrom_utility_functions.asm
|
||||
;;
|
||||
;; TITLE: Boot Rom C callable assembly utility functions.
|
||||
;;
|
||||
;; Functions:
|
||||
;;
|
||||
;;
|
||||
;; Notes:
|
||||
;;
|
||||
;;###########################################################################
|
||||
;; $TI Release: F2837x Boot ROM Version 0 $
|
||||
;; $Release Date: Oct 1, 2013 $
|
||||
;;###########################################################################
|
||||
|
||||
.global _branch_to_entryaddress
|
||||
.global _load_itrap_address
|
||||
|
||||
; C-calling convention: branch_to_entryaddress (unsigned long *entryaddress)
|
||||
; Parameter is stored in XAR4
|
||||
; Function moves the Entry Address into the ISR return from address on the stack
|
||||
|
||||
_branch_to_entryaddress:
|
||||
|
||||
MOVL ACC, *XAR4 ; load ACC with the desired branch address
|
||||
MOVL *-SP[30], ACC ; move branch address to cbrom_mtoc_ipc_int1_isr return address on stack
|
||||
LRETR
|
||||
|
||||
; C-calling convention: load_itrap_address (unsigned long *itrapaddress)
|
||||
; Parameter is stored in XAR4
|
||||
; Function loads the address where the ITRAP occurred stored from the stack and
|
||||
; into the address pointed to by the itrapaddress pointer.
|
||||
; The stack location where the ITRAP return address is stored on the stack will change
|
||||
; according to compiler optimizations, The below value is without any optimizations -
|
||||
; if the code uses optimizations please re-check the below value
|
||||
;
|
||||
|
||||
_load_itrap_address:
|
||||
MOVL ACC, *-SP[30]; ; load ITRAP address location on stack into ACC
|
||||
MOVL *XAR4, ACC ; return ITRAP address back to calling function
|
||||
LRETR
|
||||
BIN
Binary file not shown.
+3
@@ -0,0 +1,3 @@
|
||||
|
||||
|
||||
-u _ti_sysbios_BIOS_setThreadType__E
|
||||
+733
@@ -0,0 +1,733 @@
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 13, 2012 11:54:04 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: mac_plc.c
|
||||
//
|
||||
// TITLE: PLC Tables
|
||||
//
|
||||
// DESCRIPTION:
|
||||
// This file contains functions relevant to MAC PLC features
|
||||
//
|
||||
// Copyright (c) 2009 Texas Instruments Inc.
|
||||
// All Rights Reserved This program is the confidential and proprietary
|
||||
// product of Texas Instruments Inc. Any Unauthorized use, reproduction or
|
||||
// transfer of this program is strictly prohibited.
|
||||
//
|
||||
// HISTORY:
|
||||
//
|
||||
//
|
||||
// LIST OF FUNCTION PROTOTYPES:
|
||||
//
|
||||
//
|
||||
// Notes:
|
||||
//
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F2837x Boot ROM Version 0 $
|
||||
// $Release Date: Oct 1, 2013 $
|
||||
//###########################################################################
|
||||
|
||||
#include "c1_bootrom.h"
|
||||
|
||||
|
||||
#define uint32 const Uint32
|
||||
|
||||
/*===========================================================================
|
||||
STATIC TABLE DEFINATIONS
|
||||
===========================================================================*/
|
||||
#pragma DATA_SECTION(Te0,"PLC_TABLE");
|
||||
#pragma DATA_SECTION(Te1,"PLC_TABLE");
|
||||
#pragma DATA_SECTION(Te2,"PLC_TABLE");
|
||||
#pragma DATA_SECTION(Te3,"PLC_TABLE");
|
||||
#pragma DATA_SECTION(Te4,"PLC_TABLE");
|
||||
|
||||
#pragma DATA_SECTION(Td0,"PLC_TABLE");
|
||||
#pragma DATA_SECTION(Td1,"PLC_TABLE");
|
||||
#pragma DATA_SECTION(Td2,"PLC_TABLE");
|
||||
#pragma DATA_SECTION(Td3,"PLC_TABLE");
|
||||
#pragma DATA_SECTION(Td4,"PLC_TABLE");
|
||||
|
||||
uint32 Te0[256] =
|
||||
{
|
||||
0xc66363a5U, 0xf87c7c84U, 0xee777799U, 0xf67b7b8dU,
|
||||
0xfff2f20dU, 0xd66b6bbdU, 0xde6f6fb1U, 0x91c5c554U,
|
||||
0x60303050U, 0x02010103U, 0xce6767a9U, 0x562b2b7dU,
|
||||
0xe7fefe19U, 0xb5d7d762U, 0x4dababe6U, 0xec76769aU,
|
||||
0x8fcaca45U, 0x1f82829dU, 0x89c9c940U, 0xfa7d7d87U,
|
||||
0xeffafa15U, 0xb25959ebU, 0x8e4747c9U, 0xfbf0f00bU,
|
||||
0x41adadecU, 0xb3d4d467U, 0x5fa2a2fdU, 0x45afafeaU,
|
||||
0x239c9cbfU, 0x53a4a4f7U, 0xe4727296U, 0x9bc0c05bU,
|
||||
0x75b7b7c2U, 0xe1fdfd1cU, 0x3d9393aeU, 0x4c26266aU,
|
||||
0x6c36365aU, 0x7e3f3f41U, 0xf5f7f702U, 0x83cccc4fU,
|
||||
0x6834345cU, 0x51a5a5f4U, 0xd1e5e534U, 0xf9f1f108U,
|
||||
0xe2717193U, 0xabd8d873U, 0x62313153U, 0x2a15153fU,
|
||||
0x0804040cU, 0x95c7c752U, 0x46232365U, 0x9dc3c35eU,
|
||||
0x30181828U, 0x379696a1U, 0x0a05050fU, 0x2f9a9ab5U,
|
||||
0x0e070709U, 0x24121236U, 0x1b80809bU, 0xdfe2e23dU,
|
||||
0xcdebeb26U, 0x4e272769U, 0x7fb2b2cdU, 0xea75759fU,
|
||||
0x1209091bU, 0x1d83839eU, 0x582c2c74U, 0x341a1a2eU,
|
||||
0x361b1b2dU, 0xdc6e6eb2U, 0xb45a5aeeU, 0x5ba0a0fbU,
|
||||
0xa45252f6U, 0x763b3b4dU, 0xb7d6d661U, 0x7db3b3ceU,
|
||||
0x5229297bU, 0xdde3e33eU, 0x5e2f2f71U, 0x13848497U,
|
||||
0xa65353f5U, 0xb9d1d168U, 0x00000000U, 0xc1eded2cU,
|
||||
0x40202060U, 0xe3fcfc1fU, 0x79b1b1c8U, 0xb65b5bedU,
|
||||
0xd46a6abeU, 0x8dcbcb46U, 0x67bebed9U, 0x7239394bU,
|
||||
0x944a4adeU, 0x984c4cd4U, 0xb05858e8U, 0x85cfcf4aU,
|
||||
0xbbd0d06bU, 0xc5efef2aU, 0x4faaaae5U, 0xedfbfb16U,
|
||||
0x864343c5U, 0x9a4d4dd7U, 0x66333355U, 0x11858594U,
|
||||
0x8a4545cfU, 0xe9f9f910U, 0x04020206U, 0xfe7f7f81U,
|
||||
0xa05050f0U, 0x783c3c44U, 0x259f9fbaU, 0x4ba8a8e3U,
|
||||
0xa25151f3U, 0x5da3a3feU, 0x804040c0U, 0x058f8f8aU,
|
||||
0x3f9292adU, 0x219d9dbcU, 0x70383848U, 0xf1f5f504U,
|
||||
0x63bcbcdfU, 0x77b6b6c1U, 0xafdada75U, 0x42212163U,
|
||||
0x20101030U, 0xe5ffff1aU, 0xfdf3f30eU, 0xbfd2d26dU,
|
||||
0x81cdcd4cU, 0x180c0c14U, 0x26131335U, 0xc3ecec2fU,
|
||||
0xbe5f5fe1U, 0x359797a2U, 0x884444ccU, 0x2e171739U,
|
||||
0x93c4c457U, 0x55a7a7f2U, 0xfc7e7e82U, 0x7a3d3d47U,
|
||||
0xc86464acU, 0xba5d5de7U, 0x3219192bU, 0xe6737395U,
|
||||
0xc06060a0U, 0x19818198U, 0x9e4f4fd1U, 0xa3dcdc7fU,
|
||||
0x44222266U, 0x542a2a7eU, 0x3b9090abU, 0x0b888883U,
|
||||
0x8c4646caU, 0xc7eeee29U, 0x6bb8b8d3U, 0x2814143cU,
|
||||
0xa7dede79U, 0xbc5e5ee2U, 0x160b0b1dU, 0xaddbdb76U,
|
||||
0xdbe0e03bU, 0x64323256U, 0x743a3a4eU, 0x140a0a1eU,
|
||||
0x924949dbU, 0x0c06060aU, 0x4824246cU, 0xb85c5ce4U,
|
||||
0x9fc2c25dU, 0xbdd3d36eU, 0x43acacefU, 0xc46262a6U,
|
||||
0x399191a8U, 0x319595a4U, 0xd3e4e437U, 0xf279798bU,
|
||||
0xd5e7e732U, 0x8bc8c843U, 0x6e373759U, 0xda6d6db7U,
|
||||
0x018d8d8cU, 0xb1d5d564U, 0x9c4e4ed2U, 0x49a9a9e0U,
|
||||
0xd86c6cb4U, 0xac5656faU, 0xf3f4f407U, 0xcfeaea25U,
|
||||
0xca6565afU, 0xf47a7a8eU, 0x47aeaee9U, 0x10080818U,
|
||||
0x6fbabad5U, 0xf0787888U, 0x4a25256fU, 0x5c2e2e72U,
|
||||
0x381c1c24U, 0x57a6a6f1U, 0x73b4b4c7U, 0x97c6c651U,
|
||||
0xcbe8e823U, 0xa1dddd7cU, 0xe874749cU, 0x3e1f1f21U,
|
||||
0x964b4bddU, 0x61bdbddcU, 0x0d8b8b86U, 0x0f8a8a85U,
|
||||
0xe0707090U, 0x7c3e3e42U, 0x71b5b5c4U, 0xcc6666aaU,
|
||||
0x904848d8U, 0x06030305U, 0xf7f6f601U, 0x1c0e0e12U,
|
||||
0xc26161a3U, 0x6a35355fU, 0xae5757f9U, 0x69b9b9d0U,
|
||||
0x17868691U, 0x99c1c158U, 0x3a1d1d27U, 0x279e9eb9U,
|
||||
0xd9e1e138U, 0xebf8f813U, 0x2b9898b3U, 0x22111133U,
|
||||
0xd26969bbU, 0xa9d9d970U, 0x078e8e89U, 0x339494a7U,
|
||||
0x2d9b9bb6U, 0x3c1e1e22U, 0x15878792U, 0xc9e9e920U,
|
||||
0x87cece49U, 0xaa5555ffU, 0x50282878U, 0xa5dfdf7aU,
|
||||
0x038c8c8fU, 0x59a1a1f8U, 0x09898980U, 0x1a0d0d17U,
|
||||
0x65bfbfdaU, 0xd7e6e631U, 0x844242c6U, 0xd06868b8U,
|
||||
0x824141c3U, 0x299999b0U, 0x5a2d2d77U, 0x1e0f0f11U,
|
||||
0x7bb0b0cbU, 0xa85454fcU, 0x6dbbbbd6U, 0x2c16163aU,
|
||||
};
|
||||
|
||||
uint32 Te1[256] =
|
||||
{
|
||||
0xa5c66363U, 0x84f87c7cU, 0x99ee7777U, 0x8df67b7bU,
|
||||
0x0dfff2f2U, 0xbdd66b6bU, 0xb1de6f6fU, 0x5491c5c5U,
|
||||
0x50603030U, 0x03020101U, 0xa9ce6767U, 0x7d562b2bU,
|
||||
0x19e7fefeU, 0x62b5d7d7U, 0xe64dababU, 0x9aec7676U,
|
||||
0x458fcacaU, 0x9d1f8282U, 0x4089c9c9U, 0x87fa7d7dU,
|
||||
0x15effafaU, 0xebb25959U, 0xc98e4747U, 0x0bfbf0f0U,
|
||||
0xec41adadU, 0x67b3d4d4U, 0xfd5fa2a2U, 0xea45afafU,
|
||||
0xbf239c9cU, 0xf753a4a4U, 0x96e47272U, 0x5b9bc0c0U,
|
||||
0xc275b7b7U, 0x1ce1fdfdU, 0xae3d9393U, 0x6a4c2626U,
|
||||
0x5a6c3636U, 0x417e3f3fU, 0x02f5f7f7U, 0x4f83ccccU,
|
||||
0x5c683434U, 0xf451a5a5U, 0x34d1e5e5U, 0x08f9f1f1U,
|
||||
0x93e27171U, 0x73abd8d8U, 0x53623131U, 0x3f2a1515U,
|
||||
0x0c080404U, 0x5295c7c7U, 0x65462323U, 0x5e9dc3c3U,
|
||||
0x28301818U, 0xa1379696U, 0x0f0a0505U, 0xb52f9a9aU,
|
||||
0x090e0707U, 0x36241212U, 0x9b1b8080U, 0x3ddfe2e2U,
|
||||
0x26cdebebU, 0x694e2727U, 0xcd7fb2b2U, 0x9fea7575U,
|
||||
0x1b120909U, 0x9e1d8383U, 0x74582c2cU, 0x2e341a1aU,
|
||||
0x2d361b1bU, 0xb2dc6e6eU, 0xeeb45a5aU, 0xfb5ba0a0U,
|
||||
0xf6a45252U, 0x4d763b3bU, 0x61b7d6d6U, 0xce7db3b3U,
|
||||
0x7b522929U, 0x3edde3e3U, 0x715e2f2fU, 0x97138484U,
|
||||
0xf5a65353U, 0x68b9d1d1U, 0x00000000U, 0x2cc1ededU,
|
||||
0x60402020U, 0x1fe3fcfcU, 0xc879b1b1U, 0xedb65b5bU,
|
||||
0xbed46a6aU, 0x468dcbcbU, 0xd967bebeU, 0x4b723939U,
|
||||
0xde944a4aU, 0xd4984c4cU, 0xe8b05858U, 0x4a85cfcfU,
|
||||
0x6bbbd0d0U, 0x2ac5efefU, 0xe54faaaaU, 0x16edfbfbU,
|
||||
0xc5864343U, 0xd79a4d4dU, 0x55663333U, 0x94118585U,
|
||||
0xcf8a4545U, 0x10e9f9f9U, 0x06040202U, 0x81fe7f7fU,
|
||||
0xf0a05050U, 0x44783c3cU, 0xba259f9fU, 0xe34ba8a8U,
|
||||
0xf3a25151U, 0xfe5da3a3U, 0xc0804040U, 0x8a058f8fU,
|
||||
0xad3f9292U, 0xbc219d9dU, 0x48703838U, 0x04f1f5f5U,
|
||||
0xdf63bcbcU, 0xc177b6b6U, 0x75afdadaU, 0x63422121U,
|
||||
0x30201010U, 0x1ae5ffffU, 0x0efdf3f3U, 0x6dbfd2d2U,
|
||||
0x4c81cdcdU, 0x14180c0cU, 0x35261313U, 0x2fc3ececU,
|
||||
0xe1be5f5fU, 0xa2359797U, 0xcc884444U, 0x392e1717U,
|
||||
0x5793c4c4U, 0xf255a7a7U, 0x82fc7e7eU, 0x477a3d3dU,
|
||||
0xacc86464U, 0xe7ba5d5dU, 0x2b321919U, 0x95e67373U,
|
||||
0xa0c06060U, 0x98198181U, 0xd19e4f4fU, 0x7fa3dcdcU,
|
||||
0x66442222U, 0x7e542a2aU, 0xab3b9090U, 0x830b8888U,
|
||||
0xca8c4646U, 0x29c7eeeeU, 0xd36bb8b8U, 0x3c281414U,
|
||||
0x79a7dedeU, 0xe2bc5e5eU, 0x1d160b0bU, 0x76addbdbU,
|
||||
0x3bdbe0e0U, 0x56643232U, 0x4e743a3aU, 0x1e140a0aU,
|
||||
0xdb924949U, 0x0a0c0606U, 0x6c482424U, 0xe4b85c5cU,
|
||||
0x5d9fc2c2U, 0x6ebdd3d3U, 0xef43acacU, 0xa6c46262U,
|
||||
0xa8399191U, 0xa4319595U, 0x37d3e4e4U, 0x8bf27979U,
|
||||
0x32d5e7e7U, 0x438bc8c8U, 0x596e3737U, 0xb7da6d6dU,
|
||||
0x8c018d8dU, 0x64b1d5d5U, 0xd29c4e4eU, 0xe049a9a9U,
|
||||
0xb4d86c6cU, 0xfaac5656U, 0x07f3f4f4U, 0x25cfeaeaU,
|
||||
0xafca6565U, 0x8ef47a7aU, 0xe947aeaeU, 0x18100808U,
|
||||
0xd56fbabaU, 0x88f07878U, 0x6f4a2525U, 0x725c2e2eU,
|
||||
0x24381c1cU, 0xf157a6a6U, 0xc773b4b4U, 0x5197c6c6U,
|
||||
0x23cbe8e8U, 0x7ca1ddddU, 0x9ce87474U, 0x213e1f1fU,
|
||||
0xdd964b4bU, 0xdc61bdbdU, 0x860d8b8bU, 0x850f8a8aU,
|
||||
0x90e07070U, 0x427c3e3eU, 0xc471b5b5U, 0xaacc6666U,
|
||||
0xd8904848U, 0x05060303U, 0x01f7f6f6U, 0x121c0e0eU,
|
||||
0xa3c26161U, 0x5f6a3535U, 0xf9ae5757U, 0xd069b9b9U,
|
||||
0x91178686U, 0x5899c1c1U, 0x273a1d1dU, 0xb9279e9eU,
|
||||
0x38d9e1e1U, 0x13ebf8f8U, 0xb32b9898U, 0x33221111U,
|
||||
0xbbd26969U, 0x70a9d9d9U, 0x89078e8eU, 0xa7339494U,
|
||||
0xb62d9b9bU, 0x223c1e1eU, 0x92158787U, 0x20c9e9e9U,
|
||||
0x4987ceceU, 0xffaa5555U, 0x78502828U, 0x7aa5dfdfU,
|
||||
0x8f038c8cU, 0xf859a1a1U, 0x80098989U, 0x171a0d0dU,
|
||||
0xda65bfbfU, 0x31d7e6e6U, 0xc6844242U, 0xb8d06868U,
|
||||
0xc3824141U, 0xb0299999U, 0x775a2d2dU, 0x111e0f0fU,
|
||||
0xcb7bb0b0U, 0xfca85454U, 0xd66dbbbbU, 0x3a2c1616U,
|
||||
};
|
||||
|
||||
uint32 Te2[256] =
|
||||
{
|
||||
0x63a5c663U, 0x7c84f87cU, 0x7799ee77U, 0x7b8df67bU,
|
||||
0xf20dfff2U, 0x6bbdd66bU, 0x6fb1de6fU, 0xc55491c5U,
|
||||
0x30506030U, 0x01030201U, 0x67a9ce67U, 0x2b7d562bU,
|
||||
0xfe19e7feU, 0xd762b5d7U, 0xabe64dabU, 0x769aec76U,
|
||||
0xca458fcaU, 0x829d1f82U, 0xc94089c9U, 0x7d87fa7dU,
|
||||
0xfa15effaU, 0x59ebb259U, 0x47c98e47U, 0xf00bfbf0U,
|
||||
0xadec41adU, 0xd467b3d4U, 0xa2fd5fa2U, 0xafea45afU,
|
||||
0x9cbf239cU, 0xa4f753a4U, 0x7296e472U, 0xc05b9bc0U,
|
||||
0xb7c275b7U, 0xfd1ce1fdU, 0x93ae3d93U, 0x266a4c26U,
|
||||
0x365a6c36U, 0x3f417e3fU, 0xf702f5f7U, 0xcc4f83ccU,
|
||||
0x345c6834U, 0xa5f451a5U, 0xe534d1e5U, 0xf108f9f1U,
|
||||
0x7193e271U, 0xd873abd8U, 0x31536231U, 0x153f2a15U,
|
||||
0x040c0804U, 0xc75295c7U, 0x23654623U, 0xc35e9dc3U,
|
||||
0x18283018U, 0x96a13796U, 0x050f0a05U, 0x9ab52f9aU,
|
||||
0x07090e07U, 0x12362412U, 0x809b1b80U, 0xe23ddfe2U,
|
||||
0xeb26cdebU, 0x27694e27U, 0xb2cd7fb2U, 0x759fea75U,
|
||||
0x091b1209U, 0x839e1d83U, 0x2c74582cU, 0x1a2e341aU,
|
||||
0x1b2d361bU, 0x6eb2dc6eU, 0x5aeeb45aU, 0xa0fb5ba0U,
|
||||
0x52f6a452U, 0x3b4d763bU, 0xd661b7d6U, 0xb3ce7db3U,
|
||||
0x297b5229U, 0xe33edde3U, 0x2f715e2fU, 0x84971384U,
|
||||
0x53f5a653U, 0xd168b9d1U, 0x00000000U, 0xed2cc1edU,
|
||||
0x20604020U, 0xfc1fe3fcU, 0xb1c879b1U, 0x5bedb65bU,
|
||||
0x6abed46aU, 0xcb468dcbU, 0xbed967beU, 0x394b7239U,
|
||||
0x4ade944aU, 0x4cd4984cU, 0x58e8b058U, 0xcf4a85cfU,
|
||||
0xd06bbbd0U, 0xef2ac5efU, 0xaae54faaU, 0xfb16edfbU,
|
||||
0x43c58643U, 0x4dd79a4dU, 0x33556633U, 0x85941185U,
|
||||
0x45cf8a45U, 0xf910e9f9U, 0x02060402U, 0x7f81fe7fU,
|
||||
0x50f0a050U, 0x3c44783cU, 0x9fba259fU, 0xa8e34ba8U,
|
||||
0x51f3a251U, 0xa3fe5da3U, 0x40c08040U, 0x8f8a058fU,
|
||||
0x92ad3f92U, 0x9dbc219dU, 0x38487038U, 0xf504f1f5U,
|
||||
0xbcdf63bcU, 0xb6c177b6U, 0xda75afdaU, 0x21634221U,
|
||||
0x10302010U, 0xff1ae5ffU, 0xf30efdf3U, 0xd26dbfd2U,
|
||||
0xcd4c81cdU, 0x0c14180cU, 0x13352613U, 0xec2fc3ecU,
|
||||
0x5fe1be5fU, 0x97a23597U, 0x44cc8844U, 0x17392e17U,
|
||||
0xc45793c4U, 0xa7f255a7U, 0x7e82fc7eU, 0x3d477a3dU,
|
||||
0x64acc864U, 0x5de7ba5dU, 0x192b3219U, 0x7395e673U,
|
||||
0x60a0c060U, 0x81981981U, 0x4fd19e4fU, 0xdc7fa3dcU,
|
||||
0x22664422U, 0x2a7e542aU, 0x90ab3b90U, 0x88830b88U,
|
||||
0x46ca8c46U, 0xee29c7eeU, 0xb8d36bb8U, 0x143c2814U,
|
||||
0xde79a7deU, 0x5ee2bc5eU, 0x0b1d160bU, 0xdb76addbU,
|
||||
0xe03bdbe0U, 0x32566432U, 0x3a4e743aU, 0x0a1e140aU,
|
||||
0x49db9249U, 0x060a0c06U, 0x246c4824U, 0x5ce4b85cU,
|
||||
0xc25d9fc2U, 0xd36ebdd3U, 0xacef43acU, 0x62a6c462U,
|
||||
0x91a83991U, 0x95a43195U, 0xe437d3e4U, 0x798bf279U,
|
||||
0xe732d5e7U, 0xc8438bc8U, 0x37596e37U, 0x6db7da6dU,
|
||||
0x8d8c018dU, 0xd564b1d5U, 0x4ed29c4eU, 0xa9e049a9U,
|
||||
0x6cb4d86cU, 0x56faac56U, 0xf407f3f4U, 0xea25cfeaU,
|
||||
0x65afca65U, 0x7a8ef47aU, 0xaee947aeU, 0x08181008U,
|
||||
0xbad56fbaU, 0x7888f078U, 0x256f4a25U, 0x2e725c2eU,
|
||||
0x1c24381cU, 0xa6f157a6U, 0xb4c773b4U, 0xc65197c6U,
|
||||
0xe823cbe8U, 0xdd7ca1ddU, 0x749ce874U, 0x1f213e1fU,
|
||||
0x4bdd964bU, 0xbddc61bdU, 0x8b860d8bU, 0x8a850f8aU,
|
||||
0x7090e070U, 0x3e427c3eU, 0xb5c471b5U, 0x66aacc66U,
|
||||
0x48d89048U, 0x03050603U, 0xf601f7f6U, 0x0e121c0eU,
|
||||
0x61a3c261U, 0x355f6a35U, 0x57f9ae57U, 0xb9d069b9U,
|
||||
0x86911786U, 0xc15899c1U, 0x1d273a1dU, 0x9eb9279eU,
|
||||
0xe138d9e1U, 0xf813ebf8U, 0x98b32b98U, 0x11332211U,
|
||||
0x69bbd269U, 0xd970a9d9U, 0x8e89078eU, 0x94a73394U,
|
||||
0x9bb62d9bU, 0x1e223c1eU, 0x87921587U, 0xe920c9e9U,
|
||||
0xce4987ceU, 0x55ffaa55U, 0x28785028U, 0xdf7aa5dfU,
|
||||
0x8c8f038cU, 0xa1f859a1U, 0x89800989U, 0x0d171a0dU,
|
||||
0xbfda65bfU, 0xe631d7e6U, 0x42c68442U, 0x68b8d068U,
|
||||
0x41c38241U, 0x99b02999U, 0x2d775a2dU, 0x0f111e0fU,
|
||||
0xb0cb7bb0U, 0x54fca854U, 0xbbd66dbbU, 0x163a2c16U,
|
||||
};
|
||||
|
||||
uint32 Te3[256] =
|
||||
{
|
||||
0x6363a5c6U, 0x7c7c84f8U, 0x777799eeU, 0x7b7b8df6U,
|
||||
0xf2f20dffU, 0x6b6bbdd6U, 0x6f6fb1deU, 0xc5c55491U,
|
||||
0x30305060U, 0x01010302U, 0x6767a9ceU, 0x2b2b7d56U,
|
||||
0xfefe19e7U, 0xd7d762b5U, 0xababe64dU, 0x76769aecU,
|
||||
0xcaca458fU, 0x82829d1fU, 0xc9c94089U, 0x7d7d87faU,
|
||||
0xfafa15efU, 0x5959ebb2U, 0x4747c98eU, 0xf0f00bfbU,
|
||||
0xadadec41U, 0xd4d467b3U, 0xa2a2fd5fU, 0xafafea45U,
|
||||
0x9c9cbf23U, 0xa4a4f753U, 0x727296e4U, 0xc0c05b9bU,
|
||||
0xb7b7c275U, 0xfdfd1ce1U, 0x9393ae3dU, 0x26266a4cU,
|
||||
0x36365a6cU, 0x3f3f417eU, 0xf7f702f5U, 0xcccc4f83U,
|
||||
0x34345c68U, 0xa5a5f451U, 0xe5e534d1U, 0xf1f108f9U,
|
||||
0x717193e2U, 0xd8d873abU, 0x31315362U, 0x15153f2aU,
|
||||
0x04040c08U, 0xc7c75295U, 0x23236546U, 0xc3c35e9dU,
|
||||
0x18182830U, 0x9696a137U, 0x05050f0aU, 0x9a9ab52fU,
|
||||
0x0707090eU, 0x12123624U, 0x80809b1bU, 0xe2e23ddfU,
|
||||
0xebeb26cdU, 0x2727694eU, 0xb2b2cd7fU, 0x75759feaU,
|
||||
0x09091b12U, 0x83839e1dU, 0x2c2c7458U, 0x1a1a2e34U,
|
||||
0x1b1b2d36U, 0x6e6eb2dcU, 0x5a5aeeb4U, 0xa0a0fb5bU,
|
||||
0x5252f6a4U, 0x3b3b4d76U, 0xd6d661b7U, 0xb3b3ce7dU,
|
||||
0x29297b52U, 0xe3e33eddU, 0x2f2f715eU, 0x84849713U,
|
||||
0x5353f5a6U, 0xd1d168b9U, 0x00000000U, 0xeded2cc1U,
|
||||
0x20206040U, 0xfcfc1fe3U, 0xb1b1c879U, 0x5b5bedb6U,
|
||||
0x6a6abed4U, 0xcbcb468dU, 0xbebed967U, 0x39394b72U,
|
||||
0x4a4ade94U, 0x4c4cd498U, 0x5858e8b0U, 0xcfcf4a85U,
|
||||
0xd0d06bbbU, 0xefef2ac5U, 0xaaaae54fU, 0xfbfb16edU,
|
||||
0x4343c586U, 0x4d4dd79aU, 0x33335566U, 0x85859411U,
|
||||
0x4545cf8aU, 0xf9f910e9U, 0x02020604U, 0x7f7f81feU,
|
||||
0x5050f0a0U, 0x3c3c4478U, 0x9f9fba25U, 0xa8a8e34bU,
|
||||
0x5151f3a2U, 0xa3a3fe5dU, 0x4040c080U, 0x8f8f8a05U,
|
||||
0x9292ad3fU, 0x9d9dbc21U, 0x38384870U, 0xf5f504f1U,
|
||||
0xbcbcdf63U, 0xb6b6c177U, 0xdada75afU, 0x21216342U,
|
||||
0x10103020U, 0xffff1ae5U, 0xf3f30efdU, 0xd2d26dbfU,
|
||||
0xcdcd4c81U, 0x0c0c1418U, 0x13133526U, 0xecec2fc3U,
|
||||
0x5f5fe1beU, 0x9797a235U, 0x4444cc88U, 0x1717392eU,
|
||||
0xc4c45793U, 0xa7a7f255U, 0x7e7e82fcU, 0x3d3d477aU,
|
||||
0x6464acc8U, 0x5d5de7baU, 0x19192b32U, 0x737395e6U,
|
||||
0x6060a0c0U, 0x81819819U, 0x4f4fd19eU, 0xdcdc7fa3U,
|
||||
0x22226644U, 0x2a2a7e54U, 0x9090ab3bU, 0x8888830bU,
|
||||
0x4646ca8cU, 0xeeee29c7U, 0xb8b8d36bU, 0x14143c28U,
|
||||
0xdede79a7U, 0x5e5ee2bcU, 0x0b0b1d16U, 0xdbdb76adU,
|
||||
0xe0e03bdbU, 0x32325664U, 0x3a3a4e74U, 0x0a0a1e14U,
|
||||
0x4949db92U, 0x06060a0cU, 0x24246c48U, 0x5c5ce4b8U,
|
||||
0xc2c25d9fU, 0xd3d36ebdU, 0xacacef43U, 0x6262a6c4U,
|
||||
0x9191a839U, 0x9595a431U, 0xe4e437d3U, 0x79798bf2U,
|
||||
0xe7e732d5U, 0xc8c8438bU, 0x3737596eU, 0x6d6db7daU,
|
||||
0x8d8d8c01U, 0xd5d564b1U, 0x4e4ed29cU, 0xa9a9e049U,
|
||||
0x6c6cb4d8U, 0x5656faacU, 0xf4f407f3U, 0xeaea25cfU,
|
||||
0x6565afcaU, 0x7a7a8ef4U, 0xaeaee947U, 0x08081810U,
|
||||
0xbabad56fU, 0x787888f0U, 0x25256f4aU, 0x2e2e725cU,
|
||||
0x1c1c2438U, 0xa6a6f157U, 0xb4b4c773U, 0xc6c65197U,
|
||||
0xe8e823cbU, 0xdddd7ca1U, 0x74749ce8U, 0x1f1f213eU,
|
||||
0x4b4bdd96U, 0xbdbddc61U, 0x8b8b860dU, 0x8a8a850fU,
|
||||
0x707090e0U, 0x3e3e427cU, 0xb5b5c471U, 0x6666aaccU,
|
||||
0x4848d890U, 0x03030506U, 0xf6f601f7U, 0x0e0e121cU,
|
||||
0x6161a3c2U, 0x35355f6aU, 0x5757f9aeU, 0xb9b9d069U,
|
||||
0x86869117U, 0xc1c15899U, 0x1d1d273aU, 0x9e9eb927U,
|
||||
0xe1e138d9U, 0xf8f813ebU, 0x9898b32bU, 0x11113322U,
|
||||
0x6969bbd2U, 0xd9d970a9U, 0x8e8e8907U, 0x9494a733U,
|
||||
0x9b9bb62dU, 0x1e1e223cU, 0x87879215U, 0xe9e920c9U,
|
||||
0xcece4987U, 0x5555ffaaU, 0x28287850U, 0xdfdf7aa5U,
|
||||
0x8c8c8f03U, 0xa1a1f859U, 0x89898009U, 0x0d0d171aU,
|
||||
0xbfbfda65U, 0xe6e631d7U, 0x4242c684U, 0x6868b8d0U,
|
||||
0x4141c382U, 0x9999b029U, 0x2d2d775aU, 0x0f0f111eU,
|
||||
0xb0b0cb7bU, 0x5454fca8U, 0xbbbbd66dU, 0x16163a2cU,
|
||||
};
|
||||
|
||||
uint32 Te4[256] =
|
||||
{
|
||||
0x63636363U, 0x7c7c7c7cU, 0x77777777U, 0x7b7b7b7bU,
|
||||
0xf2f2f2f2U, 0x6b6b6b6bU, 0x6f6f6f6fU, 0xc5c5c5c5U,
|
||||
0x30303030U, 0x01010101U, 0x67676767U, 0x2b2b2b2bU,
|
||||
0xfefefefeU, 0xd7d7d7d7U, 0xababababU, 0x76767676U,
|
||||
0xcacacacaU, 0x82828282U, 0xc9c9c9c9U, 0x7d7d7d7dU,
|
||||
0xfafafafaU, 0x59595959U, 0x47474747U, 0xf0f0f0f0U,
|
||||
0xadadadadU, 0xd4d4d4d4U, 0xa2a2a2a2U, 0xafafafafU,
|
||||
0x9c9c9c9cU, 0xa4a4a4a4U, 0x72727272U, 0xc0c0c0c0U,
|
||||
0xb7b7b7b7U, 0xfdfdfdfdU, 0x93939393U, 0x26262626U,
|
||||
0x36363636U, 0x3f3f3f3fU, 0xf7f7f7f7U, 0xccccccccU,
|
||||
0x34343434U, 0xa5a5a5a5U, 0xe5e5e5e5U, 0xf1f1f1f1U,
|
||||
0x71717171U, 0xd8d8d8d8U, 0x31313131U, 0x15151515U,
|
||||
0x04040404U, 0xc7c7c7c7U, 0x23232323U, 0xc3c3c3c3U,
|
||||
0x18181818U, 0x96969696U, 0x05050505U, 0x9a9a9a9aU,
|
||||
0x07070707U, 0x12121212U, 0x80808080U, 0xe2e2e2e2U,
|
||||
0xebebebebU, 0x27272727U, 0xb2b2b2b2U, 0x75757575U,
|
||||
0x09090909U, 0x83838383U, 0x2c2c2c2cU, 0x1a1a1a1aU,
|
||||
0x1b1b1b1bU, 0x6e6e6e6eU, 0x5a5a5a5aU, 0xa0a0a0a0U,
|
||||
0x52525252U, 0x3b3b3b3bU, 0xd6d6d6d6U, 0xb3b3b3b3U,
|
||||
0x29292929U, 0xe3e3e3e3U, 0x2f2f2f2fU, 0x84848484U,
|
||||
0x53535353U, 0xd1d1d1d1U, 0x00000000U, 0xededededU,
|
||||
0x20202020U, 0xfcfcfcfcU, 0xb1b1b1b1U, 0x5b5b5b5bU,
|
||||
0x6a6a6a6aU, 0xcbcbcbcbU, 0xbebebebeU, 0x39393939U,
|
||||
0x4a4a4a4aU, 0x4c4c4c4cU, 0x58585858U, 0xcfcfcfcfU,
|
||||
0xd0d0d0d0U, 0xefefefefU, 0xaaaaaaaaU, 0xfbfbfbfbU,
|
||||
0x43434343U, 0x4d4d4d4dU, 0x33333333U, 0x85858585U,
|
||||
0x45454545U, 0xf9f9f9f9U, 0x02020202U, 0x7f7f7f7fU,
|
||||
0x50505050U, 0x3c3c3c3cU, 0x9f9f9f9fU, 0xa8a8a8a8U,
|
||||
0x51515151U, 0xa3a3a3a3U, 0x40404040U, 0x8f8f8f8fU,
|
||||
0x92929292U, 0x9d9d9d9dU, 0x38383838U, 0xf5f5f5f5U,
|
||||
0xbcbcbcbcU, 0xb6b6b6b6U, 0xdadadadaU, 0x21212121U,
|
||||
0x10101010U, 0xffffffffU, 0xf3f3f3f3U, 0xd2d2d2d2U,
|
||||
0xcdcdcdcdU, 0x0c0c0c0cU, 0x13131313U, 0xececececU,
|
||||
0x5f5f5f5fU, 0x97979797U, 0x44444444U, 0x17171717U,
|
||||
0xc4c4c4c4U, 0xa7a7a7a7U, 0x7e7e7e7eU, 0x3d3d3d3dU,
|
||||
0x64646464U, 0x5d5d5d5dU, 0x19191919U, 0x73737373U,
|
||||
0x60606060U, 0x81818181U, 0x4f4f4f4fU, 0xdcdcdcdcU,
|
||||
0x22222222U, 0x2a2a2a2aU, 0x90909090U, 0x88888888U,
|
||||
0x46464646U, 0xeeeeeeeeU, 0xb8b8b8b8U, 0x14141414U,
|
||||
0xdedededeU, 0x5e5e5e5eU, 0x0b0b0b0bU, 0xdbdbdbdbU,
|
||||
0xe0e0e0e0U, 0x32323232U, 0x3a3a3a3aU, 0x0a0a0a0aU,
|
||||
0x49494949U, 0x06060606U, 0x24242424U, 0x5c5c5c5cU,
|
||||
0xc2c2c2c2U, 0xd3d3d3d3U, 0xacacacacU, 0x62626262U,
|
||||
0x91919191U, 0x95959595U, 0xe4e4e4e4U, 0x79797979U,
|
||||
0xe7e7e7e7U, 0xc8c8c8c8U, 0x37373737U, 0x6d6d6d6dU,
|
||||
0x8d8d8d8dU, 0xd5d5d5d5U, 0x4e4e4e4eU, 0xa9a9a9a9U,
|
||||
0x6c6c6c6cU, 0x56565656U, 0xf4f4f4f4U, 0xeaeaeaeaU,
|
||||
0x65656565U, 0x7a7a7a7aU, 0xaeaeaeaeU, 0x08080808U,
|
||||
0xbabababaU, 0x78787878U, 0x25252525U, 0x2e2e2e2eU,
|
||||
0x1c1c1c1cU, 0xa6a6a6a6U, 0xb4b4b4b4U, 0xc6c6c6c6U,
|
||||
0xe8e8e8e8U, 0xddddddddU, 0x74747474U, 0x1f1f1f1fU,
|
||||
0x4b4b4b4bU, 0xbdbdbdbdU, 0x8b8b8b8bU, 0x8a8a8a8aU,
|
||||
0x70707070U, 0x3e3e3e3eU, 0xb5b5b5b5U, 0x66666666U,
|
||||
0x48484848U, 0x03030303U, 0xf6f6f6f6U, 0x0e0e0e0eU,
|
||||
0x61616161U, 0x35353535U, 0x57575757U, 0xb9b9b9b9U,
|
||||
0x86868686U, 0xc1c1c1c1U, 0x1d1d1d1dU, 0x9e9e9e9eU,
|
||||
0xe1e1e1e1U, 0xf8f8f8f8U, 0x98989898U, 0x11111111U,
|
||||
0x69696969U, 0xd9d9d9d9U, 0x8e8e8e8eU, 0x94949494U,
|
||||
0x9b9b9b9bU, 0x1e1e1e1eU, 0x87878787U, 0xe9e9e9e9U,
|
||||
0xcecececeU, 0x55555555U, 0x28282828U, 0xdfdfdfdfU,
|
||||
0x8c8c8c8cU, 0xa1a1a1a1U, 0x89898989U, 0x0d0d0d0dU,
|
||||
0xbfbfbfbfU, 0xe6e6e6e6U, 0x42424242U, 0x68686868U,
|
||||
0x41414141U, 0x99999999U, 0x2d2d2d2dU, 0x0f0f0f0fU,
|
||||
0xb0b0b0b0U, 0x54545454U, 0xbbbbbbbbU, 0x16161616U,
|
||||
};
|
||||
|
||||
uint32 Td0[256] =
|
||||
{
|
||||
0x51f4a750U, 0x7e416553U, 0x1a17a4c3U, 0x3a275e96U,
|
||||
0x3bab6bcbU, 0x1f9d45f1U, 0xacfa58abU, 0x4be30393U,
|
||||
0x2030fa55U, 0xad766df6U, 0x88cc7691U, 0xf5024c25U,
|
||||
0x4fe5d7fcU, 0xc52acbd7U, 0x26354480U, 0xb562a38fU,
|
||||
0xdeb15a49U, 0x25ba1b67U, 0x45ea0e98U, 0x5dfec0e1U,
|
||||
0xc32f7502U, 0x814cf012U, 0x8d4697a3U, 0x6bd3f9c6U,
|
||||
0x038f5fe7U, 0x15929c95U, 0xbf6d7aebU, 0x955259daU,
|
||||
0xd4be832dU, 0x587421d3U, 0x49e06929U, 0x8ec9c844U,
|
||||
0x75c2896aU, 0xf48e7978U, 0x99583e6bU, 0x27b971ddU,
|
||||
0xbee14fb6U, 0xf088ad17U, 0xc920ac66U, 0x7dce3ab4U,
|
||||
0x63df4a18U, 0xe51a3182U, 0x97513360U, 0x62537f45U,
|
||||
0xb16477e0U, 0xbb6bae84U, 0xfe81a01cU, 0xf9082b94U,
|
||||
0x70486858U, 0x8f45fd19U, 0x94de6c87U, 0x527bf8b7U,
|
||||
0xab73d323U, 0x724b02e2U, 0xe31f8f57U, 0x6655ab2aU,
|
||||
0xb2eb2807U, 0x2fb5c203U, 0x86c57b9aU, 0xd33708a5U,
|
||||
0x302887f2U, 0x23bfa5b2U, 0x02036abaU, 0xed16825cU,
|
||||
0x8acf1c2bU, 0xa779b492U, 0xf307f2f0U, 0x4e69e2a1U,
|
||||
0x65daf4cdU, 0x0605bed5U, 0xd134621fU, 0xc4a6fe8aU,
|
||||
0x342e539dU, 0xa2f355a0U, 0x058ae132U, 0xa4f6eb75U,
|
||||
0x0b83ec39U, 0x4060efaaU, 0x5e719f06U, 0xbd6e1051U,
|
||||
0x3e218af9U, 0x96dd063dU, 0xdd3e05aeU, 0x4de6bd46U,
|
||||
0x91548db5U, 0x71c45d05U, 0x0406d46fU, 0x605015ffU,
|
||||
0x1998fb24U, 0xd6bde997U, 0x894043ccU, 0x67d99e77U,
|
||||
0xb0e842bdU, 0x07898b88U, 0xe7195b38U, 0x79c8eedbU,
|
||||
0xa17c0a47U, 0x7c420fe9U, 0xf8841ec9U, 0x00000000U,
|
||||
0x09808683U, 0x322bed48U, 0x1e1170acU, 0x6c5a724eU,
|
||||
0xfd0efffbU, 0x0f853856U, 0x3daed51eU, 0x362d3927U,
|
||||
0x0a0fd964U, 0x685ca621U, 0x9b5b54d1U, 0x24362e3aU,
|
||||
0x0c0a67b1U, 0x9357e70fU, 0xb4ee96d2U, 0x1b9b919eU,
|
||||
0x80c0c54fU, 0x61dc20a2U, 0x5a774b69U, 0x1c121a16U,
|
||||
0xe293ba0aU, 0xc0a02ae5U, 0x3c22e043U, 0x121b171dU,
|
||||
0x0e090d0bU, 0xf28bc7adU, 0x2db6a8b9U, 0x141ea9c8U,
|
||||
0x57f11985U, 0xaf75074cU, 0xee99ddbbU, 0xa37f60fdU,
|
||||
0xf701269fU, 0x5c72f5bcU, 0x44663bc5U, 0x5bfb7e34U,
|
||||
0x8b432976U, 0xcb23c6dcU, 0xb6edfc68U, 0xb8e4f163U,
|
||||
0xd731dccaU, 0x42638510U, 0x13972240U, 0x84c61120U,
|
||||
0x854a247dU, 0xd2bb3df8U, 0xaef93211U, 0xc729a16dU,
|
||||
0x1d9e2f4bU, 0xdcb230f3U, 0x0d8652ecU, 0x77c1e3d0U,
|
||||
0x2bb3166cU, 0xa970b999U, 0x119448faU, 0x47e96422U,
|
||||
0xa8fc8cc4U, 0xa0f03f1aU, 0x567d2cd8U, 0x223390efU,
|
||||
0x87494ec7U, 0xd938d1c1U, 0x8ccaa2feU, 0x98d40b36U,
|
||||
0xa6f581cfU, 0xa57ade28U, 0xdab78e26U, 0x3fadbfa4U,
|
||||
0x2c3a9de4U, 0x5078920dU, 0x6a5fcc9bU, 0x547e4662U,
|
||||
0xf68d13c2U, 0x90d8b8e8U, 0x2e39f75eU, 0x82c3aff5U,
|
||||
0x9f5d80beU, 0x69d0937cU, 0x6fd52da9U, 0xcf2512b3U,
|
||||
0xc8ac993bU, 0x10187da7U, 0xe89c636eU, 0xdb3bbb7bU,
|
||||
0xcd267809U, 0x6e5918f4U, 0xec9ab701U, 0x834f9aa8U,
|
||||
0xe6956e65U, 0xaaffe67eU, 0x21bccf08U, 0xef15e8e6U,
|
||||
0xbae79bd9U, 0x4a6f36ceU, 0xea9f09d4U, 0x29b07cd6U,
|
||||
0x31a4b2afU, 0x2a3f2331U, 0xc6a59430U, 0x35a266c0U,
|
||||
0x744ebc37U, 0xfc82caa6U, 0xe090d0b0U, 0x33a7d815U,
|
||||
0xf104984aU, 0x41ecdaf7U, 0x7fcd500eU, 0x1791f62fU,
|
||||
0x764dd68dU, 0x43efb04dU, 0xccaa4d54U, 0xe49604dfU,
|
||||
0x9ed1b5e3U, 0x4c6a881bU, 0xc12c1fb8U, 0x4665517fU,
|
||||
0x9d5eea04U, 0x018c355dU, 0xfa877473U, 0xfb0b412eU,
|
||||
0xb3671d5aU, 0x92dbd252U, 0xe9105633U, 0x6dd64713U,
|
||||
0x9ad7618cU, 0x37a10c7aU, 0x59f8148eU, 0xeb133c89U,
|
||||
0xcea927eeU, 0xb761c935U, 0xe11ce5edU, 0x7a47b13cU,
|
||||
0x9cd2df59U, 0x55f2733fU, 0x1814ce79U, 0x73c737bfU,
|
||||
0x53f7cdeaU, 0x5ffdaa5bU, 0xdf3d6f14U, 0x7844db86U,
|
||||
0xcaaff381U, 0xb968c43eU, 0x3824342cU, 0xc2a3405fU,
|
||||
0x161dc372U, 0xbce2250cU, 0x283c498bU, 0xff0d9541U,
|
||||
0x39a80171U, 0x080cb3deU, 0xd8b4e49cU, 0x6456c190U,
|
||||
0x7bcb8461U, 0xd532b670U, 0x486c5c74U, 0xd0b85742U,
|
||||
};
|
||||
|
||||
|
||||
uint32 Td1[256] =
|
||||
{
|
||||
0x5051f4a7U, 0x537e4165U, 0xc31a17a4U, 0x963a275eU,
|
||||
0xcb3bab6bU, 0xf11f9d45U, 0xabacfa58U, 0x934be303U,
|
||||
0x552030faU, 0xf6ad766dU, 0x9188cc76U, 0x25f5024cU,
|
||||
0xfc4fe5d7U, 0xd7c52acbU, 0x80263544U, 0x8fb562a3U,
|
||||
0x49deb15aU, 0x6725ba1bU, 0x9845ea0eU, 0xe15dfec0U,
|
||||
0x02c32f75U, 0x12814cf0U, 0xa38d4697U, 0xc66bd3f9U,
|
||||
0xe7038f5fU, 0x9515929cU, 0xebbf6d7aU, 0xda955259U,
|
||||
0x2dd4be83U, 0xd3587421U, 0x2949e069U, 0x448ec9c8U,
|
||||
0x6a75c289U, 0x78f48e79U, 0x6b99583eU, 0xdd27b971U,
|
||||
0xb6bee14fU, 0x17f088adU, 0x66c920acU, 0xb47dce3aU,
|
||||
0x1863df4aU, 0x82e51a31U, 0x60975133U, 0x4562537fU,
|
||||
0xe0b16477U, 0x84bb6baeU, 0x1cfe81a0U, 0x94f9082bU,
|
||||
0x58704868U, 0x198f45fdU, 0x8794de6cU, 0xb7527bf8U,
|
||||
0x23ab73d3U, 0xe2724b02U, 0x57e31f8fU, 0x2a6655abU,
|
||||
0x07b2eb28U, 0x032fb5c2U, 0x9a86c57bU, 0xa5d33708U,
|
||||
0xf2302887U, 0xb223bfa5U, 0xba02036aU, 0x5ced1682U,
|
||||
0x2b8acf1cU, 0x92a779b4U, 0xf0f307f2U, 0xa14e69e2U,
|
||||
0xcd65daf4U, 0xd50605beU, 0x1fd13462U, 0x8ac4a6feU,
|
||||
0x9d342e53U, 0xa0a2f355U, 0x32058ae1U, 0x75a4f6ebU,
|
||||
0x390b83ecU, 0xaa4060efU, 0x065e719fU, 0x51bd6e10U,
|
||||
0xf93e218aU, 0x3d96dd06U, 0xaedd3e05U, 0x464de6bdU,
|
||||
0xb591548dU, 0x0571c45dU, 0x6f0406d4U, 0xff605015U,
|
||||
0x241998fbU, 0x97d6bde9U, 0xcc894043U, 0x7767d99eU,
|
||||
0xbdb0e842U, 0x8807898bU, 0x38e7195bU, 0xdb79c8eeU,
|
||||
0x47a17c0aU, 0xe97c420fU, 0xc9f8841eU, 0x00000000U,
|
||||
0x83098086U, 0x48322bedU, 0xac1e1170U, 0x4e6c5a72U,
|
||||
0xfbfd0effU, 0x560f8538U, 0x1e3daed5U, 0x27362d39U,
|
||||
0x640a0fd9U, 0x21685ca6U, 0xd19b5b54U, 0x3a24362eU,
|
||||
0xb10c0a67U, 0x0f9357e7U, 0xd2b4ee96U, 0x9e1b9b91U,
|
||||
0x4f80c0c5U, 0xa261dc20U, 0x695a774bU, 0x161c121aU,
|
||||
0x0ae293baU, 0xe5c0a02aU, 0x433c22e0U, 0x1d121b17U,
|
||||
0x0b0e090dU, 0xadf28bc7U, 0xb92db6a8U, 0xc8141ea9U,
|
||||
0x8557f119U, 0x4caf7507U, 0xbbee99ddU, 0xfda37f60U,
|
||||
0x9ff70126U, 0xbc5c72f5U, 0xc544663bU, 0x345bfb7eU,
|
||||
0x768b4329U, 0xdccb23c6U, 0x68b6edfcU, 0x63b8e4f1U,
|
||||
0xcad731dcU, 0x10426385U, 0x40139722U, 0x2084c611U,
|
||||
0x7d854a24U, 0xf8d2bb3dU, 0x11aef932U, 0x6dc729a1U,
|
||||
0x4b1d9e2fU, 0xf3dcb230U, 0xec0d8652U, 0xd077c1e3U,
|
||||
0x6c2bb316U, 0x99a970b9U, 0xfa119448U, 0x2247e964U,
|
||||
0xc4a8fc8cU, 0x1aa0f03fU, 0xd8567d2cU, 0xef223390U,
|
||||
0xc787494eU, 0xc1d938d1U, 0xfe8ccaa2U, 0x3698d40bU,
|
||||
0xcfa6f581U, 0x28a57adeU, 0x26dab78eU, 0xa43fadbfU,
|
||||
0xe42c3a9dU, 0x0d507892U, 0x9b6a5fccU, 0x62547e46U,
|
||||
0xc2f68d13U, 0xe890d8b8U, 0x5e2e39f7U, 0xf582c3afU,
|
||||
0xbe9f5d80U, 0x7c69d093U, 0xa96fd52dU, 0xb3cf2512U,
|
||||
0x3bc8ac99U, 0xa710187dU, 0x6ee89c63U, 0x7bdb3bbbU,
|
||||
0x09cd2678U, 0xf46e5918U, 0x01ec9ab7U, 0xa8834f9aU,
|
||||
0x65e6956eU, 0x7eaaffe6U, 0x0821bccfU, 0xe6ef15e8U,
|
||||
0xd9bae79bU, 0xce4a6f36U, 0xd4ea9f09U, 0xd629b07cU,
|
||||
0xaf31a4b2U, 0x312a3f23U, 0x30c6a594U, 0xc035a266U,
|
||||
0x37744ebcU, 0xa6fc82caU, 0xb0e090d0U, 0x1533a7d8U,
|
||||
0x4af10498U, 0xf741ecdaU, 0x0e7fcd50U, 0x2f1791f6U,
|
||||
0x8d764dd6U, 0x4d43efb0U, 0x54ccaa4dU, 0xdfe49604U,
|
||||
0xe39ed1b5U, 0x1b4c6a88U, 0xb8c12c1fU, 0x7f466551U,
|
||||
0x049d5eeaU, 0x5d018c35U, 0x73fa8774U, 0x2efb0b41U,
|
||||
0x5ab3671dU, 0x5292dbd2U, 0x33e91056U, 0x136dd647U,
|
||||
0x8c9ad761U, 0x7a37a10cU, 0x8e59f814U, 0x89eb133cU,
|
||||
0xeecea927U, 0x35b761c9U, 0xede11ce5U, 0x3c7a47b1U,
|
||||
0x599cd2dfU, 0x3f55f273U, 0x791814ceU, 0xbf73c737U,
|
||||
0xea53f7cdU, 0x5b5ffdaaU, 0x14df3d6fU, 0x867844dbU,
|
||||
0x81caaff3U, 0x3eb968c4U, 0x2c382434U, 0x5fc2a340U,
|
||||
0x72161dc3U, 0x0cbce225U, 0x8b283c49U, 0x41ff0d95U,
|
||||
0x7139a801U, 0xde080cb3U, 0x9cd8b4e4U, 0x906456c1U,
|
||||
0x617bcb84U, 0x70d532b6U, 0x74486c5cU, 0x42d0b857U,
|
||||
};
|
||||
|
||||
|
||||
uint32 Td2[256] =
|
||||
{
|
||||
0xa75051f4U, 0x65537e41U, 0xa4c31a17U, 0x5e963a27U,
|
||||
0x6bcb3babU, 0x45f11f9dU, 0x58abacfaU, 0x03934be3U,
|
||||
0xfa552030U, 0x6df6ad76U, 0x769188ccU, 0x4c25f502U,
|
||||
0xd7fc4fe5U, 0xcbd7c52aU, 0x44802635U, 0xa38fb562U,
|
||||
0x5a49deb1U, 0x1b6725baU, 0x0e9845eaU, 0xc0e15dfeU,
|
||||
0x7502c32fU, 0xf012814cU, 0x97a38d46U, 0xf9c66bd3U,
|
||||
0x5fe7038fU, 0x9c951592U, 0x7aebbf6dU, 0x59da9552U,
|
||||
0x832dd4beU, 0x21d35874U, 0x692949e0U, 0xc8448ec9U,
|
||||
0x896a75c2U, 0x7978f48eU, 0x3e6b9958U, 0x71dd27b9U,
|
||||
0x4fb6bee1U, 0xad17f088U, 0xac66c920U, 0x3ab47dceU,
|
||||
0x4a1863dfU, 0x3182e51aU, 0x33609751U, 0x7f456253U,
|
||||
0x77e0b164U, 0xae84bb6bU, 0xa01cfe81U, 0x2b94f908U,
|
||||
0x68587048U, 0xfd198f45U, 0x6c8794deU, 0xf8b7527bU,
|
||||
0xd323ab73U, 0x02e2724bU, 0x8f57e31fU, 0xab2a6655U,
|
||||
0x2807b2ebU, 0xc2032fb5U, 0x7b9a86c5U, 0x08a5d337U,
|
||||
0x87f23028U, 0xa5b223bfU, 0x6aba0203U, 0x825ced16U,
|
||||
0x1c2b8acfU, 0xb492a779U, 0xf2f0f307U, 0xe2a14e69U,
|
||||
0xf4cd65daU, 0xbed50605U, 0x621fd134U, 0xfe8ac4a6U,
|
||||
0x539d342eU, 0x55a0a2f3U, 0xe132058aU, 0xeb75a4f6U,
|
||||
0xec390b83U, 0xefaa4060U, 0x9f065e71U, 0x1051bd6eU,
|
||||
0x8af93e21U, 0x063d96ddU, 0x05aedd3eU, 0xbd464de6U,
|
||||
0x8db59154U, 0x5d0571c4U, 0xd46f0406U, 0x15ff6050U,
|
||||
0xfb241998U, 0xe997d6bdU, 0x43cc8940U, 0x9e7767d9U,
|
||||
0x42bdb0e8U, 0x8b880789U, 0x5b38e719U, 0xeedb79c8U,
|
||||
0x0a47a17cU, 0x0fe97c42U, 0x1ec9f884U, 0x00000000U,
|
||||
0x86830980U, 0xed48322bU, 0x70ac1e11U, 0x724e6c5aU,
|
||||
0xfffbfd0eU, 0x38560f85U, 0xd51e3daeU, 0x3927362dU,
|
||||
0xd9640a0fU, 0xa621685cU, 0x54d19b5bU, 0x2e3a2436U,
|
||||
0x67b10c0aU, 0xe70f9357U, 0x96d2b4eeU, 0x919e1b9bU,
|
||||
0xc54f80c0U, 0x20a261dcU, 0x4b695a77U, 0x1a161c12U,
|
||||
0xba0ae293U, 0x2ae5c0a0U, 0xe0433c22U, 0x171d121bU,
|
||||
0x0d0b0e09U, 0xc7adf28bU, 0xa8b92db6U, 0xa9c8141eU,
|
||||
0x198557f1U, 0x074caf75U, 0xddbbee99U, 0x60fda37fU,
|
||||
0x269ff701U, 0xf5bc5c72U, 0x3bc54466U, 0x7e345bfbU,
|
||||
0x29768b43U, 0xc6dccb23U, 0xfc68b6edU, 0xf163b8e4U,
|
||||
0xdccad731U, 0x85104263U, 0x22401397U, 0x112084c6U,
|
||||
0x247d854aU, 0x3df8d2bbU, 0x3211aef9U, 0xa16dc729U,
|
||||
0x2f4b1d9eU, 0x30f3dcb2U, 0x52ec0d86U, 0xe3d077c1U,
|
||||
0x166c2bb3U, 0xb999a970U, 0x48fa1194U, 0x642247e9U,
|
||||
0x8cc4a8fcU, 0x3f1aa0f0U, 0x2cd8567dU, 0x90ef2233U,
|
||||
0x4ec78749U, 0xd1c1d938U, 0xa2fe8ccaU, 0x0b3698d4U,
|
||||
0x81cfa6f5U, 0xde28a57aU, 0x8e26dab7U, 0xbfa43fadU,
|
||||
0x9de42c3aU, 0x920d5078U, 0xcc9b6a5fU, 0x4662547eU,
|
||||
0x13c2f68dU, 0xb8e890d8U, 0xf75e2e39U, 0xaff582c3U,
|
||||
0x80be9f5dU, 0x937c69d0U, 0x2da96fd5U, 0x12b3cf25U,
|
||||
0x993bc8acU, 0x7da71018U, 0x636ee89cU, 0xbb7bdb3bU,
|
||||
0x7809cd26U, 0x18f46e59U, 0xb701ec9aU, 0x9aa8834fU,
|
||||
0x6e65e695U, 0xe67eaaffU, 0xcf0821bcU, 0xe8e6ef15U,
|
||||
0x9bd9bae7U, 0x36ce4a6fU, 0x09d4ea9fU, 0x7cd629b0U,
|
||||
0xb2af31a4U, 0x23312a3fU, 0x9430c6a5U, 0x66c035a2U,
|
||||
0xbc37744eU, 0xcaa6fc82U, 0xd0b0e090U, 0xd81533a7U,
|
||||
0x984af104U, 0xdaf741ecU, 0x500e7fcdU, 0xf62f1791U,
|
||||
0xd68d764dU, 0xb04d43efU, 0x4d54ccaaU, 0x04dfe496U,
|
||||
0xb5e39ed1U, 0x881b4c6aU, 0x1fb8c12cU, 0x517f4665U,
|
||||
0xea049d5eU, 0x355d018cU, 0x7473fa87U, 0x412efb0bU,
|
||||
0x1d5ab367U, 0xd25292dbU, 0x5633e910U, 0x47136dd6U,
|
||||
0x618c9ad7U, 0x0c7a37a1U, 0x148e59f8U, 0x3c89eb13U,
|
||||
0x27eecea9U, 0xc935b761U, 0xe5ede11cU, 0xb13c7a47U,
|
||||
0xdf599cd2U, 0x733f55f2U, 0xce791814U, 0x37bf73c7U,
|
||||
0xcdea53f7U, 0xaa5b5ffdU, 0x6f14df3dU, 0xdb867844U,
|
||||
0xf381caafU, 0xc43eb968U, 0x342c3824U, 0x405fc2a3U,
|
||||
0xc372161dU, 0x250cbce2U, 0x498b283cU, 0x9541ff0dU,
|
||||
0x017139a8U, 0xb3de080cU, 0xe49cd8b4U, 0xc1906456U,
|
||||
0x84617bcbU, 0xb670d532U, 0x5c74486cU, 0x5742d0b8U,
|
||||
};
|
||||
|
||||
uint32 Td3[256] =
|
||||
{
|
||||
0xf4a75051U, 0x4165537eU, 0x17a4c31aU, 0x275e963aU,
|
||||
0xab6bcb3bU, 0x9d45f11fU, 0xfa58abacU, 0xe303934bU,
|
||||
0x30fa5520U, 0x766df6adU, 0xcc769188U, 0x024c25f5U,
|
||||
0xe5d7fc4fU, 0x2acbd7c5U, 0x35448026U, 0x62a38fb5U,
|
||||
0xb15a49deU, 0xba1b6725U, 0xea0e9845U, 0xfec0e15dU,
|
||||
0x2f7502c3U, 0x4cf01281U, 0x4697a38dU, 0xd3f9c66bU,
|
||||
0x8f5fe703U, 0x929c9515U, 0x6d7aebbfU, 0x5259da95U,
|
||||
0xbe832dd4U, 0x7421d358U, 0xe0692949U, 0xc9c8448eU,
|
||||
0xc2896a75U, 0x8e7978f4U, 0x583e6b99U, 0xb971dd27U,
|
||||
0xe14fb6beU, 0x88ad17f0U, 0x20ac66c9U, 0xce3ab47dU,
|
||||
0xdf4a1863U, 0x1a3182e5U, 0x51336097U, 0x537f4562U,
|
||||
0x6477e0b1U, 0x6bae84bbU, 0x81a01cfeU, 0x082b94f9U,
|
||||
0x48685870U, 0x45fd198fU, 0xde6c8794U, 0x7bf8b752U,
|
||||
0x73d323abU, 0x4b02e272U, 0x1f8f57e3U, 0x55ab2a66U,
|
||||
0xeb2807b2U, 0xb5c2032fU, 0xc57b9a86U, 0x3708a5d3U,
|
||||
0x2887f230U, 0xbfa5b223U, 0x036aba02U, 0x16825cedU,
|
||||
0xcf1c2b8aU, 0x79b492a7U, 0x07f2f0f3U, 0x69e2a14eU,
|
||||
0xdaf4cd65U, 0x05bed506U, 0x34621fd1U, 0xa6fe8ac4U,
|
||||
0x2e539d34U, 0xf355a0a2U, 0x8ae13205U, 0xf6eb75a4U,
|
||||
0x83ec390bU, 0x60efaa40U, 0x719f065eU, 0x6e1051bdU,
|
||||
0x218af93eU, 0xdd063d96U, 0x3e05aeddU, 0xe6bd464dU,
|
||||
0x548db591U, 0xc45d0571U, 0x06d46f04U, 0x5015ff60U,
|
||||
0x98fb2419U, 0xbde997d6U, 0x4043cc89U, 0xd99e7767U,
|
||||
0xe842bdb0U, 0x898b8807U, 0x195b38e7U, 0xc8eedb79U,
|
||||
0x7c0a47a1U, 0x420fe97cU, 0x841ec9f8U, 0x00000000U,
|
||||
0x80868309U, 0x2bed4832U, 0x1170ac1eU, 0x5a724e6cU,
|
||||
0x0efffbfdU, 0x8538560fU, 0xaed51e3dU, 0x2d392736U,
|
||||
0x0fd9640aU, 0x5ca62168U, 0x5b54d19bU, 0x362e3a24U,
|
||||
0x0a67b10cU, 0x57e70f93U, 0xee96d2b4U, 0x9b919e1bU,
|
||||
0xc0c54f80U, 0xdc20a261U, 0x774b695aU, 0x121a161cU,
|
||||
0x93ba0ae2U, 0xa02ae5c0U, 0x22e0433cU, 0x1b171d12U,
|
||||
0x090d0b0eU, 0x8bc7adf2U, 0xb6a8b92dU, 0x1ea9c814U,
|
||||
0xf1198557U, 0x75074cafU, 0x99ddbbeeU, 0x7f60fda3U,
|
||||
0x01269ff7U, 0x72f5bc5cU, 0x663bc544U, 0xfb7e345bU,
|
||||
0x4329768bU, 0x23c6dccbU, 0xedfc68b6U, 0xe4f163b8U,
|
||||
0x31dccad7U, 0x63851042U, 0x97224013U, 0xc6112084U,
|
||||
0x4a247d85U, 0xbb3df8d2U, 0xf93211aeU, 0x29a16dc7U,
|
||||
0x9e2f4b1dU, 0xb230f3dcU, 0x8652ec0dU, 0xc1e3d077U,
|
||||
0xb3166c2bU, 0x70b999a9U, 0x9448fa11U, 0xe9642247U,
|
||||
0xfc8cc4a8U, 0xf03f1aa0U, 0x7d2cd856U, 0x3390ef22U,
|
||||
0x494ec787U, 0x38d1c1d9U, 0xcaa2fe8cU, 0xd40b3698U,
|
||||
0xf581cfa6U, 0x7ade28a5U, 0xb78e26daU, 0xadbfa43fU,
|
||||
0x3a9de42cU, 0x78920d50U, 0x5fcc9b6aU, 0x7e466254U,
|
||||
0x8d13c2f6U, 0xd8b8e890U, 0x39f75e2eU, 0xc3aff582U,
|
||||
0x5d80be9fU, 0xd0937c69U, 0xd52da96fU, 0x2512b3cfU,
|
||||
0xac993bc8U, 0x187da710U, 0x9c636ee8U, 0x3bbb7bdbU,
|
||||
0x267809cdU, 0x5918f46eU, 0x9ab701ecU, 0x4f9aa883U,
|
||||
0x956e65e6U, 0xffe67eaaU, 0xbccf0821U, 0x15e8e6efU,
|
||||
0xe79bd9baU, 0x6f36ce4aU, 0x9f09d4eaU, 0xb07cd629U,
|
||||
0xa4b2af31U, 0x3f23312aU, 0xa59430c6U, 0xa266c035U,
|
||||
0x4ebc3774U, 0x82caa6fcU, 0x90d0b0e0U, 0xa7d81533U,
|
||||
0x04984af1U, 0xecdaf741U, 0xcd500e7fU, 0x91f62f17U,
|
||||
0x4dd68d76U, 0xefb04d43U, 0xaa4d54ccU, 0x9604dfe4U,
|
||||
0xd1b5e39eU, 0x6a881b4cU, 0x2c1fb8c1U, 0x65517f46U,
|
||||
0x5eea049dU, 0x8c355d01U, 0x877473faU, 0x0b412efbU,
|
||||
0x671d5ab3U, 0xdbd25292U, 0x105633e9U, 0xd647136dU,
|
||||
0xd7618c9aU, 0xa10c7a37U, 0xf8148e59U, 0x133c89ebU,
|
||||
0xa927eeceU, 0x61c935b7U, 0x1ce5ede1U, 0x47b13c7aU,
|
||||
0xd2df599cU, 0xf2733f55U, 0x14ce7918U, 0xc737bf73U,
|
||||
0xf7cdea53U, 0xfdaa5b5fU, 0x3d6f14dfU, 0x44db8678U,
|
||||
0xaff381caU, 0x68c43eb9U, 0x24342c38U, 0xa3405fc2U,
|
||||
0x1dc37216U, 0xe2250cbcU, 0x3c498b28U, 0x0d9541ffU,
|
||||
0xa8017139U, 0x0cb3de08U, 0xb4e49cd8U, 0x56c19064U,
|
||||
0xcb84617bU, 0x32b670d5U, 0x6c5c7448U, 0xb85742d0U,
|
||||
};
|
||||
|
||||
uint32 Td4[256] =
|
||||
{
|
||||
0x52525252U, 0x09090909U, 0x6a6a6a6aU, 0xd5d5d5d5U,
|
||||
0x30303030U, 0x36363636U, 0xa5a5a5a5U, 0x38383838U,
|
||||
0xbfbfbfbfU, 0x40404040U, 0xa3a3a3a3U, 0x9e9e9e9eU,
|
||||
0x81818181U, 0xf3f3f3f3U, 0xd7d7d7d7U, 0xfbfbfbfbU,
|
||||
0x7c7c7c7cU, 0xe3e3e3e3U, 0x39393939U, 0x82828282U,
|
||||
0x9b9b9b9bU, 0x2f2f2f2fU, 0xffffffffU, 0x87878787U,
|
||||
0x34343434U, 0x8e8e8e8eU, 0x43434343U, 0x44444444U,
|
||||
0xc4c4c4c4U, 0xdedededeU, 0xe9e9e9e9U, 0xcbcbcbcbU,
|
||||
0x54545454U, 0x7b7b7b7bU, 0x94949494U, 0x32323232U,
|
||||
0xa6a6a6a6U, 0xc2c2c2c2U, 0x23232323U, 0x3d3d3d3dU,
|
||||
0xeeeeeeeeU, 0x4c4c4c4cU, 0x95959595U, 0x0b0b0b0bU,
|
||||
0x42424242U, 0xfafafafaU, 0xc3c3c3c3U, 0x4e4e4e4eU,
|
||||
0x08080808U, 0x2e2e2e2eU, 0xa1a1a1a1U, 0x66666666U,
|
||||
0x28282828U, 0xd9d9d9d9U, 0x24242424U, 0xb2b2b2b2U,
|
||||
0x76767676U, 0x5b5b5b5bU, 0xa2a2a2a2U, 0x49494949U,
|
||||
0x6d6d6d6dU, 0x8b8b8b8bU, 0xd1d1d1d1U, 0x25252525U,
|
||||
0x72727272U, 0xf8f8f8f8U, 0xf6f6f6f6U, 0x64646464U,
|
||||
0x86868686U, 0x68686868U, 0x98989898U, 0x16161616U,
|
||||
0xd4d4d4d4U, 0xa4a4a4a4U, 0x5c5c5c5cU, 0xccccccccU,
|
||||
0x5d5d5d5dU, 0x65656565U, 0xb6b6b6b6U, 0x92929292U,
|
||||
0x6c6c6c6cU, 0x70707070U, 0x48484848U, 0x50505050U,
|
||||
0xfdfdfdfdU, 0xededededU, 0xb9b9b9b9U, 0xdadadadaU,
|
||||
0x5e5e5e5eU, 0x15151515U, 0x46464646U, 0x57575757U,
|
||||
0xa7a7a7a7U, 0x8d8d8d8dU, 0x9d9d9d9dU, 0x84848484U,
|
||||
0x90909090U, 0xd8d8d8d8U, 0xababababU, 0x00000000U,
|
||||
0x8c8c8c8cU, 0xbcbcbcbcU, 0xd3d3d3d3U, 0x0a0a0a0aU,
|
||||
0xf7f7f7f7U, 0xe4e4e4e4U, 0x58585858U, 0x05050505U,
|
||||
0xb8b8b8b8U, 0xb3b3b3b3U, 0x45454545U, 0x06060606U,
|
||||
0xd0d0d0d0U, 0x2c2c2c2cU, 0x1e1e1e1eU, 0x8f8f8f8fU,
|
||||
0xcacacacaU, 0x3f3f3f3fU, 0x0f0f0f0fU, 0x02020202U,
|
||||
0xc1c1c1c1U, 0xafafafafU, 0xbdbdbdbdU, 0x03030303U,
|
||||
0x01010101U, 0x13131313U, 0x8a8a8a8aU, 0x6b6b6b6bU,
|
||||
0x3a3a3a3aU, 0x91919191U, 0x11111111U, 0x41414141U,
|
||||
0x4f4f4f4fU, 0x67676767U, 0xdcdcdcdcU, 0xeaeaeaeaU,
|
||||
0x97979797U, 0xf2f2f2f2U, 0xcfcfcfcfU, 0xcecececeU,
|
||||
0xf0f0f0f0U, 0xb4b4b4b4U, 0xe6e6e6e6U, 0x73737373U,
|
||||
0x96969696U, 0xacacacacU, 0x74747474U, 0x22222222U,
|
||||
0xe7e7e7e7U, 0xadadadadU, 0x35353535U, 0x85858585U,
|
||||
0xe2e2e2e2U, 0xf9f9f9f9U, 0x37373737U, 0xe8e8e8e8U,
|
||||
0x1c1c1c1cU, 0x75757575U, 0xdfdfdfdfU, 0x6e6e6e6eU,
|
||||
0x47474747U, 0xf1f1f1f1U, 0x1a1a1a1aU, 0x71717171U,
|
||||
0x1d1d1d1dU, 0x29292929U, 0xc5c5c5c5U, 0x89898989U,
|
||||
0x6f6f6f6fU, 0xb7b7b7b7U, 0x62626262U, 0x0e0e0e0eU,
|
||||
0xaaaaaaaaU, 0x18181818U, 0xbebebebeU, 0x1b1b1b1bU,
|
||||
0xfcfcfcfcU, 0x56565656U, 0x3e3e3e3eU, 0x4b4b4b4bU,
|
||||
0xc6c6c6c6U, 0xd2d2d2d2U, 0x79797979U, 0x20202020U,
|
||||
0x9a9a9a9aU, 0xdbdbdbdbU, 0xc0c0c0c0U, 0xfefefefeU,
|
||||
0x78787878U, 0xcdcdcdcdU, 0x5a5a5a5aU, 0xf4f4f4f4U,
|
||||
0x1f1f1f1fU, 0xddddddddU, 0xa8a8a8a8U, 0x33333333U,
|
||||
0x88888888U, 0x07070707U, 0xc7c7c7c7U, 0x31313131U,
|
||||
0xb1b1b1b1U, 0x12121212U, 0x10101010U, 0x59595959U,
|
||||
0x27272727U, 0x80808080U, 0xececececU, 0x5f5f5f5fU,
|
||||
0x60606060U, 0x51515151U, 0x7f7f7f7fU, 0xa9a9a9a9U,
|
||||
0x19191919U, 0xb5b5b5b5U, 0x4a4a4a4aU, 0x0d0d0d0dU,
|
||||
0x2d2d2d2dU, 0xe5e5e5e5U, 0x7a7a7a7aU, 0x9f9f9f9fU,
|
||||
0x93939393U, 0xc9c9c9c9U, 0x9c9c9c9cU, 0xefefefefU,
|
||||
0xa0a0a0a0U, 0xe0e0e0e0U, 0x3b3b3b3bU, 0x4d4d4d4dU,
|
||||
0xaeaeaeaeU, 0x2a2a2a2aU, 0xf5f5f5f5U, 0xb0b0b0b0U,
|
||||
0xc8c8c8c8U, 0xebebebebU, 0xbbbbbbbbU, 0x3c3c3c3cU,
|
||||
0x83838383U, 0x53535353U, 0x99999999U, 0x61616161U,
|
||||
0x17171717U, 0x2b2b2b2bU, 0x04040404U, 0x7e7e7e7eU,
|
||||
0xbabababaU, 0x77777777U, 0xd6d6d6d6U, 0x26262626U,
|
||||
0xe1e1e1e1U, 0x69696969U, 0x14141414U, 0x63636363U,
|
||||
0x55555555U, 0x21212121U, 0x0c0c0c0cU, 0x7d7d7d7dU,
|
||||
};
|
||||
#undef uint32
|
||||
|
||||
+33
@@ -0,0 +1,33 @@
|
||||
/******************************************************************************
|
||||
* FILE PURPOSE: This file contains the cos/sin table
|
||||
*******************************************************************************
|
||||
*
|
||||
* FILE NAME: phy_cosinTable.c
|
||||
*
|
||||
* DESCRIPTION: COS and SIN Lookup Table, Length 1024
|
||||
*
|
||||
* Copyright (c) 2012 Texas Instruments Inc.
|
||||
* All Rights Reserved This program is the confidential and proprietary
|
||||
* product of Texas Instruments Inc. Any Unauthorized use, reproduction or
|
||||
* transfer of this program is strictly prohibited.
|
||||
*
|
||||
* HISTORY:
|
||||
*
|
||||
* 01/13/2013 Written
|
||||
*
|
||||
*
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
#include <phy_sunTables.h>
|
||||
|
||||
//#pragma DATA_SECTION(PHY_cosinTable, "sunPhyTable");
|
||||
#pragma DATA_SECTION(PHY_cosinTable,"sunPhyTable");
|
||||
|
||||
/* Length 1024 COS/SIN table, arranged in COS(1), SIN(1), COS(2), SIN(2), ...
|
||||
* in Q14 format */
|
||||
const SINT16 PHY_cosinTable[PHY_COSIN_LUT_SIZE * 2] =
|
||||
{
|
||||
#include "PHY_cosinTable_1024.txt"
|
||||
};
|
||||
|
||||
+259
@@ -0,0 +1,259 @@
|
||||
// 1024-point COS and SIN Table in Q14, offset by half sample
|
||||
// cos = round(2^14 * cos(2*pi*(0+0.5:Npoints-1+0.5)/Npoints));
|
||||
// sin = round(2^14 * sin(2*pi*(0+0.5:Npoints-1+0.5)/Npoints));
|
||||
16383, 50, 16383, 151, 16382, 251, 16380, 352,
|
||||
16378, 452, 16375, 553, 16371, 653, 16367, 754,
|
||||
16362, 854, 16356, 955, 16350, 1055, 16343, 1155,
|
||||
16336, 1255, 16328, 1356, 16319, 1456, 16310, 1556,
|
||||
16300, 1656, 16290, 1756, 16279, 1856, 16267, 1956,
|
||||
16255, 2055, 16242, 2155, 16228, 2255, 16214, 2354,
|
||||
16199, 2454, 16184, 2553, 16168, 2652, 16151, 2752,
|
||||
16134, 2851, 16116, 2949, 16098, 3048, 16079, 3147,
|
||||
16059, 3246, 16039, 3344, 16018, 3442, 15997, 3541,
|
||||
15975, 3639, 15952, 3737, 15929, 3835, 15905, 3932,
|
||||
15881, 4030, 15856, 4127, 15830, 4224, 15804, 4321,
|
||||
15777, 4418, 15750, 4515, 15722, 4612, 15693, 4708,
|
||||
15664, 4804, 15634, 4900, 15604, 4996, 15573, 5092,
|
||||
15541, 5187, 15509, 5282, 15476, 5377, 15443, 5472,
|
||||
15409, 5567, 15375, 5661, 15340, 5756, 15304, 5850,
|
||||
15268, 5943, 15231, 6037, 15194, 6130, 15156, 6223,
|
||||
15118, 6316, 15078, 6409, 15039, 6501, 14999, 6593,
|
||||
14958, 6685, 14917, 6777, 14875, 6868, 14832, 6960,
|
||||
14789, 7050, 14746, 7141, 14702, 7231, 14657, 7321,
|
||||
14612, 7411, 14566, 7501, 14520, 7590, 14473, 7679,
|
||||
14426, 7768, 14378, 7856, 14329, 7944, 14280, 8032,
|
||||
14231, 8119, 14181, 8207, 14130, 8293, 14079, 8380,
|
||||
14027, 8466, 13975, 8552, 13922, 8638, 13869, 8723,
|
||||
13815, 8808, 13761, 8892, 13706, 8977, 13651, 9061,
|
||||
13595, 9144, 13538, 9227, 13482, 9310, 13424, 9393,
|
||||
13366, 9475, 13308, 9557, 13249, 9638, 13190, 9720,
|
||||
13130, 9800, 13069, 9881, 13008, 9961, 12947, 10040,
|
||||
12885, 10120, 12823, 10198, 12760, 10277, 12697, 10355,
|
||||
12633, 10433, 12569, 10510, 12504, 10587, 12439, 10663,
|
||||
12373, 10740, 12307, 10815, 12240, 10891, 12173, 10966,
|
||||
12106, 11040, 12038, 11114, 11970, 11188, 11901, 11261,
|
||||
11831, 11334, 11762, 11406, 11691, 11478, 11621, 11550,
|
||||
11550, 11621, 11478, 11691, 11406, 11762, 11334, 11831,
|
||||
11261, 11901, 11188, 11970, 11114, 12038, 11040, 12106,
|
||||
10966, 12173, 10891, 12240, 10815, 12307, 10740, 12373,
|
||||
10663, 12439, 10587, 12504, 10510, 12569, 10433, 12633,
|
||||
10355, 12697, 10277, 12760, 10198, 12823, 10120, 12885,
|
||||
10040, 12947, 9961, 13008, 9881, 13069, 9800, 13130,
|
||||
9720, 13190, 9638, 13249, 9557, 13308, 9475, 13366,
|
||||
9393, 13424, 9310, 13482, 9227, 13538, 9144, 13595,
|
||||
9061, 13651, 8977, 13706, 8892, 13761, 8808, 13815,
|
||||
8723, 13869, 8638, 13922, 8552, 13975, 8466, 14027,
|
||||
8380, 14079, 8293, 14130, 8207, 14181, 8119, 14231,
|
||||
8032, 14280, 7944, 14329, 7856, 14378, 7768, 14426,
|
||||
7679, 14473, 7590, 14520, 7501, 14566, 7411, 14612,
|
||||
7321, 14657, 7231, 14702, 7141, 14746, 7050, 14789,
|
||||
6960, 14832, 6868, 14875, 6777, 14917, 6685, 14958,
|
||||
6593, 14999, 6501, 15039, 6409, 15078, 6316, 15118,
|
||||
6223, 15156, 6130, 15194, 6037, 15231, 5943, 15268,
|
||||
5850, 15304, 5756, 15340, 5661, 15375, 5567, 15409,
|
||||
5472, 15443, 5377, 15476, 5282, 15509, 5187, 15541,
|
||||
5092, 15573, 4996, 15604, 4900, 15634, 4804, 15664,
|
||||
4708, 15693, 4612, 15722, 4515, 15750, 4418, 15777,
|
||||
4321, 15804, 4224, 15830, 4127, 15856, 4030, 15881,
|
||||
3932, 15905, 3835, 15929, 3737, 15952, 3639, 15975,
|
||||
3541, 15997, 3442, 16018, 3344, 16039, 3246, 16059,
|
||||
3147, 16079, 3048, 16098, 2949, 16116, 2851, 16134,
|
||||
2752, 16151, 2652, 16168, 2553, 16184, 2454, 16199,
|
||||
2354, 16214, 2255, 16228, 2155, 16242, 2055, 16255,
|
||||
1956, 16267, 1856, 16279, 1756, 16290, 1656, 16300,
|
||||
1556, 16310, 1456, 16319, 1356, 16328, 1255, 16336,
|
||||
1155, 16343, 1055, 16350, 955, 16356, 854, 16362,
|
||||
754, 16367, 653, 16371, 553, 16375, 452, 16378,
|
||||
352, 16380, 251, 16382, 151, 16383, 50, 16383,
|
||||
-50, 16383, -151, 16383, -251, 16382, -352, 16380,
|
||||
-452, 16378, -553, 16375, -653, 16371, -754, 16367,
|
||||
-854, 16362, -955, 16356, -1055, 16350, -1155, 16343,
|
||||
-1255, 16336, -1356, 16328, -1456, 16319, -1556, 16310,
|
||||
-1656, 16300, -1756, 16290, -1856, 16279, -1956, 16267,
|
||||
-2055, 16255, -2155, 16242, -2255, 16228, -2354, 16214,
|
||||
-2454, 16199, -2553, 16184, -2652, 16168, -2752, 16151,
|
||||
-2851, 16134, -2949, 16116, -3048, 16098, -3147, 16079,
|
||||
-3246, 16059, -3344, 16039, -3442, 16018, -3541, 15997,
|
||||
-3639, 15975, -3737, 15952, -3835, 15929, -3932, 15905,
|
||||
-4030, 15881, -4127, 15856, -4224, 15830, -4321, 15804,
|
||||
-4418, 15777, -4515, 15750, -4612, 15722, -4708, 15693,
|
||||
-4804, 15664, -4900, 15634, -4996, 15604, -5092, 15573,
|
||||
-5187, 15541, -5282, 15509, -5377, 15476, -5472, 15443,
|
||||
-5567, 15409, -5661, 15375, -5756, 15340, -5850, 15304,
|
||||
-5943, 15268, -6037, 15231, -6130, 15194, -6223, 15156,
|
||||
-6316, 15118, -6409, 15078, -6501, 15039, -6593, 14999,
|
||||
-6685, 14958, -6777, 14917, -6868, 14875, -6960, 14832,
|
||||
-7050, 14789, -7141, 14746, -7231, 14702, -7321, 14657,
|
||||
-7411, 14612, -7501, 14566, -7590, 14520, -7679, 14473,
|
||||
-7768, 14426, -7856, 14378, -7944, 14329, -8032, 14280,
|
||||
-8119, 14231, -8207, 14181, -8293, 14130, -8380, 14079,
|
||||
-8466, 14027, -8552, 13975, -8638, 13922, -8723, 13869,
|
||||
-8808, 13815, -8892, 13761, -8977, 13706, -9061, 13651,
|
||||
-9144, 13595, -9227, 13538, -9310, 13482, -9393, 13424,
|
||||
-9475, 13366, -9557, 13308, -9638, 13249, -9720, 13190,
|
||||
-9800, 13130, -9881, 13069, -9961, 13008, -10040, 12947,
|
||||
-10120, 12885, -10198, 12823, -10277, 12760, -10355, 12697,
|
||||
-10433, 12633, -10510, 12569, -10587, 12504, -10663, 12439,
|
||||
-10740, 12373, -10815, 12307, -10891, 12240, -10966, 12173,
|
||||
-11040, 12106, -11114, 12038, -11188, 11970, -11261, 11901,
|
||||
-11334, 11831, -11406, 11762, -11478, 11691, -11550, 11621,
|
||||
-11621, 11550, -11691, 11478, -11762, 11406, -11831, 11334,
|
||||
-11901, 11261, -11970, 11188, -12038, 11114, -12106, 11040,
|
||||
-12173, 10966, -12240, 10891, -12307, 10815, -12373, 10740,
|
||||
-12439, 10663, -12504, 10587, -12569, 10510, -12633, 10433,
|
||||
-12697, 10355, -12760, 10277, -12823, 10198, -12885, 10120,
|
||||
-12947, 10040, -13008, 9961, -13069, 9881, -13130, 9800,
|
||||
-13190, 9720, -13249, 9638, -13308, 9557, -13366, 9475,
|
||||
-13424, 9393, -13482, 9310, -13538, 9227, -13595, 9144,
|
||||
-13651, 9061, -13706, 8977, -13761, 8892, -13815, 8808,
|
||||
-13869, 8723, -13922, 8638, -13975, 8552, -14027, 8466,
|
||||
-14079, 8380, -14130, 8293, -14181, 8207, -14231, 8119,
|
||||
-14280, 8032, -14329, 7944, -14378, 7856, -14426, 7768,
|
||||
-14473, 7679, -14520, 7590, -14566, 7501, -14612, 7411,
|
||||
-14657, 7321, -14702, 7231, -14746, 7141, -14789, 7050,
|
||||
-14832, 6960, -14875, 6868, -14917, 6777, -14958, 6685,
|
||||
-14999, 6593, -15039, 6501, -15078, 6409, -15118, 6316,
|
||||
-15156, 6223, -15194, 6130, -15231, 6037, -15268, 5943,
|
||||
-15304, 5850, -15340, 5756, -15375, 5661, -15409, 5567,
|
||||
-15443, 5472, -15476, 5377, -15509, 5282, -15541, 5187,
|
||||
-15573, 5092, -15604, 4996, -15634, 4900, -15664, 4804,
|
||||
-15693, 4708, -15722, 4612, -15750, 4515, -15777, 4418,
|
||||
-15804, 4321, -15830, 4224, -15856, 4127, -15881, 4030,
|
||||
-15905, 3932, -15929, 3835, -15952, 3737, -15975, 3639,
|
||||
-15997, 3541, -16018, 3442, -16039, 3344, -16059, 3246,
|
||||
-16079, 3147, -16098, 3048, -16116, 2949, -16134, 2851,
|
||||
-16151, 2752, -16168, 2652, -16184, 2553, -16199, 2454,
|
||||
-16214, 2354, -16228, 2255, -16242, 2155, -16255, 2055,
|
||||
-16267, 1956, -16279, 1856, -16290, 1756, -16300, 1656,
|
||||
-16310, 1556, -16319, 1456, -16328, 1356, -16336, 1255,
|
||||
-16343, 1155, -16350, 1055, -16356, 955, -16362, 854,
|
||||
-16367, 754, -16371, 653, -16375, 553, -16378, 452,
|
||||
-16380, 352, -16382, 251, -16383, 151, -16384, 50,
|
||||
-16384, -50, -16383, -151, -16382, -251, -16380, -352,
|
||||
-16378, -452, -16375, -553, -16371, -653, -16367, -754,
|
||||
-16362, -854, -16356, -955, -16350, -1055, -16343, -1155,
|
||||
-16336, -1255, -16328, -1356, -16319, -1456, -16310, -1556,
|
||||
-16300, -1656, -16290, -1756, -16279, -1856, -16267, -1956,
|
||||
-16255, -2055, -16242, -2155, -16228, -2255, -16214, -2354,
|
||||
-16199, -2454, -16184, -2553, -16168, -2652, -16151, -2752,
|
||||
-16134, -2851, -16116, -2949, -16098, -3048, -16079, -3147,
|
||||
-16059, -3246, -16039, -3344, -16018, -3442, -15997, -3541,
|
||||
-15975, -3639, -15952, -3737, -15929, -3835, -15905, -3932,
|
||||
-15881, -4030, -15856, -4127, -15830, -4224, -15804, -4321,
|
||||
-15777, -4418, -15750, -4515, -15722, -4612, -15693, -4708,
|
||||
-15664, -4804, -15634, -4900, -15604, -4996, -15573, -5092,
|
||||
-15541, -5187, -15509, -5282, -15476, -5377, -15443, -5472,
|
||||
-15409, -5567, -15375, -5661, -15340, -5756, -15304, -5850,
|
||||
-15268, -5943, -15231, -6037, -15194, -6130, -15156, -6223,
|
||||
-15118, -6316, -15078, -6409, -15039, -6501, -14999, -6593,
|
||||
-14958, -6685, -14917, -6777, -14875, -6868, -14832, -6960,
|
||||
-14789, -7050, -14746, -7141, -14702, -7231, -14657, -7321,
|
||||
-14612, -7411, -14566, -7501, -14520, -7590, -14473, -7679,
|
||||
-14426, -7768, -14378, -7856, -14329, -7944, -14280, -8032,
|
||||
-14231, -8119, -14181, -8207, -14130, -8293, -14079, -8380,
|
||||
-14027, -8466, -13975, -8552, -13922, -8638, -13869, -8723,
|
||||
-13815, -8808, -13761, -8892, -13706, -8977, -13651, -9061,
|
||||
-13595, -9144, -13538, -9227, -13482, -9310, -13424, -9393,
|
||||
-13366, -9475, -13308, -9557, -13249, -9638, -13190, -9720,
|
||||
-13130, -9800, -13069, -9881, -13008, -9961, -12947, -10040,
|
||||
-12885, -10120, -12823, -10198, -12760, -10277, -12697, -10355,
|
||||
-12633, -10433, -12569, -10510, -12504, -10587, -12439, -10663,
|
||||
-12373, -10740, -12307, -10815, -12240, -10891, -12173, -10966,
|
||||
-12106, -11040, -12038, -11114, -11970, -11188, -11901, -11261,
|
||||
-11831, -11334, -11762, -11406, -11691, -11478, -11621, -11550,
|
||||
-11550, -11621, -11478, -11691, -11406, -11762, -11334, -11831,
|
||||
-11261, -11901, -11188, -11970, -11114, -12038, -11040, -12106,
|
||||
-10966, -12173, -10891, -12240, -10815, -12307, -10740, -12373,
|
||||
-10663, -12439, -10587, -12504, -10510, -12569, -10433, -12633,
|
||||
-10355, -12697, -10277, -12760, -10198, -12823, -10120, -12885,
|
||||
-10040, -12947, -9961, -13008, -9881, -13069, -9800, -13130,
|
||||
-9720, -13190, -9638, -13249, -9557, -13308, -9475, -13366,
|
||||
-9393, -13424, -9310, -13482, -9227, -13538, -9144, -13595,
|
||||
-9061, -13651, -8977, -13706, -8892, -13761, -8808, -13815,
|
||||
-8723, -13869, -8638, -13922, -8552, -13975, -8466, -14027,
|
||||
-8380, -14079, -8293, -14130, -8207, -14181, -8119, -14231,
|
||||
-8032, -14280, -7944, -14329, -7856, -14378, -7768, -14426,
|
||||
-7679, -14473, -7590, -14520, -7501, -14566, -7411, -14612,
|
||||
-7321, -14657, -7231, -14702, -7141, -14746, -7050, -14789,
|
||||
-6960, -14832, -6868, -14875, -6777, -14917, -6685, -14958,
|
||||
-6593, -14999, -6501, -15039, -6409, -15078, -6316, -15118,
|
||||
-6223, -15156, -6130, -15194, -6037, -15231, -5943, -15268,
|
||||
-5850, -15304, -5756, -15340, -5661, -15375, -5567, -15409,
|
||||
-5472, -15443, -5377, -15476, -5282, -15509, -5187, -15541,
|
||||
-5092, -15573, -4996, -15604, -4900, -15634, -4804, -15664,
|
||||
-4708, -15693, -4612, -15722, -4515, -15750, -4418, -15777,
|
||||
-4321, -15804, -4224, -15830, -4127, -15856, -4030, -15881,
|
||||
-3932, -15905, -3835, -15929, -3737, -15952, -3639, -15975,
|
||||
-3541, -15997, -3442, -16018, -3344, -16039, -3246, -16059,
|
||||
-3147, -16079, -3048, -16098, -2949, -16116, -2851, -16134,
|
||||
-2752, -16151, -2652, -16168, -2553, -16184, -2454, -16199,
|
||||
-2354, -16214, -2255, -16228, -2155, -16242, -2055, -16255,
|
||||
-1956, -16267, -1856, -16279, -1756, -16290, -1656, -16300,
|
||||
-1556, -16310, -1456, -16319, -1356, -16328, -1255, -16336,
|
||||
-1155, -16343, -1055, -16350, -955, -16356, -854, -16362,
|
||||
-754, -16367, -653, -16371, -553, -16375, -452, -16378,
|
||||
-352, -16380, -251, -16382, -151, -16383, -50, -16384,
|
||||
50, -16384, 151, -16383, 251, -16382, 352, -16380,
|
||||
452, -16378, 553, -16375, 653, -16371, 754, -16367,
|
||||
854, -16362, 955, -16356, 1055, -16350, 1155, -16343,
|
||||
1255, -16336, 1356, -16328, 1456, -16319, 1556, -16310,
|
||||
1656, -16300, 1756, -16290, 1856, -16279, 1956, -16267,
|
||||
2055, -16255, 2155, -16242, 2255, -16228, 2354, -16214,
|
||||
2454, -16199, 2553, -16184, 2652, -16168, 2752, -16151,
|
||||
2851, -16134, 2949, -16116, 3048, -16098, 3147, -16079,
|
||||
3246, -16059, 3344, -16039, 3442, -16018, 3541, -15997,
|
||||
3639, -15975, 3737, -15952, 3835, -15929, 3932, -15905,
|
||||
4030, -15881, 4127, -15856, 4224, -15830, 4321, -15804,
|
||||
4418, -15777, 4515, -15750, 4612, -15722, 4708, -15693,
|
||||
4804, -15664, 4900, -15634, 4996, -15604, 5092, -15573,
|
||||
5187, -15541, 5282, -15509, 5377, -15476, 5472, -15443,
|
||||
5567, -15409, 5661, -15375, 5756, -15340, 5850, -15304,
|
||||
5943, -15268, 6037, -15231, 6130, -15194, 6223, -15156,
|
||||
6316, -15118, 6409, -15078, 6501, -15039, 6593, -14999,
|
||||
6685, -14958, 6777, -14917, 6868, -14875, 6960, -14832,
|
||||
7050, -14789, 7141, -14746, 7231, -14702, 7321, -14657,
|
||||
7411, -14612, 7501, -14566, 7590, -14520, 7679, -14473,
|
||||
7768, -14426, 7856, -14378, 7944, -14329, 8032, -14280,
|
||||
8119, -14231, 8207, -14181, 8293, -14130, 8380, -14079,
|
||||
8466, -14027, 8552, -13975, 8638, -13922, 8723, -13869,
|
||||
8808, -13815, 8892, -13761, 8977, -13706, 9061, -13651,
|
||||
9144, -13595, 9227, -13538, 9310, -13482, 9393, -13424,
|
||||
9475, -13366, 9557, -13308, 9638, -13249, 9720, -13190,
|
||||
9800, -13130, 9881, -13069, 9961, -13008, 10040, -12947,
|
||||
10120, -12885, 10198, -12823, 10277, -12760, 10355, -12697,
|
||||
10433, -12633, 10510, -12569, 10587, -12504, 10663, -12439,
|
||||
10740, -12373, 10815, -12307, 10891, -12240, 10966, -12173,
|
||||
11040, -12106, 11114, -12038, 11188, -11970, 11261, -11901,
|
||||
11334, -11831, 11406, -11762, 11478, -11691, 11550, -11621,
|
||||
11621, -11550, 11691, -11478, 11762, -11406, 11831, -11334,
|
||||
11901, -11261, 11970, -11188, 12038, -11114, 12106, -11040,
|
||||
12173, -10966, 12240, -10891, 12307, -10815, 12373, -10740,
|
||||
12439, -10663, 12504, -10587, 12569, -10510, 12633, -10433,
|
||||
12697, -10355, 12760, -10277, 12823, -10198, 12885, -10120,
|
||||
12947, -10040, 13008, -9961, 13069, -9881, 13130, -9800,
|
||||
13190, -9720, 13249, -9638, 13308, -9557, 13366, -9475,
|
||||
13424, -9393, 13482, -9310, 13538, -9227, 13595, -9144,
|
||||
13651, -9061, 13706, -8977, 13761, -8892, 13815, -8808,
|
||||
13869, -8723, 13922, -8638, 13975, -8552, 14027, -8466,
|
||||
14079, -8380, 14130, -8293, 14181, -8207, 14231, -8119,
|
||||
14280, -8032, 14329, -7944, 14378, -7856, 14426, -7768,
|
||||
14473, -7679, 14520, -7590, 14566, -7501, 14612, -7411,
|
||||
14657, -7321, 14702, -7231, 14746, -7141, 14789, -7050,
|
||||
14832, -6960, 14875, -6868, 14917, -6777, 14958, -6685,
|
||||
14999, -6593, 15039, -6501, 15078, -6409, 15118, -6316,
|
||||
15156, -6223, 15194, -6130, 15231, -6037, 15268, -5943,
|
||||
15304, -5850, 15340, -5756, 15375, -5661, 15409, -5567,
|
||||
15443, -5472, 15476, -5377, 15509, -5282, 15541, -5187,
|
||||
15573, -5092, 15604, -4996, 15634, -4900, 15664, -4804,
|
||||
15693, -4708, 15722, -4612, 15750, -4515, 15777, -4418,
|
||||
15804, -4321, 15830, -4224, 15856, -4127, 15881, -4030,
|
||||
15905, -3932, 15929, -3835, 15952, -3737, 15975, -3639,
|
||||
15997, -3541, 16018, -3442, 16039, -3344, 16059, -3246,
|
||||
16079, -3147, 16098, -3048, 16116, -2949, 16134, -2851,
|
||||
16151, -2752, 16168, -2652, 16184, -2553, 16199, -2454,
|
||||
16214, -2354, 16228, -2255, 16242, -2155, 16255, -2055,
|
||||
16267, -1956, 16279, -1856, 16290, -1756, 16300, -1656,
|
||||
16310, -1556, 16319, -1456, 16328, -1356, 16336, -1255,
|
||||
16343, -1155, 16350, -1055, 16356, -955, 16362, -854,
|
||||
16367, -754, 16371, -653, 16375, -553, 16378, -452,
|
||||
16380, -352, 16382, -251, 16383, -151, 16383, -50,
|
||||
+73
@@ -0,0 +1,73 @@
|
||||
/******************************************************************************
|
||||
* FILE PURPOSE: This file contains DSSS despreading LUT
|
||||
*******************************************************************************
|
||||
*
|
||||
* FILE NAME: phy_dsssDesprdTable.c
|
||||
*
|
||||
* DESCRIPTION: This file contains LUTs for DSSS despreading
|
||||
*
|
||||
*
|
||||
* HISTORY:
|
||||
* 03/23/2012 MFu initial revision.
|
||||
* 07/23/2012 JK Added 16_4 and 16_1 Despreading
|
||||
* LIST OF FUNCTIONS:
|
||||
*
|
||||
*
|
||||
* Copyright (c) 2012 Texas Instruments Inc. All rights reserved.
|
||||
******************************************************************************/
|
||||
#include <phy_sunTables.h>
|
||||
|
||||
#pragma DATA_SECTION(PHY_dsssDesprd_8_4_table, "sunPhyTable");
|
||||
#pragma DATA_SECTION(PHY_dsssDesprd_16_4_table, "sunPhyTable");
|
||||
#pragma DATA_SECTION(PHY_dsssDesprd_16_1_0_table, "sunPhyTable");
|
||||
#pragma DATA_SECTION(PHY_dsssDesprd_16_1_1_table, "sunPhyTable");
|
||||
|
||||
/* LUT for (8, 4) spreading */
|
||||
const SINT16 PHY_dsssDesprd_8_4_table[PHY_DSSS_DESPRD_8_4_LUT_NUM_ROWS][PHY_DSSS_DESPRD_8_4_LUT_NUM_COLS] =
|
||||
{ // b0b1b2b3 c0c1..c7
|
||||
{ 1, 1, 1, 1, 1, 1, 1, -1}, // 0000 0000 0001
|
||||
{-1, -1, 1, -1, 1, 1, 1, 1}, // 1000 1101 0000
|
||||
{ 1, -1, -1, 1, -1, 1, 1, 1}, // 0100 0110 1000
|
||||
{-1, 1, -1, -1, -1, 1, 1, -1}, // 1100 1011 1001
|
||||
{-1, -1, -1, 1, 1, -1, 1, -1}, // 0010 1110 0101
|
||||
{ 1, 1, -1, -1, 1, -1, 1, 1}, // 1010 0011 0100
|
||||
{-1, 1, 1, 1, -1, -1, 1, 1}, // 0110 1000 1100
|
||||
{ 1, -1, 1, -1, -1, -1, 1, -1}, // 1110 0101 1101
|
||||
};
|
||||
|
||||
/* LUT for (16, 4) spreading */
|
||||
const SINT16 PHY_dsssDesprd_16_4_table[PHY_DSSS_DESPRD_16_4_LUT_NUM_ROWS][PHY_DSSS_DESPRD_16_4_LUT_NUM_COLS] =
|
||||
{
|
||||
{ 1, 1, -1, -1, -1, -1, -1, 1, 1, 1, -1, 1, 1, -1, 1, -1}, // 0000 0011 1110 0010 0101
|
||||
{ 1, -1, 1, 1, -1, -1, -1, -1, -1, 1, 1, 1, -1, 1, 1, -1}, // 1000 0100 1111 1000 1001
|
||||
{ 1, -1, 1, -1, 1, 1, -1, -1, -1, -1, -1, 1, 1, 1, -1, 1}, // 0100 0101 0011 1110 0010
|
||||
{-1, 1, 1, -1, 1, -1, 1, 1, -1, -1, -1, -1, -1, 1, 1, 1}, // 1100 1001 1100 1111 1000
|
||||
{ 1, 1, -1, 1, 1, -1, 1, -1, 1, 1, -1, -1, -1, -1, -1, 1}, // 0010 0010 0110 0011 1110
|
||||
{-1, 1, 1, 1, -1, 1, 1, -1, 1, -1, 1, 1, -1, -1, -1, -1}, // 1010 1000 1001 0000 1111
|
||||
{-1, -1, -1, 1, 1, 1, -1, 1, 1, -1, 1, -1, 1, 1, -1, -1}, // 0110 1110 0010 0110 0011
|
||||
{-1, -1, -1, -1, -1, 1, 1, 1, -1, 1, 1, -1, 1, -1, 1, 1}, // 1110 1111 1000 1001 0100
|
||||
|
||||
{ 1, -1, -1, 1, -1, 1, -1, -1, 1, -1, -1, -1, 1, 1, 1, 1}, // 0001 0110 1011 0111 0000
|
||||
{ 1, 1, 1, -1, -1, 1, -1, 1, -1, -1, 1, -1, -1, -1, 1, 1}, // 1001 0001 1010 1101 1100
|
||||
{ 1, 1, 1, 1, 1, -1, -1, 1, -1, 1, -1, -1, 1, -1, -1, -1}, // 0101 0000 0110 1011 0111
|
||||
{-1, -1, 1, 1, 1, 1, 1, -1, -1, 1, -1, 1, -1, -1, 1, -1}, // 1101 1100 0001 1010 1101
|
||||
{ 1, -1, -1, -1, 1, 1, 1, 1, 1, -1, -1, 1, -1, 1, -1, -1}, // 0011 0111 0000 0110 1011
|
||||
{-1, -1, 1, -1, -1, -1, 1, 1, 1, 1, 1, -1, -1, 1, -1, 1}, // 1011 1101 1100 0001 1010
|
||||
{-1, 1, -1, -1, 1, -1, -1, -1, 1, 1, 1, 1, 1, -1, -1, 1}, // 0111 1011 0111 0000 0110
|
||||
{-1, 1, -1, 1, -1, -1, 1, -1, -1, -1, 1, 1, 1, 1, 1, -1}, // 1111 1010 1101 1100 0001
|
||||
|
||||
};
|
||||
|
||||
/* LUT for (16, 1, 0) spreading */
|
||||
const SINT16 PHY_dsssDesprd_16_1_0_table[PHY_DSSS_DESPRD_16_1_LUT_NUM_COLS] =
|
||||
{
|
||||
-1, -1, 1, -1, -1, -1, 1, 1, 1, 1, -1, 1, -1, 1, 1, -1
|
||||
|
||||
};
|
||||
|
||||
/* LUT for (16, 1, 1) spreading */
|
||||
const SINT16 PHY_dsssDesprd_16_1_1_table[PHY_DSSS_DESPRD_16_1_LUT_NUM_COLS] =
|
||||
{
|
||||
-1, 1, -1, -1, -1, 1, 1, 1, 1, -1, 1, -1, 1, 1, -1, -1
|
||||
};
|
||||
|
||||
+95
@@ -0,0 +1,95 @@
|
||||
/*****************************************************************************
|
||||
* FILE PURPOSE: This file contains LUT for DSSS SHR spreading sequence (FFT)
|
||||
*******************************************************************************
|
||||
*
|
||||
* FILE NAME: phy_dsssFftDiffSeqTable.c
|
||||
*
|
||||
* DESCRIPTION:
|
||||
* This file contains LUT used for the frequency domain differential spreading
|
||||
* sequence of the DSSS SHR (FFT of the differential sequence)
|
||||
*
|
||||
* Copyright (c) 2012 Texas Instruments Inc.
|
||||
* All Rights Reserved This program is the confidential and proprietary
|
||||
* product of Texas Instruments Inc. Any Unauthorized use, reproduction or
|
||||
* transfer of this program is strictly prohibited.
|
||||
*
|
||||
* HISTORY:
|
||||
* 01/13/2013 Written
|
||||
*
|
||||
* LIST OF FUNCTIONS:
|
||||
*
|
||||
******************************************************************************/
|
||||
#include <phy_sunTables.h>
|
||||
|
||||
/* Q4.11 */
|
||||
/* Im Re */
|
||||
#pragma DATA_SECTION(PHY_dsssFftDiffSeqTable, "sunPhyTable");
|
||||
const ComplexShort_t PHY_dsssFftDiffSeqTable[PHY_DSSS_FFTDIFFSEQ_SIZE] =
|
||||
{
|
||||
0x0000, 0x5000,
|
||||
0xd42d, 0xe427,
|
||||
0x0df5, 0x1b29,
|
||||
0x1bb5, 0xfa1d,
|
||||
0x1739, 0xd941,
|
||||
0x1a07, 0x9f09,
|
||||
0xed9a, 0x2c0c,
|
||||
0xebcb, 0xd7f7,
|
||||
0x04b0, 0xa0ce,
|
||||
0xb2a2, 0x006c,
|
||||
0x2f63, 0xe8c5,
|
||||
0xcd78, 0x0ef4,
|
||||
0xb100, 0x4a89,
|
||||
0x16af, 0x1721,
|
||||
0x17aa, 0xe4d4,
|
||||
0xd712, 0xe4e9,
|
||||
0xd000, 0xc000,
|
||||
0xc57d, 0x3092,
|
||||
0x353a, 0x1a2a,
|
||||
0xbea4, 0x2e23,
|
||||
0x07a0, 0xd959,
|
||||
0x41d9, 0xea2e,
|
||||
0x2324, 0x46ec,
|
||||
0xdcb1, 0xec86,
|
||||
0xe4b0, 0x3f32,
|
||||
0xddfb, 0xd874,
|
||||
0xe15b, 0x3ec6,
|
||||
0xe046, 0xd437,
|
||||
0xedda, 0xc2dd,
|
||||
0xca8d, 0xd43d,
|
||||
0x2b85, 0xcb57,
|
||||
0x3fbd, 0xe901,
|
||||
0x0000, 0xf000,
|
||||
0xc043, 0xe901,
|
||||
0xd47b, 0xcb57,
|
||||
0x3573, 0xd43d,
|
||||
0x1226, 0xc2dd,
|
||||
0x1fba, 0xd437,
|
||||
0x1ea5, 0x3ec6,
|
||||
0x2205, 0xd874,
|
||||
0x1b50, 0x3f32,
|
||||
0x234f, 0xec86,
|
||||
0xdcdc, 0x46ec,
|
||||
0xbe27, 0xea2e,
|
||||
0xf860, 0xd959,
|
||||
0x415c, 0x2e23,
|
||||
0xcac6, 0x1a2a,
|
||||
0x3a83, 0x3092,
|
||||
0x3000, 0xc000,
|
||||
0x28ee, 0xe4e9,
|
||||
0xe856, 0xe4d4,
|
||||
0xe951, 0x1721,
|
||||
0x4f00, 0x4a89,
|
||||
0x3288, 0x0ef4,
|
||||
0xd09d, 0xe8c5,
|
||||
0x4d5e, 0x006c,
|
||||
0xfb50, 0xa0ce,
|
||||
0x1435, 0xd7f7,
|
||||
0x1266, 0x2c0c,
|
||||
0xe5f9, 0x9f09,
|
||||
0xe8c7, 0xd941,
|
||||
0xe44b, 0xfa1d,
|
||||
0xf20b, 0x1b29,
|
||||
0x2bd3, 0xe427,
|
||||
};
|
||||
|
||||
|
||||
+46
@@ -0,0 +1,46 @@
|
||||
// FSK Legacy Gaussian Interpolator Filter Table, upsample by 16, Q14
|
||||
//Start 1
|
||||
-1, -4, -11, -25, -53, -106, -202, -364,
|
||||
-624, -1018, -1585, -2354, -3342, -4542, -5922, -7421,
|
||||
1, 4, 11, 25, 53, 106, 202, 364,
|
||||
624, 1018, 1585, 2354, 3342, 4542, 5922, 7421,
|
||||
//Start 2
|
||||
-8963, -10462, -11842, -13042, -14030, -14799, -15366, -15760,
|
||||
-16020, -16182, -16278, -16331, -16359, -16373, -16380, -16383,
|
||||
-8960, -10454, -11820, -12992, -13924, -14587, -14962, -15032,
|
||||
-14772, -14145, -13108, -11623, -9675, -7288, -4536, -1540,
|
||||
8960, 10454, 11820, 12992, 13924, 14587, 14962, 15032,
|
||||
14772, 14145, 13108, 11623, 9675, 7288, 4536, 1540,
|
||||
8963, 10462, 11842, 13042, 14030, 14799, 15366, 15760,
|
||||
16020, 16182, 16278, 16331, 16359, 16373, 16380, 16383,
|
||||
//Main
|
||||
-16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384,
|
||||
-16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384,
|
||||
-16382, -16376, -16362, -16334, -16278, -16172, -15980, -15656,
|
||||
-15136, -14347, -13214, -11676, -9700, -7299, -4540, -1542,
|
||||
1539, 4532, 7277, 9650, 11570, 13002, 13944, 14409,
|
||||
14409, 13944, 13002, 11570, 9650, 7277, 4532, 1539,
|
||||
1542, 4540, 7299, 9700, 11676, 13214, 14347, 15136,
|
||||
15656, 15980, 16172, 16278, 16334, 16362, 16376, 16382,
|
||||
-1542, -4540, -7299, -9700, -11676, -13214, -14347, -15136,
|
||||
-15656, -15980, -16172, -16278, -16334, -16362, -16376, -16382,
|
||||
-1539, -4532, -7277, -9650, -11570, -13002, -13944, -14409,
|
||||
-14409, -13944, -13002, -11570, -9650, -7277, -4532, -1539,
|
||||
16382, 16376, 16362, 16334, 16278, 16172, 15980, 15656,
|
||||
15136, 14347, 13214, 11676, 9700, 7299, 4540, 1542,
|
||||
16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383,
|
||||
16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383,
|
||||
//End 1
|
||||
-16383, -16380, -16373, -16359, -16331, -16278, -16182, -16020,
|
||||
-15760, -15366, -14799, -14030, -13042, -11842, -10462, -8963,
|
||||
1540, 4536, 7288, 9675, 11623, 13108, 14145, 14772,
|
||||
15032, 14962, 14587, 13924, 12992, 11820, 10454, 8960,
|
||||
-1540, -4536, -7288, -9675, -11623, -13108, -14145, -14772,
|
||||
-15032, -14962, -14587, -13924, -12992, -11820, -10454, -8960,
|
||||
16383, 16380, 16373, 16359, 16331, 16278, 16182, 16020,
|
||||
15760, 15366, 14799, 14030, 13042, 11842, 10462, 8963,
|
||||
//End 2
|
||||
-7421, -5922, -4542, -3342, -2354, -1585, -1018, -624,
|
||||
-364, -202, -106, -53, -25, -11, -4, -1,
|
||||
7421, 5922, 4542, 3342, 2354, 1585, 1018, 624,
|
||||
364, 202, 106, 53, 25, 11, 4, 1,
|
||||
+106
@@ -0,0 +1,106 @@
|
||||
// FSK 4G Gaussian Interpolator Filter Table, upsample by 50, Q14
|
||||
//Start 1
|
||||
0, -1, -2, -3, -4, -5, -7, -10, -13, -17,
|
||||
-22, -29, -37, -47, -59, -74, -93, -115, -142, -174,
|
||||
-212, -257, -309, -371, -443, -526, -622, -732, -856, -996,
|
||||
-1154, -1331, -1527, -1743, -1981, -2241, -2524, -2829, -3156, -3506,
|
||||
-3877, -4268, -4680, -5109, -5554, -6013, -6485, -6966, -7453, -7945,
|
||||
0, 1, 2, 3, 4, 5, 7, 10, 13, 17,
|
||||
22, 29, 37, 47, 59, 74, 93, 115, 142, 174,
|
||||
212, 257, 309, 371, 443, 526, 622, 732, 856, 996,
|
||||
1154, 1331, 1527, 1743, 1981, 2241, 2524, 2829, 3156, 3506,
|
||||
3877, 4268, 4680, 5109, 5554, 6013, 6485, 6966, 7453, 7945,
|
||||
//Start 2
|
||||
-8439, -8931, -9418, -9899, -10371, -10830, -11275, -11704, -12116, -12507,
|
||||
-12878, -13228, -13555, -13860, -14143, -14403, -14641, -14857, -15053, -15230,
|
||||
-15388, -15528, -15652, -15762, -15858, -15941, -16013, -16075, -16127, -16172,
|
||||
-16210, -16242, -16269, -16291, -16310, -16325, -16337, -16347, -16355, -16362,
|
||||
-16367, -16371, -16374, -16377, -16379, -16380, -16381, -16382, -16383, -16384,
|
||||
-8438, -8929, -9415, -9894, -10363, -10820, -11261, -11685, -12089, -12473,
|
||||
-12834, -13170, -13482, -13766, -14024, -14254, -14455, -14627, -14770, -14883,
|
||||
-14965, -15015, -15034, -15019, -14971, -14888, -14768, -14612, -14416, -14180,
|
||||
-13902, -13581, -13215, -12804, -12347, -11842, -11290, -10690, -10043, -9351,
|
||||
-8613, -7834, -7015, -6159, -5271, -4354, -3412, -2451, -1476, -493,
|
||||
8438, 8929, 9415, 9894, 10363, 10820, 11261, 11685, 12089, 12473,
|
||||
12834, 13170, 13482, 13766, 14024, 14254, 14455, 14627, 14770, 14883,
|
||||
14965, 15015, 15034, 15019, 14971, 14888, 14768, 14612, 14416, 14180,
|
||||
13902, 13581, 13215, 12804, 12347, 11842, 11290, 10690, 10043, 9351,
|
||||
8613, 7834, 7015, 6159, 5271, 4354, 3412, 2451, 1476, 493,
|
||||
8439, 8931, 9418, 9899, 10371, 10830, 11275, 11704, 12116, 12507,
|
||||
12878, 13228, 13555, 13860, 14143, 14403, 14641, 14857, 15053, 15230,
|
||||
15388, 15528, 15652, 15762, 15858, 15941, 16013, 16075, 16127, 16172,
|
||||
16210, 16242, 16269, 16291, 16310, 16325, 16337, 16347, 16355, 16362,
|
||||
16367, 16371, 16374, 16377, 16379, 16380, 16381, 16382, 16383, 16383,
|
||||
//Main
|
||||
-16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384,
|
||||
-16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384,
|
||||
-16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384,
|
||||
-16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384,
|
||||
-16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384,
|
||||
-16383, -16382, -16381, -16379, -16377, -16373, -16369, -16364, -16358, -16350,
|
||||
-16339, -16326, -16310, -16290, -16266, -16235, -16199, -16154, -16101, -16037,
|
||||
-15961, -15871, -15765, -15641, -15497, -15331, -15140, -14921, -14672, -14391,
|
||||
-14075, -13722, -13330, -12897, -12421, -11901, -11337, -10727, -10072, -9373,
|
||||
-8631, -7847, -7025, -6167, -5276, -4357, -3415, -2453, -1477, -493,
|
||||
493, 1475, 2450, 3409, 4350, 5266, 6152, 7005, 7821, 8596,
|
||||
9328, 10014, 10653, 11243, 11783, 12272, 12712, 13101, 13439, 13728,
|
||||
13968, 14159, 14302, 14397, 14444, 14444, 14397, 14302, 14159, 13968,
|
||||
13728, 13439, 13101, 12712, 12272, 11783, 11243, 10653, 10014, 9328,
|
||||
8596, 7821, 7005, 6152, 5266, 4350, 3409, 2450, 1475, 493,
|
||||
493, 1477, 2453, 3415, 4357, 5276, 6167, 7025, 7847, 8631,
|
||||
9373, 10072, 10727, 11337, 11901, 12421, 12897, 13330, 13722, 14075,
|
||||
14391, 14672, 14921, 15140, 15331, 15497, 15641, 15765, 15871, 15961,
|
||||
16037, 16101, 16154, 16199, 16235, 16266, 16290, 16310, 16326, 16339,
|
||||
16350, 16358, 16364, 16369, 16373, 16377, 16379, 16381, 16382, 16383,
|
||||
-493, -1477, -2453, -3415, -4357, -5276, -6167, -7025, -7847, -8631,
|
||||
-9373, -10072, -10727, -11337, -11901, -12421, -12897, -13330, -13722, -14075,
|
||||
-14391, -14672, -14921, -15140, -15331, -15497, -15641, -15765, -15871, -15961,
|
||||
-16037, -16101, -16154, -16199, -16235, -16266, -16290, -16310, -16326, -16339,
|
||||
-16350, -16358, -16364, -16369, -16373, -16377, -16379, -16381, -16382, -16383,
|
||||
-493, -1475, -2450, -3409, -4350, -5266, -6152, -7005, -7821, -8596,
|
||||
-9328, -10014, -10653, -11243, -11783, -12272, -12712, -13101, -13439, -13728,
|
||||
-13968, -14159, -14302, -14397, -14444, -14444, -14397, -14302, -14159, -13968,
|
||||
-13728, -13439, -13101, -12712, -12272, -11783, -11243, -10653, -10014, -9328,
|
||||
-8596, -7821, -7005, -6152, -5266, -4350, -3409, -2450, -1475, -493,
|
||||
16383, 16382, 16381, 16379, 16377, 16373, 16369, 16364, 16358, 16350,
|
||||
16339, 16326, 16310, 16290, 16266, 16235, 16199, 16154, 16101, 16037,
|
||||
15961, 15871, 15765, 15641, 15497, 15331, 15140, 14921, 14672, 14391,
|
||||
14075, 13722, 13330, 12897, 12421, 11901, 11337, 10727, 10072, 9373,
|
||||
8631, 7847, 7025, 6167, 5276, 4357, 3415, 2453, 1477, 493,
|
||||
16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383,
|
||||
16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383,
|
||||
16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383,
|
||||
16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383,
|
||||
16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383,
|
||||
//End 1
|
||||
-16384, -16383, -16382, -16381, -16380, -16379, -16377, -16374, -16371, -16367,
|
||||
-16362, -16355, -16347, -16337, -16325, -16310, -16291, -16269, -16242, -16210,
|
||||
-16172, -16127, -16075, -16013, -15941, -15858, -15762, -15652, -15528, -15388,
|
||||
-15230, -15053, -14857, -14641, -14403, -14143, -13860, -13555, -13228, -12878,
|
||||
-12507, -12116, -11704, -11275, -10830, -10371, -9899, -9418, -8931, -8439,
|
||||
493, 1476, 2451, 3412, 4354, 5271, 6159, 7015, 7834, 8613,
|
||||
9351, 10043, 10690, 11290, 11842, 12347, 12804, 13215, 13581, 13902,
|
||||
14180, 14416, 14612, 14768, 14888, 14971, 15019, 15034, 15015, 14965,
|
||||
14883, 14770, 14627, 14455, 14254, 14024, 13766, 13482, 13170, 12834,
|
||||
12473, 12089, 11685, 11261, 10820, 10363, 9894, 9415, 8929, 8438,
|
||||
-493, -1476, -2451, -3412, -4354, -5271, -6159, -7015, -7834, -8613,
|
||||
-9351, -10043, -10690, -11290, -11842, -12347, -12804, -13215, -13581, -13902,
|
||||
-14180, -14416, -14612, -14768, -14888, -14971, -15019, -15034, -15015, -14965,
|
||||
-14883, -14770, -14627, -14455, -14254, -14024, -13766, -13482, -13170, -12834,
|
||||
-12473, -12089, -11685, -11261, -10820, -10363, -9894, -9415, -8929, -8438,
|
||||
16383, 16383, 16382, 16381, 16380, 16379, 16377, 16374, 16371, 16367,
|
||||
16362, 16355, 16347, 16337, 16325, 16310, 16291, 16269, 16242, 16210,
|
||||
16172, 16127, 16075, 16013, 15941, 15858, 15762, 15652, 15528, 15388,
|
||||
15230, 15053, 14857, 14641, 14403, 14143, 13860, 13555, 13228, 12878,
|
||||
12507, 12116, 11704, 11275, 10830, 10371, 9899, 9418, 8931, 8439,
|
||||
//End 2
|
||||
-7945, -7453, -6966, -6485, -6013, -5554, -5109, -4680, -4268, -3877,
|
||||
-3506, -3156, -2829, -2524, -2241, -1981, -1743, -1527, -1331, -1154,
|
||||
-996, -856, -732, -622, -526, -443, -371, -309, -257, -212,
|
||||
-174, -142, -115, -93, -74, -59, -47, -37, -29, -22,
|
||||
-17, -13, -10, -7, -5, -4, -3, -2, -1, 0,
|
||||
7945, 7453, 6966, 6485, 6013, 5554, 5109, 4680, 4268, 3877,
|
||||
3506, 3156, 2829, 2524, 2241, 1981, 1743, 1527, 1331, 1154,
|
||||
996, 856, 732, 622, 526, 443, 371, 309, 257, 212,
|
||||
174, 142, 115, 93, 74, 59, 47, 37, 29, 22,
|
||||
17, 13, 10, 7, 5, 4, 3, 2, 1, 0,
|
||||
+38
@@ -0,0 +1,38 @@
|
||||
/*****************************************************************************
|
||||
* FILE PURPOSE: This file contains LUT for FSK Gaussian interpolator filter
|
||||
*******************************************************************************
|
||||
*
|
||||
* FILE NAME: phy_fskGsnIntFiltTable.c
|
||||
*
|
||||
* DESCRIPTION:
|
||||
* This file contains LUT used for the Gaussian interpolator filter.
|
||||
* The upsampling ratio is 16 for 150kbps and 50 for 50kbps modes
|
||||
*
|
||||
* Copyright (c) 2012 Texas Instruments Inc.
|
||||
* All Rights Reserved This program is the confidential and proprietary
|
||||
* product of Texas Instruments Inc. Any Unauthorized use, reproduction or
|
||||
* transfer of this program is strictly prohibited.
|
||||
*
|
||||
* HISTORY:
|
||||
* 01/13/2013 Written
|
||||
*
|
||||
* LIST OF FUNCTIONS:
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#include <phy_sunTables.h>
|
||||
|
||||
#pragma DATA_SECTION(PHY_fskGsnIntFilt50Table, "sunPhyTable");
|
||||
#pragma DATA_SECTION(PHY_fskGsnIntFilt16Table, "sunPhyTable");
|
||||
|
||||
/* LUT for 50x upsampling ratio */
|
||||
const SINT16 PHY_fskGsnIntFilt50Table[PHY_FSK_GSN_INTFILT50_LUT_SIZE] =
|
||||
{
|
||||
#include "phy_fskGsnIntFilt50Table.txt"
|
||||
};
|
||||
|
||||
/* LUT for 16x upsampling ratio */
|
||||
const SINT16 PHY_fskGsnIntFilt16Table[PHY_FSK_GSN_INTFILT16_LUT_SIZE] =
|
||||
{
|
||||
#include "phy_fskGsnIntFilt16Table.txt"
|
||||
};
|
||||
+33
@@ -0,0 +1,33 @@
|
||||
/*****************************************************************************
|
||||
* FILE PURPOSE: This file contains LUT for FSK TX resampler
|
||||
*******************************************************************************
|
||||
*
|
||||
* FILE NAME: phy_fskTxSrcCoefTable.c
|
||||
*
|
||||
* DESCRIPTION:
|
||||
* This file contains LUT used for FSK TX resampler or sampling rate
|
||||
* converter (src). It converts 2.4MHz to 2.5MHz sapling rate
|
||||
*
|
||||
* Copyright (c) 2012 Texas Instruments Inc.
|
||||
* All Rights Reserved This program is the confidential and proprietary
|
||||
* product of Texas Instruments Inc. Any Unauthorized use, reproduction or
|
||||
* transfer of this program is strictly prohibited.
|
||||
*
|
||||
* HISTORY:
|
||||
* 01/13/2013 Written
|
||||
*
|
||||
* LIST OF FUNCTIONS:
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#include "PHY_sunTables.h"
|
||||
/*
|
||||
* column index: x[n - J + 1] x[n - J + 2] x[n - J + 3] x[n - J + 4] x[n - J + 5] x[n - J + 6] = x[n] (newest)
|
||||
* row index: phase number
|
||||
*/
|
||||
#pragma DATA_SECTION(PHY_fskTxSrcCoefTable, "sunPhyTable");
|
||||
const SINT16 PHY_fskTxSrcCoefTable[PHY_FSK_TXSRC_COEF_LUT_SIZE] =
|
||||
{
|
||||
#include "phy_fskTxSrcCoefTable.txt"
|
||||
};
|
||||
|
||||
+17
@@ -0,0 +1,17 @@
|
||||
// FSK Legacy TX sample rate converter filter table, resample 2.4->2.5MHz, Q15
|
||||
0, 32767, 0, 0, -513, 32697, 594, -42,
|
||||
-948, 32486, 1270, -86, -1308, 32136, 2030, -135,
|
||||
-1598, 31650, 2873, -189, -1821, 31034, 3798, -250,
|
||||
-1984, 30293, 4804, -319, -2090, 29436, 5886, -397,
|
||||
-2148, 28469, 7041, -485, -2161, 27402, 8264, -582,
|
||||
-2135, 26245, 9547, -690, -2078, 25009, 10884, -808,
|
||||
-1993, 23705, 12266, -934, -1888, 22345, 13684, -1068,
|
||||
-1766, 20941, 15128, -1207, -1633, 19506, 16587, -1350,
|
||||
-1493, 18050, 18050, -1493, -1350, 16587, 19506, -1633,
|
||||
-1207, 15128, 20941, -1766, -1068, 13684, 22345, -1888,
|
||||
-934, 12266, 23705, -1993, -808, 10884, 25009, -2078,
|
||||
-690, 9547, 26245, -2135, -582, 8264, 27402, -2161,
|
||||
-485, 7041, 28469, -2148, -397, 5886, 29436, -2090,
|
||||
-319, 4804, 30293, -1984, -250, 3798, 31034, -1821,
|
||||
-189, 2873, 31650, -1598, -135, 2030, 32136, -1308,
|
||||
-86, 1270, 32486, -948, -42, 594, 32697, -513,
|
||||
+99
@@ -0,0 +1,99 @@
|
||||
/******************************************************************************
|
||||
* FILE PURPOSE: This file contains the PN9 table
|
||||
*******************************************************************************
|
||||
*
|
||||
* FILE NAME: phy_pn9Table.c
|
||||
*
|
||||
* DESCRIPTION: PN9 Sequence Lookup Table
|
||||
*
|
||||
* Copyright (c) 2012 Texas Instruments Inc.
|
||||
* All Rights Reserved This program is the confidential and proprietary
|
||||
* product of Texas Instruments Inc. Any Unauthorized use, reproduction or
|
||||
* transfer of this program is strictly prohibited.
|
||||
*
|
||||
* HISTORY:
|
||||
*
|
||||
* 07/31/2012 JKunduru Written
|
||||
*
|
||||
*
|
||||
*
|
||||
*******************************************************************************/
|
||||
#include <phy_sunTables.h>
|
||||
|
||||
#pragma DATA_SECTION(PHY_pn9STable, "sunPhyTable");
|
||||
#pragma DATA_SECTION(PHY_pn9Table, "sunPhyTable");
|
||||
|
||||
/* PN9 sequence in signed (1/-1) format */
|
||||
const SINT16 PHY_pn9STable[PHY_PN9_LUT_SIZE] =
|
||||
{
|
||||
1, 1, 1, -1, 1, 1, 1, -1,
|
||||
-1, 1, 1, -1, 1, 1, 1, -1,
|
||||
-1, -1, 1, -1, 1, -1, 1, -1,
|
||||
-1, 1, -1, -1, 1, 1, 1, -1,
|
||||
-1, -1, 1, 1, 1, -1, 1, 1,
|
||||
-1, 1, -1, 1, -1, 1, 1, 1,
|
||||
-1, -1, 1, -1, -1, 1, 1, -1,
|
||||
-1, -1, -1, -1, 1, 1, -1, -1,
|
||||
-1, -1, 1, 1, 1, -1, 1, -1,
|
||||
-1, 1, -1, -1, -1, 1, 1, -1,
|
||||
1, -1, 1, 1, -1, 1, 1, 1,
|
||||
1, 1, -1, 1, 1, -1, -1, 1,
|
||||
1, -1, -1, -1, 1, -1, 1, 1,
|
||||
1, -1, -1, -1, -1, -1, 1, -1,
|
||||
-1, -1, -1, 1, 1, 1, 1, 1,
|
||||
-1, -1, -1, -1, -1, -1, -1, -1,
|
||||
-1, 1, 1, 1, 1, -1, -1, -1,
|
||||
-1, 1, -1, -1, -1, 1, 1, 1,
|
||||
1, -1, 1, -1, -1, 1, 1, -1,
|
||||
-1, 1, -1, -1, 1, -1, -1, -1,
|
||||
-1, 1, -1, 1, 1, 1, 1, -1,
|
||||
-1, -1, 1, 1, -1, -1, 1, 1,
|
||||
1, 1, -1, 1, 1, -1, 1, 1,
|
||||
1, -1, 1, -1, 1, -1, -1, -1,
|
||||
1, -1, 1, -1, -1, -1, -1, 1,
|
||||
1, -1, 1, 1, -1, 1, -1, -1,
|
||||
-1, 1, 1, -1, -1, -1, 1, 1,
|
||||
1, 1, 1, 1, -1, -1, -1, 1,
|
||||
-1, -1, -1, 1, -1, 1, 1, -1,
|
||||
-1, -1, -1, 1, -1, 1, -1, 1,
|
||||
1, -1, 1, -1, 1, 1, 1, 1,
|
||||
1, 1, -1, 1, -1, 1, -1, 1,
|
||||
-1, 1, -1, -1, -1, -1, -1, 1,
|
||||
-1, 1, -1, -1, 1, -1, 1, 1,
|
||||
1, 1, 1, -1, -1, 1, -1, -1,
|
||||
-1, 1, -1, -1, 1, -1, -1, 1,
|
||||
-1, 1, -1, -1, 1, 1, 1, 1,
|
||||
1, -1, 1, -1, -1, -1, 1, -1,
|
||||
-1, -1, -1, -1, 1, 1, 1, -1,
|
||||
-1, -1, -1, 1, 1, -1, -1, 1,
|
||||
-1, 1, 1, -1, -1, 1, -1, 1,
|
||||
-1, -1, -1, 1, 1, 1, -1, -1,
|
||||
1, -1, 1, 1, 1, -1, 1, -1,
|
||||
-1, -1, -1, -1, -1, -1, 1, -1,
|
||||
1, 1, -1, 1, -1, -1, 1, 1,
|
||||
1, -1, 1, -1, 1, 1, -1, -1,
|
||||
1, 1, 1, -1, -1, 1, 1, 1,
|
||||
1, 1, 1, 1, -1, -1, 1, 1,
|
||||
-1, -1, 1, 1, -1, 1, -1, 1,
|
||||
-1, -1, 1, 1, -1, 1, 1, -1,
|
||||
-1, -1, -1, -1, -1, 1, -1, -1,
|
||||
1, -1, 1, 1, -1, 1, 1, -1,
|
||||
1, 1, -1, -1, 1, -1, -1, -1,
|
||||
-1, -1, -1, 1, 1, -1, 1, -1,
|
||||
-1, 1, -1, 1, -1, 1, 1, 1,
|
||||
1, -1, 1, -1, 1, 1, 1, -1,
|
||||
1, 1, -1, -1, -1, 1, -1, -1,
|
||||
1, 1, -1, 1, -1, -1, -1, -1,
|
||||
1, -1, -1, 1, 1, 1, 1, -1,
|
||||
-1, 1, -1, 1, -1, 1, -1, 1,
|
||||
1, -1, -1, -1, 1, 1, -1, 1,
|
||||
1, 1, 1, -1, -1, 1, 1, 1,
|
||||
-1, 1, 1, 1, 1, -1, 1, 1,
|
||||
1, 1, 1, 1, 1, 1, -1, 1
|
||||
};
|
||||
|
||||
/* PN9 sequence in unsigned (1/0) format */
|
||||
const SINT16 PHY_pn9Table[PHY_PN9_LUT_SIZE] =
|
||||
{
|
||||
#include "phy_pn9Table.txt"
|
||||
};
|
||||
+65
@@ -0,0 +1,65 @@
|
||||
//PN9 sequence, seed 111111111
|
||||
0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 1, 1, 1, 0, 0, 0, 0,
|
||||
1, 0, 1, 1, 0, 0, 1, 1,
|
||||
0, 1, 1, 0, 1, 1, 1, 1,
|
||||
0, 1, 0, 0, 0, 0, 1, 1,
|
||||
1, 0, 0, 1, 1, 0, 0, 0,
|
||||
0, 1, 0, 0, 1, 0, 0, 0,
|
||||
1, 0, 1, 0, 1, 1, 1, 0,
|
||||
1, 0, 1, 1, 1, 1, 0, 0,
|
||||
1, 0, 0, 1, 0, 1, 1, 1,
|
||||
0, 0, 1, 1, 1, 0, 0, 0,
|
||||
0, 0, 0, 1, 1, 1, 0, 1,
|
||||
1, 1, 0, 1, 0, 0, 1, 1,
|
||||
1, 1, 0, 1, 0, 1, 0, 0,
|
||||
1, 0, 1, 0, 0, 0, 0, 0,
|
||||
0, 1, 0, 1, 0, 1, 0, 1,
|
||||
0, 1, 1, 1, 1, 1, 0, 1,
|
||||
0, 1, 1, 0, 1, 0, 0, 0,
|
||||
0, 0, 1, 1, 0, 1, 1, 1,
|
||||
0, 1, 1, 0, 1, 1, 0, 1,
|
||||
0, 1, 1, 0, 0, 0, 0, 0,
|
||||
1, 0, 1, 1, 1, 0, 1, 1,
|
||||
1, 1, 1, 0, 0, 0, 1, 1,
|
||||
1, 1, 0, 0, 1, 1, 0, 1,
|
||||
0, 0, 1, 1, 0, 1, 0, 1,
|
||||
1, 1, 0, 0, 0, 1, 1, 0,
|
||||
1, 0, 0, 0, 1, 0, 1, 1,
|
||||
1, 1, 1, 1, 1, 0, 1, 0,
|
||||
0, 1, 0, 1, 1, 0, 0, 0,
|
||||
1, 0, 1, 0, 0, 1, 1, 0,
|
||||
0, 0, 1, 1, 0, 0, 0, 0,
|
||||
0, 0, 0, 1, 1, 0, 0, 1,
|
||||
1, 0, 0, 1, 0, 1, 0, 1,
|
||||
1, 0, 0, 1, 0, 0, 1, 1,
|
||||
1, 1, 1, 1, 0, 1, 1, 0,
|
||||
1, 0, 0, 1, 0, 0, 1, 0,
|
||||
0, 1, 1, 0, 1, 1, 1, 1,
|
||||
1, 1, 0, 0, 1, 0, 1, 1,
|
||||
0, 1, 0, 1, 0, 0, 0, 0,
|
||||
1, 0, 1, 0, 0, 0, 1, 0,
|
||||
0, 1, 1, 1, 0, 1, 1, 0,
|
||||
0, 1, 0, 1, 1, 1, 1, 0,
|
||||
1, 1, 0, 0, 0, 0, 1, 1,
|
||||
0, 1, 0, 1, 0, 1, 0, 0,
|
||||
1, 1, 1, 0, 0, 1, 0, 0,
|
||||
0, 0, 1, 1, 0, 0, 0, 1,
|
||||
0, 0, 0, 0, 1, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 1, 0, 0,
|
||||
0, 1, 0, 0, 0, 1, 1, 0,
|
||||
0, 1, 0, 0, 0, 1, 1, 1,
|
||||
0, 1, 0, 1, 0, 1, 1, 0,
|
||||
1, 1, 0, 0, 0, 1, 1, 1,
|
||||
0, 0, 0, 1, 0, 0, 1, 0,
|
||||
1, 0, 1, 0, 0, 0, 1, 1,
|
||||
0, 1, 1, 0, 0, 1, 1, 1,
|
||||
1, 1, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 0, 1, 0, 1, 1, 0,
|
||||
1, 1, 1, 0, 0, 1, 0, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0,
|
||||
1, 0, 0, 1, 1, 0, 0, 1,
|
||||
1, 1, 0, 1, 0, 0, 0, 1,
|
||||
1, 1, 1, 1, 0, 1, 1, 1,
|
||||
1, 0, 0, 0, 0, 0, 1, 1,
|
||||
1, 1, 1, 1, 1, 1, 1, 0
|
||||
+53
@@ -0,0 +1,53 @@
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 13, 2012 11:54:06 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: phy_primprefTable.c
|
||||
//
|
||||
// TITLE: PHY_primePrefTable (size 64, 32bit words)
|
||||
//
|
||||
// DESCRIPTION:
|
||||
// This file contains data relevant to PRIME scrambling sequence table
|
||||
//
|
||||
// Copyright (c) 2009 Texas Instruments Inc.
|
||||
// All Rights Reserved This program is the confidential and proprietary
|
||||
// product of Texas Instruments Inc. Any Unauthorized use, reproduction or
|
||||
// transfer of this program is strictly prohibited.
|
||||
//
|
||||
// HISTORY:
|
||||
//
|
||||
//
|
||||
// LIST OF FUNCTION PROTOTYPES:
|
||||
//
|
||||
//
|
||||
// Notes:
|
||||
//
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F2837x Boot ROM Version 0 $
|
||||
// $Release Date: Oct 1, 2013 $
|
||||
//###########################################################################
|
||||
|
||||
|
||||
#include "c1_bootrom.h"
|
||||
|
||||
|
||||
#define UINT32 const Uint32
|
||||
|
||||
#pragma DATA_SECTION(PHY_primePrefTable,"primePrefTable");
|
||||
|
||||
UINT32 PHY_primePrefTable[64] = {
|
||||
0x00000000, 0x00000000, 0x00010001, 0x00000001, 0x00010001, 0x00010001, 0x00000000,
|
||||
0x00000001, 0x00010001, 0x00000000, 0x00000001, 0x00010000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000001, 0x00000000, 0x00000001, 0x00010000, 0x00000001, 0x00000000,
|
||||
0x00000001, 0x00010001, 0x00000001, 0x00000001, 0x00010001, 0x00010000, 0x00000001,
|
||||
0x00000000, 0x00000000, 0x00010001, 0x00000000, 0x00010001, 0x00010000, 0x00010000,
|
||||
0x00000000, 0x00010001, 0x00000001, 0x00010000, 0x00010001, 0x00000001, 0x00010001,
|
||||
0x00010000, 0x00000000, 0x00000000, 0x00000001, 0x00000001, 0x00000001, 0x00010001,
|
||||
0x00010001, 0x00000001, 0x00000001, 0x00010000, 0x00010000, 0x00000000, 0x00010000,
|
||||
0x00000001, 0x00010001, 0x00000001, 0x00000000, 0x00010001, 0x00010001, 0x00010001,
|
||||
0x00000001
|
||||
};
|
||||
|
||||
#undef UINT32
|
||||
|
||||
+80
@@ -0,0 +1,80 @@
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 13, 2012 11:54:08 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: phy_primetxpreamble.c
|
||||
//
|
||||
// TITLE: PHY_primeTXPreamable (size 264, 32bit words)
|
||||
//
|
||||
// DESCRIPTION:
|
||||
// This file contains data relevant to PRIME TX preamble sequence table
|
||||
//
|
||||
// Copyright (c) 2009 Texas Instruments Inc.
|
||||
// All Rights Reserved This program is the confidential and proprietary
|
||||
// product of Texas Instruments Inc. Any Unauthorized use, reproduction or
|
||||
// transfer of this program is strictly prohibited.
|
||||
//
|
||||
// HISTORY:
|
||||
//
|
||||
//
|
||||
// LIST OF FUNCTION PROTOTYPES:
|
||||
//
|
||||
//
|
||||
// Notes:
|
||||
//
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F2837x Boot ROM Version 0 $
|
||||
// $Release Date: Oct 1, 2013 $
|
||||
//###########################################################################
|
||||
|
||||
|
||||
#include "c1_bootrom.h"
|
||||
|
||||
|
||||
#define UINT32 const Uint32
|
||||
|
||||
#pragma DATA_SECTION(PHY_primeTXPreamble,"primeTxPreamble");
|
||||
|
||||
UINT32 PHY_primeTXPreamble[264] = {
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x02F70000, 0xFE770175, 0xFEA7FD0A, 0x02F301A8, 0xFE2D012E, 0xFF0DFD14, 0x02DC0207,
|
||||
0xFDBF00A8, 0xFFB6FD40, 0x0292027C, 0xFD4CFFDC, 0x00A0FDB2, 0x01F002DF, 0xFD0BFED9,
|
||||
0x01B1FE8D, 0x00D902ED, 0xFD43FDCD, 0x029FFFDC, 0xFF5E025D, 0xFE37FD1B, 0x02F4016A,
|
||||
0xFDDF0103, 0xFFE9FD41, 0x023C02AD, 0xFD0DFF1A, 0x01D5FE93, 0x006202DB, 0xFDA6FD6F,
|
||||
0x02F100C6, 0xFE230171, 0xFFC3FD2B, 0x023002A9, 0xFD09FEEE, 0x0234FEF0, 0xFFA802A2,
|
||||
0xFE56FD20, 0x02DB01B9, 0xFD4D003C, 0x0151FDF0, 0x00A302F1, 0xFDB5FD7A, 0x02F60109,
|
||||
0xFD9700DE, 0x00E8FD9B, 0x00EE02F7, 0xFD9BFD9C, 0x02F600F1, 0xFD8800D5, 0x0122FDB6,
|
||||
0x009102F3, 0xFDF1FD60, 0x02E10178, 0xFD300020, 0x01EBFE57, 0xFF8302B0, 0xFEF2FD0D,
|
||||
0x024B0267, 0xFD15FEC4, 0x02CFFFC6, 0xFDFA019B, 0x00CAFD6A, 0x009A02F6, 0xFE29FD51,
|
||||
0x02AC01D8, 0xFD09FF59, 0x02AFFF5A, 0xFE1401CD, 0x00D6FD64, 0x005D02F4, 0xFE85FD31,
|
||||
0x0259023A, 0xFD26FEAD, 0x02F30041, 0xFD5900D3, 0x0207FE3B, 0xFED2027A, 0x0037FD1F,
|
||||
0x00BE02F3, 0xFE66FD49, 0x02480237, 0xFD43FE7A, 0x02F300B9, 0xFD16001E, 0x02ABFF15,
|
||||
0xFDC201A1, 0x01AFFDCB, 0xFEF402A0, 0x0060FD20, 0x004B02F6, 0xFF15FD1A, 0x017A02B5,
|
||||
0xFE0CFD98, 0x02560208, 0xFD60FE66, 0x02D20125, 0xFD12FF53, 0x02F70038, 0xFD110038,
|
||||
0x02DAFF61, 0xFD4600FD, 0x0294FEAF, 0xFD98019A, 0x023BFE28, 0xFDF3020D, 0x01E1FDC8,
|
||||
0xFE49025C, 0x0191FD88, 0xFE90028E, 0x0154FD61, 0xFEC202AC, 0x012EFD4C, 0xFEDB02BA,
|
||||
0x0122FD43, 0xFEDB02BD, 0x012EFD46, 0xFEC202B4, 0x0154FD54, 0xFE90029F, 0x0191FD72,
|
||||
0xFE490278, 0x01E1FDA4, 0xFDF30238, 0x023BFDF3, 0xFD9801D8, 0x0294FE66, 0xFD460151,
|
||||
0x02DAFF03, 0xFD11009F, 0x02F7FFC8, 0xFD12FFC8, 0x02D200AD, 0xFD60FEDC, 0x0257019A,
|
||||
0xFE0BFDF8, 0x017B0268, 0xFF14FD4C, 0x004B02E6, 0x005FFD0A, 0xFEF402E0, 0x01AFFD60,
|
||||
0xFDC20235, 0x02ABFE5E, 0xFD1600EC, 0x02F3FFE2, 0xFD43FF48, 0x02490186, 0xFE65FDC9,
|
||||
0x00BF02B6, 0x0037FD0D, 0xFED302E1, 0x0207FD85, 0xFD5901C6, 0x02F3FF2D, 0xFD26FFBF,
|
||||
0x02590153, 0xFE84FDC6, 0x005E02CF, 0x00D6FD0C, 0xFE15029C, 0x02AFFE33, 0xFD0900A6,
|
||||
0x02AD00A6, 0xFE29FE28, 0x009B02AF, 0x00C9FD0A, 0xFDFA0296, 0x02CEFE64, 0xFD15003A,
|
||||
0x024B013C, 0xFEF1FD99, 0xFF8402F3, 0x01EAFD4F, 0xFD3001AA, 0x02E1FFDF, 0xFDF1FE88,
|
||||
0x009202A0, 0x0121FD0D, 0xFD88024B, 0x02F6FF2A, 0xFD9BFF10, 0x00EF0264, 0x00E7FD09,
|
||||
0xFD970266, 0x02F6FF21, 0xFDB5FEF8, 0x00A40286, 0x0150FD0F, 0xFD4D0210, 0x02DBFFC3,
|
||||
0xFE55FE48, 0xFFA902E0, 0x0233FD5D, 0xFD090111, 0x02310111, 0xFFC2FD58, 0xFE2402D5,
|
||||
0x02F1FE8E, 0xFDA6FF3B, 0x00630290, 0x01D4FD24, 0xFD0D016E, 0x023D00E5, 0xFFE7FD54,
|
||||
0xFDE002C0, 0x02F5FEFC, 0xFE36FE97, 0xFF6002E4, 0x029EFDA3, 0xFD430026, 0x00DA0232,
|
||||
0x01B0FD13, 0xFD0B0174, 0x01F10126, 0x009FFD22, 0xFD4D024F, 0x02930022, 0xFFB4FD85,
|
||||
0xFDC002C1, 0x02DDFF57, 0xFF0BFDFB, 0xFE2F02EC, 0x02F4FED0, 0xFEA5FE59, 0xFE7802F6,
|
||||
0x02F7FE89, 0xFE7CFE8B, 0xFE9002F6, 0x02F6FE7B, 0xFE89FE87, 0xFE7102F6, 0x02F5FEA4,
|
||||
0xFECEFE4E, 0xFE2002F0, 0x02E4FF08, 0xFF54FDEA, 0xFDAF02CD, 0x02A6FFB0, 0x001EFD73,
|
||||
0xFD3F026B, 0x0217009A, 0x0121FD18, 0xFD0901A6, 0x011701AA, 0x022DFD1C, 0xFD5A006C,
|
||||
0xFFAB029A, 0x02E3FDC9, 0xFE6CFEE1, 0xFE2002F5, 0x02C3FF3E, 0x0031FD81, 0xFD1E0243,
|
||||
0x0177012E, 0x0213FD10, 0xFD69006E, 0xFF4602B8, 0x0000FE2D
|
||||
};
|
||||
|
||||
#undef UINT32
|
||||
+79
@@ -0,0 +1,79 @@
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 13, 2012 11:54:09 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: phy_primetxpreamble.c
|
||||
//
|
||||
// TITLE: PHY_primeRXPreamable (size 256, 32bit words)
|
||||
//
|
||||
// DESCRIPTION:
|
||||
// This file contains data relevant to PRIME RX preamble sequence table
|
||||
//
|
||||
// Copyright (c) 2009 Texas Instruments Inc.
|
||||
// All Rights Reserved This program is the confidential and proprietary
|
||||
// product of Texas Instruments Inc. Any Unauthorized use, reproduction or
|
||||
// transfer of this program is strictly prohibited.
|
||||
//
|
||||
// HISTORY:
|
||||
//
|
||||
//
|
||||
// LIST OF FUNCTION PROTOTYPES:
|
||||
//
|
||||
//
|
||||
// Notes:
|
||||
//
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F2837x Boot ROM Version 0 $
|
||||
// $Release Date: Oct 1, 2013 $
|
||||
//###########################################################################
|
||||
|
||||
|
||||
#include "c1_bootrom.h"
|
||||
|
||||
|
||||
#define UINT32 const Uint32
|
||||
|
||||
#pragma DATA_SECTION(PHY_primeRXPreamble,"primeRxPreamble");
|
||||
|
||||
UINT32 PHY_primeRXPreamble[256] = {
|
||||
0x00800080, 0xFFE1FFE1, 0xFF68FF68, 0x00A600A6, 0x001E001E, 0xFF40FF40, 0x00580058,
|
||||
0x00940094, 0xFF60FF60, 0xFFABFFAB, 0x00BE00BE, 0x00260026, 0xFF39FF39, 0xFFF0FFF0,
|
||||
0x00C800C8, 0x00180018, 0xFF3CFF3C, 0xFFC4FFC4, 0x00B300B3, 0x00770077, 0xFF7EFF7E,
|
||||
0xFF4EFF4E, 0x001F001F, 0x00C100C1, 0x00650065, 0xFF8FFF8F, 0xFF42FF42, 0xFFC7FFC7,
|
||||
0x00830083, 0x00BA00BA, 0x00480048, 0xFF9DFF9D, 0xFF47FF47, 0xFF7AFF7A, 0x00050005,
|
||||
0x00860086, 0x00B500B5, 0x00850085, 0x001B001B, 0xFFABFFAB, 0xFF62FF62, 0xFF52FF52,
|
||||
0xFF76FF76, 0xFFBBFFBB, 0x00090009, 0x004F004F, 0x00820082, 0x009F009F, 0x00A800A8,
|
||||
0x00A200A2, 0x00930093, 0x007F007F, 0x006B006B, 0x00590059, 0x004B004B, 0x00420042,
|
||||
0x003E003E, 0x00400040, 0x00480048, 0x00550055, 0x00660066, 0x007A007A, 0x008E008E,
|
||||
0x009F009F, 0x00A800A8, 0x00A300A3, 0x008B008B, 0x005D005D, 0x001B001B, 0xFFCDFFCD,
|
||||
0xFF84FF84, 0xFF57FF57, 0xFF59FF59, 0xFF95FF95, 0xFFFEFFFE, 0x006F006F, 0x00B100B1,
|
||||
0x009A009A, 0x00280028, 0xFF97FF97, 0xFF47FF47, 0xFF7CFF7C, 0x001D001D, 0x00AB00AB,
|
||||
0x00A100A1, 0xFFF9FFF9, 0xFF52FF52, 0xFF67FF67, 0x00300030, 0x00C200C2, 0x00590059,
|
||||
0xFF73FF73, 0xFF54FF54, 0x003A003A, 0x00C600C6, 0x000C000C, 0xFF3BFF3B, 0xFFCCFFCC,
|
||||
0x00BF00BF, 0x003F003F, 0xFF41FF41, 0xFFD2FFD2, 0x00C500C5, 0x00000000, 0xFF3DFF3D,
|
||||
0x004A004A, 0x009E009E, 0xFF65FF65, 0xFFC0FFC0, 0x00C000C0, 0xFFB3FFB3, 0xFF83FF83,
|
||||
0x00B500B5, 0xFFD2FFD2, 0xFF7FFF7F, 0x00B100B1, 0xFFB9FFB9, 0xFFABFFAB, 0x00AA00AA,
|
||||
0xFF7AFF7A, 0x00100010, 0x00660066, 0xFF61FF61, 0x00870087, 0xFFC8FFC8, 0xFFDBFFDB,
|
||||
0x006D006D, 0xFF80FF80, 0xFFD9FFD9, 0xFF5BFF5B, 0x00740074, 0x005E005E, 0xFF41FF41,
|
||||
0x00240024, 0x00AE00AE, 0xFF7CFF7C, 0xFF8DFF8D, 0x00B400B4, 0x00390039, 0xFF3CFF3C,
|
||||
0xFFEAFFEA, 0x00C800C8, 0x000F000F, 0xFF39FF39, 0xFFDAFFDA, 0x00BF00BF, 0x00570057,
|
||||
0xFF60FF60, 0xFF6AFF6A, 0x00570057, 0x00C300C3, 0x00220022, 0xFF59FF59, 0xFF62FF62,
|
||||
0x00220022, 0x00B700B7, 0x008C008C, 0xFFDBFFDB, 0xFF52FF52, 0xFF60FF60, 0xFFEBFFEB,
|
||||
0x007F007F, 0x00B800B8, 0x007D007D, 0xFFFFFFFF, 0xFF89FF89, 0xFF50FF50, 0xFF64FF64,
|
||||
0xFFB1FFB1, 0x00130013, 0x00690069, 0x009E009E, 0x00AC00AC, 0x00980098, 0x006E006E,
|
||||
0x003A003A, 0x00050005, 0xFFD7FFD7, 0xFFB1FFB1, 0xFF95FF95, 0xFF81FF81, 0xFF74FF74,
|
||||
0xFF6CFF6C, 0xFF68FF68, 0xFF67FF67, 0xFF67FF67, 0xFF6BFF6B, 0xFF71FF71, 0xFF7DFF7D,
|
||||
0xFF8EFF8E, 0xFFA8FFA8, 0xFFCCFFCC, 0xFFF8FFF8, 0x002C002C, 0x00610061, 0x008F008F,
|
||||
0x00A900A9, 0x00A500A5, 0x007B007B, 0x002C002C, 0xFFCAFFCA, 0xFF74FF74, 0xFF4EFF4E,
|
||||
0xFF72FF72, 0xFFDDFFDD, 0x00600060, 0x00B300B3, 0x00990099, 0x00150015, 0xFF7CFF7C,
|
||||
0xFF46FF46, 0xFFADFFAD, 0x00650065, 0x00C000C0, 0x00550055, 0xFF89FF89, 0xFF43FF43,
|
||||
0xFFE7FFE7, 0x00AF00AF, 0x008B008B, 0xFF9CFF9C, 0xFF42FF42, 0x00140014, 0x00C800C8,
|
||||
0x00230023, 0xFF3EFF3E, 0xFFC4FFC4, 0x00BE00BE, 0x00390039, 0xFF3DFF3D, 0xFFE7FFE7,
|
||||
0x00C700C7, 0xFFDCFFDC, 0xFF4AFF4A, 0x00750075, 0x00750075, 0xFF49FF49, 0x00070007,
|
||||
0x00AD00AD, 0xFF71FF71, 0xFFD3FFD3, 0x00B200B2, 0xFF7DFF7D, 0xFFDEFFDE, 0x00A200A2,
|
||||
0xFF66FF66, 0x00220022, 0x00670067, 0xFF5AFF5A, 0x00810081, 0xFFE4FFE4, 0xFFB2FFB2,
|
||||
0x008F008F, 0xFF6EFF6E, 0x00640064, 0xFFF5FFF5
|
||||
};
|
||||
|
||||
#undef UINT32
|
||||
+70
@@ -0,0 +1,70 @@
|
||||
/*****************************************************************************
|
||||
* FILE PURPOSE: Header file for 802.15.4G (SUN) PHY ROM Tables
|
||||
*******************************************************************************
|
||||
*
|
||||
* FILE NAME: phy_sunTables.h
|
||||
*
|
||||
* DESCRIPTION:
|
||||
* Header file for SUN PHY ROM Tables
|
||||
*
|
||||
* Copyright (c) 2012 Texas Instruments Inc.
|
||||
* All Rights Reserved This program is the confidential and proprietary
|
||||
* product of Texas Instruments Inc. Any Unauthorized use, reproduction or
|
||||
* transfer of this program is strictly prohibited.
|
||||
*
|
||||
* HISTORY:
|
||||
*
|
||||
* 01/13/2013 Written
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
#ifndef _PHY_SUN_TABLES_H
|
||||
#define _PHY_SUN_TABLES_H
|
||||
|
||||
#include <typedefs.h>
|
||||
|
||||
/******************************************************************************
|
||||
* Definitions
|
||||
*****************************************************************************/
|
||||
|
||||
#define PHY_PN9_LUT_SIZE 512
|
||||
#define PHY_COSIN_LUT_SIZE 1024
|
||||
|
||||
#define PHY_FSK_GSN_INTFILT50_LUT_SIZE 1000 //(2+4+8+4+2)*50
|
||||
#define PHY_FSK_GSN_INTFILT16_LUT_SIZE 320 //(2+4+8+4+2)*16
|
||||
#define PHY_FSK_TXSRC_COEF_LUT_SIZE 128 // 32*4
|
||||
|
||||
#define PHY_DSSS_NUM_EQZ_TAPS 16
|
||||
#define PHY_DSSS_LSF_MATRIX_SIZE 57
|
||||
|
||||
#define PHY_DSSS_FFTDIFFSEQ_SIZE 64 //complex
|
||||
|
||||
#define PHY_DSSS_DESPRD_8_4_LUT_NUM_ROWS 8
|
||||
#define PHY_DSSS_DESPRD_8_4_LUT_NUM_COLS 8
|
||||
|
||||
#define PHY_DSSS_DESPRD_16_4_LUT_NUM_ROWS 16
|
||||
#define PHY_DSSS_DESPRD_16_4_LUT_NUM_COLS 16
|
||||
|
||||
#define PHY_DSSS_DESPRD_8_4_LUT_NUM_ROWS 8
|
||||
#define PHY_DSSS_DESPRD_8_4_LUT_NUM_COLS 8
|
||||
|
||||
#define PHY_DSSS_DESPRD_16_1_LUT_NUM_COLS 16
|
||||
|
||||
/******************************************************************************
|
||||
* Prototypes
|
||||
*****************************************************************************/
|
||||
|
||||
extern const SINT16 PHY_pn9STable[PHY_PN9_LUT_SIZE];
|
||||
extern const SINT16 PHY_pn9Table[PHY_PN9_LUT_SIZE];
|
||||
extern const SINT16 PHY_cosinTable[PHY_COSIN_LUT_SIZE * 2];
|
||||
extern const SINT16 PHY_fskGsnIntFilt59Table[PHY_FSK_GSN_INTFILT50_LUT_SIZE];
|
||||
extern const SINT16 PHY_fskGsnIntFilt16Table[PHY_FSK_GSN_INTFILT16_LUT_SIZE];
|
||||
extern const SINT16 PHY_fskTxSrcCoefTable[PHY_FSK_TXSRC_COEF_LUT_SIZE];
|
||||
extern const ComplexShort_t PHY_dsssFftDiffSeqTable[PHY_DSSS_FFTDIFFSEQ_SIZE];
|
||||
//extern SINT16 PHY_dsssLsfMatrix[PHY_DSSS_NUM_EQZ_TAPS][2*PHY_DSSS_LSF_MATRIX_SIZE];
|
||||
extern const SINT16 PHY_dsssDesprd_8_4_table[PHY_DSSS_DESPRD_8_4_LUT_NUM_ROWS][PHY_DSSS_DESPRD_8_4_LUT_NUM_COLS];
|
||||
extern const SINT16 PHY_dsssDesprd_16_4_table[PHY_DSSS_DESPRD_16_4_LUT_NUM_ROWS][PHY_DSSS_DESPRD_16_4_LUT_NUM_COLS];
|
||||
extern const SINT16 PHY_dsssDesprd_16_1_0_table[PHY_DSSS_DESPRD_16_1_LUT_NUM_COLS];
|
||||
extern const SINT16 PHY_dsssDesprd_16_1_1_table[PHY_DSSS_DESPRD_16_1_LUT_NUM_COLS];
|
||||
|
||||
#endif
|
||||
+1075
File diff suppressed because it is too large
Load Diff
+227
@@ -0,0 +1,227 @@
|
||||
;============================================================================
|
||||
;
|
||||
; File Name : phy_tf384pFFTTable.asm
|
||||
;
|
||||
; Description : This file contains the radix-3 twiddle table for 384 pt compelx FFT
|
||||
;
|
||||
;
|
||||
; Date : 21/12/2012 (dd/mm/yyyy)
|
||||
;
|
||||
; Copyright (c) 2010 Texas Instruments Inc.
|
||||
;===========================================================================
|
||||
; Routine Type : C Callable
|
||||
;
|
||||
;======================================================================
|
||||
|
||||
|
||||
.sect "twiddleFactors"
|
||||
.global _PHY_tf384pFFTTable
|
||||
;=======================================
|
||||
; % matlab code for twiddle factor generation
|
||||
; n = 384
|
||||
; kk = [0:n-1];
|
||||
; w = round(32767*(cos(2*pi*kk/n)-j*sin(2*pi*kk/n)));
|
||||
; fp = fopen('tf_384.dat','w');
|
||||
; for ii = 1:4:n
|
||||
; fprintf(fp, ' .word %d, %d, %d, %d, %d, %d, %d, %d, \n',imag(w(ii)), real(w(ii)),imag(w(ii+1)), real(w(ii+1)),imag(w(ii+2)), real(w(ii+2)),imag(w(ii+3)), real(w(ii+3)));
|
||||
; end
|
||||
;=======================================
|
||||
_PHY_tf384pFFTTable:
|
||||
.word 0, 32767, -536, 32763, -1072, 32749, -1608, 32728
|
||||
.word -2143, 32697, -2678, 32657, -3212, 32609, -3745, 32552
|
||||
.word -4277, 32487, -4808, 32412, -5338, 32329, -5866, 32238
|
||||
.word -6393, 32137, -6917, 32028, -7441, 31911, -7962, 31785
|
||||
.word -8481, 31650, -8997, 31507, -9512, 31356, -10024, 31196
|
||||
.word -10533, 31028, -11039, 30852, -11542, 30667, -12042, 30474
|
||||
.word -12539, 30273, -13033, 30064, -13523, 29846, -14010, 29621
|
||||
.word -14492, 29388, -14971, 29147, -15446, 28898, -15917, 28641
|
||||
.word -16383, 28377, -16846, 28105, -17303, 27826, -17756, 27539
|
||||
.word -18204, 27245, -18648, 26943, -19086, 26635, -19519, 26319
|
||||
.word -19947, 25996, -20370, 25666, -20787, 25329, -21199, 24986
|
||||
.word -21605, 24636, -22005, 24279, -22399, 23915, -22788, 23546
|
||||
.word -23170, 23170, -23546, 22788, -23915, 22399, -24279, 22005
|
||||
.word -24636, 21605, -24986, 21199, -25329, 20787, -25666, 20370
|
||||
.word -25996, 19947, -26319, 19519, -26635, 19086, -26943, 18648
|
||||
.word -27245, 18204, -27539, 17756, -27826, 17303, -28105, 16846
|
||||
.word -28377, 16384, -28641, 15917, -28898, 15446, -29147, 14971
|
||||
.word -29388, 14492, -29621, 14010, -29846, 13523, -30064, 13033
|
||||
.word -30273, 12539, -30474, 12042, -30667, 11542, -30852, 11039
|
||||
.word -31028, 10533, -31196, 10024, -31356, 9512, -31507, 8997
|
||||
.word -31650, 8481, -31785, 7962, -31911, 7441, -32028, 6917
|
||||
.word -32137, 6393, -32238, 5866, -32329, 5338, -32412, 4808
|
||||
.word -32487, 4277, -32552, 3745, -32609, 3212, -32657, 2678
|
||||
.word -32697, 2143, -32728, 1608, -32749, 1072, -32763, 536
|
||||
.word -32767, 0, -32763, -536, -32749, -1072, -32728, -1608
|
||||
.word -32697, -2143, -32657, -2678, -32609, -3212, -32552, -3745
|
||||
.word -32487, -4277, -32412, -4808, -32329, -5338, -32238, -5866
|
||||
.word -32137, -6393, -32028, -6917, -31911, -7441, -31785, -7962
|
||||
.word -31650, -8481, -31507, -8997, -31356, -9512, -31196, -10024
|
||||
.word -31028, -10533, -30852, -11039, -30667, -11542, -30474, -12042
|
||||
.word -30273, -12539, -30064, -13033, -29846, -13523, -29621, -14010
|
||||
.word -29388, -14492, -29147, -14971, -28898, -15446, -28641, -15917
|
||||
.word -28377, -16383, -28105, -16846, -27826, -17303, -27539, -17756
|
||||
.word -27245, -18204, -26943, -18648, -26635, -19086, -26319, -19519
|
||||
.word -25996, -19947, -25666, -20370, -25329, -20787, -24986, -21199
|
||||
.word -24636, -21605, -24279, -22005, -23915, -22399, -23546, -22788
|
||||
.word -23170, -23170, -22788, -23546, -22399, -23915, -22005, -24279
|
||||
.word -21605, -24636, -21199, -24986, -20787, -25329, -20370, -25666
|
||||
.word -19947, -25996, -19519, -26319, -19086, -26635, -18648, -26943
|
||||
.word -18204, -27245, -17756, -27539, -17303, -27826, -16846, -28105
|
||||
.word -16383, -28377, -15917, -28641, -15446, -28898, -14971, -29147
|
||||
.word -14492, -29388, -14010, -29621, -13523, -29846, -13033, -30064
|
||||
.word -12539, -30273, -12042, -30474, -11542, -30667, -11039, -30852
|
||||
.word -10533, -31028, -10024, -31196, -9512, -31356, -8997, -31507
|
||||
.word -8481, -31650, -7962, -31785, -7441, -31911, -6917, -32028
|
||||
.word -6393, -32137, -5866, -32238, -5338, -32329, -4808, -32412
|
||||
.word -4277, -32487, -3745, -32552, -3212, -32609, -2678, -32657
|
||||
.word -2143, -32697, -1608, -32728, -1072, -32749, -536, -32763
|
||||
.word 0, -32767, 536, -32763, 1072, -32749, 1608, -32728
|
||||
.word 2143, -32697, 2678, -32657, 3212, -32609, 3745, -32552
|
||||
.word 4277, -32487, 4808, -32412, 5338, -32329, 5866, -32238
|
||||
.word 6393, -32137, 6917, -32028, 7441, -31911, 7962, -31785
|
||||
.word 8481, -31650, 8997, -31507, 9512, -31356, 10024, -31196
|
||||
.word 10533, -31028, 11039, -30852, 11542, -30667, 12042, -30474
|
||||
.word 12539, -30273, 13033, -30064, 13523, -29846, 14010, -29621
|
||||
.word 14492, -29388, 14971, -29147, 15446, -28898, 15917, -28641
|
||||
.word 16383, -28377, 16846, -28105, 17303, -27826, 17756, -27539
|
||||
.word 18204, -27245, 18648, -26943, 19086, -26635, 19519, -26319
|
||||
.word 19947, -25996, 20370, -25666, 20787, -25329, 21199, -24986
|
||||
.word 21605, -24636, 22005, -24279, 22399, -23915, 22788, -23546
|
||||
.word 23170, -23170, 23546, -22788, 23915, -22399, 24279, -22005
|
||||
.word 24636, -21605, 24986, -21199, 25329, -20787, 25666, -20370
|
||||
.word 25996, -19947, 26319, -19519, 26635, -19086, 26943, -18648
|
||||
.word 27245, -18204, 27539, -17756, 27826, -17303, 28105, -16846
|
||||
.word 28377, -16384, 28641, -15917, 28898, -15446, 29147, -14971
|
||||
.word 29388, -14492, 29621, -14010, 29846, -13523, 30064, -13033
|
||||
.word 30273, -12539, 30474, -12042, 30667, -11542, 30852, -11039
|
||||
.word 31028, -10533, 31196, -10024, 31356, -9512, 31507, -8997
|
||||
.word 31650, -8481, 31785, -7962, 31911, -7441, 32028, -6917
|
||||
.word 32137, -6393, 32238, -5866, 32329, -5338, 32412, -4808
|
||||
.word 32487, -4277, 32552, -3745, 32609, -3212, 32657, -2678
|
||||
.word 32697, -2143, 32728, -1608, 32749, -1072, 32763, -536
|
||||
.word 32767, 0, 32763, 536, 32749, 1072, 32728, 1608
|
||||
.word 32697, 2143, 32657, 2678, 32609, 3212, 32552, 3745
|
||||
.word 32487, 4277, 32412, 4808, 32329, 5338, 32238, 5866
|
||||
.word 32137, 6393, 32028, 6917, 31911, 7441, 31785, 7962
|
||||
.word 31650, 8481, 31507, 8997, 31356, 9512, 31196, 10024
|
||||
.word 31028, 10533, 30852, 11039, 30667, 11542, 30474, 12042
|
||||
.word 30273, 12539, 30064, 13033, 29846, 13523, 29621, 14010
|
||||
.word 29388, 14492, 29147, 14971, 28898, 15446, 28641, 15917
|
||||
.word 28377, 16384, 28105, 16846, 27826, 17303, 27539, 17756
|
||||
.word 27245, 18204, 26943, 18648, 26635, 19086, 26319, 19519
|
||||
.word 25996, 19947, 25666, 20370, 25329, 20787, 24986, 21199
|
||||
.word 24636, 21605, 24279, 22005, 23915, 22399, 23546, 22788
|
||||
.word 23170, 23170, 22788, 23546, 22399, 23915, 22005, 24279
|
||||
.word 21605, 24636, 21199, 24986, 20787, 25329, 20370, 25666
|
||||
.word 19947, 25996, 19519, 26319, 19086, 26635, 18648, 26943
|
||||
.word 18204, 27245, 17756, 27539, 17303, 27826, 16846, 28105
|
||||
.word 16384, 28377, 15917, 28641, 15446, 28898, 14971, 29147
|
||||
.word 14492, 29388, 14010, 29621, 13523, 29846, 13033, 30064
|
||||
.word 12539, 30273, 12042, 30474, 11542, 30667, 11039, 30852
|
||||
.word 10533, 31028, 10024, 31196, 9512, 31356, 8997, 31507
|
||||
.word 8481, 31650, 7962, 31785, 7441, 31911, 6917, 32028
|
||||
.word 6393, 32137, 5866, 32238, 5338, 32329, 4808, 32412
|
||||
.word 4277, 32487, 3745, 32552, 3212, 32609, 2678, 32657
|
||||
.word 2143, 32697, 1608, 32728, 1072, 32749, 536, 32763
|
||||
.word 0, 32767, -268, 32766, -536, 32763, -804, 32757
|
||||
.word -1072, 32749, -1340, 32740, -1608, 32728, -1875, 32713
|
||||
.word -2143, 32697, -2410, 32678, -2678, 32657, -2945, 32634
|
||||
.word -3212, 32609, -3478, 32582, -3745, 32552, -4011, 32521
|
||||
.word -4277, 32487, -4543, 32451, -4808, 32412, -5073, 32372
|
||||
.word -5338, 32329, -5602, 32285, -5866, 32238, -6129, 32189
|
||||
.word -6393, 32137, -6655, 32084, -6917, 32028, -7179, 31971
|
||||
.word -7441, 31911, -7701, 31849, -7962, 31785, -8222, 31719
|
||||
.word -8481, 31650, -8739, 31580, -8997, 31507, -9255, 31433
|
||||
.word -9512, 31356, -9768, 31277, -10024, 31196, -10278, 31113
|
||||
.word -10533, 31028, -10786, 30941, -11039, 30852, -11291, 30760
|
||||
.word -11542, 30667, -11793, 30571, -12042, 30474, -12291, 30374
|
||||
.word -12539, 30273, -12787, 30169, -13033, 30064, -13279, 29956
|
||||
.word -13523, 29846, -13767, 29735, -14010, 29621, -14252, 29505
|
||||
.word -14492, 29388, -14732, 29268, -14971, 29147, -15209, 29023
|
||||
.word -15446, 28898, -15682, 28771, -15917, 28641, -16151, 28510
|
||||
.word -16383, 28377, -16615, 28242, -16846, 28105, -17075, 27966
|
||||
.word -17303, 27826, -17530, 27683, -17756, 27539, -17981, 27393
|
||||
.word -18204, 27245, -18427, 27095, -18648, 26943, -18868, 26790
|
||||
.word -19086, 26635, -19303, 26478, -19519, 26319, -19734, 26158
|
||||
.word -19947, 25996, -20159, 25832, -20370, 25666, -20579, 25498
|
||||
.word -20787, 25329, -20994, 25158, -21199, 24986, -21403, 24811
|
||||
.word -21605, 24636, -21806, 24458, -22005, 24279, -22203, 24098
|
||||
.word -22399, 23915, -22594, 23731, -22788, 23546, -22979, 23359
|
||||
.word -23170, 23170, -23359, 22979, -23546, 22788, -23731, 22594
|
||||
.word -23915, 22399, -24098, 22203, -24279, 22005, -24458, 21806
|
||||
.word -24636, 21605, -24811, 21403, -24986, 21199, -25158, 20994
|
||||
.word -25329, 20787, -25498, 20579, -25666, 20370, -25832, 20159
|
||||
.word -25996, 19947, -26158, 19734, -26319, 19519, -26478, 19303
|
||||
.word -26635, 19086, -26790, 18868, -26943, 18648, -27095, 18427
|
||||
.word -27245, 18204, -27393, 17981, -27539, 17756, -27683, 17530
|
||||
.word -27826, 17303, -27966, 17075, -28105, 16846, -28242, 16615
|
||||
.word -28377, 16384, -28510, 16151, -28641, 15917, -28771, 15682
|
||||
.word -28898, 15446, -29023, 15209, -29147, 14971, -29268, 14732
|
||||
.word -29388, 14492, -29505, 14252, -29621, 14010, -29735, 13767
|
||||
.word -29846, 13523, -29956, 13279, -30064, 13033, -30169, 12787
|
||||
.word -30273, 12539, -30374, 12291, -30474, 12042, -30571, 11793
|
||||
.word -30667, 11542, -30760, 11291, -30852, 11039, -30941, 10786
|
||||
.word -31028, 10533, -31113, 10278, -31196, 10024, -31277, 9768
|
||||
.word -31356, 9512, -31433, 9255, -31507, 8997, -31580, 8739
|
||||
.word -31650, 8481, -31719, 8222, -31785, 7962, -31849, 7701
|
||||
.word -31911, 7441, -31971, 7179, -32028, 6917, -32084, 6655
|
||||
.word -32137, 6393, -32189, 6129, -32238, 5866, -32285, 5602
|
||||
.word -32329, 5338, -32372, 5073, -32412, 4808, -32451, 4543
|
||||
.word -32487, 4277, -32521, 4011, -32552, 3745, -32582, 3478
|
||||
.word -32609, 3212, -32634, 2945, -32657, 2678, -32678, 2410
|
||||
.word -32697, 2143, -32713, 1875, -32728, 1608, -32740, 1340
|
||||
.word -32749, 1072, -32757, 804, -32763, 536, -32766, 268
|
||||
.word -32767, 0, -32766, -268, -32763, -536, -32757, -804
|
||||
.word -32749, -1072, -32740, -1340, -32728, -1608, -32713, -1875
|
||||
.word -32697, -2143, -32678, -2410, -32657, -2678, -32634, -2945
|
||||
.word -32609, -3212, -32582, -3478, -32552, -3745, -32521, -4011
|
||||
.word -32487, -4277, -32451, -4543, -32412, -4808, -32372, -5073
|
||||
.word -32329, -5338, -32285, -5602, -32238, -5866, -32189, -6129
|
||||
.word -32137, -6393, -32084, -6655, -32028, -6917, -31971, -7179
|
||||
.word -31911, -7441, -31849, -7701, -31785, -7962, -31719, -8222
|
||||
.word -31650, -8481, -31580, -8739, -31507, -8997, -31433, -9255
|
||||
.word -31356, -9512, -31277, -9768, -31196, -10024, -31113, -10278
|
||||
.word -31028, -10533, -30941, -10786, -30852, -11039, -30760, -11291
|
||||
.word -30667, -11542, -30571, -11793, -30474, -12042, -30374, -12291
|
||||
.word -30273, -12539, -30169, -12787, -30064, -13033, -29956, -13279
|
||||
.word -29846, -13523, -29735, -13767, -29621, -14010, -29505, -14252
|
||||
.word -29388, -14492, -29268, -14732, -29147, -14971, -29023, -15209
|
||||
.word -28898, -15446, -28771, -15682, -28641, -15917, -28510, -16151
|
||||
.word -28377, -16383, -28242, -16615, -28105, -16846, -27966, -17075
|
||||
.word -27826, -17303, -27683, -17530, -27539, -17756, -27393, -17981
|
||||
.word -27245, -18204, -27095, -18427, -26943, -18648, -26790, -18868
|
||||
.word -26635, -19086, -26478, -19303, -26319, -19519, -26158, -19734
|
||||
.word -25996, -19947, -25832, -20159, -25666, -20370, -25498, -20579
|
||||
.word -25329, -20787, -25158, -20994, -24986, -21199, -24811, -21403
|
||||
.word -24636, -21605, -24458, -21806, -24279, -22005, -24098, -22203
|
||||
.word -23915, -22399, -23731, -22594, -23546, -22788, -23359, -22979
|
||||
.word -23170, -23170, -22979, -23359, -22788, -23546, -22594, -23731
|
||||
.word -22399, -23915, -22203, -24098, -22005, -24279, -21806, -24458
|
||||
.word -21605, -24636, -21403, -24811, -21199, -24986, -20994, -25158
|
||||
.word -20787, -25329, -20579, -25498, -20370, -25666, -20159, -25832
|
||||
.word -19947, -25996, -19734, -26158, -19519, -26319, -19303, -26478
|
||||
.word -19086, -26635, -18868, -26790, -18648, -26943, -18427, -27095
|
||||
.word -18204, -27245, -17981, -27393, -17756, -27539, -17530, -27683
|
||||
.word -17303, -27826, -17075, -27966, -16846, -28105, -16615, -28242
|
||||
.word -16383, -28377, -16151, -28510, -15917, -28641, -15682, -28771
|
||||
.word -15446, -28898, -15209, -29023, -14971, -29147, -14732, -29268
|
||||
.word -14492, -29388, -14252, -29505, -14010, -29621, -13767, -29735
|
||||
.word -13523, -29846, -13279, -29956, -13033, -30064, -12787, -30169
|
||||
.word -12539, -30273, -12291, -30374, -12042, -30474, -11793, -30571
|
||||
.word -11542, -30667, -11291, -30760, -11039, -30852, -10786, -30941
|
||||
.word -10533, -31028, -10278, -31113, -10024, -31196, -9768, -31277
|
||||
.word -9512, -31356, -9255, -31433, -8997, -31507, -8739, -31580
|
||||
.word -8481, -31650, -8222, -31719, -7962, -31785, -7701, -31849
|
||||
.word -7441, -31911, -7179, -31971, -6917, -32028, -6655, -32084
|
||||
.word -6393, -32137, -6129, -32189, -5866, -32238, -5602, -32285
|
||||
.word -5338, -32329, -5073, -32372, -4808, -32412, -4543, -32451
|
||||
.word -4277, -32487, -4011, -32521, -3745, -32552, -3478, -32582
|
||||
.word -3212, -32609, -2945, -32634, -2678, -32657, -2410, -32678
|
||||
.word -2143, -32697, -1875, -32713, -1608, -32728, -1340, -32740
|
||||
.word -1072, -32749, -804, -32757, -536, -32763, -268, -32766
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
+163
@@ -0,0 +1,163 @@
|
||||
#ifndef _TYPEDEFS_H
|
||||
#define _TYPEDEFS_H
|
||||
|
||||
/*******************************************************************************
|
||||
* FILE PURPOSE: Define data types for C
|
||||
********************************************************************************
|
||||
*
|
||||
* FILE NAME: typedefs.h
|
||||
*
|
||||
* DESCRIPTION:
|
||||
* This file contains common data type definitions
|
||||
*
|
||||
* Copyright (c) 2009 Texas Instruments Inc.
|
||||
* All Rights Reserved This program is the confidential and proprietary
|
||||
* product of Texas Instruments Inc. Any Unauthorized use, reproduction or
|
||||
* transfer of this program is strictly prohibited.
|
||||
*
|
||||
* HISTORY:
|
||||
*
|
||||
* 10/26/2004 S.Yim Written
|
||||
* 09/13/2006 U.Dasgupta Added defines to help division by 3.
|
||||
* 11/10/2006 S.Yim Change the definitions of WIMAX_status_t to align
|
||||
* withe M2P I/F
|
||||
* 09/11/2007 S.Yim Added MAC types.h here
|
||||
* 11/11/2008 R.Liang port to DSP/BIOS
|
||||
*
|
||||
* LIST OF FUNCTION PROTOTYPES:
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#include <limits.h>
|
||||
|
||||
//----------------------------------------------------------------------------
|
||||
// Global Macro Declarations
|
||||
//----------------------------------------------------------------------------
|
||||
#ifndef TRUE
|
||||
#define TRUE (1)
|
||||
#define FALSE (0)
|
||||
#endif
|
||||
|
||||
typedef enum {
|
||||
EVEN = 0,
|
||||
ODD = 1
|
||||
} parity_t;
|
||||
#define PARITY(a) ((a) % 2)
|
||||
|
||||
#define ALIGN16(len) (((len) + 1) & ~1)
|
||||
|
||||
#if defined (CM3)
|
||||
// Cortex CM3
|
||||
typedef unsigned char uint8;
|
||||
typedef unsigned short uint16;
|
||||
typedef signed short sint16;
|
||||
typedef unsigned int uint32;
|
||||
typedef signed int sint32;
|
||||
typedef int bool;
|
||||
|
||||
typedef unsigned char UINT8;
|
||||
// Read-Write Data Types
|
||||
typedef signed short SINT16; // Signed 16-bit integer (15-bit magnitude)
|
||||
typedef unsigned short UINT16; // Unsigned 16-bit integer
|
||||
typedef signed int SINT32; // Signed 32-bit integer (31-bit magnitude)
|
||||
typedef unsigned int UINT32; // Unsigned 32-bit integer
|
||||
//typedef int BOOL; // Only TRUE/FALSE applied
|
||||
|
||||
// All pointers are 32 bits long
|
||||
typedef SINT16 *PSINT16; // Pointer to SINT16
|
||||
typedef UINT16 *PUINT16; // Pointer to UINT16
|
||||
typedef SINT32 *PSINT32; // Pointer to SINT32
|
||||
typedef UINT32 *PUINT32; // Pointer to UINT32
|
||||
|
||||
#else
|
||||
|
||||
//----------------------------------------------------------------------------
|
||||
// Global Typedef Declarations
|
||||
//----------------------------------------------------------------------------
|
||||
|
||||
/* size of, in octets */
|
||||
#define OCTETS(x) ((sizeof(x)) * (CHAR_BIT >> 3))
|
||||
|
||||
//typedef unsigned char uint8;
|
||||
typedef unsigned int uint16;
|
||||
typedef unsigned long uint32;
|
||||
typedef unsigned long long uint64;
|
||||
|
||||
#ifndef DSP28_DATA_TYPES
|
||||
#define DSP28_DATA_TYPES
|
||||
typedef int int16;
|
||||
typedef long int32;
|
||||
typedef long long int64;
|
||||
|
||||
#ifndef STD_
|
||||
#ifndef _TI_STD_TYPES
|
||||
typedef unsigned int Uint16;
|
||||
typedef unsigned long Uint32;
|
||||
#endif
|
||||
#endif
|
||||
|
||||
typedef unsigned long long Uint64;
|
||||
typedef float float32;
|
||||
typedef long double float64;
|
||||
#endif
|
||||
|
||||
typedef long RCODE;
|
||||
//typedef unsigned long bool;
|
||||
|
||||
// Read-Write Data Types
|
||||
typedef signed int SINT16; // Signed 16-bit integer (15-bit magnitude)
|
||||
typedef unsigned int UINT16; // Unsigned 16-bit integer
|
||||
typedef signed long SINT32; // Signed 32-bit integer (31-bit magnitude)
|
||||
typedef unsigned long UINT32; // Unsigned 32-bit integer
|
||||
typedef signed long long SINT64; // Signed 64-bit integer
|
||||
typedef unsigned long long UINT64; // Unsigned 64-bit integer
|
||||
typedef int BOOL; // Only TRUE/FALSE applied
|
||||
|
||||
// All pointers are 32 bits long
|
||||
typedef SINT16 *PSINT16; // Pointer to SINT16
|
||||
typedef UINT16 *PUINT16; // Pointer to UINT16
|
||||
typedef SINT32 *PSINT32; // Pointer to SINT32
|
||||
typedef UINT32 *PUINT32; // Pointer to UINT32
|
||||
|
||||
#endif
|
||||
|
||||
#define SIZEOF_SINT16 2
|
||||
#define SIZEOF_UINT16 2
|
||||
#define SIZEOF_SINT32 4
|
||||
#define SIZEOF_UINT32 4
|
||||
|
||||
|
||||
//----------------------------------------------------------------------------
|
||||
// Complex data Typedef Declarations
|
||||
//----------------------------------------------------------------------------
|
||||
typedef struct
|
||||
{
|
||||
SINT16 real;
|
||||
SINT16 imag;
|
||||
|
||||
}cplx16, ComplexShort, ComplexShort_t;
|
||||
|
||||
// VCU uses reverse order
|
||||
typedef struct
|
||||
{
|
||||
SINT16 imag;
|
||||
SINT16 real;
|
||||
}cplx16vcu, ComplexShortVCU;
|
||||
|
||||
//----------------------------------------------------------------------------
|
||||
// Circular buffer Typedef Declarations
|
||||
//----------------------------------------------------------------------------
|
||||
typedef struct
|
||||
{
|
||||
SINT16 *buf_p; // buffer base addr
|
||||
UINT16 rdIdx; // read index
|
||||
UINT16 wtIdx; // write index
|
||||
UINT16 bufSize; // buf size in 16-bits words
|
||||
|
||||
}Buffer_t;
|
||||
|
||||
#endif //_TYPEDEFS_H
|
||||
|
||||
|
||||
|
||||
|
||||
+33
@@ -0,0 +1,33 @@
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: cla_data_rom_lnk.cmd
|
||||
//
|
||||
// TITLE: CLA data rom linker command file
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: $
|
||||
// $Release Date: $
|
||||
//###########################################################################
|
||||
|
||||
MEMORY
|
||||
{
|
||||
PAGE 1 :
|
||||
CLA1_DATAROM_RESERVED : origin = 0x01001000, length = 0x000870, fill=0xFFFF
|
||||
CLA1_DATAROM : origin = 0x01001870, length = 0x00078a, fill = 0xFFFF
|
||||
CROM_VERSION : origin = 0x01001FFA, length = 0x000006, fill=0xFFFF
|
||||
|
||||
/* CLA1_DATAROM : origin = 0x01001000, length = 0x001000*/
|
||||
}
|
||||
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
CLA1mathTables : load = CLA1_DATAROM, PAGE = 1
|
||||
.CROMVersion : load = CROM_VERSION, PAGE = 1
|
||||
}
|
||||
|
||||
/*
|
||||
//===========================================================================
|
||||
// End of file.
|
||||
//===========================================================================
|
||||
*/
|
||||
+21
@@ -0,0 +1,21 @@
|
||||
;; TI File $Revision: /main/1 $
|
||||
;; Checkin $Date: August 14, 2012 12:48:33 $
|
||||
;;###########################################################################
|
||||
;;
|
||||
;; FILE: cla_rom_version.asm
|
||||
;;
|
||||
;; TITLE: CLA data ROM Version and checksum values.
|
||||
;;
|
||||
;; Functions:
|
||||
;;
|
||||
;;
|
||||
;; Notes:
|
||||
;;
|
||||
;;###########################################################################
|
||||
;; $TI Release: F2837x Boot ROM Version 0 $
|
||||
;; $Release Date: Oct 1, 2013 $
|
||||
;;###########################################################################
|
||||
|
||||
.sect ".CROMVersion"
|
||||
.word 0x0100 ; Boot ROM Version v1.0
|
||||
.word 0x0413 ; Month/Year: (ex: 0x0109 = 1/09 = Jan 2009)
|
||||
+231
@@ -0,0 +1,231 @@
|
||||
;******************************************************************************
|
||||
;
|
||||
; FILE: CLASinCosTable.asm
|
||||
;
|
||||
; DESCRIPTION: Sine and Cosine Tables
|
||||
;
|
||||
;******************************************************************************
|
||||
; $TI Release: $
|
||||
; $Release Date: $
|
||||
;******************************************************************************
|
||||
; This software is licensed for use with Texas Instruments C28x
|
||||
; family DSCs. This license was provided to you prior to installing
|
||||
; the software. You may review this license by consulting a copy of
|
||||
; the agreement in the doc directory of this library.
|
||||
; ------------------------------------------------------------------------
|
||||
; Copyright (C) 2010-2011 Texas Instruments, Incorporated.
|
||||
; All Rights Reserved.
|
||||
;******************************************************************************
|
||||
|
||||
;############################################################################
|
||||
;/*! \defgroup CLAMATH_TABLES (Math Tables)
|
||||
; @{
|
||||
;*/
|
||||
;############################################################################
|
||||
.def _CLAsincosTable
|
||||
.def _CLAsinTable
|
||||
.def _CLAsincosTable_Sin0
|
||||
.def _CLAcosTable
|
||||
.def _CLAsincosTable_Cos0
|
||||
.def _CLAsinTableEnd
|
||||
.def _CLAcosTableEnd
|
||||
.def _CLAsincosTable_TABLE_SIZE
|
||||
.def _CLAsincosTable_TABLE_SIZEDivTwoPi
|
||||
.def _CLAsincosTable_TwoPiDivTABLE_SIZE
|
||||
.def _CLAsincosTable_TABLE_MASK
|
||||
.def _CLAsincosTable_Coef0
|
||||
.def _CLAsincosTable_Coef1
|
||||
.def _CLAsincosTable_Coef1_pos
|
||||
.def _CLAsincosTable_Coef2
|
||||
.def _CLAsincosTable_Coef3
|
||||
.def _CLAsincosTable_Coef3_neg
|
||||
.def _CLAsincosTableEnd
|
||||
|
||||
.sect "CLA1mathTables"
|
||||
|
||||
_CLAsincosTable:
|
||||
_CLAsinTable:
|
||||
_CLAsincosTable_Sin0:
|
||||
.float 0.0; ; sin( 0 * 2*pi/TABLE_SIZE)
|
||||
.float 0.04906767432742; ; sin( 1 * 2*pi/TABLE_SIZE)
|
||||
.float 0.09801714032956; ; sin( 2 * 2*pi/TABLE_SIZE)
|
||||
.float 0.1467304744553; ; sin( 3 * 2*pi/TABLE_SIZE)
|
||||
.float 0.1950903220162; ; sin( 4 * 2*pi/TABLE_SIZE)
|
||||
.float 0.2429801799032; ; sin( 5 * 2*pi/TABLE_SIZE)
|
||||
.float 0.2902846772544; ; sin( 6 * 2*pi/TABLE_SIZE)
|
||||
.float 0.3368898533922; ; sin( 7 * 2*pi/TABLE_SIZE)
|
||||
.float 0.3826834323651; ; sin( 8 * 2*pi/TABLE_SIZE)
|
||||
.float 0.4275550934303; ; sin( 9 * 2*pi/TABLE_SIZE)
|
||||
.float 0.4713967368260; ; sin( 10 * 2*pi/TABLE_SIZE)
|
||||
.float 0.5141027441932; ; sin( 11 * 2*pi/TABLE_SIZE)
|
||||
.float 0.5555702330196; ; sin( 12 * 2*pi/TABLE_SIZE)
|
||||
.float 0.5956993044925; ; sin( 13 * 2*pi/TABLE_SIZE)
|
||||
.float 0.6343932841637; ; sin( 14 * 2*pi/TABLE_SIZE)
|
||||
.float 0.6715589548470; ; sin( 15 * 2*pi/TABLE_SIZE)
|
||||
.float 0.7071067811865; ; sin( 16 * 2*pi/TABLE_SIZE)
|
||||
.float 0.7409511253549; ; sin( 17 * 2*pi/TABLE_SIZE)
|
||||
.float 0.7730104533627; ; sin( 18 * 2*pi/TABLE_SIZE)
|
||||
.float 0.8032075314806; ; sin( 19 * 2*pi/TABLE_SIZE)
|
||||
.float 0.8314696123026; ; sin( 20 * 2*pi/TABLE_SIZE)
|
||||
.float 0.8577286100001; ; sin( 21 * 2*pi/TABLE_SIZE)
|
||||
.float 0.8819212643481; ; sin( 22 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9039892931235; ; sin( 23 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9238795325113; ; sin( 24 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9415440651832; ; sin( 25 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9569403357322; ; sin( 26 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9700312531945; ; sin( 27 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9807852804033; ; sin( 28 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9891765099649; ; sin( 29 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9951847266721; ; sin( 30 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9987954562052; ; sin( 31 * 2*pi/TABLE_SIZE)
|
||||
|
||||
_CLAcosTable:
|
||||
_CLAsincosTable_Cos0:
|
||||
.float 1.0; ; sin( 32 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9987954562052; ; sin( 33 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9951847266721; ; sin( 34 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9891765099649; ; sin( 35 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9807852804033; ; sin( 36 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9700312531945; ; sin( 37 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9569403357322; ; sin( 38 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9415440651832; ; sin( 39 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9238795325113; ; sin( 40 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9039892931235; ; sin( 41 * 2*pi/TABLE_SIZE)
|
||||
.float 0.8819212643481; ; sin( 42 * 2*pi/TABLE_SIZE)
|
||||
.float 0.8577286100001; ; sin( 43 * 2*pi/TABLE_SIZE)
|
||||
.float 0.8314696123026; ; sin( 44 * 2*pi/TABLE_SIZE)
|
||||
.float 0.8032075314806; ; sin( 45 * 2*pi/TABLE_SIZE)
|
||||
.float 0.7730104533627; ; sin( 46 * 2*pi/TABLE_SIZE)
|
||||
.float 0.7409511253549; ; sin( 47 * 2*pi/TABLE_SIZE)
|
||||
.float 0.7071067811865; ; sin( 48 * 2*pi/TABLE_SIZE)
|
||||
.float 0.6715589548470; ; sin( 49 * 2*pi/TABLE_SIZE)
|
||||
.float 0.6343932841637; ; sin( 50 * 2*pi/TABLE_SIZE)
|
||||
.float 0.5956993044925; ; sin( 51 * 2*pi/TABLE_SIZE)
|
||||
.float 0.5555702330196; ; sin( 52 * 2*pi/TABLE_SIZE)
|
||||
.float 0.5141027441932; ; sin( 53 * 2*pi/TABLE_SIZE)
|
||||
.float 0.4713967368260; ; sin( 54 * 2*pi/TABLE_SIZE)
|
||||
.float 0.4275550934303; ; sin( 55 * 2*pi/TABLE_SIZE)
|
||||
.float 0.3826834323651; ; sin( 56 * 2*pi/TABLE_SIZE)
|
||||
.float 0.3368898533922; ; sin( 57 * 2*pi/TABLE_SIZE)
|
||||
.float 0.2902846772544; ; sin( 58 * 2*pi/TABLE_SIZE)
|
||||
.float 0.2429801799032; ; sin( 59 * 2*pi/TABLE_SIZE)
|
||||
.float 0.1950903220162; ; sin( 60 * 2*pi/TABLE_SIZE)
|
||||
.float 0.1467304744553; ; sin( 61 * 2*pi/TABLE_SIZE)
|
||||
.float 0.09801714032956; ; sin( 62 * 2*pi/TABLE_SIZE)
|
||||
.float 0.04906767432742; ; sin( 63 * 2*pi/TABLE_SIZE)
|
||||
.float 0.0; ; sin( 64 * 2*pi/TABLE_SIZE)
|
||||
.float -0.04906767432742; ; sin( 65 * 2*pi/TABLE_SIZE)
|
||||
.float -0.09801714032956; ; sin( 66 * 2*pi/TABLE_SIZE)
|
||||
.float -0.1467304744553; ; sin( 67 * 2*pi/TABLE_SIZE)
|
||||
.float -0.1950903220162; ; sin( 68 * 2*pi/TABLE_SIZE)
|
||||
.float -0.2429801799032; ; sin( 69 * 2*pi/TABLE_SIZE)
|
||||
.float -0.2902846772544; ; sin( 70 * 2*pi/TABLE_SIZE)
|
||||
.float -0.3368898533922; ; sin( 71 * 2*pi/TABLE_SIZE)
|
||||
.float -0.3826834323651; ; sin( 72 * 2*pi/TABLE_SIZE)
|
||||
.float -0.4275550934303; ; sin( 73 * 2*pi/TABLE_SIZE)
|
||||
.float -0.4713967368260; ; sin( 74 * 2*pi/TABLE_SIZE)
|
||||
.float -0.5141027441932; ; sin( 75 * 2*pi/TABLE_SIZE)
|
||||
.float -0.5555702330196; ; sin( 76 * 2*pi/TABLE_SIZE)
|
||||
.float -0.5956993044925; ; sin( 77 * 2*pi/TABLE_SIZE)
|
||||
.float -0.6343932841637; ; sin( 78 * 2*pi/TABLE_SIZE)
|
||||
.float -0.6715589548470; ; sin( 79 * 2*pi/TABLE_SIZE)
|
||||
.float -0.7071067811865; ; sin( 80 * 2*pi/TABLE_SIZE)
|
||||
.float -0.7409511253549; ; sin( 81 * 2*pi/TABLE_SIZE)
|
||||
.float -0.7730104533627; ; sin( 82 * 2*pi/TABLE_SIZE)
|
||||
.float -0.8032075314806; ; sin( 83 * 2*pi/TABLE_SIZE)
|
||||
.float -0.8314696123026; ; sin( 84 * 2*pi/TABLE_SIZE)
|
||||
.float -0.8577286100001; ; sin( 85 * 2*pi/TABLE_SIZE)
|
||||
.float -0.8819212643481; ; sin( 86 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9039892931235; ; sin( 87 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9238795325113; ; sin( 88 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9415440651832; ; sin( 89 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9569403357322; ; sin( 90 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9700312531945; ; sin( 91 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9807852804033; ; sin( 92 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9891765099649; ; sin( 93 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9951847266721; ; sin( 94 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9987954562052; ; sin( 95 * 2*pi/TABLE_SIZE)
|
||||
.float -1.0; ; sin( 96 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9987954562052; ; sin( 97 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9951847266721; ; sin( 98 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9891765099649; ; sin( 99 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9807852804033; ; sin(100 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9700312531945; ; sin(101 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9569403357322; ; sin(102 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9415440651832; ; sin(103 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9238795325113; ; sin(104 * 2*pi/TABLE_SIZE)
|
||||
.float -0.9039892931235; ; sin(105 * 2*pi/TABLE_SIZE)
|
||||
.float -0.8819212643481; ; sin(106 * 2*pi/TABLE_SIZE)
|
||||
.float -0.8577286100001; ; sin(107 * 2*pi/TABLE_SIZE)
|
||||
.float -0.8314696123026; ; sin(108 * 2*pi/TABLE_SIZE)
|
||||
.float -0.8032075314806; ; sin(109 * 2*pi/TABLE_SIZE)
|
||||
.float -0.7730104533627; ; sin(110 * 2*pi/TABLE_SIZE)
|
||||
.float -0.7409511253549; ; sin(111 * 2*pi/TABLE_SIZE)
|
||||
.float -0.7071067811865; ; sin(112 * 2*pi/TABLE_SIZE)
|
||||
.float -0.6715589548470; ; sin(113 * 2*pi/TABLE_SIZE)
|
||||
.float -0.6343932841637; ; sin(114 * 2*pi/TABLE_SIZE)
|
||||
.float -0.5956993044925; ; sin(115 * 2*pi/TABLE_SIZE)
|
||||
.float -0.5555702330196; ; sin(116 * 2*pi/TABLE_SIZE)
|
||||
.float -0.5141027441932; ; sin(117 * 2*pi/TABLE_SIZE)
|
||||
.float -0.4713967368260; ; sin(118 * 2*pi/TABLE_SIZE)
|
||||
.float -0.4275550934303; ; sin(119 * 2*pi/TABLE_SIZE)
|
||||
.float -0.3826834323651; ; sin(120 * 2*pi/TABLE_SIZE)
|
||||
.float -0.3368898533922; ; sin(121 * 2*pi/TABLE_SIZE)
|
||||
.float -0.2902846772544; ; sin(122 * 2*pi/TABLE_SIZE)
|
||||
.float -0.2429801799032; ; sin(123 * 2*pi/TABLE_SIZE)
|
||||
.float -0.1950903220162; ; sin(124 * 2*pi/TABLE_SIZE)
|
||||
.float -0.1467304744553; ; sin(125 * 2*pi/TABLE_SIZE)
|
||||
.float -0.09801714032956; ; sin(126 * 2*pi/TABLE_SIZE)
|
||||
.float -0.04906767432742; ; sin(127 * 2*pi/TABLE_SIZE)
|
||||
_CLAsinTableEnd:
|
||||
.float 0.0; ; sin( 0 * 2*pi/TABLE_SIZE)
|
||||
.float 0.04906767432742; ; sin( 1 * 2*pi/TABLE_SIZE)
|
||||
.float 0.09801714032956; ; sin( 2 * 2*pi/TABLE_SIZE)
|
||||
.float 0.1467304744553; ; sin( 3 * 2*pi/TABLE_SIZE)
|
||||
.float 0.1950903220162; ; sin( 4 * 2*pi/TABLE_SIZE)
|
||||
.float 0.2429801799032; ; sin( 5 * 2*pi/TABLE_SIZE)
|
||||
.float 0.2902846772544; ; sin( 6 * 2*pi/TABLE_SIZE)
|
||||
.float 0.3368898533922; ; sin( 7 * 2*pi/TABLE_SIZE)
|
||||
.float 0.3826834323651; ; sin( 8 * 2*pi/TABLE_SIZE)
|
||||
.float 0.4275550934303; ; sin( 9 * 2*pi/TABLE_SIZE)
|
||||
.float 0.4713967368260; ; sin( 10 * 2*pi/TABLE_SIZE)
|
||||
.float 0.5141027441932; ; sin( 11 * 2*pi/TABLE_SIZE)
|
||||
.float 0.5555702330196; ; sin( 12 * 2*pi/TABLE_SIZE)
|
||||
.float 0.5956993044925; ; sin( 13 * 2*pi/TABLE_SIZE)
|
||||
.float 0.6343932841637; ; sin( 14 * 2*pi/TABLE_SIZE)
|
||||
.float 0.6715589548470; ; sin( 15 * 2*pi/TABLE_SIZE)
|
||||
.float 0.7071067811865; ; sin( 16 * 2*pi/TABLE_SIZE)
|
||||
.float 0.7409511253549; ; sin( 17 * 2*pi/TABLE_SIZE)
|
||||
.float 0.7730104533627; ; sin( 18 * 2*pi/TABLE_SIZE)
|
||||
.float 0.8032075314806; ; sin( 19 * 2*pi/TABLE_SIZE)
|
||||
.float 0.8314696123026; ; sin( 20 * 2*pi/TABLE_SIZE)
|
||||
.float 0.8577286100001; ; sin( 21 * 2*pi/TABLE_SIZE)
|
||||
.float 0.8819212643481; ; sin( 22 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9039892931235; ; sin( 23 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9238795325113; ; sin( 24 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9415440651832; ; sin( 25 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9569403357322; ; sin( 26 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9700312531945; ; sin( 27 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9807852804033; ; sin( 28 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9891765099649; ; sin( 29 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9951847266721; ; sin( 30 * 2*pi/TABLE_SIZE)
|
||||
.float 0.9987954562052; ; sin( 31 * 2*pi/TABLE_SIZE)
|
||||
.float 1.0; ; sin( 32 * 2*pi/TABLE_SIZE)
|
||||
_CLAcosTableEnd:
|
||||
|
||||
|
||||
_CLAsincosTable_TABLE_SIZE .float 128.0
|
||||
_CLAsincosTable_TABLE_SIZEDivTwoPi .float 20.37183271576
|
||||
_CLAsincosTable_TwoPiDivTABLE_SIZE .float 0.04908738521234
|
||||
_CLAsincosTable_TABLE_MASK .long 0x0000007F;
|
||||
_CLAsincosTable_Coef0 .float -0.5;
|
||||
_CLAsincosTable_Coef1 .float -0.1666666666666;
|
||||
_CLAsincosTable_Coef1_pos .float 0.1666666666666;
|
||||
_CLAsincosTable_Coef2 .float 4.1666666666666e-2;
|
||||
_CLAsincosTable_Coef3 .float 8.3333333333333e-3;
|
||||
_CLAsincosTable_Coef3_neg .float -8.3333333333333e-3;
|
||||
_CLAsincosTableEnd:
|
||||
|
||||
;############################################################################
|
||||
;//! @}
|
||||
;############################################################################
|
||||
+235
@@ -0,0 +1,235 @@
|
||||
;******************************************************************************
|
||||
;
|
||||
; FILE: CLAacosineTable.asm
|
||||
;
|
||||
; DESCRIPTION: acosine Tables
|
||||
;
|
||||
;******************************************************************************
|
||||
; $TI Release: $
|
||||
; $Release Date: $
|
||||
;******************************************************************************
|
||||
; This software is licensed for use with Texas Instruments C28x
|
||||
; family DSCs. This license was provided to you prior to installing
|
||||
; the software. You may review this license by consulting a copy of
|
||||
; the agreement in the doc directory of this library.
|
||||
; ------------------------------------------------------------------------
|
||||
; Copyright (C) 2010-2011 Texas Instruments, Incorporated.
|
||||
; All Rights Reserved.
|
||||
;******************************************************************************
|
||||
|
||||
;############################################################################
|
||||
;/*! \addtogroup CLAMATH_TABLES
|
||||
; @{
|
||||
;*/
|
||||
;############################################################################
|
||||
|
||||
.def _CLAacosinHalfPITable
|
||||
.def _CLAacosinTable
|
||||
.def _CLAacosinTableEnd
|
||||
|
||||
.sect "CLA1mathTables"
|
||||
|
||||
_CLAacosinHalfPITable:
|
||||
.float 2.0 ; 2.0
|
||||
.float 3.141592653589 ; PI
|
||||
|
||||
_CLAacosinTable:
|
||||
.float 1.570795690593 ;
|
||||
.float -0.999877862610 ;
|
||||
.float -0.007815361896 ;
|
||||
.float 1.570791227101 ;
|
||||
.float -0.999510644409 ;
|
||||
.float -0.015647916155 ;
|
||||
.float 1.570779058483 ;
|
||||
.float -0.998895919094 ;
|
||||
.float -0.023514960332 ;
|
||||
.float 1.570755205030 ;
|
||||
.float -0.998029615282 ;
|
||||
.float -0.031434003631 ;
|
||||
.float 1.570715532275 ;
|
||||
.float -0.996905974725 ;
|
||||
.float -0.039422875916 ;
|
||||
.float 1.570655695706 ;
|
||||
.float -0.995517492804 ;
|
||||
.float -0.047499840611 ;
|
||||
.float 1.570571082211 ;
|
||||
.float -0.993854840311 ;
|
||||
.float -0.055683712914 ;
|
||||
.float 1.570456747283 ;
|
||||
.float -0.991906765146 ;
|
||||
.float -0.063993984848 ;
|
||||
.float 1.570307346943 ;
|
||||
.float -0.989659972212 ;
|
||||
.float -0.072450958820 ;
|
||||
.float 1.570117063183 ;
|
||||
.float -0.987098979366 ;
|
||||
.float -0.081075891529 ;
|
||||
.float 1.569879521613 ;
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
.float 0.945459855532 ;
|
||||
.float 0.907400624736 ;
|
||||
.float -1.606018804842 ;
|
||||
.float 0.820295736860 ;
|
||||
.float 1.224540947101 ;
|
||||
.float -1.806917563896 ;
|
||||
.float 0.662418669454 ;
|
||||
.float 1.616794995066 ;
|
||||
.float -2.050569262035 ;
|
||||
.float 0.460162432609 ;
|
||||
.float 2.109729648039 ;
|
||||
.float -2.350920816737 ;
|
||||
.float 0.196211605358 ;
|
||||
.float 2.740985157716 ;
|
||||
.float -2.728353889708 ;
|
||||
.float -0.156051915958 ;
|
||||
.float 3.567962877198 ;
|
||||
.float -3.213722960014 ;
|
||||
.float -0.639321234262 ;
|
||||
.float 4.682006534082 ;
|
||||
.float -3.855770086891 ;
|
||||
.float -1.325757685059 ;
|
||||
.float 6.236312386687 ;
|
||||
.float -4.735651038017 ;
|
||||
.float -2.345709388587 ;
|
||||
.float 8.505488022524 ;
|
||||
.float -5.997790945975 ;
|
||||
.float -3.956059541908 ;
|
||||
.float 12.026617159136 ;
|
||||
.float -7.922628470498 ;
|
||||
.float -6.727400789527 ;
|
||||
.float 17.983705080358 ;
|
||||
.float -11.123941286820;
|
||||
.float -12.170909745654;
|
||||
.float 29.488929624542 ;
|
||||
.float -17.203344479111;
|
||||
.float -25.631911490690;
|
||||
.float 57.466598393615 ;
|
||||
.float -31.741016484669;
|
||||
.float -81.587305009103;
|
||||
.float 171.803399517566;
|
||||
.float -90.149831709374;
|
||||
.float 0.0;
|
||||
.float 0.0;
|
||||
.float 0.0;
|
||||
|
||||
|
||||
_CLAacosinTableEnd:
|
||||
|
||||
;############################################################################
|
||||
;//! @}
|
||||
;############################################################################
|
||||
+238
@@ -0,0 +1,238 @@
|
||||
;******************************************************************************
|
||||
;
|
||||
; FILE: CLAasineTable.asm
|
||||
;
|
||||
; DESCRIPTION: asine Tables
|
||||
;
|
||||
;******************************************************************************
|
||||
; $TI Release: $
|
||||
; $Release Date: $
|
||||
;******************************************************************************
|
||||
; This software is licensed for use with Texas Instruments C28x
|
||||
; family DSCs. This license was provided to you prior to installing
|
||||
; the software. You may review this license by consulting a copy of
|
||||
; the agreement in the doc directory of this library.
|
||||
; ------------------------------------------------------------------------
|
||||
; Copyright (C) 2010-2011 Texas Instruments, Incorporated.
|
||||
; All Rights Reserved.
|
||||
;******************************************************************************
|
||||
|
||||
;############################################################################
|
||||
;/*! \addtogroup CLAMATH_TABLES
|
||||
; @{
|
||||
;*/
|
||||
;############################################################################
|
||||
|
||||
.def _CLAasinHalfPITable
|
||||
.def _CLAasinTable
|
||||
.def _CLAasinTableEnd
|
||||
|
||||
.sect "CLA1mathTables"
|
||||
|
||||
_CLAasinHalfPITable:
|
||||
.float 2.0 ; 2.0
|
||||
.float 1.570796327 ; PI/2
|
||||
|
||||
_CLAasinTable:
|
||||
|
||||
.float 0.0
|
||||
.float 1.0
|
||||
.float 0.0
|
||||
.float 0.000000636202
|
||||
.float 0.999877862610
|
||||
.float 0.007815361896
|
||||
.float 0.000005099694
|
||||
.float 0.999510644409
|
||||
.float 0.015647916155
|
||||
.float 0.000017268312
|
||||
.float 0.998895919094
|
||||
.float 0.023514960332
|
||||
.float 0.000041121765
|
||||
.float 0.998029615282
|
||||
.float 0.031434003631
|
||||
.float 0.000080794520
|
||||
.float 0.996905974725
|
||||
.float 0.039422875916
|
||||
.float 0.000140631089
|
||||
.float 0.995517492804
|
||||
.float 0.047499840611
|
||||
.float 0.000225244584
|
||||
.float 0.993854840311
|
||||
.float 0.055683712914
|
||||
.float 0.000339579512
|
||||
.float 0.991906765146
|
||||
.float 0.063993984848
|
||||
.float 0.000488979852
|
||||
.float 0.989659972212
|
||||
.float 0.072450958820
|
||||
.float 0.000679263611
|
||||
.float 0.987098979366
|
||||
.float 0.081075891529
|
||||
.float 0.000916805182
|
||||
.float 0.984205946802
|
||||
.float 0.089891150305
|
||||
.float 0.001208627040
|
||||
.float 0.980960476685
|
||||
.float 0.098920384204
|
||||
.float 0.001562502549
|
||||
.float 0.977339379243
|
||||
.float 0.108188712551
|
||||
.float 0.001987071928
|
||||
.float 0.973316400729
|
||||
.float 0.117722933997
|
||||
.float 0.002491973784
|
||||
.float 0.968861907789
|
||||
.float 0.127551759665
|
||||
.float 0.003087995053
|
||||
.float 0.963942521723
|
||||
.float 0.137706074532
|
||||
.float 0.003787242692
|
||||
.float 0.958520694794
|
||||
.float 0.148219231941
|
||||
.float 0.004603341138
|
||||
.float 0.952554219267
|
||||
.float 0.159127386977
|
||||
.float 0.005551660294
|
||||
.float 0.945995657913
|
||||
.float 0.170469875522
|
||||
.float 0.006649579796
|
||||
.float 0.938791682505
|
||||
.float 0.182289647088
|
||||
.float 0.007916796475
|
||||
.float 0.930882303984
|
||||
.float 0.194633761132
|
||||
.float 0.009375683410
|
||||
.float 0.922199974574
|
||||
.float 0.207553958472
|
||||
.float 0.011051710808
|
||||
.float 0.912668537890
|
||||
.float 0.221107321885
|
||||
.float 0.012973941175
|
||||
.float 0.902201997769
|
||||
.float 0.235357042896
|
||||
.float 0.015175614174
|
||||
.float 0.890703070035
|
||||
.float 0.250373315541
|
||||
.float 0.017694840102
|
||||
.float 0.878061473098
|
||||
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|
||||
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|
||||
.float 0.864151902887
|
||||
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|
||||
.float 0.023867860513
|
||||
.float 0.848831624374
|
||||
.float 0.300851714968
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
.float 0.322801460177
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
.float -0.098791845166
|
||||
.float 1.069276441800
|
||||
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|
||||
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|
||||
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|
||||
.float 0.443100143614
|
||||
.float -0.431959397725
|
||||
.float 1.295878193174
|
||||
.float 0.524789871827
|
||||
.float -0.647485610469
|
||||
.float 1.438041695773
|
||||
.float 0.625336471263
|
||||
.float -0.907400624736
|
||||
.float 1.606018804842
|
||||
.float 0.750500589935
|
||||
.float -1.224540947101
|
||||
.float 1.806917563896
|
||||
.float 0.908377657341
|
||||
.float -1.616794995066
|
||||
.float 2.050569262035
|
||||
.float 1.110633894185
|
||||
.float -2.109729648039
|
||||
.float 2.350920816737
|
||||
.float 1.374584721437
|
||||
.float -2.740985157716
|
||||
.float 2.728353889708
|
||||
.float 1.726848242753
|
||||
.float -3.567962877198
|
||||
.float 3.213722960014
|
||||
.float 2.210117561056
|
||||
.float -4.682006534082
|
||||
.float 3.855770086891
|
||||
.float 2.896554011854
|
||||
.float -6.236312386687
|
||||
.float 4.735651038017
|
||||
.float 3.916505715382
|
||||
.float -8.505488022524
|
||||
.float 5.997790945975
|
||||
.float 5.526855868703
|
||||
.float -12.026617159136
|
||||
.float 7.922628470498
|
||||
.float 8.298197116322
|
||||
.float -17.983705080358
|
||||
.float 11.123941286820
|
||||
.float 13.741706072449
|
||||
.float -29.488929624542
|
||||
.float 17.203344479111
|
||||
.float 27.202707817485
|
||||
.float -57.466598393615
|
||||
.float 31.741016484669
|
||||
.float 83.158101335898
|
||||
.float -171.803399517566
|
||||
.float 90.149831709374
|
||||
|
||||
.float 1.5707963267948966192313216916398
|
||||
.float 0
|
||||
.float 0
|
||||
|
||||
_CLAasinTableEnd:
|
||||
;############################################################################
|
||||
;//! @}
|
||||
;############################################################################
|
||||
+246
@@ -0,0 +1,246 @@
|
||||
;******************************************************************************
|
||||
;
|
||||
; FILE: CLAatanTable.asm
|
||||
;
|
||||
; DESCRIPTION: atan Tables
|
||||
;
|
||||
;******************************************************************************
|
||||
; $TI Release: $
|
||||
; $Release Date: $
|
||||
;******************************************************************************
|
||||
; This software is licensed for use with Texas Instruments C28x
|
||||
; family DSCs. This license was provided to you prior to installing
|
||||
; the software. You may review this license by consulting a copy of
|
||||
; the agreement in the doc directory of this library.
|
||||
; ------------------------------------------------------------------------
|
||||
; Copyright (C) 2010-2011 Texas Instruments, Incorporated.
|
||||
; All Rights Reserved.
|
||||
;******************************************************************************
|
||||
|
||||
;############################################################################
|
||||
;/*! \addtogroup CLAMATH_TABLES
|
||||
; @{
|
||||
;*/
|
||||
;############################################################################
|
||||
|
||||
.def _CLAatan2HalfPITable
|
||||
.def _CLAINV2PI
|
||||
.def _CLAatan2Table
|
||||
.def _CLAatan2TableEnd
|
||||
|
||||
.sect "CLA1mathTables"
|
||||
|
||||
_CLAatan2HalfPITable:
|
||||
.float 2.0 ; 2.0
|
||||
.float 1.570796327 ; PI/2
|
||||
_CLAINV2PI:
|
||||
.float 0.159154943 ;1 / {2*PI}
|
||||
|
||||
_CLAatan2Table:
|
||||
.float 0.000000000000 ; 0 x0 = 0.000000000000 -> a0 = 0.000000000000
|
||||
.float 1.000040679675 ; 0 x1 = 0.007812500000 -> a1 = 1.000040679675
|
||||
.float -0.007811069750 ; 0 x2 = 0.015625000000 -> a2 = -0.007811069750
|
||||
|
||||
.float -0.000003807022 ; 1 x0 = 0.015625000000 -> a0 = -0.000003807022
|
||||
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|
||||
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|
||||
|
||||
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||||
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
.float -0.002661063159 ; 13 x0 = 0.203125000000 -> a0 = -0.002661063159
|
||||
.float 1.038949980222 ; 13 x1 = 0.210937500000 -> a1 = 1.038949980222
|
||||
.float -0.193338416410 ; 13 x2 = 0.218750000000 -> a2 = -0.193338416410
|
||||
.float -0.003217354977 ; 14 x0 = 0.218750000000 -> a0 = -0.003217354977
|
||||
.float 1.044037065160 ; 14 x1 = 0.226562500000 -> a1 = 1.044037065160
|
||||
.float -0.204968298146 ; 14 x2 = 0.234375000000 -> a2 = -0.204968298146
|
||||
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|
||||
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|
||||
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|
||||
.float -0.004488862702 ; 16 x0 = 0.250000000000 -> a0 = -0.004488862702
|
||||
.float 1.054536702192 ; 16 x1 = 0.257812500000 -> a1 = 1.054536702192
|
||||
.float -0.226666395507 ; 16 x2 = 0.265625000000 -> a2 = -0.226666395507
|
||||
.float -0.005196863579 ; 17 x0 = 0.265625000000 -> a0 = -0.005196863579
|
||||
.float 1.059868607573 ; 17 x1 = 0.273437500000 -> a1 = 1.059868607573
|
||||
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|
||||
.float -0.005946705500 ; 18 x0 = 0.281250000000 -> a0 = -0.005946705500
|
||||
.float 1.065201909527 ; 18 x1 = 0.289062500000 -> a1 = 1.065201909527
|
||||
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|
||||
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|
||||
.float 1.070497443994 ; 19 x1 = 0.304687500000 -> a1 = 1.070497443994
|
||||
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|
||||
.float -0.007547992413 ; 20 x0 = 0.312500000000 -> a0 = -0.007547992413
|
||||
.float 1.075717083222 ; 20 x1 = 0.320312500000 -> a1 = 1.075717083222
|
||||
.float -0.263462171840 ; 20 x2 = 0.328125000000 -> a2 = -0.263462171840
|
||||
.float -0.008385665599 ; 21 x0 = 0.328125000000 -> a0 = -0.008385665599
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
.float -0.010951723407 ; 24 x0 = 0.375000000000 -> a0 = -0.010951723407
|
||||
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|
||||
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|
||||
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|
||||
.float 1.099447418304 ; 25 x1 = 0.398437500000 -> a1 = 1.099447418304
|
||||
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|
||||
.float -0.012618729873 ; 26 x0 = 0.406250000000 -> a0 = -0.012618729873
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
.float -0.014164046711 ; 28 x0 = 0.437500000000 -> a0 = -0.014164046711
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
.float -0.016588511229 ; 32 x0 = 0.500000000000 -> a0 = -0.016588511229
|
||||
.float 1.120939707956 ; 32 x1 = 0.507812500000 -> a1 = 1.120939707956
|
||||
.float -0.320934934991 ; 32 x2 = 0.515625000000 -> a2 = -0.320934934991
|
||||
.float -0.017002873645 ; 33 x0 = 0.515625000000 -> a0 = -0.017002873645
|
||||
.float 1.122547775367 ; 33 x1 = 0.523437500000 -> a1 = 1.122547775367
|
||||
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|
||||
.float -0.017323494499 ; 34 x0 = 0.531250000000 -> a0 = -0.017323494499
|
||||
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|
||||
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|
||||
.float -0.017542518140 ; 35 x0 = 0.546875000000 -> a0 = -0.017542518140
|
||||
.float 1.124557396633 ; 35 x1 = 0.554687500000 -> a1 = 1.124557396633
|
||||
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|
||||
.float -0.017652539065 ; 36 x0 = 0.562500000000 -> a0 = -0.017652539065
|
||||
.float 1.124949314810 ; 36 x1 = 0.570312500000 -> a1 = 1.124949314810
|
||||
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|
||||
.float -0.017646635823 ; 37 x0 = 0.578125000000 -> a0 = -0.017646635823
|
||||
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|
||||
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|
||||
.float -0.017518398344 ; 38 x0 = 0.593750000000 -> a0 = -0.017518398344
|
||||
.float 1.124498287266 ; 38 x1 = 0.601562500000 -> a1 = 1.124498287266
|
||||
.float -0.324336318787 ; 38 x2 = 0.609375000000 -> a2 = -0.324336318787
|
||||
.float -0.017261948920 ; 39 x0 = 0.609375000000 -> a0 = -0.017261948920
|
||||
.float 1.123657226955 ; 39 x1 = 0.617187500000 -> a1 = 1.123657226955
|
||||
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|
||||
.float -0.016871957164 ; 40 x0 = 0.625000000000 -> a0 = -0.016871957164
|
||||
.float 1.122409836098 ; 40 x1 = 0.632812500000 -> a1 = 1.122409836098
|
||||
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|
||||
.float -0.016343649294 ; 41 x0 = 0.640625000000 -> a0 = -0.016343649294
|
||||
.float 1.120761030918 ; 41 x1 = 0.648437500000 -> a1 = 1.120761030918
|
||||
.float -0.321362834119 ; 41 x2 = 0.656250000000 -> a2 = -0.321362834119
|
||||
.float -0.015672812166 ; 42 x0 = 0.656250000000 -> a0 = -0.015672812166
|
||||
.float 1.118717085258 ; 42 x1 = 0.664062500000 -> a1 = 1.118717085258
|
||||
.float -0.319805931024 ; 42 x2 = 0.671875000000 -> a2 = -0.319805931024
|
||||
.float -0.014855792451 ; 43 x0 = 0.671875000000 -> a0 = -0.014855792451
|
||||
.float 1.116285501852 ; 43 x1 = 0.679687500000 -> a1 = 1.116285501852
|
||||
.float -0.317996734279 ; 43 x2 = 0.687500000000 -> a2 = -0.317996734279
|
||||
.float -0.013889491441 ; 44 x0 = 0.687500000000 -> a0 = -0.013889491441
|
||||
.float 1.113474885484 ; 44 x1 = 0.695312500000 -> a1 = 1.113474885484
|
||||
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|
||||
.float -0.012771355912 ; 45 x0 = 0.703125000000 -> a0 = -0.012771355912
|
||||
.float 1.110294819035 ; 45 x1 = 0.710937500000 -> a1 = 1.110294819035
|
||||
.float -0.313691879968 ; 45 x2 = 0.718750000000 -> a2 = -0.313691879968
|
||||
.float -0.011499365513 ; 46 x0 = 0.718750000000 -> a0 = -0.011499365513
|
||||
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|
||||
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|
||||
.float -0.010072017131 ; 47 x0 = 0.734375000000 -> a0 = -0.010072017131
|
||||
.float 1.102868841531 ; 47 x1 = 0.742187500000 -> a1 = 1.102868841531
|
||||
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|
||||
.float -0.008488306656 ; 48 x0 = 0.750000000000 -> a0 = -0.008488306656
|
||||
.float 1.098645928648 ; 48 x1 = 0.757812500000 -> a1 = 1.098645928648
|
||||
.float -0.305768944066 ; 48 x2 = 0.765625000000 -> a2 = -0.305768944066
|
||||
.float -0.006747708579 ; 49 x0 = 0.765625000000 -> a0 = -0.006747708579
|
||||
.float 1.094099346648 ; 49 x1 = 0.773437500000 -> a1 = 1.094099346648
|
||||
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|
||||
.float -0.004850153815 ; 50 x0 = 0.781250000000 -> a0 = -0.004850153815
|
||||
.float 1.089241865523 ; 50 x1 = 0.789062500000 -> a1 = 1.089241865523
|
||||
.float -0.299691312610 ; 50 x2 = 0.796875000000 -> a2 = -0.299691312610
|
||||
.float -0.002796006119 ; 51 x0 = 0.796875000000 -> a0 = -0.002796006119
|
||||
.float 1.084086590517 ; 51 x1 = 0.804687500000 -> a1 = 1.084086590517
|
||||
.float -0.296456776409 ; 51 x2 = 0.812500000000 -> a2 = -0.296456776409
|
||||
.float -0.000586037441 ; 52 x0 = 0.812500000000 -> a0 = -0.000586037441
|
||||
.float 1.078646875666 ; 52 x1 = 0.820312500000 -> a1 = 1.078646875666
|
||||
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|
||||
.float 0.001778597452 ; 53 x0 = 0.828125000000 -> a0 = 0.001778597452
|
||||
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|
||||
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|
||||
.float 0.004296386804 ; 54 x0 = 0.843750000000 -> a0 = 0.004296386804
|
||||
.float 1.066968312440 ; 54 x1 = 0.851562500000 -> a1 = 1.066968312440
|
||||
.float -0.286125114351 ; 54 x2 = 0.859375000000 -> a2 = -0.286125114351
|
||||
.float 0.006965487894 ; 55 x0 = 0.859375000000 -> a0 = 0.006965487894
|
||||
.float 1.060756727064 ; 55 x1 = 0.867187500000 -> a1 = 1.060756727064
|
||||
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|
||||
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|
||||
.float 1.054315099009 ; 56 x1 = 0.882812500000 -> a1 = 1.054315099009
|
||||
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|
||||
.float 0.012748755207 ; 57 x0 = 0.890625000000 -> a0 = 0.012748755207
|
||||
.float 1.047656950440 ; 57 x1 = 0.898437500000 -> a1 = 1.047656950440
|
||||
.float -0.275092470943 ; 57 x2 = 0.906250000000 -> a2 = -0.275092470943
|
||||
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|
||||
.float 1.040795664582 ; 58 x1 = 0.914062500000 -> a1 = 1.040795664582
|
||||
.float -0.271306980411 ; 58 x2 = 0.921875000000 -> a2 = -0.271306980411
|
||||
.float 0.019108017893 ; 59 x0 = 0.921875000000 -> a0 = 0.019108017893
|
||||
.float 1.033744441476 ; 59 x1 = 0.929687500000 -> a1 = 1.033744441476
|
||||
.float -0.267482624928 ; 59 x2 = 0.937500000000 -> a2 = -0.267482624928
|
||||
.float 0.022496252887 ; 60 x0 = 0.937500000000 -> a0 = 0.022496252887
|
||||
.float 1.026516258989 ; 60 x1 = 0.945312500000 -> a1 = 1.026516258989
|
||||
.float -0.263627622089 ; 60 x2 = 0.953125000000 -> a2 = -0.263627622089
|
||||
.float 0.026019221162 ; 61 x0 = 0.953125000000 -> a0 = 0.026019221162
|
||||
.float 1.019123838651 ; 61 x1 = 0.960937500000 -> a1 = 1.019123838651
|
||||
.float -0.259749650860 ; 61 x2 = 0.968750000000 -> a2 = -0.259749650860
|
||||
.float 0.029673465636 ; 62 x0 = 0.968750000000 -> a0 = 0.029673465636
|
||||
.float 1.011579616186 ; 62 x1 = 0.976562500000 -> a1 = 1.011579616186
|
||||
.float -0.255855871106 ; 62 x2 = 0.984375000000 -> a2 = -0.255855871106
|
||||
|
||||
.float 0.033455390838 ; 63 x0 = 0.984375000000 -> a0 = 0.033455390838
|
||||
.float 1.003895716322 ; 63 x1 = 0.992187500000 -> a1 = 1.003895716322
|
||||
.float -0.251952943763 ; 63 x2 = 1.000000000000 -> a2 = -0.251952943763
|
||||
|
||||
.float 0.037361283212 ; 64 x0 = 1.000000000000 -> a0 = 0.037361283212
|
||||
.float 0.996083931611 ; 64 x1 = 1.007812500000 -> a1 = 0.996083931611
|
||||
.float -0.248047051426 ; 64 x2 = 1.015625000000 -> a2 = -0.248047051426
|
||||
_CLAatan2TableEnd:
|
||||
|
||||
;############################################################################
|
||||
;//! @}
|
||||
;############################################################################
|
||||
+142
@@ -0,0 +1,142 @@
|
||||
;******************************************************************************
|
||||
;
|
||||
; FILE: CLAexpTable.asm
|
||||
;
|
||||
; DESCRIPTION: Exponential Tables
|
||||
;
|
||||
;******************************************************************************
|
||||
; $TI Release: $
|
||||
; $Release Date: $
|
||||
;******************************************************************************
|
||||
; This software is licensed for use with Texas Instruments C28x
|
||||
; family DSCs. This license was provided to you prior to installing
|
||||
; the software. You may review this license by consulting a copy of
|
||||
; the agreement in the doc directory of this library.
|
||||
; ------------------------------------------------------------------------
|
||||
; Copyright (C) 2010-2011 Texas Instruments, Incorporated.
|
||||
; All Rights Reserved.
|
||||
;******************************************************************************
|
||||
|
||||
;############################################################################
|
||||
;/*! \addtogroup CLAMATH_TABLES
|
||||
; @{
|
||||
;*/
|
||||
;############################################################################
|
||||
|
||||
.def _CLAINV1
|
||||
.def _CLAINV2
|
||||
.def _CLAINV3
|
||||
.def _CLAINV4
|
||||
.def _CLAINV5
|
||||
.def _CLAINV6
|
||||
.def _CLAINV7
|
||||
.def _CLALOG10
|
||||
.def _CLAExpTable
|
||||
.def _CLAExpTableEnd
|
||||
|
||||
.sect "CLA1mathTables"
|
||||
_CLAINV1 .float 1
|
||||
_CLAINV2 .float 0.5 ;1/2
|
||||
_CLAINV3 .float 0.333333333333333333 ;1/3
|
||||
_CLAINV4 .float 0.25 ;1/4
|
||||
_CLAINV5 .float 0.20 ;1/5
|
||||
_CLAINV6 .float 0.166666666666666666 ;1/6
|
||||
_CLAINV7 .float 0.142857142857142857 ;1/7
|
||||
|
||||
_CLALOG10 .float 2.302585092 ;LOG10(e)
|
||||
|
||||
_CLAExpTable:
|
||||
.float 1.0; exp(0)
|
||||
.float 2.7182818285e+0; exp(1)
|
||||
.float 7.3890560989e+0; exp(2)
|
||||
.float 2.0085536923e+1; exp(3)
|
||||
.float 5.4598150033e+1; exp(4)
|
||||
.float 1.484131591e+2; exp(5)
|
||||
.float 4.0342879349e+2; exp(6)
|
||||
.float 1.0966331584e+3; exp(7)
|
||||
.float 2.980957987e+3; exp(8)
|
||||
.float 8.1030839276e+3; exp(9)
|
||||
.float 2.2026465795e+4; exp(10)
|
||||
.float 5.9874141715e+4; exp(11)
|
||||
.float 1.6275479142e+5; exp(12)
|
||||
.float 4.4241339201e+5; exp(13)
|
||||
.float 1.2026042842e+6; exp(14)
|
||||
.float 3.2690173725e+6; exp(15)
|
||||
.float 8.8861105205e+6; exp(16)
|
||||
.float 2.4154952754e+7; exp(17)
|
||||
.float 6.5659969137e+7; exp(18)
|
||||
.float 1.7848230096e+8; exp(19)
|
||||
.float 4.8516519541e+8; exp(20)
|
||||
.float 1.3188157345e+9; exp(21)
|
||||
.float 3.5849128461e+9; exp(22)
|
||||
.float 9.7448034462e+9; exp(23)
|
||||
.float 2.648912213e+10; exp(24)
|
||||
.float 7.2004899337e+10; exp(25)
|
||||
.float 1.9572960943e+11; exp(26)
|
||||
.float 5.320482406e+11; exp(27)
|
||||
.float 1.4462570643e+12; exp(28)
|
||||
.float 3.9313342971e+12; exp(29)
|
||||
.float 1.0686474582e+13; exp(30)
|
||||
.float 2.9048849665e+13; exp(31)
|
||||
.float 7.8962960183e+13; exp(32)
|
||||
.float 2.1464357979e+14; exp(33)
|
||||
.float 5.8346174253e+14; exp(34)
|
||||
.float 1.5860134523e+15; exp(35)
|
||||
.float 4.3112315471e+15; exp(36)
|
||||
.float 1.1719142373e+16; exp(37)
|
||||
.float 3.1855931757e+16; exp(38)
|
||||
.float 8.6593400424e+16; exp(39)
|
||||
.float 2.3538526684e+17; exp(40)
|
||||
.float 6.3984349353e+17; exp(41)
|
||||
.float 1.7392749415e+18; exp(42)
|
||||
.float 4.7278394682e+18; exp(43)
|
||||
.float 1.2851600114e+19; exp(44)
|
||||
.float 3.4934271057e+19; exp(45)
|
||||
.float 9.4961194206e+19; exp(46)
|
||||
.float 2.5813128862e+20; exp(47)
|
||||
.float 7.0167359121e+20; exp(48)
|
||||
.float 1.9073465725e+21; exp(49)
|
||||
.float 5.1847055286e+21; exp(50)
|
||||
.float 1.4093490824e+22; exp(51)
|
||||
.float 3.8310080007e+22; exp(52)
|
||||
.float 1.0413759433e+23; exp(53)
|
||||
.float 2.8307533033e+23; exp(54)
|
||||
.float 7.6947852651e+23; exp(55)
|
||||
.float 2.091659496e+24; exp(56)
|
||||
.float 5.6857199993e+24; exp(57)
|
||||
.float 1.5455389356e+25; exp(58)
|
||||
.float 4.2012104038e+25; exp(59)
|
||||
.float 1.1420073898e+26; exp(60)
|
||||
.float 3.1042979357e+26; exp(61)
|
||||
.float 8.4383566687e+26; exp(62)
|
||||
.float 2.2937831595e+27; exp(63)
|
||||
.float 6.2351490808e+27; exp(64)
|
||||
.float 1.6948892444e+28; exp(65)
|
||||
.float 4.6071866343e+28; exp(66)
|
||||
.float 1.2523631708e+29; exp(67)
|
||||
.float 3.4042760499e+29; exp(68)
|
||||
.float 9.2537817256e+29; exp(69)
|
||||
.float 2.5154386709e+30; exp(70)
|
||||
.float 6.8376712298e+30; exp(71)
|
||||
.float 1.8586717453e+31; exp(72)
|
||||
.float 5.0523936303e+31; exp(73)
|
||||
.float 1.3733829795e+32; exp(74)
|
||||
.float 3.7332419968e+32; exp(75)
|
||||
.float 1.0148003881e+33; exp(76)
|
||||
.float 2.7585134545e+33; exp(77)
|
||||
.float 7.498416997e+33; exp(78)
|
||||
.float 2.0382810665e+34; exp(79)
|
||||
.float 5.5406223844e+34; exp(80)
|
||||
.float 1.5060973146e+35; exp(81)
|
||||
.float 4.0939969621e+35; exp(82)
|
||||
.float 1.1128637548e+36; exp(83)
|
||||
.float 3.0250773222e+36; exp(84)
|
||||
.float 8.2230127146e+36; exp(85)
|
||||
.float 2.2352466037e+37; exp(86)
|
||||
.float 6.0760302251e+37; exp(87)
|
||||
.float 1.651636255e+38; exp(88)
|
||||
|
||||
_CLAExpTableEnd:
|
||||
;############################################################################
|
||||
;//! @}
|
||||
;############################################################################
|
||||
+149
@@ -0,0 +1,149 @@
|
||||
;******************************************************************************
|
||||
;
|
||||
; FILE: CLAlnTable.asm
|
||||
;
|
||||
; DESCRIPTION: Natural Logarithm Tables
|
||||
;
|
||||
;******************************************************************************
|
||||
; $TI Release: $
|
||||
; $Release Date: $
|
||||
;******************************************************************************
|
||||
; This software is licensed for use with Texas Instruments C28x
|
||||
; family DSCs. This license was provided to you prior to installing
|
||||
; the software. You may review this license by consulting a copy of
|
||||
; the agreement in the doc directory of this library.
|
||||
; ------------------------------------------------------------------------
|
||||
; Copyright (C) 2010-2011 Texas Instruments, Incorporated.
|
||||
; All Rights Reserved.
|
||||
;******************************************************************************
|
||||
|
||||
;############################################################################
|
||||
;/*! \addtogroup CLAMATH_TABLES
|
||||
; @{
|
||||
;*/
|
||||
;############################################################################
|
||||
.def _CLALNV2
|
||||
.def _CLALNVe
|
||||
.def _CLALNV10
|
||||
.def _CLABIAS
|
||||
.def _CLALN_TABLE_MASK1
|
||||
.def _CLALN_TABLE_MASK2
|
||||
.def _CLALnTable
|
||||
.def _CLALnTableEnd
|
||||
|
||||
.sect "CLA1mathTables"
|
||||
|
||||
_CLALNV2 .float 0.693147180559 ;
|
||||
_CLALNVe .float 1.0 ;
|
||||
_CLALNV10 .float 0.4342944819032;
|
||||
_CLABIAS .float 127.0 ;
|
||||
_CLALN_TABLE_MASK1 .long 0x3FFFFFFF ;
|
||||
_CLALN_TABLE_MASK2 .long 0x3F800000 ;
|
||||
|
||||
|
||||
_CLALnTable:
|
||||
.float 0 ;
|
||||
.float 1 ;
|
||||
.float -0.5 ;
|
||||
.float 9.49154e-06 ;
|
||||
.float 0.999081726 ;
|
||||
.float -0.470156107 ;
|
||||
.float 7.09886e-05 ;
|
||||
.float 0.996539792 ;
|
||||
.float -0.442906574 ;
|
||||
.float 0.000224404 ;
|
||||
.float 0.992653061 ;
|
||||
.float -0.417959184 ;
|
||||
.float 0.000499085 ;
|
||||
.float 0.987654321 ;
|
||||
.float -0.395061728 ;
|
||||
.float 0.000916122 ;
|
||||
.float 0.981738495 ;
|
||||
.float -0.373995617 ;
|
||||
.float 0.001490146 ;
|
||||
.float 0.975069252 ;
|
||||
.float -0.354570637 ;
|
||||
.float 0.00223074 ;
|
||||
.float 0.967784352 ;
|
||||
.float -0.336620644 ;
|
||||
.float 0.003143551 ;
|
||||
.float 0.96 ;
|
||||
.float -0.32 ;
|
||||
.float 0.004231167 ;
|
||||
.float 0.951814396 ;
|
||||
.float -0.304580607 ;
|
||||
.float 0.005493806 ;
|
||||
.float 0.943310658 ;
|
||||
.float -0.290249433 ;
|
||||
.float 0.00692987 ;
|
||||
.float 0.934559221 ;
|
||||
.float -0.276906436 ;
|
||||
.float 0.008536376 ;
|
||||
.float 0.925619835 ;
|
||||
.float -0.26446281 ;
|
||||
.float 0.010309303 ;
|
||||
.float 0.91654321 ;
|
||||
.float -0.252839506 ;
|
||||
.float 0.012243868 ;
|
||||
.float 0.907372401 ;
|
||||
.float -0.241965974 ;
|
||||
.float 0.014334741 ;
|
||||
.float 0.898143957 ;
|
||||
.float -0.231779086 ;
|
||||
.float 0.016576219 ;
|
||||
.float 0.888888889 ;
|
||||
.float -0.222222222 ;
|
||||
.float 0.018962363 ;
|
||||
.float 0.879633486 ;
|
||||
.float -0.213244481 ;
|
||||
.float 0.021487103 ;
|
||||
.float 0.8704 ;
|
||||
.float -0.2048 ;
|
||||
.float 0.024144324 ;
|
||||
.float 0.861207228 ;
|
||||
.float -0.196847366 ;
|
||||
.float 0.026927934 ;
|
||||
.float 0.852071006 ;
|
||||
.float -0.189349112 ;
|
||||
.float 0.02983191 ;
|
||||
.float 0.843004628 ;
|
||||
.float -0.182271271 ;
|
||||
.float 0.032850339 ;
|
||||
.float 0.834019204 ;
|
||||
.float -0.17558299 ;
|
||||
.float 0.035977448 ;
|
||||
.float 0.825123967 ;
|
||||
.float -0.169256198 ;
|
||||
.float 0.039207625 ;
|
||||
.float 0.816326531 ;
|
||||
.float -0.163265306 ;
|
||||
.float 0.042535433 ;
|
||||
.float 0.807633118 ;
|
||||
.float -0.15758695 ;
|
||||
.float 0.045955621 ;
|
||||
.float 0.799048751 ;
|
||||
.float -0.152199762 ;
|
||||
.float 0.049463133 ;
|
||||
.float 0.79057742 ;
|
||||
.float -0.147084171 ;
|
||||
.float 0.053053104 ;
|
||||
.float 0.782222222 ;
|
||||
.float -0.142222222 ;
|
||||
.float 0.056720869 ;
|
||||
.float 0.773985488 ;
|
||||
.float -0.13759742 ;
|
||||
.float 0.060461958 ;
|
||||
.float 0.765868887 ;
|
||||
.float -0.133194589 ;
|
||||
.float 0.064272091 ;
|
||||
.float 0.75787352 ;
|
||||
.float -0.128999748 ;
|
||||
.float 0.068147181 ;
|
||||
.float 0.75 ;
|
||||
.float -0.125 ;
|
||||
|
||||
|
||||
_CLALnTableEnd:
|
||||
;############################################################################
|
||||
;//! @}
|
||||
;############################################################################
|
||||
+203
@@ -0,0 +1,203 @@
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 13, 2012 11:53:30 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: c2_bootrom.h
|
||||
//
|
||||
// TITLE: C2-BootROM Definitions.
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F2837x Boot ROM Version 0 $
|
||||
// $Release Date: Oct 1, 2013 $
|
||||
//###########################################################################
|
||||
|
||||
|
||||
#ifndef C_BOOTROM_H_
|
||||
#define C_BOOTROM_H_
|
||||
|
||||
#include "F2837x_Device.h"
|
||||
#include "driver_incs.h"
|
||||
#include "c2_bootrom_ipc_commands.h"
|
||||
|
||||
/* some defines used by C-BootROM*/
|
||||
|
||||
#ifndef IS_TRUE
|
||||
#define IS_TRUE 1
|
||||
#endif
|
||||
|
||||
#ifndef IS_FALSE
|
||||
#define IS_FALSE 0
|
||||
#endif
|
||||
|
||||
#ifndef IS_SUCCESS
|
||||
#define IS_SUCCESS IS_TRUE
|
||||
#endif
|
||||
|
||||
#ifndef IS_FAILURE
|
||||
#define IS_FAILURE IS_FALSE
|
||||
#endif
|
||||
|
||||
extern Uint16 EmuKey;
|
||||
extern Uint16 EmuBMode;
|
||||
|
||||
#define KEY_VAL 0x5A
|
||||
|
||||
|
||||
#define STAND_ALONE_BOOT_TYPE 1
|
||||
#define EMU_BOOT_TYPE 2
|
||||
#define HIB_BOOT_TYPE 3
|
||||
|
||||
#define EMULATE_TRUE_BOOT 0xFF // follow stand-alone boot with emulator connected
|
||||
|
||||
|
||||
#define PARALLEL_BOOT 0x0
|
||||
#define SCI_BOOT 0x1
|
||||
#define WAIT_BOOT 0x2
|
||||
#define GET_BOOT 0x3
|
||||
#define SPI_BOOT 0x4
|
||||
#define I2C_BOOT 0x5
|
||||
//#define OTP_BOOT 0x6
|
||||
#define CAN_BOOT 0x7
|
||||
#define CAN_BOOT_TEST 0x47 //enables tx of two packets for bit rate calcs
|
||||
|
||||
#define RAM_BOOT 0xA
|
||||
#define FLASH_BOOT 0xB
|
||||
|
||||
#define USB_BOOT 0xC
|
||||
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
// Fixed boot entry points:
|
||||
//
|
||||
#define FLASH_ENTRY_POINT 0x080000 /**/
|
||||
#define RAM_ENTRY_POINT 0x000000 /*M0 start address*/
|
||||
|
||||
#define ERROR 1
|
||||
#define NO_ERROR 0
|
||||
|
||||
#define BROM_EIGHT_BIT_HEADER 0x08AA
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
#define TI_OTP_PARTID_L *(volatile uint32_t *)(0x70200)
|
||||
#define TI_OTP_PARTID_H *(volatile uint32_t *)(0x70202)
|
||||
typedef Uint16 (* uint16fptr)();
|
||||
extern uint16fptr GetWordData;
|
||||
|
||||
#define OTP_CPU_ID_VERSION (Uint16)(*(volatile Uint16 *)(0x7026D))
|
||||
#define OTP_BOOT_CONFIGURE_WORD (Uint32)(*(volatile Uint32 *)(Uint32)(0x703EE)) // bit 1,0 = 01 means enable PLL, else don't
|
||||
|
||||
#define OTP_BOOT_ESCAPE_TABLE_END 0x703EC
|
||||
|
||||
//extern void otp_func_refs();
|
||||
#define TI_OTP_C2BROM_ESCAPE_POINT_15 (Uint32)(*(volatile Uint32 *)((Uint32)(OTP_BOOT_ESCAPE_TABLE_END)-28))
|
||||
#define TI_OTP_C2BROM_ESCAPE_POINT_14 (Uint32)(*(volatile Uint32 *)((Uint32)(OTP_BOOT_ESCAPE_TABLE_END)-26))
|
||||
#define TI_OTP_C2BROM_ESCAPE_POINT_13 (Uint32)(*(volatile Uint32 *)((Uint32)(OTP_BOOT_ESCAPE_TABLE_END)-24))
|
||||
#define TI_OTP_C2BROM_ESCAPE_POINT_12 (Uint32)(*(volatile Uint32 *)((Uint32)(OTP_BOOT_ESCAPE_TABLE_END)-22))
|
||||
#define TI_OTP_C2BROM_ESCAPE_POINT_11 (Uint32)(*(volatile Uint32 *)((Uint32)(OTP_BOOT_ESCAPE_TABLE_END)-20))
|
||||
#define TI_OTP_C2BROM_ESCAPE_POINT_10 (Uint32)(*(volatile Uint32 *)((Uint32)(OTP_BOOT_ESCAPE_TABLE_END)-18))
|
||||
#define TI_OTP_C2BROM_ESCAPE_POINT_9 (Uint32)(*(volatile Uint32 *)((Uint32)(OTP_BOOT_ESCAPE_TABLE_END)-16))
|
||||
#define TI_OTP_C2BROM_ESCAPE_POINT_8 (Uint32)(*(volatile Uint32 *)((Uint32)(OTP_BOOT_ESCAPE_TABLE_END)-14))
|
||||
#define TI_OTP_C2BROM_ESCAPE_POINT_7 (Uint32)(*(volatile Uint32 *)((Uint32)(OTP_BOOT_ESCAPE_TABLE_END)-12))
|
||||
#define TI_OTP_C2BROM_ESCAPE_POINT_6 (Uint32)(*(volatile Uint32 *)((Uint32)(OTP_BOOT_ESCAPE_TABLE_END)-10))
|
||||
#define TI_OTP_C2BROM_ESCAPE_POINT_5 (Uint32)(*(volatile Uint32 *)((Uint32)(OTP_BOOT_ESCAPE_TABLE_END)-8))
|
||||
#define TI_OTP_C2BROM_ESCAPE_POINT_4 (Uint32)(*(volatile Uint32 *)((Uint32)(OTP_BOOT_ESCAPE_TABLE_END)-6))
|
||||
#define TI_OTP_C2BROM_ESCAPE_POINT_3 (Uint32)(*(volatile Uint32 *)((Uint32)(OTP_BOOT_ESCAPE_TABLE_END)-4))
|
||||
#define TI_OTP_C2BROM_ESCAPE_POINT_2 (Uint32)(*(volatile Uint32 *)((Uint32)(OTP_BOOT_ESCAPE_TABLE_END)-2))
|
||||
#define TI_OTP_C2BROM_ESCAPE_POINT_1 (Uint32)(*(volatile Uint32 *)(Uint32)(OTP_BOOT_ESCAPE_TABLE_END))
|
||||
|
||||
|
||||
/*internal Macors used by C-BootROM*/
|
||||
|
||||
/* MACRO to ACK IPC command
|
||||
*/
|
||||
#define C2BROM_C1C2_IPC_COMMAND_ACK IpcRegs.IPCACK.all = 0x80000001
|
||||
|
||||
|
||||
/* MACROS to NAK asn IPC command with error code
|
||||
* Aria will acknowledge only IPC Flag1 if the command is invalid/resulted in error or cannot be executed
|
||||
*/
|
||||
|
||||
#define C2BROM_C1C2_IPC_COMMAND_NAK(error_code) IpcRegs.IPCACK.bit.IPC0 = 0x01; \
|
||||
IpcRegs.IPCLOCALREPLY = (Uint32)error_code;
|
||||
|
||||
/*Macros to ACK PIE IPC interrupt*/
|
||||
|
||||
#define C2BROM_C1C2_IPC_INT1_ACK PieCtrlRegs.PIEACK.all = PIEACK_GROUP1
|
||||
|
||||
/*macros to check if IPC flags are set properly*/
|
||||
|
||||
#define C2BROM_CHECK_C1C2_IPC_COMMAND_FLAGS_SET ((IpcRegs.IPCSTS.bit.IPC0) && (IpcRegs.IPCSTS.bit.IPC31))
|
||||
|
||||
//typedefs
|
||||
|
||||
/*below data structure stores the current ipc command being processed by C2-BootROM*/
|
||||
|
||||
typedef struct current_c1c2_ipc_status
|
||||
{
|
||||
command_status_t status; /*status of the current command*/
|
||||
uint32_t command; /*current command value*/
|
||||
}cur_c1c2_ipc_cmd_sts_t;
|
||||
|
||||
|
||||
|
||||
typedef void (*c2brom_ipc_branch_t)(void);
|
||||
typedef uint32_t (*c2brom_ipc_func_call_t)(uint32_t data);
|
||||
|
||||
|
||||
/*function prototypes*/
|
||||
extern command_status_t c2brom_c1c2_ipc_set_bits_16(void);
|
||||
extern command_status_t c2brom_c1c2_ipc_set_bits_32(void);
|
||||
extern command_status_t c2brom_c1c2_ipc_clear_bits_16(void);
|
||||
extern command_status_t c2brom_c1c2_ipc_clear_bits_32(void);
|
||||
extern command_status_t c2brom_c1c2_ipc_write_data_16(void);
|
||||
extern command_status_t c2brom_c1c2_ipc_write_data_32(void);
|
||||
extern command_status_t c2brom_c1c2_ipc_read_data_16(void);
|
||||
extern command_status_t c2brom_c1c2_ipc_read_data_32(void);
|
||||
|
||||
extern command_status_t c2brom_c1c2_ipc_set_bits_protected_16(void);
|
||||
extern command_status_t c2brom_c1c2_ipc_set_bits_protected_32(void);
|
||||
extern command_status_t c2brom_c1c2_ipc_clear_bits_protected_16(void);
|
||||
extern command_status_t c2brom_c1c2_ipc_clear_bits_protected_32(void);
|
||||
extern command_status_t c2brom_c1c2_ipc_write_data_protected_16(void);
|
||||
extern command_status_t c2brom_c1c2_ipc_write_data_protected_32(void);
|
||||
extern command_status_t c2brom_c1c2_ipc_read_data_protected_16(void);
|
||||
extern command_status_t c2brom_c1c2_ipc_read_data_protected_32(void);
|
||||
|
||||
extern Uint32 c2brom_c1c2_ipc_func_call_command(void);
|
||||
|
||||
|
||||
extern Uint32 c2brom_send_ipc_to_c1(Uint32 command, Uint32 addr, Uint32 data_w);
|
||||
extern void c2brom_set_c2c1_boot_status(Uint32 status);
|
||||
|
||||
void c2brom_init_pie_control(void);
|
||||
void c2brom_init_pie_vect_table(void);
|
||||
|
||||
extern interrupt void c2brom_itrap_isr(void);
|
||||
extern interrupt void c2brom_c1c2_ipc_int1_isr(void);
|
||||
extern interrupt void c2brom_handle_nmi();
|
||||
extern void c2brom_pie_vect_mismatch_handler();
|
||||
extern void c2brom_handle_nmi_at_start();
|
||||
|
||||
|
||||
|
||||
// External functions referenced by this file
|
||||
extern Uint32 SCI_Boot(void);
|
||||
extern Uint32 SPI_Boot(void);
|
||||
extern Uint32 Parallel_Boot(void);
|
||||
extern Uint32 I2C_Boot(void);
|
||||
extern Uint32 DCAN_Boot(Uint32 bootMode);
|
||||
|
||||
|
||||
extern uint16_t c2brom_read_otp_bootmode();
|
||||
extern uint16_t c2brom_evaluate_bootmode(uint16_t bootmode, uint16_t bootmode_type);
|
||||
|
||||
|
||||
|
||||
|
||||
// Functions in this file
|
||||
//void WaitBoot(void);
|
||||
extern Uint16 SelectBootMode(void);
|
||||
|
||||
|
||||
#endif /*C_BOOTROM_H_*/
|
||||
+138
@@ -0,0 +1,138 @@
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 13, 2012 11:53:32 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: c_bootrom_ipc_commands.h
|
||||
//
|
||||
// TITLE: C-BootROM IPC command Definitions.
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F2837x Boot ROM Version 0 $
|
||||
// $Release Date: Oct 1, 2013 $
|
||||
//###########################################################################
|
||||
|
||||
|
||||
#ifndef C_BOOTROM_IPC_COMMANDS_H_
|
||||
#define C_BOOTROM_IPC_COMMANDS_H_
|
||||
|
||||
/* C2-BootROM health status:
|
||||
* The below will be given to user in xTOCIPCDATAR[31:12], in case of an IPC NAK
|
||||
* and also always in CTOMBOOTSTS[31:12], whenever boot status is written
|
||||
*/
|
||||
#define C2_BOOTROM_START_BOOT 0x00000100 //set during the initialization phase of C2-bootROM
|
||||
#define C2_BOOTROM_IN_FLASH_BOOT 0x00000200 //set if boot to flash is detected
|
||||
#define C2_BOOTROM_DCSM_INIT_DONE 0x00000400 //set after DCSM is initialized
|
||||
#define C2_BOOTROM_RESC_HANDLED 0x00000800 //set after all RESC is handled
|
||||
#define C2_BOOTROM_HANDLED_HIBRESET 0x00001000 //set if HIB reset is detected
|
||||
#define C2_BOOTROM_HANDLED_HWBISTRESET 0x00002000 //set if HWBIST reset is detected
|
||||
#define C2_BOOTROM_HANDLED_XRSN 0x00004000 //set if XRSn is detected
|
||||
#define C2_BOOTROM_HANDLED_POR 0x00008000 //set if POR is serviced
|
||||
#define C2_BOOTROM_IN_AN_ITRAP 0x00020000 //set if C-BootROM detects an iTRAP
|
||||
#define C2_BOOTROM_IN_C1TOC2_BRANCH 0x00040000 //set if C-BootROM is doing a mtoc branch
|
||||
#define C2_BOOTROM_GOT_A_PIEMISMATCH 0x00080000 //set if pie mismatch handler is called
|
||||
#define C2_BOOTROM_GOT_A_OVF_NMI 0x00100000 //set if ovf nmi is detected
|
||||
#define C2_BOOTROM_GOT_A_CPU2NMIWDRST_NMI 0x00200000 // - should never be set
|
||||
#define C2_BOOTROM_GOT_A_CPU2WDRST_NMI 0x00400000 // - should never be set
|
||||
#define C2_BOOTROM_GOT_A_RL_NMI 0x00800000 //set if RL NMI is detected
|
||||
#define C2_BOOTROM_GOT_A_SYSDBG_NMI 0x01000000 //set if sysdbg nmi is detected
|
||||
#define C2_BOOTROM_GOT_A_PIEVECTERR_NMI 0x02000000 //set if pievect err nmi is detected
|
||||
#define C2_BOOTROM_GOT_A_C2BISTERR_NMI 0x04000000 //set if c2-bist error nmi is detected
|
||||
#define C2_BOOTROM_GOT_A_C1BISTERR_NMI 0x08000000 //set if c1-bist error nmi is detected
|
||||
#define C2_BOOTROM_GOT_A_FLASH_UNCERR_NMI 0x10000000 //set if flash uncerr nmi is detected
|
||||
#define C2_BOOTROM_GOT_A_RAM_UNCERR_NMI 0x20000000 //set if ran uncerr nmi is detected
|
||||
#define C2_BOOTROM_GOT_A_MCLK_NMI 0x40000000 //set if missing clock nmi is detected
|
||||
#define C2_BOOTROM_BOOT_COMPLETE 0x80000000 //set if C-BootROM is starting an application after boot
|
||||
|
||||
/* xTOCIPCDATAR[11:0] register values, when Control system NAK's an IPC
|
||||
* xTOCIPCDATAR[31:12] register value stores the C-BootROM health status */
|
||||
#define C2_BOOTROM_NAK_STATUS_INVALID_VALUE 0x00000000 //invalid value or value when not set
|
||||
#define C2_BOOTROM_NAK_STATUS_CMD_NOT_SUPPORTED 0x00000001 //NAK STATUS command not supported
|
||||
#define C2_BOOTROM_NAK_STATUS_CMD_NOT_SET_PROPERLY 0x00000002 //NAK Status command not set properly , for ex: IPC1 set but IPC32 not set
|
||||
#define C2_BOOTROM_NAK_STATUS_ALREADY_BUSY_WITH_YOUR_CMD 0x00000003 //NAK status when master is trying to send a second command before first one could complete
|
||||
#define C2_BOOTROM_NAK_STATUS_CMD_RESULTED_IN_ERROR 0x00000004 //NAK status command execution resulted in an error
|
||||
#define C2_BOOTROM_NAK_STATUS_CMD_CANNOT_BE_EXECUTED_NOW 0x00000005 //NAK status - command cannot be executed now in the current state of bootROM
|
||||
#define C2_BOOTROM_NAK_STATUS_MAX_SUPPRT_VALUE 0x00000006 //one less than this value are valid values
|
||||
|
||||
/* CTOMBOOTSTS[11:0] register values will be one of the following all the time.
|
||||
* these enums are used to communicate the status of control to Master system
|
||||
*/
|
||||
#define C2_BOOTROM_BOOTSTS_CTOM_IGNORE 0x00000000 //invalid status - tells master system that Aria has not filled in a valid value yet
|
||||
#define C2_BOOTROM_BOOTSTS_SYSTEM_START_BOOT 0x00000001 //tells master system that Control system has started to boot, but not completed the boot process yet
|
||||
#define C2_BOOTROM_BOOTSTS_SYSTEM_READY 0x00000002 //tells master system that Control system has completed the boot and is running
|
||||
#define C2_BOOTROM_BOOTSTS_CTOM_BOOT_CMD_ACK 0x00000003 //tells master system that C-BootROM ACKs the command in MTOCBOOTMODE register
|
||||
#define C2_BOOTROM_BOOTSTS_CTOM_BOOT_CMD_NAK_STATUS_NOT_SUPPORTED 0x00000004 //tells master system that C-BootROM doesn't support the command in MTOCBOOTMODE register
|
||||
#define C2_BOOTROM_BOOTSTS_CTOM_BOOT_CMD_NAK_STATUS_BUSY_WITH_BOOT 0x00000005 //tells master system that C-BootROM NAKs the current boot command in MTOCBOOTMODE register
|
||||
#define C2_BOOTROM_BOOTSTS_CTOM_MAX_SUPPORT_VALUE 0x00000006 //one less than this value are valid values.
|
||||
|
||||
/* C-BootROM uses the below enum values to fill in CTOMIPCCOM register*/
|
||||
|
||||
#define C2_BOOTROM_IPC_CTOM_COMMAND_ILLEGAL 0x00000000 //invalid command value - default value when starting boot
|
||||
#define C2_BOOTROM_IPC_CTOM_CONTROL_SYSTEM_IN_ITRAP 0xFFFFFFFE //message tells Master that B.C28x CPU has got an iTRAP, address where iTrap occured will be in IPC ADDR register
|
||||
#define C2_BOOTROM_IPC_CTOM_PIE_INTERRUPT_NOT_SUPPORTED 0xFFFFFFFD //message tells Master that B.C28x CPU got a spurious PIE interrupt, intr no. will be in IPCDATAW register
|
||||
#define C2_BOOTROM_IPC_CTOM_PIE_VECTOR_ADDRESS_MISMATCH 0xFFFFFFFC //message tells Master that B.C28x CPU got a PIE vector mismatch error
|
||||
#define C2_BOOTROM_IPC_CTOM_CONTROL_SYSTEM_IN_FLUNCERR 0xFFFFFFFB //message tells Master that B.C28x CPU got a Flash uncorrectable error
|
||||
#define C2_BOOTROM_IPC_CTOM_CONTROL_SYSTEM_IN_RAMUNCERR 0xFFFFFFFA //message tells Master that B.C28x CPU got a RAM uncorrectable error
|
||||
|
||||
/* C1TOC2IPC commands
|
||||
* Below IPC commands are sent from CPU1 system to CPU2 system
|
||||
*/
|
||||
|
||||
#define C1C2_BROM_IPC_COMMAND_ILLEGAL 0x00000000 //illegal command or command not set
|
||||
#define C1C2_BROM_IPC_SET_BITS_16 0x00000001 //set bits(max. 16 bit wide) in a 16 bit addressable location/register
|
||||
#define C1C2_BROM_IPC_SET_BITS_32 0x00000002 //set bits(max. 32 bit wide) in a 32 bit addressable location/register
|
||||
#define C1C2_BROM_IPC_CLEAR_BITS_16 0x00000003 //clear bits(max. 16 bit wide) in a 16 bit addressable location/register
|
||||
#define C1C2_BROM_IPC_CLEAR_BITS_32 0x00000004 //clear bits(max. 32 bit wide) in a 32 bit addressable location/register
|
||||
#define C1C2_BROM_IPC_DATA_WRITE_16 0x00000005 //write 16 bit data to a 16 bit addressable location/register
|
||||
#define C1C2_BROM_IPC_DATA_WRITE_32 0x00000006 //write 32 bit data to a 32 bit addressable location/register
|
||||
#define C1C2_BROM_IPC_DATA_READ_16 0x00000007 //read 16 bit data from a 16 bit addressable location/register
|
||||
#define C1C2_BROM_IPC_DATA_READ_32 0x00000008 //read 32 bit data from a 32 bit addressable location/register
|
||||
#define C1C2_BROM_IPC_SET_BITS_PROTECTED_16 0x00000009 //set bits(max. 16 bit wide) in a 16 bit addressable (EALLOW)protected location/register
|
||||
#define C1C2_BROM_IPC_SET_BITS_PROTECTED_32 0x0000000A //set bits(max. 32 bit wide) in a 32 bit addressable (EALLOW)protected location/register
|
||||
#define C1C2_BROM_IPC_CLEAR_BITS_PROTECTED_16 0x0000000B //clear bits(max. 16 bit wide) in a 16 bit addressable (EALLOW)protected location/register
|
||||
#define C1C2_BROM_IPC_CLEAR_BITS_PROTECTED_32 0x0000000C //clear bits(max. 32 bit wide) in a 32 bit addressable (EALLOW)protected location/register
|
||||
#define C1C2_BROM_IPC_DATA_WRITE_PROTECTED_16 0x0000000D //write 16 bit data to a 16 bit addressable (EALLOW)protected location/register
|
||||
#define C1C2_BROM_IPC_DATA_WRITE_PROTECTED_32 0x0000000E //write 32 bit data to a 32 bit addressable (EALLOW)protected location/register
|
||||
#define C1C2_BROM_IPC_DATA_READ_PROTECTED_16 0x0000000F //read 16 bit data from a 16 bit addressable (EALLOW)protected location/register
|
||||
#define C1C2_BROM_IPC_DATA_READ_PROTECTED_32 0x00000010 //read 32 bit data from a 32 bit addressable (EALLOW)protected location/register
|
||||
#define C1C2_BROM_IPC_BRANCH_CALL 0x00000011 //master requests a branch operation
|
||||
#define C1C2_BROM_IPC_FUNCTION_CALL 0x00000012 //master requests a function call operation
|
||||
#define C1C2_BROM_IPC_EXECUTE_BOOTMODE_CMD 0x00000013 //master requests control system to execute MTOCBOOTMODE CMD
|
||||
#define C1C2_BROM_IPC_MAX_SUPPORT_VALUE 0x00000014 //one less than this value are supported/valid values
|
||||
|
||||
/*Below are the values programmed into MTOCBOOTMODE register*/
|
||||
#define C1C2_BROM_BOOTMODE_COMMAND_ILLEGAL 0xFFFFFFFF
|
||||
|
||||
#define C1C2_BROM_BOOTMODE_BOOT_FROM_PARALLEL 0x00000000
|
||||
#define C1C2_BROM_BOOTMODE_BOOT_FROM_SCI 0x00000001
|
||||
#define C1C2_BROM_BOOTMODE_BOOT_FROM_SPI 0x00000004
|
||||
#define C1C2_BROM_BOOTMODE_BOOT_FROM_I2C 0x00000005
|
||||
#define C1C2_BROM_BOOTMODE_BOOT_FROM_CAN 0x00000007
|
||||
#define C1C2_BROM_BOOTMODE_BOOT_FROM_RAM 0x0000000A
|
||||
#define C1C2_BROM_BOOTMODE_BOOT_FROM_FLASH 0x0000000B
|
||||
|
||||
#define C1C2_BROM_BOOTMODE_BOOT_COMMAND_MAX_SUPPORT_VALUE 0x0000000C
|
||||
|
||||
#define PARALLEL_BOOT 0x0
|
||||
#define SCI_BOOT 0x1
|
||||
#define WAIT_BOOT 0x2
|
||||
#define GET_BOOT 0x3
|
||||
#define SPI_BOOT 0x4
|
||||
#define I2C_BOOT 0x5
|
||||
//#define OTP_BOOT 0x6
|
||||
#define CAN_BOOT 0x7
|
||||
#define RAM_BOOT 0xA
|
||||
#define FLASH_BOOT 0xB
|
||||
|
||||
#define USB_BOOT 0xC
|
||||
|
||||
|
||||
/*enum to tell the command status*/
|
||||
typedef enum
|
||||
{
|
||||
COMMAND_STATUS_INVALID = 0, /*current command status is in-valid*/
|
||||
COMMAND_PENDING, /*current ipc command is under processing*/
|
||||
COMMAND_COMPLETE_SUCCESS, /*current ipc command has compelted successfully*/
|
||||
COMMAND_COMPLETE_FAILURE /*current ipc command has completed, but failed*/
|
||||
}command_status_t;
|
||||
|
||||
#endif /*C_BOOTROM_IPC_COMMANDS_H_*/
|
||||
+89
@@ -0,0 +1,89 @@
|
||||
/*
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 13, 2012 11:53:39 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: F28M35x_C28_boot_rom_lnk.cmd
|
||||
//
|
||||
// TITLE: boot rom linker command file
|
||||
//
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F2837x Boot ROM Version 0 $
|
||||
// $Release Date: Oct 1, 2013 $
|
||||
//###########################################################################
|
||||
*/
|
||||
|
||||
|
||||
MEMORY
|
||||
{
|
||||
PAGE 0 :
|
||||
ROM_SIGNATURE : origin = 0x3F8000, length = 0x000002, fill = 0xFFFF
|
||||
SYSBIOS_ROM : origin = 0x3F8002, length = 0x001E0E
|
||||
PLCTABLES : origin = 0x3F9E10, length = 0x003A08 , fill = 0xFFFF
|
||||
BOOT : origin = 0x3FD818, length = 0x00271A , fill = 0xFFFF
|
||||
CRCTABLE_ROM : origin = 0x3FFF32, length = 0x000008 , fill = 0xFFFF
|
||||
BIST_SIGNATURE : origin = 0x3FFF3A, length = 0x000040
|
||||
VERSION : origin = 0x3FFF7A, length = 0x000002
|
||||
CHECKSUM : origin = 0x3FFF7C, length = 0x000042
|
||||
VECS : origin = 0x3FFFBE, length = 0x000042
|
||||
SYSBIOS_FLASH : origin = 0x00080010, length = 0x1FF0
|
||||
|
||||
PAGE 1 :
|
||||
EBSS : origin = 0x002, length = 0x00001E
|
||||
STACK : origin = 0x020, length = 0x000060
|
||||
SYSBIOS_RAM : origin = 0x780, length = 0x000080
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
primeRxPreamble : load = PLCTABLES, PAGE = 0, ALIGN(2)
|
||||
primeTxPreamble : load = PLCTABLES, PAGE = 0, ALIGN(2)
|
||||
primePrefTable : load = PLCTABLES, PAGE = 0, ALIGN(2)
|
||||
tf512pFFTTable : load = PLCTABLES, PAGE = 0, ALIGN(2)
|
||||
tf384pFFTTable : load = PLCTABLES, PAGE = 0, ALIGN(2)
|
||||
rsEXP_LUT : load = PLCTABLES, PAGE = 0, ALIGN(2)
|
||||
rsLOG_LUT : load = PLCTABLES, PAGE = 0, ALIGN(2)
|
||||
rsGFMult_LUT : load = PLCTABLES, PAGE = 0, ALIGN(2)
|
||||
PLC_TABLE : load = PLCTABLES, PAGE = 0, ALIGN(2)
|
||||
sunPhyTable : load = PLCTABLES, PAGE = 0, ALIGN(2)
|
||||
twiddleFactors : load = PLCTABLES, PAGE = 0, ALIGN(2)
|
||||
|
||||
.crctable_forsecrom : load = CRCTABLE_ROM, PAGE = 0
|
||||
.test_signature1: load = ROM_SIGNATURE PAGE = 0
|
||||
.InitBoot : load = BOOT, PAGE = 0
|
||||
.text : load = BOOT, PAGE = 0
|
||||
.CKSUMFUNCS : load = BOOT, PAGE = 0, ALIGN(2)
|
||||
.Isr : load = BOOT, PAGE = 0
|
||||
.BootVecs : load = VECS, PAGE = 0
|
||||
.CKSUMLOC : load = CHECKSUM, PAGE = 0, ALIGN(2)
|
||||
.Version : load = VERSION, PAGE = 0
|
||||
.bist_signature : load = BIST_SIGNATURE PAGE = 0
|
||||
.stack : load = STACK, PAGE = 1
|
||||
.ebss : load = EBSS, PAGE = 1
|
||||
|
||||
|
||||
|
||||
SYSBIOSROM : load = SYSBIOS_ROM, PAGE = 0
|
||||
{
|
||||
-l rom.obj(.sysbios_rom)
|
||||
}
|
||||
|
||||
SYSBIOSFLASH : load = SYSBIOS_FLASH, PAGE = 0
|
||||
{
|
||||
-l rom.obj(.sysbios_flash)
|
||||
}
|
||||
|
||||
SYSBIOSRAM : load = SYSBIOS_RAM, PAGE = 1
|
||||
{
|
||||
-l rom.obj(.sysbios_ram)
|
||||
}
|
||||
|
||||
SYSBIO_NOLOAD : load = 0, PAGE = 1, type = DSECT
|
||||
{
|
||||
-l rom.obj(.*)
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
+235
@@ -0,0 +1,235 @@
|
||||
//DCAN boot loader functions
|
||||
|
||||
#include "c2_bootrom.h"
|
||||
|
||||
//------CAN bit rate timing parameters------//
|
||||
//WARNING: There is very little sanity checking in these calculations. See DCAN spec section 1.16
|
||||
//for additional requirements. Among other things, you must ensure that one bit takes between
|
||||
//8 and 25 time quanta, and that Tseg1 and Tseg2 can fit into their respective register fields.
|
||||
//The main user-controllable parameters here are:
|
||||
//
|
||||
//Bit rate (bits/sec) CAN bit rate -- must match the rest of the CAN network
|
||||
//SYSCLK (hertz) System clock frequency, which feeds the DCAN module
|
||||
//BRP - Bit rate prescaler, which divides down SYSCLK to provide the bit clock
|
||||
#define DCAN_BOOT_RATE 50000L
|
||||
#define DCAN_BOOT_SYSCLK 10000000L
|
||||
#define DCAN_BOOT_BRP 10L
|
||||
|
||||
//Other parameters are defined according to the instructions in section 1.16.2.1
|
||||
//of the DCAN spec. Exception: This code rounds PhSeg1 up and PhSeg2 down since
|
||||
//a later sample time works better on most networks. This is implemented by rounding
|
||||
//down PhSeg2 first, then computing PhSeg1 as Tphase - PhSeg2. Calculating in this
|
||||
//order also lets us limit Tseg2 to 8 so it will fit in the register.
|
||||
//
|
||||
//Bit clock (hertz) Equal to SYSCLK / BRP by definition; each bit clock is one time quantum (Tq)
|
||||
//Bit time (Tq) Number of time quanta per bit; the ratio of bit clock frequency to bit rate
|
||||
//Tsync (Tq) Synchronization time delay: Fixed at 1 Tq by the CAN protocol
|
||||
//Tprop (Tq) Propagation delay: <2 microseconsd for a <1000 foot bus; assumed to be <2 Tq
|
||||
//Tphase (Tq) Phase compensation buffer for oscillator tolerance: The remainder of the bit time
|
||||
//PhSeg1 (Tq) Phase segment 1: Pre-sample buffer; half of the phase time, rounded up (<=16)
|
||||
//PhSeg2 (Tq) Phase segment 2: Post-sample buffer; half of the phase time, rounded down (<=8)
|
||||
#define DCAN_BOOT_BITCLK (DCAN_BOOT_SYSCLK / DCAN_BOOT_BRP)
|
||||
#define DCAN_BOOT_BITTIME (DCAN_BOOT_BITCLK / DCAN_BOOT_RATE)
|
||||
#if (DCAN_BOOT_BITTIME > 25)
|
||||
#error "DCAN boot loader config error: bit time cannot exceed 25 time quanta!"
|
||||
#endif
|
||||
#define DCAN_BOOT_TSYNC 1L
|
||||
#define DCAN_BOOT_TPROP 2L
|
||||
#define DCAN_BOOT_TPHASE (DCAN_BOOT_BITTIME - (DCAN_BOOT_TSYNC + DCAN_BOOT_TPROP))
|
||||
#define DCAN_BOOT_PHSEG2 ((DCAN_BOOT_TPHASE / 2L <= 8) ? DCAN_BOOT_TPHASE / 2L : 8)
|
||||
#define DCAN_BOOT_PHSEG1 (DCAN_BOOT_TPHASE - DCAN_BOOT_PHSEG2)
|
||||
|
||||
//These parameters are then converted into register values. All parameters
|
||||
//are -1 in the register:
|
||||
//
|
||||
//Tseg1 (Tq) Everything between sync and sample: Tprop + PhSeg1; MUST BE LESS THAN 8
|
||||
//Tseg2 (Tq) Everything between sample and next time: PhSeg2; MUST BE LESS THAN 16
|
||||
//Tsjw (Tq) Synchronization jump width: The lesser of 4 and PhSeg1
|
||||
//BRPEREG - Upper 4 bits of bit prescaler; SUBTRACT ONE FROM BRP BEFORE COMPUTING THIS
|
||||
//BRPREG - Lower 6 bits of bit prescaler; SUBTRACT ONE FROM BRP BEFORE COMPUTING THIS
|
||||
#define DCAN_BOOT_TSEG1 ((DCAN_BOOT_PHSEG1 + DCAN_BOOT_TPROP) - 1)
|
||||
#define DCAN_BOOT_TSEG2 (DCAN_BOOT_PHSEG2 - 1)
|
||||
#define DCAN_BOOT_TSJW (((DCAN_BOOT_PHSEG1 > 4L) ? 4L : DCAN_BOOT_PHSEG1) - 1)
|
||||
#define DCAN_BOOT_BRPEREG ((DCAN_BOOT_BRP - 1L) / 64L)
|
||||
#define DCAN_BOOT_BRPREG ((DCAN_BOOT_BRP - 1L) % 64L)
|
||||
#define DCAN_BOOT_BTRREG (DCAN_BOOT_BRPEREG<<16 | DCAN_BOOT_TSEG2<<12 | DCAN_BOOT_TSEG1<<8 | DCAN_BOOT_TSJW<<6 | DCAN_BOOT_BRPREG)
|
||||
|
||||
|
||||
//Boot mode flag definitions
|
||||
#define DCAN_BOOT_ALTGPIO 0x80 //Switch from the standard GPIO70/71 to GPIO62/63
|
||||
#define DCAN_BOOT_SENDTEST 0x40 //Send two 16-bit data frames on startup for bit rate measurement
|
||||
|
||||
|
||||
void DCAN_Boot_Gpio(Uint16 gpioSelect);
|
||||
void DCAN_Boot_Init();
|
||||
Uint16 DCAN_GetWordData();
|
||||
void DCAN_SendWordData(Uint16 data);
|
||||
extern void CopyData();
|
||||
extern Uint32 GetLongData();
|
||||
extern void ReadReservedFn();
|
||||
|
||||
|
||||
Uint32 DCAN_Boot(Uint32 bootMode)
|
||||
{
|
||||
Uint32 entryAddr = FLASH_ENTRY_POINT;
|
||||
|
||||
//If DCAN-A is not enabled, bypass the bootloader
|
||||
#ifdef CPU1
|
||||
if (DevCfgRegs.DC11.bit.CAN_A != 1)
|
||||
return FLASH_ENTRY_POINT;
|
||||
#endif
|
||||
|
||||
//Assign the DCAN data reader function to the global
|
||||
//function pointer for loading data.
|
||||
GetWordData = &DCAN_GetWordData;
|
||||
|
||||
//Set up the GPIO muxes for either standard (GPIO70/71) or alternate (GPIO62/63) pinout
|
||||
#ifdef CPU1
|
||||
if (bootMode & DCAN_BOOT_ALTGPIO)
|
||||
DCAN_Boot_Gpio(6263);
|
||||
else
|
||||
DCAN_Boot_Gpio(7071);
|
||||
#endif
|
||||
|
||||
//Set up the DCAN to receive data
|
||||
DCAN_Boot_Init();
|
||||
|
||||
entryAddr = TI_OTP_C2BROM_ESCAPE_POINT_9;
|
||||
if((entryAddr != 0xFFFFFFFF) &&
|
||||
(entryAddr != 0x00000000))
|
||||
{
|
||||
/*if OTP is programmed, then call OTP function*/
|
||||
((void (*)(void))entryAddr)();
|
||||
}
|
||||
|
||||
|
||||
//Send two test frames if the OTP says so
|
||||
if (bootMode & DCAN_BOOT_SENDTEST)
|
||||
{
|
||||
DCAN_SendWordData(0x0320);
|
||||
DCAN_SendWordData(0x2837);
|
||||
}
|
||||
|
||||
//The first data word should be a valid key. If it's not,
|
||||
//bypass the bootloader.
|
||||
if (DCAN_GetWordData() != 0x08AA)
|
||||
return FLASH_ENTRY_POINT;
|
||||
|
||||
//Use the shared utility functions to load the data.
|
||||
ReadReservedFn();
|
||||
entryAddr = GetLongData();
|
||||
CopyData();
|
||||
|
||||
return entryAddr;
|
||||
}
|
||||
|
||||
|
||||
//Select which GPIOs to use for DCAN-A
|
||||
void DCAN_Boot_Gpio(Uint16 gpioSelect)
|
||||
{
|
||||
#ifdef CPU1
|
||||
EALLOW;
|
||||
if (gpioSelect == 6263)
|
||||
{
|
||||
//Set up the GPIO mux to bring out CANATX on GPIO63 and CANARX on GPIO62
|
||||
GpioCtrlRegs.GPBLOCK.all = 0x00000000; //Unlock GPIOs 32-63
|
||||
GpioCtrlRegs.GPBCSEL4.bit.GPIO63 = 0x0; //Give CPU1 control just in case
|
||||
GpioCtrlRegs.GPBGMUX2.bit.GPIO63 = 0x1; //Set the extended mux to 0x6
|
||||
GpioCtrlRegs.GPBMUX2.bit.GPIO63 = 0x2;
|
||||
GpioCtrlRegs.GPBCSEL4.bit.GPIO63 = 0x3; //Set qualification to async just in case
|
||||
|
||||
GpioCtrlRegs.GPBCSEL4.bit.GPIO62 = 0x0; //Give CPU1 control just in case
|
||||
GpioCtrlRegs.GPBGMUX2.bit.GPIO62 = 0x1; //Set the extended mux to 0x6
|
||||
GpioCtrlRegs.GPBMUX2.bit.GPIO62 = 0x2;
|
||||
GpioCtrlRegs.GPBCSEL4.bit.GPIO62 = 0x3; //Set qualification to async just in case
|
||||
GpioCtrlRegs.GPBLOCK.all = 0xFFFFFFFF; //Lock GPIOs 32-63
|
||||
} else if (gpioSelect == 1819)
|
||||
{
|
||||
GpioCtrlRegs.GPALOCK.all = 0x00000000; //Unlock GPIOs 0-31
|
||||
GpioCtrlRegs.GPACSEL3.bit.GPIO19 = 0x0; //Give CPU1 control just in case
|
||||
GpioCtrlRegs.GPAGMUX2.bit.GPIO19 = 0x0; //Set the extended mux to bring out CANATX
|
||||
GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 0x3;
|
||||
GpioCtrlRegs.GPAQSEL2.bit.GPIO19 = 0x3; //Set qualification to async just in case
|
||||
|
||||
GpioCtrlRegs.GPACSEL3.bit.GPIO18 = 0x0; //Give CPU1 control just in case
|
||||
GpioCtrlRegs.GPAGMUX2.bit.GPIO18 = 0x0; //Set the extended mux to bring out CANARX
|
||||
GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 0x3;
|
||||
GpioCtrlRegs.GPAQSEL2.bit.GPIO18 = 0x3; //Set qualification to async just in case
|
||||
GpioCtrlRegs.GPALOCK.all = 0xFFFFFFFF; //Lock GPIOs 0-31
|
||||
} else
|
||||
{
|
||||
//Set up the GPIO mux to bring out CANATX on GPIO71 and CANARX on GPIO70
|
||||
GpioCtrlRegs.GPCLOCK.all = 0x00000000; //Unlock GPIOs 64-95
|
||||
GpioCtrlRegs.GPCCSEL1.bit.GPIO71 = 0x0; //Give CPU1 control just in case
|
||||
GpioCtrlRegs.GPCGMUX1.bit.GPIO71 = 0x1; //Set the extended mux to 0x5
|
||||
GpioCtrlRegs.GPCMUX1.bit.GPIO71 = 0x1;
|
||||
GpioCtrlRegs.GPCQSEL1.bit.GPIO71 = 0x3; //Set qualification to async just in case
|
||||
|
||||
GpioCtrlRegs.GPCLOCK.all = 0x00000000; //Unlock GPIOs 64-95
|
||||
GpioCtrlRegs.GPCCSEL1.bit.GPIO70 = 0x0; //Give CPU1 control just in case
|
||||
GpioCtrlRegs.GPCGMUX1.bit.GPIO70 = 0x1; //Set the extended mux to bring out CANATX
|
||||
GpioCtrlRegs.GPCMUX1.bit.GPIO70 = 0x1;
|
||||
GpioCtrlRegs.GPCQSEL1.bit.GPIO70 = 0x3; //Set qualification to async just in case
|
||||
GpioCtrlRegs.GPCLOCK.all = 0xFFFFFFFF; //Lock GPIOs 64-95
|
||||
}
|
||||
|
||||
//Set the DCAN_A clock source to SYSCLK
|
||||
ClkCfgRegs.CLKSRCCTL2.bit.CANABCLKSEL = 0x0;
|
||||
EDIS;
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
//Initialize the CAN_A module
|
||||
void DCAN_Boot_Init()
|
||||
{
|
||||
//Turn on the clock to the DCAN module
|
||||
EALLOW;
|
||||
CpuSysRegs.PCLKCR10.bit.CAN_A = 1;
|
||||
EDIS;
|
||||
|
||||
//Issue a software reset to DCAN_A -- shut down communication via INIT, then reset via SWR
|
||||
DcanaRegs.CAN_CTL.all = 0x1;
|
||||
DcanaRegs.CAN_CTL.all = 0x8000;
|
||||
|
||||
//Bit timing configuration. See the large comment at the top for details.
|
||||
DcanaRegs.CAN_CTL.all = 0x1441; //Initialize, disable parity, and enable config register access
|
||||
DcanaRegs.CAN_BTR.all = DCAN_BOOT_BTRREG;
|
||||
DcanaRegs.CAN_CTL.all = 0x1400; //Finish initialization and disable config register access
|
||||
|
||||
//Set up a receive object via interface 1, then transfer to message RAM
|
||||
DcanaRegs.CAN_IF1ARB.all = 0x80040000; //MsgVal set, MsgID = 1 (11-bit)
|
||||
DcanaRegs.CAN_IF1MCTL.all = 0x2; //Data length = 2 bytes
|
||||
DcanaRegs.CAN_IF1CMD.all = 0x00F80001; //Transfer configuration to message object 1
|
||||
while (DcanaRegs.CAN_IF1CMD.all & 0x8000) {;} //Wait for message RAM copy
|
||||
|
||||
//Set up a transmit object via interface 2 for debug
|
||||
DcanaRegs.CAN_IF2ARB.all = 0xA0080000; //MsgVal set, MsgID = 2 (11-bit)
|
||||
DcanaRegs.CAN_IF2MCTL.all = 0x2; //Data length = 2 bytes
|
||||
DcanaRegs.CAN_IF2CMD.all = 0x00F80002; //Transfer configuration to message object 2
|
||||
while (DcanaRegs.CAN_IF2CMD.all & 0x8000) {;} //Wait for message RAM copy
|
||||
}
|
||||
|
||||
|
||||
//Read 16 bits from an incoming DCAN message to ID#1
|
||||
Uint16 DCAN_GetWordData()
|
||||
{
|
||||
//Wait for a new CAN message to be received in mailbox 1
|
||||
while (DcanaRegs.CAN_NDAT_21 != 0x1) {;}
|
||||
|
||||
//Transfer the message from IF1
|
||||
DcanaRegs.CAN_IF1CMD.all = 0x00070001;
|
||||
while (DcanaRegs.CAN_IF1CMD.all & 0x8000) {;}
|
||||
return (Uint16)DcanaRegs.CAN_IF1DATA.all;
|
||||
|
||||
}
|
||||
|
||||
|
||||
//Write 16 bits for external data rate measurement
|
||||
void DCAN_SendWordData(Uint16 data)
|
||||
{
|
||||
DcanaRegs.CAN_IF2DATA.all = data;
|
||||
DcanaRegs.CAN_IF2CMD.all = 0x00870002;
|
||||
while (DcanaRegs.CAN_IF2CMD.all & 0x8000) {;}
|
||||
while (DcanaRegs.CAN_TXRQ_21 & 0x2) {;}
|
||||
}
|
||||
+259
@@ -0,0 +1,259 @@
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 13, 2012 11:53:51 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: I2C_Boot.c
|
||||
//
|
||||
// TITLE: I2C Boot mode routines
|
||||
//
|
||||
// Functions:
|
||||
//
|
||||
// Uint32 I2C_Boot(void)
|
||||
// inline Uint16 I2C_CheckKeyVal(void)
|
||||
// inline void I2C_ReservedFn(void)
|
||||
// Uint16 I2C_GetWord(void)
|
||||
//
|
||||
// Notes:
|
||||
// The I2C code contained here is specifically steamlined for the
|
||||
// bootloader. It can be used to load code via the I2C port into the
|
||||
// RAM and jump to an entry point within that code.
|
||||
//
|
||||
// Features/Limitations:
|
||||
// - The I2C boot loader code is written to communicate with an EEPROM
|
||||
// device at address 0x50. The EEPROM must adhere to conventional I2C
|
||||
// EEPROM protocol (see the boot rom documentation) with a 16-bit
|
||||
// base address architecture (as opposed to 8-bits). The base address
|
||||
// of the code should be contained at address 0x0000 in the EEPROM.
|
||||
// - At boot, the internal osciallator will run at 10Mhz. The boot ROM
|
||||
// will configure the DIVSEL to be /1 for a 10Mhz system clock.
|
||||
// This is due to a requirement that the I2C clock be between 7Mhz
|
||||
// and 12Mhz to meet all of the I2C specification timing requirements.
|
||||
// The I2CPSC default value is hardcoded to 0 so that the I2C
|
||||
// clock will not be divided down from the system clock.
|
||||
// The I2CPSC value can be modified after receiving
|
||||
// the first few bytes from the EEPROM (see the boot rom documentation),
|
||||
// but it is advisable not to, as this can cause the I2C to operate out
|
||||
// of specification with a system clock between 7Mhz and 12Mhz.
|
||||
// - The bit period prescalers (I2CCLKH and I2CCLKL) are configured to
|
||||
// run the I2C at 50% duty cycle at 100kHz bit rate (standard I2C mode)
|
||||
// when the system clock is 12Mhz. These registers can be modified after
|
||||
// receiving the first few bytes from the EEPROM (see the boot rom
|
||||
// documentation). This allows the communication to be increased up to
|
||||
// a 400kHz bit rate (fast I2C mode) during the remaining data reads.
|
||||
// - Arbitration, bus busy, and slave signals are not checked. Therefore,
|
||||
// no other master is allowed to control the bus during this
|
||||
// initialization phase. If the application requires another master
|
||||
// during I2C boot mode, that master must be configured to hold off
|
||||
// sending any I2C messages until the F280x application software
|
||||
// signals that it is past the bootloader portion of initialization.
|
||||
// - The non-acknowledgement bit is only checked during the first message
|
||||
// sent to initialize the EEPROM base address. This ensures that an
|
||||
// EEPROM is present at address 0x50 before continuing on. If an EEPROM
|
||||
// is not present, code will jump to the Flash entry point. The
|
||||
// non-acknowledgement bit is not checked during the address phase of
|
||||
// the data read messages (I2C_GetWord). If a non-acknowledge is
|
||||
// received during the data read messages, the I2C bus will hang.
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F2837x Boot ROM Version 0 $
|
||||
// $Release Date: Oct 1, 2013 $
|
||||
//###########################################################################
|
||||
|
||||
|
||||
#include "c2_bootrom.h"
|
||||
|
||||
// Private functions
|
||||
inline Uint16 I2C_CheckKeyVal(void);
|
||||
inline void I2C_ReservedFn(void);
|
||||
Uint16 I2C_GetWord(void);
|
||||
|
||||
// External functions
|
||||
extern void CopyData(void);
|
||||
extern Uint32 GetLongData(void);
|
||||
|
||||
|
||||
//#################################################
|
||||
// Uint32 I2C_Boot(void)
|
||||
//--------------------------------------------
|
||||
// This module is the main I2C boot routine.
|
||||
// It will load code via the I2C-A port.
|
||||
//
|
||||
// It will return an entry point address back
|
||||
// to the ExitBoot routine.
|
||||
//--------------------------------------------
|
||||
|
||||
Uint32 I2C_Boot(void)
|
||||
{
|
||||
Uint32 EntryAddr;
|
||||
|
||||
//
|
||||
// /*read CCNF0 register to check if I2C is enabled or not*/
|
||||
// if(DevEmuRegs.CCNF0.bit.I2C != 0x01)
|
||||
// {
|
||||
// return 0xFFFFFFFF;
|
||||
// }
|
||||
|
||||
|
||||
// Assign GetWordData to the I2C-A version of the
|
||||
// function. GetWordData is a pointer to a function.
|
||||
GetWordData = I2C_GetWord;
|
||||
|
||||
// Init I2C pins, clock, and registers
|
||||
// I2C_Init();
|
||||
//----------------------------------------------
|
||||
// Initialize the I2C-A port for communications
|
||||
// with the host.
|
||||
//----------------------------------------------
|
||||
// Configure I2C pins and turn on I2C clock
|
||||
EALLOW;
|
||||
CpuSysRegs.PCLKCR9.bit.I2C_A = 1; // Turn I2C module clock on
|
||||
EDIS;
|
||||
|
||||
// Initialize I2C in master transmitter mode
|
||||
I2caRegs.I2CSAR = 0x0050; // Slave address - EEPROM control code
|
||||
I2caRegs.I2CPSC.all = 0; // I2C clock should be between 7Mhz-12Mhz
|
||||
I2caRegs.I2CCLKL = 43; // Prescalers set for 100kHz bit rate
|
||||
I2caRegs.I2CCLKH = 43; // at a 10Mhz I2C clock
|
||||
|
||||
I2caRegs.I2CMDR.all = 0x0620; // Master transmitter
|
||||
// Take I2C out of reset
|
||||
// Stop when suspended
|
||||
|
||||
I2caRegs.I2CFFTX.all = 0x6000; // Enable FIFO mode and TXFIFO
|
||||
I2caRegs.I2CFFRX.all = 0x2000; // Enable RXFIFO
|
||||
|
||||
|
||||
EntryAddr = TI_OTP_C2BROM_ESCAPE_POINT_5;
|
||||
if((EntryAddr != 0xFFFFFFFF) &&
|
||||
(EntryAddr != 0x00000000))
|
||||
{
|
||||
/*if OTP is programmed, then call OTP function*/
|
||||
((void (*)(void))EntryAddr)();
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
// Check for 0x08AA data header, else go to flash
|
||||
if (I2C_CheckKeyVal() == ERROR) { return FLASH_ENTRY_POINT; }
|
||||
|
||||
// Check for clock and prescaler speed changes and reserved words
|
||||
I2C_ReservedFn();
|
||||
EDIS;
|
||||
// Get point of entry address after load
|
||||
EntryAddr = GetLongData();
|
||||
|
||||
// Receive and copy one or more code sections to destination addresses
|
||||
CopyData();
|
||||
|
||||
return EntryAddr;
|
||||
}
|
||||
|
||||
//#################################################
|
||||
// Uint16 I2C_CheckKeyVal(void)
|
||||
//-----------------------------------------------
|
||||
// This routine sets up the starting address in the
|
||||
// EEPROM by writing two bytes (0x0000) via the
|
||||
// I2C-A port to slave address 0x50. Without
|
||||
// sending a stop bit, the communication is then
|
||||
// restarted and two bytes are read from the EEPROM.
|
||||
// If these two bytes read do not equal 0x08AA
|
||||
// (little endian), an error is returned.
|
||||
//-----------------------------------------------
|
||||
|
||||
inline Uint16 I2C_CheckKeyVal(void)
|
||||
{
|
||||
// To read a word from the EEPROM, an address must be given first in
|
||||
// master transmitter mode. Then a restart is performed and data can
|
||||
// be read back in master receiver mode.
|
||||
I2caRegs.I2CCNT = 0x02; // Setup how many bytes to send
|
||||
I2caRegs.I2CDXR = 0x00; // Configure fifo data for byte
|
||||
I2caRegs.I2CDXR = 0x00; // address of 0x0000
|
||||
|
||||
I2caRegs.I2CMDR.all = 0x2620; // Send data to setup EEPROM address
|
||||
|
||||
while (I2caRegs.I2CSTR.bit.ARDY == 0) // Wait until communication
|
||||
{ // complete and registers ready
|
||||
}
|
||||
|
||||
if (I2caRegs.I2CSTR.bit.NACK == 1) // Set stop bit & return error if
|
||||
{ // NACK received
|
||||
I2caRegs.I2CMDR.bit.STP = 1;
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
// Check to make sure key value received is correct
|
||||
if (I2C_GetWord() != 0x08AA) {return ERROR;}
|
||||
|
||||
return NO_ERROR;
|
||||
}
|
||||
|
||||
|
||||
//#################################################
|
||||
// void I2C_ReservedFn(void)
|
||||
//-------------------------------------------------
|
||||
// This function reads 8 reserved words in the header.
|
||||
// 1st word - parameters for I2CPSC register
|
||||
// 2nd word - parameters for I2CCLKH register
|
||||
// 3rd word - parameters for I2CCLKL register
|
||||
//
|
||||
// The remaining reserved words are read and discarded
|
||||
// and then program execution returns to the main routine.
|
||||
//-------------------------------------------------
|
||||
|
||||
inline void I2C_ReservedFn(void)
|
||||
{
|
||||
Uint16 I2CPrescaler;
|
||||
Uint16 I2cClkHData;
|
||||
Uint16 I2cClkLData;
|
||||
Uint16 i;
|
||||
|
||||
// Get I2CPSC, I2CCLKH, and I2CCLKL values
|
||||
I2CPrescaler = I2C_GetWord();
|
||||
I2cClkHData = I2C_GetWord();
|
||||
I2cClkLData = I2C_GetWord();
|
||||
|
||||
// Store I2C clock prescalers
|
||||
I2caRegs.I2CMDR.bit.IRS = 0;
|
||||
I2caRegs.I2CCLKL = I2cClkLData;
|
||||
I2caRegs.I2CCLKH = I2cClkHData;
|
||||
I2caRegs.I2CPSC.all = I2CPrescaler;
|
||||
I2caRegs.I2CMDR.bit.IRS = 1;
|
||||
|
||||
// Read and discard the next 5 reserved words
|
||||
for (i=1; i<=5; i++)
|
||||
{
|
||||
I2cClkHData = I2C_GetWord();
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
//#################################################
|
||||
// Uint16 I2C_GetWord(void)
|
||||
//-----------------------------------------------
|
||||
// This routine fetches two bytes from the I2C-A
|
||||
// port and puts them together little endian style
|
||||
// to form a single 16-bit value.
|
||||
//-----------------------------------------------
|
||||
|
||||
Uint16 I2C_GetWord(void)
|
||||
{
|
||||
Uint16 LowByte;
|
||||
|
||||
I2caRegs.I2CCNT = 2; // Setup how many bytes to expect
|
||||
I2caRegs.I2CMDR.all = 0x2C20; // Send start as master receiver
|
||||
|
||||
// Wait until communication done
|
||||
while (I2caRegs.I2CMDR.bit.STP == 1) {}
|
||||
|
||||
// Combine two bytes to one word & return
|
||||
LowByte = I2caRegs.I2CDRR;
|
||||
return (LowByte | (I2caRegs.I2CDRR<<8));
|
||||
}
|
||||
|
||||
|
||||
//===========================================================================
|
||||
// No more.
|
||||
//===========================================================================
|
||||
+148
@@ -0,0 +1,148 @@
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 13, 2012 11:53:53 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: Parallel_Boot.c
|
||||
//
|
||||
// TITLE: Parallel Port I/O boot routines
|
||||
//
|
||||
// Functions:
|
||||
//
|
||||
// Uint32 Parallel_Boot(void)
|
||||
// inline void Parallel_GPIOSelect(void)
|
||||
// inline Uint16 Parallel_CheckKeyVal(void)
|
||||
// Uint16 Parallel_GetWordData_8bit()
|
||||
// Uint16 Parallel_GetWordData_16bit()
|
||||
// void Parallel_WaitHostRdy(void)
|
||||
// void Parallel_HostHandshake(void)
|
||||
// Notes:
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F2837x Boot ROM Version 0 $
|
||||
// $Release Date: Oct 1, 2013 $
|
||||
//###########################################################################
|
||||
|
||||
|
||||
#include "c2_bootrom.h"
|
||||
|
||||
|
||||
// Private function definitions
|
||||
Uint16 Parallel_GetWordData_8bit(void);
|
||||
|
||||
// External function definitions
|
||||
extern void CopyData(void);
|
||||
extern Uint32 GetLongData(void);
|
||||
extern void ReadReservedFn(void);
|
||||
|
||||
#define HOST_CTRL GPIO70 // GPIO70 is the host control signal (will be configured as input pin)
|
||||
#define DSP_CTRL GPIO69 // GPIO26 is the DSP's control signal (will be configured as output pin)
|
||||
|
||||
#define HOST_DATA_NOT_RDY GpioDataRegs.GPCDAT.bit.HOST_CTRL!=0
|
||||
#define WAIT_HOST_ACK GpioDataRegs.GPCDAT.bit.HOST_CTRL!=1
|
||||
|
||||
// Set (DSP_ACK) or Clear (DSP_RDY) GPIO69
|
||||
#define DSP_ACK GpioDataRegs.GPCSET.bit.DSP_CTRL = 1;
|
||||
#define DSP_RDY GpioDataRegs.GPCCLEAR.bit.DSP_CTRL = 1;
|
||||
#define DATA ((GpioDataRegs.GPBDAT.all & 0xFC000000)>>24|(GpioDataRegs.GPCDAT.bit.GPIO64<<1)|(GpioDataRegs.GPCDAT.bit.GPIO65))
|
||||
|
||||
void Parallel_GPIOSelect(void);
|
||||
|
||||
//#################################################
|
||||
// Uint32 Parallel_Boot(void)
|
||||
//--------------------------------------------
|
||||
// This module is the main Parallel boot routine.
|
||||
// It will load code via GP I/Os.
|
||||
//
|
||||
// This boot mode accepts 8-bit data.
|
||||
// 8-bit data is expected to be the order LSB
|
||||
// followed by MSB.
|
||||
//
|
||||
// This function returns a entry point address back
|
||||
// to the InitBoot routine which in turn calls
|
||||
// the ExitBoot routine.
|
||||
//--------------------------------------------
|
||||
|
||||
Uint32 Parallel_Boot()
|
||||
{
|
||||
|
||||
Uint32 EntryAddr;
|
||||
Uint16 wordData;
|
||||
|
||||
// Setup for Parallel boot should be done by CPU1 application code as CPU2 cannot access GpioCtrlRegs
|
||||
// Parallel_GPIOSelect();
|
||||
|
||||
// Check for the key value. This version only
|
||||
// supports 8-bit data.
|
||||
GetWordData = Parallel_GetWordData_8bit;
|
||||
wordData = GetWordData();
|
||||
if(wordData != BROM_EIGHT_BIT_HEADER) return FLASH_ENTRY_POINT;
|
||||
// Read and discard the reserved words
|
||||
ReadReservedFn();
|
||||
// Get the entry point address
|
||||
EntryAddr = GetLongData();
|
||||
// Load the data
|
||||
CopyData();
|
||||
|
||||
return EntryAddr;
|
||||
|
||||
}
|
||||
|
||||
//#################################################
|
||||
// Uint16 Parallel_GetWordData_8bit()/
|
||||
// The _8bit function is used if the input stream is
|
||||
// an 8-bit input stream and the upper 8-bits of the
|
||||
// GP I/O port are ignored. In the 8-bit case the
|
||||
// first fetches the LSB and then the MSB from the
|
||||
// GPIO port. These two bytes are then put together to
|
||||
// form a single 16-bit word that is then passed back
|
||||
// to the host. Note that in this case, the input stream
|
||||
// from the host is in the order LSB followed by MSB
|
||||
//-----------------------------------------------
|
||||
Uint16 Parallel_GetWordData_8bit()
|
||||
{
|
||||
Uint16 wordData;
|
||||
|
||||
// Get LSB.
|
||||
// Parallel_WaitHostRdy();
|
||||
// This routine tells the host that the DSP is ready to
|
||||
// recieve data. The DSP then waits for the host to
|
||||
// signal that data is ready on the GP I/O port.
|
||||
DSP_RDY;
|
||||
while(HOST_DATA_NOT_RDY) { }
|
||||
|
||||
wordData = DATA;
|
||||
|
||||
// Parallel_HostHandshake();
|
||||
// This routine tells the host that the DSP has recieved
|
||||
// the data. The DSP then waits for the host to acknowledge
|
||||
// the reciept before continuing.
|
||||
DSP_ACK;
|
||||
while(WAIT_HOST_ACK) { }
|
||||
|
||||
// Fetch the MSB.
|
||||
wordData = wordData & 0x00FF;
|
||||
|
||||
// Parallel_WaitHostRdy();
|
||||
// This routine tells the host that the DSP is ready to
|
||||
// recieve data. The DSP then waits for the host to
|
||||
// signal that data is ready on the GP I/O port.
|
||||
DSP_RDY;
|
||||
while(HOST_DATA_NOT_RDY) { }
|
||||
|
||||
wordData |= (DATA << 8);
|
||||
|
||||
// Parallel_HostHandshake();
|
||||
// This routine tells the host that the DSP has recieved
|
||||
// the data. The DSP then waits for the host to acknowledge
|
||||
// the reciept before continuing.
|
||||
DSP_ACK;
|
||||
while(WAIT_HOST_ACK) {}
|
||||
|
||||
return wordData;
|
||||
}
|
||||
|
||||
|
||||
// EOF --------
|
||||
|
||||
|
||||
|
||||
+168
@@ -0,0 +1,168 @@
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 13, 2012 11:53:54 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: SCI_Boot.c
|
||||
//
|
||||
// TITLE: SCI Boot mode routines
|
||||
//
|
||||
// Functions:
|
||||
//
|
||||
// Uint32 SCI_Boot(void)
|
||||
// inline void SCIA_Init(void)
|
||||
// inline void SCIA_AutobaudLock(void)
|
||||
// Uint32 SCIA_GetWordData(void)
|
||||
//
|
||||
// Notes:
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F2837x Boot ROM Version 0 $
|
||||
// $Release Date: Oct 1, 2013 $
|
||||
//###########################################################################
|
||||
|
||||
#include "c2_bootrom.h"
|
||||
|
||||
|
||||
// Private functions
|
||||
Uint16 SCIA_GetWordData(void);
|
||||
|
||||
// External functions
|
||||
extern void CopyData(void);
|
||||
Uint32 GetLongData(void);
|
||||
extern void ReadReservedFn(void);
|
||||
|
||||
|
||||
//#################################################
|
||||
// Uint32 SCI_Boot(void)
|
||||
//--------------------------------------------
|
||||
// This module is the main SCI boot routine.
|
||||
// It will load code via the SCI-A port.
|
||||
//
|
||||
// It will return a entry point address back
|
||||
// to the InitBoot routine which in turn calls
|
||||
// the ExitBoot routine.
|
||||
//--------------------------------------------
|
||||
|
||||
Uint32 SCI_Boot()
|
||||
{
|
||||
Uint32 EntryAddr;
|
||||
Uint16 byteData;
|
||||
|
||||
|
||||
|
||||
// Assign GetWordData to the SCI-A version of the
|
||||
// function. GetWordData is a pointer to a function.
|
||||
GetWordData = SCIA_GetWordData;
|
||||
|
||||
//----------------------------------------------
|
||||
// Initialize the SCI-A port for communications
|
||||
// with the host.
|
||||
//----------------------------------------------
|
||||
|
||||
// Enable the SCI-A clocks
|
||||
EALLOW;
|
||||
CpuSysRegs.PCLKCR7.bit.SCI_A = 1;
|
||||
|
||||
//Will be configured by CPU1 application code
|
||||
#if 0
|
||||
ClkCfgRegs.LOSPCP.all = 0x0002;
|
||||
#endif
|
||||
|
||||
SciaRegs.SCIFFTX.all=0x8000;
|
||||
// 1 stop bit, No parity, 8-bit character
|
||||
// No loopback
|
||||
SciaRegs.SCICCR.all = 0x0007;
|
||||
// Enable TX, RX, Use internal SCICLK
|
||||
SciaRegs.SCICTL1.all = 0x0003;
|
||||
// Disable RxErr, Sleep, TX Wake,
|
||||
// Diable Rx Interrupt, Tx Interrupt
|
||||
SciaRegs.SCICTL2.all = 0x0000;
|
||||
// Relinquish SCI-A from reset
|
||||
SciaRegs.SCICTL1.all = 0x0023;
|
||||
EDIS;
|
||||
|
||||
EntryAddr = TI_OTP_C2BROM_ESCAPE_POINT_6;
|
||||
if((EntryAddr != 0xFFFFFFFF) &&
|
||||
(EntryAddr != 0x00000000))
|
||||
{
|
||||
/*if OTP is programmed, then call OTP function*/
|
||||
((void (*)(void))EntryAddr)();
|
||||
}
|
||||
|
||||
//------------------------------------------------
|
||||
// Perform autobaud lock with the host.
|
||||
// Note that if autobaud never occurs
|
||||
// the program will hang in this routine as there
|
||||
// is no timeout mechanism included.
|
||||
//------------------------------------------------
|
||||
|
||||
// Must prime baud register with >= 1
|
||||
SciaRegs.SCILBAUD = 1;
|
||||
// Prepare for autobaud detection
|
||||
// Set the CDC bit to enable autobaud detection
|
||||
// and clear the ABD bit
|
||||
SciaRegs.SCIFFCT.bit.CDC = 1;
|
||||
SciaRegs.SCIFFCT.bit.ABDCLR = 1;
|
||||
// Wait until we correctly read an
|
||||
// 'A' or 'a' and lock
|
||||
while(SciaRegs.SCIFFCT.bit.ABD != 1) {}
|
||||
// After autobaud lock, clear the ABD and CDC bits
|
||||
SciaRegs.SCIFFCT.bit.ABDCLR = 1;
|
||||
SciaRegs.SCIFFCT.bit.CDC = 0;
|
||||
while(SciaRegs.SCIRXST.bit.RXRDY != 1) { }
|
||||
byteData = SciaRegs.SCIRXBUF.bit.RXDT;
|
||||
SciaRegs.SCITXBUF = byteData;
|
||||
|
||||
// If the KeyValue was invalid, abort the load
|
||||
// and return the flash entry point.
|
||||
if (SCIA_GetWordData() != 0x08AA) return FLASH_ENTRY_POINT;
|
||||
|
||||
ReadReservedFn();
|
||||
|
||||
EntryAddr = GetLongData();
|
||||
|
||||
CopyData();
|
||||
|
||||
EALLOW;
|
||||
ClkCfgRegs.CLKSEM.all = 0xA5A50000;
|
||||
EDIS;
|
||||
|
||||
return EntryAddr;
|
||||
}
|
||||
|
||||
//#################################################
|
||||
// Uint16 SCIA_GetWordData(void)
|
||||
//-----------------------------------------------
|
||||
// This routine fetches two bytes from the SCI-A
|
||||
// port and puts them together to form a single
|
||||
// 16-bit value. It is assumed that the host is
|
||||
// sending the data in the order LSB followed by MSB.
|
||||
//-----------------------------------------------
|
||||
|
||||
|
||||
Uint16 SCIA_GetWordData()
|
||||
{
|
||||
Uint16 wordData;
|
||||
Uint16 byteData;
|
||||
|
||||
wordData = 0x0000;
|
||||
byteData = 0x0000;
|
||||
|
||||
// Fetch the LSB and verify back to the host
|
||||
while(SciaRegs.SCIRXST.bit.RXRDY != 1) { }
|
||||
wordData = (Uint16)SciaRegs.SCIRXBUF.bit.RXDT;
|
||||
SciaRegs.SCITXBUF = wordData;
|
||||
|
||||
// Fetch the MSB and verify back to the host
|
||||
while(SciaRegs.SCIRXST.bit.RXRDY != 1) { }
|
||||
byteData = (Uint16)SciaRegs.SCIRXBUF.bit.RXDT;
|
||||
SciaRegs.SCITXBUF = byteData;
|
||||
|
||||
// form the wordData from the MSB:LSB
|
||||
wordData |= (byteData << 8);
|
||||
|
||||
return wordData;
|
||||
}
|
||||
|
||||
// EOF-------
|
||||
|
||||
+242
@@ -0,0 +1,242 @@
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 13, 2012 11:53:57 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: SPI_Boot.c
|
||||
//
|
||||
// TITLE: SPI Boot mode routines
|
||||
//
|
||||
// Functions:
|
||||
//
|
||||
// Uint32 SPI_Boot(void)
|
||||
// Uint16 SPIA_SetAddress_KeyChk(void)
|
||||
// inline void SPIA_Transmit(u16 cmdData)
|
||||
// inline void SPIA_ReservedFn(void);
|
||||
// Uint32 SPIA_GetWordData(void)
|
||||
//
|
||||
// Notes:
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F2837x Boot ROM Version 0 $
|
||||
// $Release Date: Oct 1, 2013 $
|
||||
//###########################################################################
|
||||
|
||||
#include "c2_bootrom.h"
|
||||
|
||||
// Private functions
|
||||
inline Uint16 SPIA_Transmit(Uint16 cmdData);
|
||||
inline void SPIA_ReservedFn(void);
|
||||
Uint16 SPIA_GetWordData(void);
|
||||
Uint16 SPIA_SetAddress_KeyChk(void);
|
||||
|
||||
// External functions
|
||||
extern void CopyData(void);
|
||||
Uint32 GetLongData(void);
|
||||
Uint32 SPI_start_Boot(void);
|
||||
void SPIA_Init(void);
|
||||
|
||||
|
||||
//#################################################
|
||||
// Uint32 SPI_Boot(void)
|
||||
//--------------------------------------------
|
||||
// This module is the main SPI boot routine.
|
||||
// It will load code via the SPI-A port.
|
||||
//
|
||||
// It will return a entry point address back
|
||||
// to the ExitBoot routine.
|
||||
//--------------------------------------------
|
||||
|
||||
Uint32 SPI_Boot()
|
||||
{
|
||||
Uint32 EntryAddr;
|
||||
|
||||
// Asign GetWordData to the SPI-A version of the
|
||||
// function. GetWordData is a pointer to a function.
|
||||
GetWordData = SPIA_GetWordData;
|
||||
// 1. Init SPI-A and set
|
||||
// EEPROM chip enable - low
|
||||
|
||||
SPIA_Init();
|
||||
|
||||
EntryAddr = TI_OTP_C2BROM_ESCAPE_POINT_7;
|
||||
if((EntryAddr != 0xFFFFFFFF) &&
|
||||
(EntryAddr != 0x00000000))
|
||||
{
|
||||
/*if OTP is programmed, then call OTP function*/
|
||||
((void (*)(void))EntryAddr)();
|
||||
}
|
||||
|
||||
return SPI_start_Boot();
|
||||
}
|
||||
|
||||
Uint32 SPI_start_Boot()
|
||||
{
|
||||
Uint32 EntryAddr;
|
||||
|
||||
// 2. Enable EEPROM and send EEPROM Read Command
|
||||
SPIA_Transmit(0x0300);
|
||||
// 3. Send Starting Address for Serial EEPROM (16-bit - 0x0000,0000)
|
||||
// or Serial Flash (24-bit - 0x0000,0000,0000)
|
||||
// Then check for 0x08AA data header, else go to flash
|
||||
if(SPIA_SetAddress_KeyChk() != 0x08AA) return FLASH_ENTRY_POINT;
|
||||
// 4.Check for Clock speed change and reserved words
|
||||
SPIA_ReservedFn();
|
||||
// 5. Get point of entry address after load
|
||||
EntryAddr = GetLongData();
|
||||
// 6. Receive and copy one or more code sections to destination addresses
|
||||
CopyData();
|
||||
// 7. Disable EEPROM chip enable - high
|
||||
// Chip enable - high
|
||||
EALLOW;
|
||||
GpioDataRegs.GPASET.bit.GPIO19 = 1;
|
||||
ClkCfgRegs.CLKSEM.all = 0xA5A50000;
|
||||
EDIS;
|
||||
|
||||
return EntryAddr;
|
||||
}
|
||||
|
||||
//#################################################
|
||||
// Uint16 SPIA_SetAddress_KeyChk(void)
|
||||
//-----------------------------------------------
|
||||
// This routine sends either a 16-bit address to
|
||||
// Serial EEPROM or a 24-bit address to Serial
|
||||
// FLASH. It then fetches the 2 bytes that make
|
||||
// up the key value from the SPI-A port and
|
||||
// puts them together to form a single
|
||||
// 16-bit value. It is assumed that the host is
|
||||
// sending the data in the form MSB:LSB.
|
||||
//-----------------------------------------------
|
||||
|
||||
Uint16 SPIA_SetAddress_KeyChk()
|
||||
{
|
||||
Uint16 keyValue;
|
||||
// Transmit first byte of Serial Memory address
|
||||
SPIA_Transmit(0x0000);
|
||||
// Transmit second byte of Serial Memory address
|
||||
SPIA_Transmit(0x0000);
|
||||
// Transmit third byte of Serial Memory address (0x00) if using Serial Flash
|
||||
// or receive first byte of key value if using Serial EEPROM.
|
||||
keyValue = SPIA_Transmit(0x0000);
|
||||
// If previously received LSB of key value (Serial EEPROM), then fetch MSB of key value
|
||||
if (keyValue == 0x00AA)
|
||||
{
|
||||
keyValue |= (SPIA_Transmit(0x0000)<<8);
|
||||
}
|
||||
else
|
||||
{
|
||||
// Serial Flash is being used - keyValue will be received after 24-bit address in the next 2 bytes
|
||||
// Fetch Key Value LSB (after 24-bit addressing)
|
||||
keyValue = SPIA_Transmit(0x0000);
|
||||
// Fetch Key Value MSB (after 24-bit addressing)
|
||||
keyValue |= (SPIA_Transmit(0x0000)<<8);
|
||||
}
|
||||
return keyValue;
|
||||
}
|
||||
|
||||
|
||||
//#################################################
|
||||
// Uint16 SPIA_Transmit(Uint16 cmdData)
|
||||
//------------------------------------------------
|
||||
// Send a byte/words through SPI transmit channel
|
||||
//------------------------------------------------
|
||||
|
||||
inline Uint16 SPIA_Transmit(Uint16 cmdData)
|
||||
{
|
||||
Uint16 recvData;
|
||||
// Send Read command/dummy word to EEPROM to fetch a byte
|
||||
SpiaRegs.SPITXBUF = cmdData;
|
||||
while( (SpiaRegs.SPISTS.bit.INT_FLAG) !=1);
|
||||
// Clear SPIINT flag and capture received byte
|
||||
recvData = SpiaRegs.SPIRXBUF;
|
||||
return recvData;
|
||||
}
|
||||
|
||||
//#################################################
|
||||
// void SPIA_ReservedFn(void)
|
||||
//-------------------------------------------------
|
||||
// This function reads 8 reserved words in the header.
|
||||
// The first word has parameters for LOSPCP
|
||||
// and SPIBRR register 0xMSB:LSB, LSB = is a three
|
||||
// bit field for LOSPCP change MSB = is a 6bit field
|
||||
// for SPIBRR register update
|
||||
//
|
||||
// If either byte is the default value of the register
|
||||
// then no speed change occurs. The default values
|
||||
// are LOSPCP = 0x02 and SPIBRR = 0x7F
|
||||
// The remaining reserved words are read and discarded
|
||||
// and then returns to the main routine.
|
||||
//-------------------------------------------------
|
||||
|
||||
inline void SPIA_ReservedFn()
|
||||
{
|
||||
Uint16 speedData;
|
||||
Uint16 i;
|
||||
|
||||
// update LOSPCP register
|
||||
speedData = SPIA_Transmit((Uint16)0x0000);
|
||||
|
||||
EALLOW;
|
||||
ClkCfgRegs.LOSPCP.all = speedData;
|
||||
EDIS;
|
||||
asm(" RPT #0x0F ||NOP");
|
||||
|
||||
// update SPIBRR register
|
||||
speedData = SPIA_Transmit((Uint16)0x0000);
|
||||
SpiaRegs.SPIBRR = speedData;
|
||||
asm(" RPT #0x0F ||NOP");
|
||||
|
||||
// Read and discard the next 7 reserved words.
|
||||
for(i = 1; i <= 7; i++)
|
||||
{
|
||||
SPIA_GetWordData();
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
//#################################################
|
||||
// Uint16 SPIA_GetWordData(void)
|
||||
//-----------------------------------------------
|
||||
// This routine fetches two bytes from the SPI-A
|
||||
// port and puts them together to form a single
|
||||
// 16-bit value. It is assumed that the host is
|
||||
// sending the data in the form MSB:LSB.
|
||||
//-----------------------------------------------
|
||||
|
||||
Uint16 SPIA_GetWordData()
|
||||
{
|
||||
Uint16 wordData;
|
||||
// Fetch the LSB
|
||||
wordData = SPIA_Transmit(0x0000);
|
||||
// Fetch the MSB
|
||||
wordData |= (SPIA_Transmit(0x0000) << 8);
|
||||
return wordData;
|
||||
}
|
||||
|
||||
|
||||
void SPIA_Init(void)
|
||||
{
|
||||
//----------------------------------------------
|
||||
// Initialize the SPI-A port for communications
|
||||
// with the host.
|
||||
//----------------------------------------------
|
||||
|
||||
// Enable SPI-A clocks
|
||||
EALLOW;
|
||||
ClkCfgRegs.CLKSEM.all = 0xA5A50001; //Allows CPU2 bootrom to take control of clock configuration registers
|
||||
CpuSysRegs.PCLKCR8.bit.SPI_A = 1;
|
||||
ClkCfgRegs.LOSPCP.all = 0x0002;
|
||||
|
||||
// Enable FIFO reset bit only
|
||||
SpiaRegs.SPIFFTX.all=0x8000;
|
||||
// 8-bit character
|
||||
SpiaRegs.SPICCR.all = 0x0007;
|
||||
// Use internal SPICLK master mode and Talk mode
|
||||
SpiaRegs.SPICTL.all = 0x000E;
|
||||
// Use the slowest baud rate
|
||||
SpiaRegs.SPIBRR = 0x007f;
|
||||
// Relinquish SPI-A from reset
|
||||
SpiaRegs.SPICCR.all = 0x0087;
|
||||
EDIS;
|
||||
}
|
||||
|
||||
|
||||
+99
@@ -0,0 +1,99 @@
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 14, 2012 12:51:30 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: SelectMode_Boot.c
|
||||
//
|
||||
// TITLE: Boot Mode selection routines
|
||||
//
|
||||
// Functions:
|
||||
//
|
||||
// Uint32 SelectBootMode(void)
|
||||
//
|
||||
// Notes:
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F2837x Boot ROM Version 0 $
|
||||
// $Release Date: Oct 1, 2013 $
|
||||
//###########################################################################
|
||||
|
||||
#include "c2_bootrom.h"
|
||||
|
||||
// External functions referenced by this file
|
||||
extern Uint32 SCI_Boot(void);
|
||||
extern Uint32 SPI_Boot(void);
|
||||
extern Uint32 Parallel_Boot(void);
|
||||
extern Uint32 I2C_Boot(void);
|
||||
extern Uint32 CAN_Boot(void);
|
||||
extern void WatchDogEnable(void);
|
||||
extern void WatchDogDisable(void);
|
||||
|
||||
// Functions in this file
|
||||
//void WaitBoot(void);
|
||||
Uint16 SelectBootMode(void);
|
||||
//void DeviceConfigure(void);
|
||||
|
||||
Uint16 SelectBootMode()
|
||||
{
|
||||
Uint16 BootMode;
|
||||
|
||||
// EALLOW;
|
||||
//
|
||||
// // Watchdog Service
|
||||
// SysCtrlRegs.WDKEY = 0x0055;
|
||||
// SysCtrlRegs.WDKEY = 0x00AA;
|
||||
|
||||
|
||||
|
||||
EALLOW;
|
||||
|
||||
// If GPIO37/TDO is connected to JTAG,
|
||||
// read the EMU_KEY_LOC and EMU_BOOT_LOC
|
||||
// If the key is invalid, assign WAIT to the
|
||||
// boot mode.
|
||||
if(CpuSysRegs.RESC.bit.TRSTn_pin_status == 1)
|
||||
{
|
||||
//EMUKEY.bits7:0 = KEY
|
||||
//EMUKEY.bits15:8 = BMODE
|
||||
//EMUBMODE.bits7:0 = BOOTPIN0
|
||||
//EMUBMODE.bits15:8 = BOOTPIN1
|
||||
if((EmuKey & 0xFF) != 0x5A)
|
||||
{
|
||||
//bad key
|
||||
BootMode = WAIT_BOOT;
|
||||
}
|
||||
else
|
||||
{
|
||||
if(((EmuKey & 0xFF00) >> 8) == EMULATE_TRUE_BOOT)
|
||||
{
|
||||
BootMode = c2brom_read_otp_bootmode();
|
||||
BootMode = c2brom_evaluate_bootmode (BootMode, STAND_ALONE_BOOT_TYPE);
|
||||
}
|
||||
else if (((EmuKey & 0xFF00) >> 8) == GET_BOOT)
|
||||
{
|
||||
BootMode = c2brom_read_otp_bootmode();
|
||||
//since we allow only FLASHBOOT mode from OTP, just look for that
|
||||
//this mode is same as EMULATE TRUE BOOT on CPU2
|
||||
BootMode = c2brom_evaluate_bootmode (BootMode, EMU_BOOT_TYPE);
|
||||
}
|
||||
else
|
||||
{
|
||||
BootMode = ((EmuKey & 0xFF00) >> 8); //no need to evaluate in EMUMODE
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
|
||||
BootMode = c2brom_read_otp_bootmode();
|
||||
BootMode = c2brom_evaluate_bootmode (BootMode, STAND_ALONE_BOOT_TYPE);
|
||||
|
||||
EmuKey = ((BootMode << 8) | 0x5A);
|
||||
}
|
||||
|
||||
EDIS;
|
||||
|
||||
return BootMode;
|
||||
}
|
||||
|
||||
|
||||
+120
@@ -0,0 +1,120 @@
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 13, 2012 11:53:56 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: Shared_Boot.c
|
||||
//
|
||||
// TITLE: Boot loader shared functions
|
||||
//
|
||||
// Functions:
|
||||
//
|
||||
// void CopyData(void)
|
||||
// Uint32 GetLongData(void)
|
||||
// void ReadReservedFn(void)
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F2837x Boot ROM Version 0 $
|
||||
// $Release Date: Oct 1, 2013 $
|
||||
//###########################################################################
|
||||
|
||||
|
||||
#include "c2_bootrom.h"
|
||||
|
||||
|
||||
// GetWordData is a pointer to the function that interfaces to the peripheral.
|
||||
// Each loader assigns this pointer to it's particular GetWordData function.
|
||||
uint16fptr GetWordData;
|
||||
|
||||
// Function prototypes
|
||||
Uint32 GetLongData();
|
||||
void CopyData(void);
|
||||
void ReadReservedFn(void);
|
||||
|
||||
//#################################################
|
||||
// void CopyData(void)
|
||||
//-----------------------------------------------------
|
||||
// This routine copies multiple blocks of data from the host
|
||||
// to the specified RAM locations. There is no error
|
||||
// checking on any of the destination addresses.
|
||||
// That is it is assumed all addresses and block size
|
||||
// values are correct.
|
||||
//
|
||||
// Multiple blocks of data are copied until a block
|
||||
// size of 00 00 is encountered.
|
||||
//
|
||||
//-----------------------------------------------------
|
||||
|
||||
void CopyData()
|
||||
{
|
||||
|
||||
struct HEADER {
|
||||
Uint16 BlockSize;
|
||||
Uint32 DestAddr;
|
||||
} BlockHeader;
|
||||
|
||||
Uint16 wordData;
|
||||
Uint16 i;
|
||||
|
||||
// Get the size in words of the first block
|
||||
BlockHeader.BlockSize = (*GetWordData)();
|
||||
|
||||
// While the block size is > 0 copy the data
|
||||
// to the DestAddr. There is no error checking
|
||||
// as it is assumed the DestAddr is a valid
|
||||
// memory location
|
||||
|
||||
while(BlockHeader.BlockSize != (Uint16)0x0000)
|
||||
{
|
||||
BlockHeader.DestAddr = GetLongData();
|
||||
for(i = 1; i <= BlockHeader.BlockSize; i++)
|
||||
{
|
||||
wordData = (*GetWordData)();
|
||||
*(Uint16 *)BlockHeader.DestAddr++ = wordData;
|
||||
}
|
||||
|
||||
// Get the size of the next block
|
||||
BlockHeader.BlockSize = (*GetWordData)();
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
//#################################################
|
||||
// Uint32 GetLongData(void)
|
||||
//-----------------------------------------------------
|
||||
// This routine fetches a 32-bit value from the peripheral
|
||||
// input stream.
|
||||
//-----------------------------------------------------
|
||||
|
||||
Uint32 GetLongData()
|
||||
{
|
||||
Uint32 longData;
|
||||
|
||||
// Fetch the upper 1/2 of the 32-bit value
|
||||
longData = ( (Uint32)(*GetWordData)() << 16);
|
||||
|
||||
// Fetch the lower 1/2 of the 32-bit value
|
||||
longData |= (Uint32)(*GetWordData)();
|
||||
|
||||
return longData;
|
||||
}
|
||||
|
||||
//#################################################
|
||||
// void Read_ReservedFn(void)
|
||||
//-------------------------------------------------
|
||||
// This function reads 8 reserved words in the header.
|
||||
// None of these reserved words are used by the
|
||||
// this boot loader at this time, they may be used in
|
||||
// future devices for enhancments. Loaders that use
|
||||
// these words use their own read function.
|
||||
//-------------------------------------------------
|
||||
|
||||
void ReadReservedFn()
|
||||
{
|
||||
Uint16 i;
|
||||
// Read and discard the 8 reserved words.
|
||||
for(i = 1; i <= 8; i++)
|
||||
{
|
||||
GetWordData();
|
||||
}
|
||||
return;
|
||||
}
|
||||
+70
@@ -0,0 +1,70 @@
|
||||
|
||||
;; TI File $Revision: /main/1 $
|
||||
;; Checkin $Date: August 13, 2012 11:54:19 $
|
||||
;;###########################################################################
|
||||
;;
|
||||
;; FILE: Vectors_Boot.h
|
||||
;;
|
||||
;; TITLE: Boot Rom vector table.
|
||||
;;
|
||||
;; Functions:
|
||||
;;
|
||||
;; This section of code populates the vector table in the boot ROM. The reset
|
||||
;; vector at 0x3FFFC0 points to the entry into the boot loader functions (InitBoot())
|
||||
;; The rest of the vectors are populated for test purposes only.
|
||||
;;
|
||||
;;###########################################################################
|
||||
;; $TI Release: F2837x Boot ROM Version 0 $
|
||||
;; $Release Date: Oct 1, 2013 $
|
||||
;;###########################################################################
|
||||
;-----------------------------------------------------------
|
||||
; The vector table located in boot ROM at 0x3F FFC0 - 0x3F FFFF
|
||||
; will be filled with the following data.
|
||||
;
|
||||
; Only the reset vector, which points to the InitBoot
|
||||
; routine will be used during normal operation. The remaining
|
||||
; vectors are set for internal testing purposes and will not be
|
||||
; fetched from this location during normal operation.
|
||||
;
|
||||
; On reset vector is always fetched from this table.
|
||||
;
|
||||
;----------------------------------------------------------
|
||||
.ref _InitBoot
|
||||
.ref _c2brom_handle_nmi
|
||||
.ref _c2brom_itrap_isr
|
||||
.ref _c2brom_pie_vect_mismatch_handler
|
||||
.sect ".BootVecs"
|
||||
BF _c2brom_pie_vect_mismatch_handler, UNC ;pie vect mismatch handler at address 0x3fffbe
|
||||
.long _InitBoot ;Reset
|
||||
.long 0x000042
|
||||
.long 0x000044
|
||||
.long 0x000046
|
||||
.long 0x000048
|
||||
.long 0x00004a
|
||||
.long 0x00004c
|
||||
.long 0x00004e
|
||||
.long 0x000050
|
||||
.long 0x000052
|
||||
.long 0x000054
|
||||
.long 0x000056
|
||||
.long 0x000058
|
||||
.long 0x00005a
|
||||
.long 0x00005c
|
||||
.long 0x00005e
|
||||
.long 0x000060
|
||||
.long 0x000062
|
||||
.long _c2brom_handle_nmi ;NMI
|
||||
.long _c2brom_itrap_isr ;ITRAP
|
||||
.long 0x000068
|
||||
.long 0x00006a
|
||||
.long 0x00006c
|
||||
.long 0x00006e
|
||||
.long 0x000070
|
||||
.long 0x000072
|
||||
.long 0x000074
|
||||
.long 0x000076
|
||||
.long 0x000078
|
||||
.long 0x00007a
|
||||
.long 0x00007c
|
||||
.long 0x00007e
|
||||
|
||||
+405
@@ -0,0 +1,405 @@
|
||||
;; TI File $Revision: /main/1 $
|
||||
;; Checkin $Date: August 13, 2012 11:53:42 $
|
||||
;;###########################################################################
|
||||
;;
|
||||
;; FILE: cbrom_Init_Boot.asm
|
||||
;;
|
||||
;; TITLE: Boot Rom Initialization and Exit routines.
|
||||
;;
|
||||
;; Functions:
|
||||
;;
|
||||
;; _InitBoot
|
||||
;; _ExitBoot
|
||||
;;
|
||||
;; Notes:
|
||||
;;
|
||||
;;###########################################################################
|
||||
;; $TI Release: F2837x Boot ROM Version 0 $
|
||||
;; $Release Date: Oct 1, 2013 $
|
||||
;;###########################################################################
|
||||
|
||||
.global _InitBoot
|
||||
.ref _c2brom_system_init
|
||||
.ref _c2brom_powerup_flash_faster
|
||||
|
||||
|
||||
.sect ".bist_signature"
|
||||
.global c2_bist_signatures_base
|
||||
c2_bist_signatures_base:
|
||||
;; 99% coverage
|
||||
.long 0xb118ff21 ;;c28x_bist_signature1_bits_31_0:
|
||||
.long 0xaad1c534 ;;c28x_bist_signature1_bits_63_32:
|
||||
.long 0xf3c29406 ;;c28x_bist_signature1_bits_95_64:
|
||||
.long 0xaa4ea0e6 ;;c28x_bist_signature1_bits_127_96:
|
||||
.long 0xc2008cdd ;;c28x_bist_signature1_bits_159_128:
|
||||
.long 0x48dff8ed ;;c28x_bist_signature1_bits_192_160:
|
||||
.long 0x2ce37ad1 ;;c28x_bist_signature1_bits_223_192:
|
||||
.long 0xaf0f02ba ;;c28x_bist_signature1_bits_255_224:
|
||||
.long 0x2739afc0 ;;c28x_bist_signature1_bits_287_256:
|
||||
.long 0x5977869f ;;c28x_bist_signature1_bits_319_288:
|
||||
.long 0x92af9366 ;;c28x_bist_signature1_bits_351_320:
|
||||
.long 0x323cfebe ;;c28x_bist_signature1_bits_383_352:
|
||||
.long 0xf8efbcb1 ;;c28x_bist_signature1_bits_415_384:
|
||||
.long 0xe76ce166 ;;c28x_bist_signature1_bits_447_416:
|
||||
.long 0x84c38125 ;;c28x_bist_signature1_bits_479_448:
|
||||
.long 0xe80932f3 ;;c28x_bist_signature1_bits_511_480:
|
||||
|
||||
;; 95% coverage
|
||||
.long 0xed486881 ;;c28x_bist_signature2_bits_31_0:
|
||||
.long 0x6046b177 ;;c28x_bist_signature2_bits_63_32:
|
||||
.long 0x9c0d6cfa ;;c28x_bist_signature2_bits_95_64:
|
||||
.long 0xa0073876 ;;c28x_bist_signature2_bits_127_96:
|
||||
.long 0xb0970d09 ;;c28x_bist_signature2_bits_159_128:
|
||||
.long 0x626890cb ;;c28x_bist_signature2_bits_192_160:
|
||||
.long 0xc31dfc59 ;;c28x_bist_signature2_bits_223_192:
|
||||
.long 0x6d54176f ;;c28x_bist_signature2_bits_255_224:
|
||||
.long 0x16d6d787 ;;c28x_bist_signature2_bits_287_256:
|
||||
.long 0xc3787dc3 ;;c28x_bist_signature2_bits_319_288:
|
||||
.long 0x4ee3e09b ;;c28x_bist_signature2_bits_351_320:
|
||||
.long 0xaa8e8df4 ;;c28x_bist_signature2_bits_383_352:
|
||||
.long 0xb66f6261 ;;c28x_bist_signature2_bits_415_384:
|
||||
.long 0xf78d1893 ;;c28x_bist_signature2_bits_447_416:
|
||||
.long 0xeb38773b ;;c28x_bist_signature2_bits_479_448:
|
||||
.long 0x55ee198f ;;c28x_bist_signature2_bits_511_480:
|
||||
|
||||
.sect ".test_signature1"
|
||||
.long 0xFFFFFF81 ;;~(*(0x3FFFFE)) - used for production testing
|
||||
|
||||
.sect ".Version"
|
||||
.global _c2brom_version
|
||||
c2brom_version:
|
||||
.word 0x0100 ; Boot ROM Version v0.1
|
||||
.word 0x0413 ; Month/Year: (ex: 0x0109 = 1/09 = Jan 2009)
|
||||
|
||||
; .sect ".otp_entry_points"
|
||||
; .global _otp_func_refs
|
||||
;_otp_func_refs:
|
||||
; .ref _ccore_brom_otp_dummy_branch_begin_boot
|
||||
; .long _ccore_brom_otp_dummy_branch_begin_boot
|
||||
; .ref _ccore_brom_otp_dummy_branch_end_boot
|
||||
; .long _ccore_brom_otp_dummy_branch_end_boot
|
||||
; .ref _ccore_brom_otp_pie_vector_mismatch_handler
|
||||
; .long _ccore_brom_otp_pie_vector_mismatch_handler
|
||||
; .ref _ccore_brom_otp_unsupported_bmode_handler
|
||||
; .long _ccore_brom_otp_unsupported_bmode_handler
|
||||
; .ref _ccore_brom_otp_hw_bist_reset_handler
|
||||
; .long _ccore_brom_otp_hw_bist_reset_handler
|
||||
; .ref _I2C_gpio_init_for_boot
|
||||
; .long _I2C_gpio_init_for_boot
|
||||
; .ref _SCI_gpio_init_for_boot
|
||||
; .long _SCI_gpio_init_for_boot
|
||||
; .ref _SPI_gpio_init_for_boot
|
||||
; .long _SPI_gpio_init_for_boot
|
||||
; .ref _SPI_alt_gpio_init_for_boot
|
||||
; .long _SPI_alt_gpio_init_for_boot
|
||||
|
||||
|
||||
.sect ".InitBoot"
|
||||
|
||||
;-----------------------------------------------
|
||||
; _InitBoot
|
||||
;-----------------------------------------------
|
||||
;-----------------------------------------------
|
||||
; This function performs the initial boot routine
|
||||
; for the boot ROM.
|
||||
;
|
||||
; This module performs the following actions:
|
||||
;
|
||||
; 1) Initalizes the stack pointer
|
||||
; 2) Sets the device for C28x operating mode
|
||||
; 3) Calls the main boot functions
|
||||
; 4) Calls an exit routine
|
||||
;-----------------------------------------------
|
||||
|
||||
|
||||
_InitBoot:
|
||||
|
||||
; Initalize the stack pointer.
|
||||
|
||||
__stack: .usect ".stack",0
|
||||
MOV SP, #__stack ; Initalize the stack pointer
|
||||
|
||||
; Initalize the device for running in C28x mode.
|
||||
|
||||
C28OBJ ; Select C28x object mode
|
||||
C28ADDR ; Select C27x/C28x addressing
|
||||
C28MAP ; Set blocks M0/M1 for C28x mode
|
||||
CLRC PAGE0 ; Always use stack addressing mode
|
||||
MOVW DP,#0 ; Initialize DP to point to the low 64 K
|
||||
CLRC OVM
|
||||
|
||||
; Set PM shift of 0
|
||||
|
||||
SPM 0
|
||||
; for debug
|
||||
; SB 0, UNC
|
||||
c2brom_hwbist_resc_check:
|
||||
; ADDB SP, #4
|
||||
;Uint32 EntryAddr = 0xFFFFFFFF;
|
||||
; MOVB ACC, #0
|
||||
; SUBB ACC, #1
|
||||
; MOVL *-SP[2], ACC
|
||||
;57 Uint32 hw_bist_addr = 0xFFFFFFFF;
|
||||
; MOVB ACC, #0
|
||||
; SUBB ACC, #1
|
||||
; MOVL *-SP[4], ACC
|
||||
; 59 if((CpuSysRegs.RESC.bit.HWBISTn) & 0x1)
|
||||
MOVW DP, #0x174e
|
||||
AND AL, @0x0, #0x20
|
||||
LSR AL, 5
|
||||
TBIT @AL, #0x0
|
||||
SBF c2brom_hwbist_resc_done, NTC
|
||||
; 61 EntryAddr = TI_OTP_C2BROM_ESCAPE_POINT_8;
|
||||
MOVL XAR4, #0x703DE
|
||||
; MOVL ACC, *+XAR4[0]
|
||||
; MOVL *-SP[2], ACC
|
||||
MOVL XAR5, *+XAR4[0]
|
||||
; 62 if((EntryAddr != 0xFFFFFFFF) && (EntryAddr != 0x00000000))
|
||||
MOVB ACC, #0
|
||||
SUBB ACC, #1
|
||||
; CMPL ACC, *-SP[2]
|
||||
CMPL ACC, XAR5
|
||||
SBF c2brom_hwbist_resc_no_escape, EQ
|
||||
; MOVL ACC, *-SP[2]
|
||||
MOVL ACC, XAR5
|
||||
SBF c2brom_hwbist_resc_no_escape, EQ
|
||||
; 66 ((void (*)(void))EntryAddr)();
|
||||
; MOVL XAR7, *-SP[2]
|
||||
; LCR *XAR7
|
||||
LCR *XAR5
|
||||
|
||||
c2brom_hwbist_resc_no_escape:
|
||||
; Accumualtor = HwbistRegs.CSTCRET.all;
|
||||
EALLOW
|
||||
MOVW DP, #0x1780
|
||||
MOVL ACC, @0x1A
|
||||
SBF c2brom_hwbist_resc_done, EQ ; check if not ZERO
|
||||
MOVL XAR5, ACC
|
||||
SPM #0
|
||||
LCR *XAR5
|
||||
|
||||
; 76 }
|
||||
c2brom_hwbist_resc_done:
|
||||
; SUBB SP, #4
|
||||
|
||||
LCR _c2brom_powerup_flash_faster
|
||||
;119 {
|
||||
c2brom_handle_ram_inits:
|
||||
;124 if(CpuSysRegs.RESC.all & (SYSCTL_RESC_POR | SYSCTL_RESC_XRSN ))
|
||||
MOVW DP, #0x174e
|
||||
MOVL ACC, @0x0
|
||||
MOVB AH, #0x0
|
||||
ANDB AL, #0x3
|
||||
TEST ACC
|
||||
SBF c2_brom_ram_init_for_hib_resc, EQ
|
||||
;127 EALLOW;
|
||||
EALLOW
|
||||
;129 MemCfgRegs.DxINIT.all = 0x000F;// bit0-M0, 1-M1,2-D0,3-D1
|
||||
MOVB ACC, #15
|
||||
MOVW DP, #0x17d0
|
||||
MOVL @0x12, ACC
|
||||
;130 MemCfgRegs.LSxINIT.all = 0x003F; //LS0 - LS5
|
||||
MOVB ACC, #63
|
||||
MOVL @0x32, ACC
|
||||
;132 MemCfgRegs.MSGxINIT.all = 0x0007;
|
||||
MOVW DP, #0x17d1
|
||||
MOVB ACC, #7
|
||||
MOVL @0x32, ACC
|
||||
;133 EDIS;
|
||||
EDIS
|
||||
ram_init_wait1: ;; wait 2048 + 32(=buffer)cycles for RAM init to complete
|
||||
MOV @T,#2080
|
||||
RPT @T
|
||||
||NOP
|
||||
;137 }
|
||||
|
||||
SB c2brom_handle_ram_inits_done, UNC
|
||||
;138 else if((CpuSysRegs.RESC.bit.HIBRESETn /*sysctl_reset_cause_check(SYSCTL_RESC_HIB)*/) == true) {
|
||||
c2_brom_ram_init_for_hib_resc:
|
||||
AND AL, @0x0, #0x40
|
||||
LSR AL, 6
|
||||
CMPB AL, #0x1
|
||||
SBF stack_init, NEQ
|
||||
;140 if((CpuSysRegs.LPMCR.bit.M0M1MODE == 0x01) || (CpuSysRegs.LPMCR.bit.M0M1MODE == 0x11)) {
|
||||
MOVW DP, #0x174d
|
||||
MOV AL, @0x37
|
||||
ANDB AL, #0x3
|
||||
CMPB AL, #0x1
|
||||
SBF c2_brom_all_ram_init_for_hib_resc, EQ
|
||||
MOV AL, @0x37
|
||||
ANDB AL, #0x3
|
||||
CMPB AL, #0x3
|
||||
SBF c2_brom_skip_mx_ram_init_for_hib_resc, NEQ
|
||||
;142 EALLOW;
|
||||
c2_brom_all_ram_init_for_hib_resc:
|
||||
EALLOW
|
||||
;146 MemCfgRegs.DxINIT.all = 0x000F;// bit0-M0, 1-M1,2-D0,3-D1
|
||||
MOVB ACC, #15
|
||||
MOVW DP, #0x17d0
|
||||
MOVL @0x12, ACC
|
||||
;147 MemCfgRegs.LSxINIT.all = 0x003F; //LS0 - LS5
|
||||
MOVB ACC, #63
|
||||
MOVL @0x32, ACC
|
||||
;149 MemCfgRegs.MSGxINIT.all = 0x0007;
|
||||
MOVW DP, #0x17d1
|
||||
MOVB ACC, #7
|
||||
MOVL @0x32, ACC
|
||||
;150 EDIS;
|
||||
EDIS
|
||||
ram_init_wait2: ;; wait 2048 + 32(=buffer)cycles for RAM init to complete
|
||||
MOV @T,#2080
|
||||
RPT @T
|
||||
||NOP
|
||||
;154 }
|
||||
SB c2brom_handle_ram_inits_done, UNC
|
||||
;157 EALLOW;
|
||||
c2_brom_skip_mx_ram_init_for_hib_resc:
|
||||
EALLOW
|
||||
;160 MemCfgRegs.DxINIT.all = 0x000C;// bit0-M0, 1-M1,2-D0,3-D1
|
||||
MOVB ACC, #12
|
||||
MOVW DP, #0x17d0
|
||||
MOVL @0x12, ACC
|
||||
;161 MemCfgRegs.LSxINIT.all = 0x003F; //LS0 - LS5
|
||||
MOVB ACC, #63
|
||||
MOVL @0x32, ACC
|
||||
;163 MemCfgRegs.MSGxINIT.all = 0x0007;
|
||||
MOVW DP, #0x17d1
|
||||
MOVB ACC, #7
|
||||
MOVL @0x32, ACC
|
||||
;164 EDIS;
|
||||
EDIS
|
||||
ram_init_wait3: ;; wait 2048 + 32(=buffer)cycles for RAM init to complete
|
||||
MOV @T,#2080
|
||||
RPT @T
|
||||
||NOP
|
||||
;170 }
|
||||
SB c2brom_handle_ram_inits_done, UNC
|
||||
|
||||
stack_init: ;; here means this is not POR, so just zero out the stack, 128 words
|
||||
MOV AL, #0x60
|
||||
MOV AH, #0
|
||||
ram_zero_loop:
|
||||
MOV *SP++,#0 ;;zero stack
|
||||
SUBB ACC, #1
|
||||
BF ram_zero_loop,GEQ
|
||||
stack_init_done:
|
||||
MOV SP, #__stack ; re-Initalize the stack pointer
|
||||
|
||||
c2brom_handle_ram_inits_done: ; C$L9:
|
||||
; Start C-bootROM
|
||||
MOVW DP,#0 ; Initialize DP to point to the low 64 K
|
||||
CLRC OVM
|
||||
|
||||
; Set PM shift of 0
|
||||
|
||||
SPM 0
|
||||
|
||||
LCR _c2brom_system_init
|
||||
|
||||
; Cleanup and exit. At this point the EntryAddr
|
||||
; is located in the ACC register
|
||||
BF _ExitBoot,UNC
|
||||
|
||||
|
||||
|
||||
;-----------------------------------------------
|
||||
; _ExitBoot
|
||||
;-----------------------------------------------
|
||||
;-----------------------------------------------
|
||||
;This module cleans up after the boot loader
|
||||
;
|
||||
; 1) Make sure the stack is deallocated.
|
||||
; SP = 0x400 after exiting the boot
|
||||
; loader
|
||||
; 2) Push 0 onto the stack so RPC will be
|
||||
; 0 after using LRETR to jump to the
|
||||
; entry point
|
||||
; 2) Load RPC with the entry point
|
||||
; 3) Clear all XARn registers
|
||||
; 4) Clear ACC, P and XT registers
|
||||
; 5) LRETR - this will also clear the RPC
|
||||
; register since 0 was on the stack
|
||||
;-----------------------------------------------
|
||||
|
||||
_ExitBoot:
|
||||
|
||||
;-----------------------------------------------
|
||||
; Insure that the stack is deallocated
|
||||
;-----------------------------------------------
|
||||
|
||||
MOV SP,#__stack
|
||||
|
||||
;-----------------------------------------------
|
||||
; Clear the bottom of the stack. This will endup
|
||||
; in RPC when we are finished
|
||||
;-----------------------------------------------
|
||||
|
||||
MOV *SP++,#0
|
||||
MOV *SP++,#0
|
||||
|
||||
;-----------------------------------------------
|
||||
; Load RPC with the entry point as determined
|
||||
; by the boot mode. This address will be returned
|
||||
; in the ACC register.
|
||||
;-----------------------------------------------
|
||||
|
||||
PUSH ACC
|
||||
POP RPC
|
||||
|
||||
;-----------------------------------------------
|
||||
; Put registers back in their reset state.
|
||||
;
|
||||
; Clear all the XARn, ACC, XT, and P and DP
|
||||
; registers
|
||||
;
|
||||
; NOTE: Leave the device in C28x operating mode
|
||||
; (OBJMODE = 1, AMODE = 0)
|
||||
;-----------------------------------------------
|
||||
ZAPA
|
||||
MOVL XT,ACC
|
||||
MOVZ AR0,AL
|
||||
MOVZ AR1,AL
|
||||
MOVZ AR2,AL
|
||||
MOVZ AR3,AL
|
||||
MOVZ AR4,AL
|
||||
MOVZ AR5,AL
|
||||
MOVZ AR6,AL
|
||||
MOVZ AR7,AL
|
||||
MOVW DP, #0
|
||||
|
||||
;------------------------------------------------
|
||||
; Restore ST0 and ST1. Note OBJMODE is
|
||||
; the only bit not restored to its reset state.
|
||||
; OBJMODE is left set for C28x object operating
|
||||
; mode.
|
||||
;
|
||||
; ST0 = 0x0000 ST1 = 0x0A0B
|
||||
; 15:10 OVC = 0 15:13 ARP = 0
|
||||
; 9: 7 PM = 0 12 XF = 0
|
||||
; 6 V = 0 11 M0M1MAP = 1
|
||||
; 5 N = 0 10 reserved
|
||||
; 4 Z = 0 9 OBJMODE = 1
|
||||
; 3 C = 0 8 AMODE = 0
|
||||
; 2 TC = 0 7 IDLESTAT = 0
|
||||
; 1 OVM = 0 6 EALLOW = 0
|
||||
; 0 SXM = 0 5 LOOP = 0
|
||||
; 4 SPA = 0
|
||||
; 3 VMAP = 1
|
||||
; 2 PAGE0 = 0
|
||||
; 1 DBGM = 1
|
||||
; 0 INTM = 1
|
||||
;-----------------------------------------------
|
||||
|
||||
MOV *SP++,#0
|
||||
MOV *SP++,#0x0A0B
|
||||
POP ST1
|
||||
POP ST0
|
||||
|
||||
;------------------------------------------------
|
||||
; Jump to the EntryAddr as defined by the
|
||||
; boot mode selected and continue execution
|
||||
;-----------------------------------------------
|
||||
|
||||
LRETR
|
||||
|
||||
;eof ----------
|
||||
+511
@@ -0,0 +1,511 @@
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 13, 2012 11:53:46 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: c2brom_boot.c
|
||||
//
|
||||
// TITLE: main boot loader file for C2-Core
|
||||
//
|
||||
// Functions:
|
||||
//
|
||||
//
|
||||
//
|
||||
//
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F2837x Boot ROM Version 0 $
|
||||
// $Release Date: Oct 1, 2013 $
|
||||
//###########################################################################
|
||||
|
||||
#include "c2_bootrom.h"
|
||||
|
||||
|
||||
/*variable to store MTOAIPCCOM register value*/
|
||||
cur_c1c2_ipc_cmd_sts_t c2brom_current_c1c2_ipc;
|
||||
|
||||
|
||||
Uint32 c2brom_status;
|
||||
extern Uint32 c1c2_branch_addr;
|
||||
extern Uint32 iTrap_addr;
|
||||
|
||||
void c2brom_handle_idle_lpm(void);
|
||||
|
||||
|
||||
/*
|
||||
* Function to initialize C-BootROM environment
|
||||
*/
|
||||
void c2brom_init_boot_env()
|
||||
{
|
||||
|
||||
/*initialize current command variables to default values*/
|
||||
c2brom_current_c1c2_ipc.command = C1C2_BROM_IPC_COMMAND_ILLEGAL;
|
||||
c2brom_current_c1c2_ipc.status = COMMAND_STATUS_INVALID;
|
||||
|
||||
|
||||
/* initialize iTrap address, and branch address variables to default values*/
|
||||
iTrap_addr = 0xFFFFFFFF;
|
||||
c1c2_branch_addr = 0xFFFFFFFF;
|
||||
|
||||
/*set MTOABOOTSTS register to indicate that boot started*/
|
||||
c2brom_set_c2c1_boot_status(C2_BOOTROM_BOOTSTS_SYSTEM_START_BOOT);
|
||||
|
||||
}
|
||||
|
||||
void c2brom_powerup_flash_faster()
|
||||
{
|
||||
uint32_t EntryAddr = 0xFFFFFFFF;
|
||||
|
||||
if(CpuSysRegs.RESC.all & (SYSCTL_RESC_POR | SYSCTL_RESC_XRSN | SYSCTL_RESC_HIB))
|
||||
{
|
||||
//should we clear the reset cause here? not yet because there is no place
|
||||
//to save the status as RAM will be RAM-INIT'd in the flow down below
|
||||
EALLOW;
|
||||
// set RWAIT to 0x3
|
||||
FlashCtrlRegs.FRDCNTL.bit.RWAIT = 0x3;
|
||||
// pump is already active because of CPU1
|
||||
|
||||
//save the default PSLEEP value
|
||||
//change the PSLEEP VALUE for 10MHZ...?
|
||||
//access OTP - read OTP revision or something to power up flash
|
||||
(OTP_CPU_ID_VERSION);
|
||||
|
||||
//change the PSLEEP value back to default
|
||||
// FlashCtrlRegs.FPAC1.bit.PSLEEP = 0x860;
|
||||
FlashCtrlRegs.FRDCNTL.bit.RWAIT = 0xF;
|
||||
|
||||
EDIS;
|
||||
}
|
||||
|
||||
EntryAddr = TI_OTP_C2BROM_ESCAPE_POINT_13;
|
||||
if((EntryAddr != 0xFFFFFFFF) &&
|
||||
(EntryAddr != 0x00000000))
|
||||
{
|
||||
/*if OTP is programmed, then call OTP function*/
|
||||
((void (*)(void))EntryAddr)();
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
//#################################################
|
||||
// void InitDCSM(void)
|
||||
//--------------------------------------------
|
||||
// This function initializes code security module, until this function is executed
|
||||
// all access to RAM and JTAG is blocked.
|
||||
//
|
||||
// Note that when this function is called by PreBoot(), stack is set to PIE RAM
|
||||
//--------------------------------------------
|
||||
|
||||
void InitDCSM()
|
||||
{
|
||||
int i = 0;
|
||||
unsigned long LinkPointer = 0;
|
||||
unsigned long *Z1_ZoneSelBlockPtr = (void *)0;
|
||||
unsigned long *Z2_ZoneSelBlockPtr = (void *)0;
|
||||
unsigned long dummy_read = 0;
|
||||
|
||||
int bitpos = 28;
|
||||
int zerofound = 0;
|
||||
|
||||
dummy_read = *(unsigned long *)0x703F0; /* Dummy read of SECDC REGISTER */
|
||||
|
||||
dummy_read = *(unsigned long *)0x78000; /* Dummy read of Z1 - LinkPointer1 */
|
||||
dummy_read = *(unsigned long *)0x78004; /* Dummy read of Z1 - LinkPointer2 */
|
||||
dummy_read = *(unsigned long *)0x78008; /* Dummy read of Z1 - LinkPointer3 */
|
||||
dummy_read = *(unsigned long *)0x78200; /* Dummy read of Z2 - LinkPointer1 */
|
||||
dummy_read = *(unsigned long *)0x78204; /* Dummy read of Z2 - LinkPointer2 */
|
||||
dummy_read = *(unsigned long *)0x78208; /* Dummy read of Z2 - LinkPointer3 */
|
||||
|
||||
dummy_read = *(unsigned long *)0x78010; /* Dummy read of Z1 - PSWDLOCK */
|
||||
dummy_read = *(unsigned long *)0x78210; /* Dummy read of Z2 - PSWDLOCK */
|
||||
|
||||
dummy_read = *(unsigned long *)0x78014; /* Dummy read of Z1 - CRCLOCK */
|
||||
dummy_read = *(unsigned long *)0x78214; /* Dummy read of Z2 - CRCLOCK */
|
||||
|
||||
dummy_read = *(unsigned long *)0x78018; /* Dummy read of Z1 - JTAGLOCK */
|
||||
dummy_read = *(unsigned long *)0x78218; /* Dummy read of Z2 - JTAGLOCK */
|
||||
|
||||
dummy_read = *(unsigned long *)0x7801E; /* Dummy read of Z1 - BOOTCTRL */
|
||||
dummy_read = *(unsigned long *)0x7821E; /* Dummy read of Z2 - BOOTCTRL */
|
||||
|
||||
LinkPointer = *(unsigned long *)0x5F000; /* Read Z1-Linkpointer out of Z1-LINKPOINTER register */
|
||||
LinkPointer = LinkPointer << 3; /* Bits 31,30 and 29 as most-sigificant 0 are invalid LinkPointer options */
|
||||
while ((zerofound == 0) && (bitpos > -1))
|
||||
{
|
||||
if ((LinkPointer & 0x80000000) == 0)
|
||||
{
|
||||
zerofound = 1;
|
||||
Z1_ZoneSelBlockPtr = (unsigned long *)(0x78000 + ((bitpos + 3)*16));
|
||||
}
|
||||
else
|
||||
{
|
||||
bitpos--;
|
||||
LinkPointer = LinkPointer << 1;
|
||||
}
|
||||
}
|
||||
if (zerofound == 0)
|
||||
{
|
||||
Z1_ZoneSelBlockPtr = (unsigned long *)0x78020;
|
||||
}
|
||||
|
||||
bitpos = 28;
|
||||
zerofound = 0;
|
||||
LinkPointer = *(unsigned long *)0x5F040; /* Read Z2-Linkpointer out of Z1-LINKPOINTER register */
|
||||
LinkPointer = LinkPointer << 3; /* Bits 31 and 30 as most-sigificant 0 are invalid LinkPointer options */
|
||||
while ((zerofound == 0) && (bitpos > -1))
|
||||
{
|
||||
if ((LinkPointer & 0x80000000) == 0)
|
||||
{
|
||||
zerofound = 1;
|
||||
Z2_ZoneSelBlockPtr = (unsigned long *)(0x78200 + ((bitpos + 3)*16));
|
||||
}
|
||||
else
|
||||
{
|
||||
bitpos--;
|
||||
LinkPointer = LinkPointer << 1;
|
||||
}
|
||||
}
|
||||
if (zerofound == 0)
|
||||
{
|
||||
Z2_ZoneSelBlockPtr = (unsigned long *)0x78220;
|
||||
}
|
||||
|
||||
/* Perform dummy reads of the Zone Select Block locations */
|
||||
for (i = 0; i < 8; i++)
|
||||
{
|
||||
dummy_read = *Z1_ZoneSelBlockPtr;
|
||||
dummy_read = *Z2_ZoneSelBlockPtr;
|
||||
Z1_ZoneSelBlockPtr++;
|
||||
Z2_ZoneSelBlockPtr++;
|
||||
}
|
||||
|
||||
//to avaoid 'set but never used' error
|
||||
dummy_read = dummy_read;
|
||||
|
||||
//clear local stack before returning
|
||||
i = 0;
|
||||
LinkPointer = 0;
|
||||
Z1_ZoneSelBlockPtr = (void *)0;
|
||||
Z2_ZoneSelBlockPtr = (void *)0;
|
||||
dummy_read = 0;
|
||||
bitpos = 0;
|
||||
zerofound = 0;
|
||||
|
||||
}
|
||||
|
||||
|
||||
uint16_t c2brom_evaluate_bootmode(uint16_t bootmode, uint16_t bootmode_type)
|
||||
{
|
||||
if(bootmode_type == HIB_BOOT_TYPE)
|
||||
{
|
||||
if((bootmode != FLASH_BOOT) || (bootmode != RAM_BOOT))
|
||||
{
|
||||
bootmode = WAIT_BOOT;
|
||||
}
|
||||
}
|
||||
else if (bootmode_type == STAND_ALONE_BOOT_TYPE)
|
||||
{
|
||||
if(bootmode != FLASH_BOOT)
|
||||
{
|
||||
bootmode = WAIT_BOOT;
|
||||
}
|
||||
}
|
||||
else if (bootmode_type == EMU_BOOT_TYPE)
|
||||
{
|
||||
//this function is called when boot mode is
|
||||
//read from OTP in get mode code
|
||||
//if not flash then we default to WAIT
|
||||
if(bootmode != FLASH_BOOT)
|
||||
{
|
||||
bootmode = WAIT_BOOT;
|
||||
}
|
||||
|
||||
}
|
||||
return bootmode;
|
||||
|
||||
}
|
||||
|
||||
uint16_t c2brom_read_otp_bootmode()
|
||||
{
|
||||
uint16_t BootMode;
|
||||
|
||||
if(DcsmRegsZ1.Z1_BOOTCTRL.bit.KEY != KEY_VAL)
|
||||
{
|
||||
/*Z1 OTP BootMode Key not programmed, look for Z2 Key*/
|
||||
if(DcsmRegsZ2.Z2_BOOTCTRL.bit.KEY != KEY_VAL)
|
||||
{
|
||||
BootMode = WAIT_BOOT;
|
||||
}
|
||||
else
|
||||
{
|
||||
BootMode = DcsmRegsZ2.Z2_BOOTCTRL.bit.BMODE;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
BootMode = DcsmRegsZ1.Z1_BOOTCTRL.bit.BMODE;
|
||||
}
|
||||
|
||||
return BootMode;
|
||||
}
|
||||
|
||||
uint32_t c2brom_system_init()
|
||||
{
|
||||
uint32_t EntryAddr = 0xFFFFFFFF;
|
||||
uint32_t IoRestoreAddr = 0xFFFFFFFF;
|
||||
uint32_t BootMode = 0xFFFFFFFF;
|
||||
|
||||
|
||||
EntryAddr = TI_OTP_C2BROM_ESCAPE_POINT_1;
|
||||
if((EntryAddr != 0xFFFFFFFF) &&
|
||||
(EntryAddr != 0x00000000))
|
||||
{
|
||||
/*if OTP is programmed, then call OTP function*/
|
||||
((void (*)(void))EntryAddr)();
|
||||
}
|
||||
|
||||
/*set C-BootROM health status to indicate that boot started*/
|
||||
c2brom_status |= C2_BOOTROM_START_BOOT;
|
||||
/*set C2TOC1BOOTSTS register to indicate that boot started*/
|
||||
c2brom_set_c2c1_boot_status(0);
|
||||
|
||||
/* enable C2 NMI*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMICFG.bit.NMIE = 1;
|
||||
//call NMI handler here because NMIWD could be ticking
|
||||
//because of stale NMI condition that could hanve occured before
|
||||
//NMIE is set
|
||||
c2brom_handle_nmi_at_start();
|
||||
|
||||
InitDCSM();
|
||||
|
||||
//not to trip ECSL if the passwords are ALL_1,
|
||||
//which would be the case with fresh erased parts.
|
||||
EALLOW;
|
||||
DcsmRegsZ1.Z1_CSMKEY0 = 0xFFFFFFFF;
|
||||
DcsmRegsZ1.Z1_CSMKEY1 = 0xFFFFFFFF;
|
||||
DcsmRegsZ1.Z1_CSMKEY2 = 0xFFFFFFFF;
|
||||
DcsmRegsZ1.Z1_CSMKEY3 = 0xFFFFFFFF;
|
||||
DcsmRegsZ2.Z2_CSMKEY0 = 0xFFFFFFFF;
|
||||
DcsmRegsZ2.Z2_CSMKEY1 = 0xFFFFFFFF;
|
||||
DcsmRegsZ2.Z2_CSMKEY2 = 0xFFFFFFFF;
|
||||
DcsmRegsZ2.Z2_CSMKEY3 = 0xFFFFFFFF;
|
||||
EDIS;
|
||||
|
||||
c2brom_status |= C2_BOOTROM_DCSM_INIT_DONE;
|
||||
/*set C2TOC1BOOTSTS register to indicate that boot started*/
|
||||
c2brom_set_c2c1_boot_status(0);
|
||||
|
||||
EntryAddr = TI_OTP_C2BROM_ESCAPE_POINT_2;
|
||||
if((EntryAddr != 0xFFFFFFFF) &&
|
||||
(EntryAddr != 0x00000000))
|
||||
{
|
||||
/*if OTP is programmed, then call OTP function*/
|
||||
((void (*)(void))EntryAddr)();
|
||||
}
|
||||
|
||||
c2brom_init_boot_env();
|
||||
|
||||
/*check reset cause, if HWBIST then call IORESTOREADDR*/
|
||||
|
||||
if(CpuSysRegs.RESC.bit.HIBRESETn != 0x00)
|
||||
{
|
||||
|
||||
/*if CRESC.bit[1,0] == 0x00, there was no reset because of C28HWBIST*/
|
||||
EALLOW;
|
||||
|
||||
EntryAddr = TI_OTP_C2BROM_ESCAPE_POINT_3;
|
||||
if((EntryAddr != 0xFFFFFFFF) &&
|
||||
(EntryAddr != 0x00000000))
|
||||
{
|
||||
/*if OTP is programmed, then call OTP function*/
|
||||
((void (*)(void))EntryAddr)();
|
||||
}
|
||||
|
||||
EALLOW;
|
||||
IoRestoreAddr = CpuSysRegs.IORESTOREADDR.all;
|
||||
EDIS;
|
||||
if(IoRestoreAddr != 0x003FFFFF) //not at its default value
|
||||
{
|
||||
((void (*)(void))IoRestoreAddr)();
|
||||
}
|
||||
EALLOW;
|
||||
}
|
||||
//clear RESC bits so that bootROM would not go into
|
||||
//a fault reset handling if it got reset for some reason
|
||||
if (CpuSysRegs.RESC.bit.POR)
|
||||
{
|
||||
//clear POR and XRSn
|
||||
CpuSysRegs.RESC.all = (SYSCTL_RESC_POR | SYSCTL_RESC_XRSN);
|
||||
}
|
||||
|
||||
if(CpuSysRegs.RESC.bit.XRSn)
|
||||
{
|
||||
CpuSysRegs.RESC.all = SYSCTL_RESC_XRSN;
|
||||
}
|
||||
|
||||
if(CpuSysRegs.RESC.bit.HWBISTn)
|
||||
{
|
||||
CpuSysRegs.RESC.all = SYSCTL_RESC_HWBIST;
|
||||
}
|
||||
|
||||
EDIS;
|
||||
|
||||
c2brom_status |= C2_BOOTROM_RESC_HANDLED;
|
||||
/*set C2TOC1BOOTSTS register to indicate that boot started*/
|
||||
c2brom_set_c2c1_boot_status(0);
|
||||
|
||||
|
||||
EntryAddr = TI_OTP_C2BROM_ESCAPE_POINT_4;
|
||||
if((EntryAddr != 0xFFFFFFFF) &&
|
||||
(EntryAddr != 0x00000000))
|
||||
{
|
||||
/*if OTP is programmed, then call OTP function*/
|
||||
((void (*)(void))EntryAddr)();
|
||||
}
|
||||
|
||||
|
||||
/*read RESC again*/
|
||||
if(CpuSysRegs.RESC.bit.HIBRESETn)
|
||||
{
|
||||
CpuSysRegs.RESC.all = SYSCTL_RESC_HIB; //clear hib reset
|
||||
EALLOW;
|
||||
BootMode = CpuSysRegs.HIBBOOTMODE;
|
||||
EDIS;
|
||||
|
||||
//bootmode.bits7:0 = key (0x5A is valid)
|
||||
//bootmode.bits15:8 = boot mode
|
||||
//bootmode.bits16:31 = RESERVED for future
|
||||
if ((BootMode & 0xFF) == 0x5A)
|
||||
{
|
||||
//good key
|
||||
|
||||
//check for validity of boot mode here - lets see???
|
||||
BootMode = c2brom_evaluate_bootmode(((BootMode & 0xFF00) >> 8),
|
||||
HIB_BOOT_TYPE);
|
||||
}
|
||||
else
|
||||
{
|
||||
BootMode = SelectBootMode();
|
||||
}
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
BootMode = SelectBootMode();
|
||||
}
|
||||
|
||||
sysctl_wdog_disable();
|
||||
|
||||
if(BootMode == FLASH_BOOT)
|
||||
{
|
||||
EntryAddr = FLASH_ENTRY_POINT;
|
||||
//to make sure wathDOG is enabled
|
||||
sysctl_wdog_enable();
|
||||
|
||||
c2brom_status |= (C2_BOOTROM_IN_FLASH_BOOT | C2_BOOTROM_BOOT_COMPLETE);
|
||||
/*set C2TOC1BOOTSTS register to indicate that boot started*/
|
||||
c2brom_set_c2c1_boot_status(0);
|
||||
|
||||
return EntryAddr;
|
||||
}
|
||||
else if(BootMode == RAM_BOOT)
|
||||
{
|
||||
//to make sure wathDOG is enabled
|
||||
sysctl_wdog_enable();
|
||||
EntryAddr = RAM_ENTRY_POINT;
|
||||
return EntryAddr;
|
||||
}
|
||||
else if(BootMode == SCI_BOOT)
|
||||
{
|
||||
EntryAddr = SCI_Boot();
|
||||
return EntryAddr;
|
||||
}
|
||||
else if(BootMode == SPI_BOOT)
|
||||
{
|
||||
EntryAddr = SPI_Boot();
|
||||
return EntryAddr;
|
||||
}
|
||||
else if(BootMode == I2C_BOOT)
|
||||
{
|
||||
EntryAddr = I2C_Boot();
|
||||
return EntryAddr;
|
||||
}
|
||||
else if(BootMode == PARALLEL_BOOT)
|
||||
{
|
||||
EntryAddr = Parallel_Boot();
|
||||
return EntryAddr;
|
||||
}
|
||||
else if((BootMode == CAN_BOOT) || ((BootMode == CAN_BOOT_TEST)))
|
||||
{
|
||||
EntryAddr = DCAN_Boot(BootMode);
|
||||
return EntryAddr;
|
||||
}
|
||||
|
||||
else
|
||||
{
|
||||
//continue boot - get into IDLE mode
|
||||
};
|
||||
|
||||
/*enable PIE*/
|
||||
|
||||
// Initialize PIE control registers to their default state.
|
||||
// The default state is all PIE interrupts disabled and flags
|
||||
// are cleared.
|
||||
c2brom_init_pie_control();
|
||||
|
||||
// Disable CPU interrupts and clear all CPU interrupt flags:
|
||||
IER = 0x0000;
|
||||
IFR = 0x0000;
|
||||
|
||||
// Initialize the PIE vector table with pointers to the shell Interrupt
|
||||
// Service Routines (ISR).
|
||||
// This will populate the entire table, even if the interrupt
|
||||
// is not used in this example. This is useful for debug purposes.
|
||||
c2brom_init_pie_vect_table();
|
||||
|
||||
/*install interrupt handlers for MTOCIPCINT1 and ATOCIPCINT1 and iTRAP ISR*/
|
||||
|
||||
EALLOW;
|
||||
|
||||
PieVectTable.NMI_INT = &c2brom_handle_nmi;
|
||||
PieVectTable.ILLEGAL_INT = &c2brom_itrap_isr;
|
||||
PieVectTable.CIPC1_INT = &c2brom_c1c2_ipc_int1_isr;
|
||||
|
||||
/*Configure IDLE Low Power Mode*/
|
||||
CpuSysRegs.LPMCR.bit.LPM = 0x0000; // LPM mode = Idle
|
||||
|
||||
/*enable MTOCIPCINT1*/
|
||||
//PieCtrlRegs.PIEIER11.bit.INTx1 = 1;
|
||||
PieCtrlRegs.PIEIER1.bit.INTx13 = 1;
|
||||
|
||||
|
||||
/*enable PIE*/
|
||||
PieCtrlRegs.PIECTRL.bit.ENPIE = 1;
|
||||
|
||||
/*enable interrupt 1 for IPC interrupts*/
|
||||
IER |= 0x0001;
|
||||
EDIS;
|
||||
EINT;
|
||||
|
||||
/*set BOOTSTS register to indicate that boot started*/
|
||||
c2brom_set_c2c1_boot_status(C2_BOOTROM_BOOTSTS_SYSTEM_READY);
|
||||
|
||||
c2brom_handle_idle_lpm();
|
||||
|
||||
return EntryAddr; //should never reach here
|
||||
}
|
||||
|
||||
/*function called to put CPU in IDLE mode
|
||||
*/
|
||||
void c2brom_handle_idle_lpm(void)
|
||||
{
|
||||
sysctl_wdog_disable();
|
||||
|
||||
asm(" ESTOP0"); //when connected to debugger stop here
|
||||
|
||||
while(1)
|
||||
{
|
||||
asm(" IDLE"); // Device waits in IDLE until interrupts
|
||||
}/*while(1)*/
|
||||
}
|
||||
|
||||
+616
@@ -0,0 +1,616 @@
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: checksum.c
|
||||
//
|
||||
// TITLE: boot ROM checksum generator
|
||||
//
|
||||
// Functions:
|
||||
//
|
||||
//
|
||||
// Notes:
|
||||
//
|
||||
//###########################################################################
|
||||
//
|
||||
// Ver | dd mmm yyyy | Who | Description of changes
|
||||
// =====|=============|==============|=======================================
|
||||
// 0.1 | | LH | Original Release.
|
||||
// | | |
|
||||
//###########################################################################
|
||||
typedef struct {
|
||||
unsigned long firstAddr;
|
||||
unsigned long lastAddr;
|
||||
unsigned short mem_attribute; //initialized to 0 for reserved locations and 1 for valid data locations
|
||||
} memblock;
|
||||
|
||||
|
||||
// Use 4 32-bit values to represent the 64-bit checksum.
|
||||
// This is done such that overflow can be monitored at
|
||||
// each step in the summation. If overflow from the lower
|
||||
// 16-bits occurs, then the overflow is added to the next
|
||||
// significant word.
|
||||
|
||||
typedef struct {
|
||||
unsigned long highHalfMSW;
|
||||
unsigned long highHalfLSW;
|
||||
unsigned long lowHalfMSW;
|
||||
unsigned long lowHalfLSW;
|
||||
} ui64;
|
||||
|
||||
typedef struct checksum_data
|
||||
{
|
||||
unsigned long total_ones;
|
||||
unsigned long bit_column_cksum[8][3];
|
||||
ui64 row_weight_sum;
|
||||
ui64 fact_weight_sum;
|
||||
}composite_checksum_t;
|
||||
|
||||
#pragma DATA_SECTION(csum_rom, ".CKSUMLOC");
|
||||
const composite_checksum_t csum_rom = {
|
||||
0x000381BF, //total_ones
|
||||
0x00009D59, 0x00001A66, 00000000, //bit_column_cksum[0][3];
|
||||
0x00003A7A, 0x00001E5F, 00000000, //bit_column_cksum[1][3];
|
||||
0x00000446, 0x00001CF6, 00000000, //bit_column_cksum[2][3];
|
||||
0x0000FC92, 0x00001B97, 00000000, //bit_column_cksum[3][3];
|
||||
0x0000BD5C, 0x00001B11, 00000000, //bit_column_cksum[4][3];
|
||||
0x0000B9C2, 0x00001A3F, 00000000, //bit_column_cksum[5][3];
|
||||
0x00008E40, 0x0000194C, 00000000, //bit_column_cksum[6][3];
|
||||
0x00006531, 0x000018FF, 00000000, //bit_column_cksum[7][3];
|
||||
0x00000000, 0x00000006, 0x0000C779, 0x0000FD70,//row_weight_sum
|
||||
0x00000000, 0x0000220E, 0x0000A5CC, 0x000075C1 //fact_weight_sum
|
||||
};
|
||||
|
||||
#if 0/// no stable compiler available
|
||||
|
||||
#pragma CODE_SECTION(verify_checksum_onROM, ".CKSUMFUNCS");
|
||||
unsigned short verify_checksum_onROM();
|
||||
|
||||
#pragma CODE_SECTION(calculate_composite_checksum_on_rom, ".CKSUMFUNCS");
|
||||
unsigned short calculate_composite_checksum_on_rom(composite_checksum_t *cksum, memblock *mblock, unsigned int total_mblocks);
|
||||
|
||||
#pragma CODE_SECTION(add_to_factorial_sum, ".CKSUMFUNCS");
|
||||
void add_to_factorial_sum(unsigned long fact_weight, composite_checksum_t *cksum);
|
||||
|
||||
#pragma CODE_SECTION(add_to_row_weight_sum, ".CKSUMFUNCS");
|
||||
void add_to_row_weight_sum(unsigned long ones_weight, composite_checksum_t *cksum);
|
||||
|
||||
#pragma CODE_SECTION(add_to_bitcolumn_checksum, ".CKSUMFUNCS");
|
||||
unsigned long add_to_bitcolumn_checksum(unsigned long bitcolumn, unsigned long bit_weight, composite_checksum_t *cksum);
|
||||
|
||||
#pragma CODE_SECTION(compare_two_composite_checksums, ".CKSUMFUNCS");
|
||||
unsigned short compare_two_composite_checksums(const composite_checksum_t *goldsum, composite_checksum_t *compsum);
|
||||
|
||||
#pragma CODE_SECTION(calculate_checksum, ".CKSUMFUNCS");
|
||||
unsigned long calculate_checksum(unsigned long start, unsigned long end, unsigned long offset, composite_checksum_t *cksum);
|
||||
|
||||
#pragma CODE_SECTION(test_reserved_memory, ".CKSUMFUNCS");
|
||||
unsigned short test_reserved_memory(unsigned long start, unsigned long end);
|
||||
|
||||
|
||||
unsigned short test_reserved_memory(unsigned long start, unsigned long end)
|
||||
{
|
||||
if(start & ~(0x3FFFFF)) //address beyond 22 bits
|
||||
{
|
||||
while(start <=end )
|
||||
{
|
||||
if(__addr32_read_uint16(start++) != (unsigned long)0xFFFF)
|
||||
{
|
||||
return 0xFFFF; //error
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
while(start <=end )
|
||||
{
|
||||
if(* (volatile unsigned short *)start++ != (unsigned long)0xFFFF)
|
||||
{
|
||||
return 0xFFFF; //error
|
||||
}
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
// This main function performs a very simple 64 bit checksum routine.
|
||||
// 4 32-bit values are used to calculate the checksum. This is done so that
|
||||
// no overflow is lost. After each addition, the value is checked to see if
|
||||
// it has overflowed the lower 16-bits. If it has, then the overflow portion
|
||||
// in the upper 16-bits is added to the next most significant portion of the
|
||||
// checksum.
|
||||
//
|
||||
// When the routine completes, the upper 16-bits of each portion of the checksum
|
||||
// will be 0x000 - this portion should be discarded as it was only used to check
|
||||
// for overflow and the checksum is then formed from the lower 16-bits.
|
||||
//
|
||||
// For example:
|
||||
// lowHalfLSW = 0x00001111
|
||||
// lowHalfMSW = 0x00002222
|
||||
// highHalfLSW = 0x00003333
|
||||
// highHalfMSW = 0x00004444
|
||||
//
|
||||
// would result in a 64-bit checksum of 0x44443333 22221111
|
||||
|
||||
unsigned short calculate_composite_checksum_on_rom(composite_checksum_t *cksum, memblock *mblock, unsigned int total_mblocks)
|
||||
{
|
||||
unsigned short i;
|
||||
unsigned long offset = 0;
|
||||
memblock *lmblock = (void *)0;
|
||||
unsigned short result = 0;
|
||||
|
||||
cksum->row_weight_sum.highHalfMSW = 0;
|
||||
cksum->row_weight_sum.highHalfLSW = 0;
|
||||
cksum->row_weight_sum.lowHalfLSW = 0;
|
||||
cksum->row_weight_sum.lowHalfMSW = 0;
|
||||
|
||||
cksum->fact_weight_sum.highHalfMSW = 0;
|
||||
cksum->fact_weight_sum.highHalfLSW = 0;
|
||||
cksum->fact_weight_sum.lowHalfLSW = 0;
|
||||
cksum->fact_weight_sum.lowHalfMSW = 0;
|
||||
|
||||
cksum->total_ones = 0;
|
||||
|
||||
cksum->bit_column_cksum[0][0] = cksum->bit_column_cksum[1][0] = cksum->bit_column_cksum[2][0] = cksum->bit_column_cksum[3][0] = 0;
|
||||
cksum->bit_column_cksum[4][0] = cksum->bit_column_cksum[5][0] = cksum->bit_column_cksum[6][0] = cksum->bit_column_cksum[7][0] = 0;
|
||||
|
||||
cksum->bit_column_cksum[0][1] = cksum->bit_column_cksum[1][1] = cksum->bit_column_cksum[2][1] = cksum->bit_column_cksum[3][1] = 0;
|
||||
cksum->bit_column_cksum[4][1] = cksum->bit_column_cksum[5][1] = cksum->bit_column_cksum[6][1] = cksum->bit_column_cksum[7][1] = 0;
|
||||
|
||||
cksum->bit_column_cksum[0][2] = cksum->bit_column_cksum[1][2] = cksum->bit_column_cksum[2][2] = cksum->bit_column_cksum[3][2] = 0;
|
||||
cksum->bit_column_cksum[4][2] = cksum->bit_column_cksum[5][2] = cksum->bit_column_cksum[6][2] = cksum->bit_column_cksum[7][2] = 0;
|
||||
|
||||
for(i = 0; i < total_mblocks; i++) {
|
||||
lmblock = (memblock *)(&mblock[i]);
|
||||
if (lmblock->mem_attribute == 0)
|
||||
{
|
||||
result = test_reserved_memory((unsigned long)(lmblock->firstAddr), (unsigned long)(lmblock->lastAddr));
|
||||
if(result == 0xFFFF)
|
||||
return 0xFFFF;
|
||||
}
|
||||
else if(lmblock->mem_attribute == 1)
|
||||
{
|
||||
offset = calculate_checksum((unsigned long)(lmblock->firstAddr), (unsigned long)(lmblock->lastAddr), offset, cksum);
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
void add_to_factorial_sum(unsigned long fact_weight, composite_checksum_t *cksum)
|
||||
{
|
||||
// Add in LSW
|
||||
cksum->fact_weight_sum.lowHalfLSW += (fact_weight & (unsigned long)0x0000FFFF);
|
||||
|
||||
// Check for overflow
|
||||
if(cksum->fact_weight_sum.lowHalfLSW >= (unsigned long)0x0000FFFF)
|
||||
{
|
||||
cksum->fact_weight_sum.lowHalfMSW += cksum->fact_weight_sum.lowHalfLSW >> 16;
|
||||
cksum->fact_weight_sum.lowHalfLSW &= (unsigned long)0x0000FFFF;
|
||||
}
|
||||
|
||||
if(cksum->fact_weight_sum.lowHalfMSW >= (unsigned long)0x0000FFFF)
|
||||
{
|
||||
cksum->fact_weight_sum.highHalfLSW += cksum->fact_weight_sum.lowHalfMSW >> 16;
|
||||
cksum->fact_weight_sum.lowHalfMSW &= (unsigned long)0x0000FFFF;
|
||||
}
|
||||
|
||||
if(cksum->fact_weight_sum.highHalfLSW >= (unsigned long)0x0000FFFF)
|
||||
{
|
||||
cksum->fact_weight_sum.highHalfMSW += cksum->fact_weight_sum.lowHalfLSW >> 16;
|
||||
cksum->fact_weight_sum.highHalfLSW &= (unsigned long)0x0000FFFF;
|
||||
}
|
||||
|
||||
// Add in MSW
|
||||
cksum->fact_weight_sum.lowHalfMSW += (fact_weight >> 16);
|
||||
// Check for overflow
|
||||
if(cksum->fact_weight_sum.lowHalfMSW >= (unsigned long)0x0000FFFF)
|
||||
{
|
||||
cksum->fact_weight_sum.highHalfLSW += cksum->fact_weight_sum.lowHalfMSW >> 16;
|
||||
cksum->fact_weight_sum.lowHalfMSW &= (unsigned long)0x0000FFFF;
|
||||
}
|
||||
|
||||
if(cksum->fact_weight_sum.highHalfLSW >= (unsigned long)0x0000FFFF)
|
||||
{
|
||||
cksum->fact_weight_sum.highHalfMSW += cksum->fact_weight_sum.lowHalfLSW >> 16;
|
||||
cksum->fact_weight_sum.highHalfLSW &= (unsigned long)0x0000FFFF;
|
||||
}
|
||||
}
|
||||
|
||||
void add_to_row_weight_sum(unsigned long ones_weight, composite_checksum_t *cksum)
|
||||
{
|
||||
// Add in LSW
|
||||
cksum->row_weight_sum.lowHalfLSW += (ones_weight & (unsigned long)0x0000FFFF);
|
||||
|
||||
// Check for overflow
|
||||
if(cksum->row_weight_sum.lowHalfLSW >= (unsigned long)0x0000FFFF)
|
||||
{
|
||||
cksum->row_weight_sum.lowHalfMSW += cksum->row_weight_sum.lowHalfLSW >> 16;
|
||||
cksum->row_weight_sum.lowHalfLSW &= (unsigned long)0x0000FFFF;
|
||||
}
|
||||
|
||||
if(cksum->row_weight_sum.lowHalfMSW >= (unsigned long)0x0000FFFF)
|
||||
{
|
||||
cksum->row_weight_sum.highHalfLSW += cksum->row_weight_sum.lowHalfMSW >> 16;
|
||||
cksum->row_weight_sum.lowHalfMSW &= (unsigned long)0x0000FFFF;
|
||||
}
|
||||
|
||||
if(cksum->row_weight_sum.highHalfLSW >= (unsigned long)0x0000FFFF)
|
||||
{
|
||||
cksum->row_weight_sum.highHalfMSW += cksum->row_weight_sum.lowHalfLSW >> 16;
|
||||
cksum->row_weight_sum.highHalfLSW &= (unsigned long)0x0000FFFF;
|
||||
}
|
||||
|
||||
// Add in MSW
|
||||
cksum->row_weight_sum.lowHalfMSW += (ones_weight >> 16);
|
||||
// Check for overflow
|
||||
if(cksum->row_weight_sum.lowHalfMSW >= (unsigned long)0x0000FFFF)
|
||||
{
|
||||
cksum->row_weight_sum.highHalfLSW += cksum->row_weight_sum.lowHalfMSW >> 16;
|
||||
cksum->row_weight_sum.lowHalfMSW &= (unsigned long)0x0000FFFF;
|
||||
}
|
||||
|
||||
if(cksum->row_weight_sum.highHalfLSW >= (unsigned long)0x0000FFFF)
|
||||
{
|
||||
cksum->row_weight_sum.highHalfMSW += cksum->row_weight_sum.lowHalfLSW >> 16;
|
||||
cksum->row_weight_sum.highHalfLSW &= (unsigned long)0x0000FFFF;
|
||||
}
|
||||
}
|
||||
|
||||
//returns ones weight of the bit just added - ones weight = 8*(bitweight-1)+bitcolumn.
|
||||
unsigned long add_to_bitcolumn_checksum(unsigned long bitcolumn, unsigned long bit_weight, composite_checksum_t *cksum)
|
||||
{
|
||||
// Add in LSW
|
||||
cksum->bit_column_cksum[bitcolumn][0] += (bit_weight & (unsigned long)0x0000FFFF);
|
||||
|
||||
// Check for overflow
|
||||
if(cksum->bit_column_cksum[bitcolumn][0] >= (unsigned long)0x0000FFFF)
|
||||
{
|
||||
cksum->bit_column_cksum[bitcolumn][1] += cksum->bit_column_cksum[bitcolumn][0] >> 16;
|
||||
cksum->bit_column_cksum[bitcolumn][0] &= (unsigned long)0x0000FFFF;
|
||||
}
|
||||
|
||||
if(cksum->bit_column_cksum[bitcolumn][1] >= (unsigned long)0x0000FFFF)
|
||||
{
|
||||
cksum->bit_column_cksum[bitcolumn][2] += cksum->bit_column_cksum[bitcolumn][1] >> 16;
|
||||
cksum->bit_column_cksum[bitcolumn][1] &= (unsigned long)0x0000FFFF;
|
||||
}
|
||||
|
||||
// Add in MSW
|
||||
cksum->bit_column_cksum[bitcolumn][1] += (bit_weight >> 16);
|
||||
// Check for overflow
|
||||
if(cksum->bit_column_cksum[bitcolumn][1] >= (unsigned long)0x0000FFFF)
|
||||
{
|
||||
cksum->bit_column_cksum[bitcolumn][2] += cksum->bit_column_cksum[bitcolumn][1] >> 16;
|
||||
cksum->bit_column_cksum[bitcolumn][1] &= (unsigned long)0x0000FFFF;
|
||||
}
|
||||
|
||||
return (unsigned long)(8*(bit_weight-1) + bitcolumn);
|
||||
}
|
||||
|
||||
unsigned long calculate_checksum(unsigned long start, unsigned long end, unsigned long offset, composite_checksum_t *cksum)
|
||||
{
|
||||
volatile unsigned short data = 0x0000;
|
||||
volatile unsigned short byte_value = 0;
|
||||
volatile unsigned short byte_count = 0;
|
||||
volatile unsigned long byte_offset = 0;
|
||||
volatile unsigned long ones_weight = 0;
|
||||
volatile unsigned long ones_fact_weight = 0;
|
||||
volatile unsigned long nibble_count = 0;
|
||||
volatile unsigned int nibble_offset = 0;
|
||||
|
||||
while(start <= end)
|
||||
{
|
||||
if(start & ~(0x3FFFFF)) //address beyond 22 bits
|
||||
{
|
||||
data = __addr32_read_uint16(start++);
|
||||
}
|
||||
else
|
||||
{
|
||||
data = *(volatile unsigned short *)start++; //pointer to a 16 bit value
|
||||
}
|
||||
//each offset has 2 bytes of data on C28x CPUs
|
||||
for(byte_count = 1; byte_count < 3; byte_count++)
|
||||
{
|
||||
byte_offset = byte_count+(offset);
|
||||
ones_fact_weight = 1;
|
||||
//get the byte from word
|
||||
byte_value = (data & (0xFF));
|
||||
data = (data >> 8);
|
||||
ones_weight = 0;
|
||||
//seperate the byte into two nibbles
|
||||
for(nibble_offset = 0; nibble_offset <= 4; nibble_offset+=4)
|
||||
{
|
||||
nibble_count++;
|
||||
if((byte_value & 0xF) == 0)
|
||||
{
|
||||
;
|
||||
}
|
||||
else if ((byte_value & 0xF) == 1)
|
||||
{
|
||||
cksum->total_ones += 1;
|
||||
ones_weight += add_to_bitcolumn_checksum(0+nibble_offset,byte_offset, cksum);
|
||||
ones_fact_weight = (nibble_count -1)*(nibble_count + 1);
|
||||
}
|
||||
else if ((byte_value & 0xF) == 2)
|
||||
{
|
||||
cksum->total_ones += 1;
|
||||
ones_weight += add_to_bitcolumn_checksum(1+nibble_offset,byte_offset, cksum);
|
||||
ones_fact_weight = (nibble_count -1)*(nibble_count + 2) ;
|
||||
}
|
||||
else if ((byte_value & 0xF) == 3)
|
||||
{
|
||||
cksum->total_ones += 2;
|
||||
ones_weight += add_to_bitcolumn_checksum(0+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(1+nibble_offset,byte_offset, cksum);
|
||||
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count + 1);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 2);
|
||||
}
|
||||
else if ((byte_value & 0xF) == 4)
|
||||
{
|
||||
cksum->total_ones += 1;
|
||||
ones_weight += add_to_bitcolumn_checksum(2+nibble_offset,byte_offset, cksum);
|
||||
|
||||
ones_fact_weight = (nibble_count -1)*(nibble_count + 3);
|
||||
|
||||
}
|
||||
else if ((byte_value & 0xF) == 5)
|
||||
{
|
||||
cksum->total_ones += 2;
|
||||
ones_weight += add_to_bitcolumn_checksum(0+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(2+nibble_offset,byte_offset, cksum);
|
||||
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count + 1);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 3);
|
||||
}
|
||||
else if ((byte_value & 0xF) == 6)
|
||||
{
|
||||
cksum->total_ones += 2;
|
||||
ones_weight += add_to_bitcolumn_checksum(1+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(2+nibble_offset,byte_offset, cksum);
|
||||
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count + 2);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 3);
|
||||
}
|
||||
else if ((byte_value & 0xF) == 7)
|
||||
{
|
||||
cksum->total_ones += 3;
|
||||
ones_weight += add_to_bitcolumn_checksum(0+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(1+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(2+nibble_offset,byte_offset, cksum);
|
||||
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count + 1);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 2);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 3);
|
||||
}
|
||||
else if ((byte_value & 0xF) == 8)
|
||||
{
|
||||
cksum->total_ones += 1;
|
||||
ones_weight += add_to_bitcolumn_checksum(3+nibble_offset,byte_offset, cksum);
|
||||
|
||||
ones_fact_weight = (nibble_count -1)*(nibble_count + 4);
|
||||
|
||||
}
|
||||
else if ((byte_value & 0xF) == 9)
|
||||
{
|
||||
cksum->total_ones += 2;
|
||||
ones_weight += add_to_bitcolumn_checksum(0+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(3+nibble_offset,byte_offset, cksum);
|
||||
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count + 1);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 4);
|
||||
}
|
||||
|
||||
else if ((byte_value & 0xF) == 10)
|
||||
{
|
||||
cksum->total_ones += 2;
|
||||
ones_weight += add_to_bitcolumn_checksum(1+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(3+nibble_offset,byte_offset, cksum);
|
||||
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count + 2);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 4);
|
||||
}
|
||||
else if ((byte_value & 0xF) == 11)
|
||||
{
|
||||
cksum->total_ones += 3;
|
||||
ones_weight += add_to_bitcolumn_checksum(0+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(1+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(3+nibble_offset,byte_offset, cksum);
|
||||
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count + 1);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 2);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 4);
|
||||
}
|
||||
else if ((byte_value & 0xF) == 12)
|
||||
{
|
||||
cksum->total_ones += 2;
|
||||
ones_weight += add_to_bitcolumn_checksum(2+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(3+nibble_offset,byte_offset, cksum);
|
||||
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count + 3);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 4);
|
||||
}
|
||||
else if ((byte_value & 0xF) == 13)
|
||||
{
|
||||
cksum->total_ones += 3;
|
||||
ones_weight += add_to_bitcolumn_checksum(0+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(2+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(3+nibble_offset,byte_offset, cksum);
|
||||
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count + 1);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 3);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 4);
|
||||
}
|
||||
else if ((byte_value & 0xF) == 14)
|
||||
{
|
||||
cksum->total_ones += 3;
|
||||
ones_weight += add_to_bitcolumn_checksum(1+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(2+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(3+nibble_offset,byte_offset, cksum);
|
||||
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count + 2);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 3);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 4);
|
||||
|
||||
}
|
||||
else if ((byte_value & 0xF) == 15)
|
||||
{
|
||||
cksum->total_ones += 4;
|
||||
ones_weight += add_to_bitcolumn_checksum(0+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(1+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(2+nibble_offset,byte_offset, cksum);
|
||||
ones_weight += add_to_bitcolumn_checksum(3+nibble_offset,byte_offset, cksum);
|
||||
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count + 1);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 2);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 3);
|
||||
ones_fact_weight = ones_fact_weight *(nibble_count%2 + 4);
|
||||
|
||||
}
|
||||
add_to_factorial_sum(ones_fact_weight, cksum);
|
||||
ones_fact_weight = 1;
|
||||
//get the next nibble from byte
|
||||
byte_value = byte_value >> 4;
|
||||
}//for loop on nibble.
|
||||
add_to_row_weight_sum(ones_weight, cksum);
|
||||
} // for loop on bytes in word.
|
||||
offset++;
|
||||
}//while
|
||||
return offset;
|
||||
}
|
||||
|
||||
unsigned short compare_two_composite_checksums(const composite_checksum_t *goldsum, composite_checksum_t *compsum)
|
||||
{
|
||||
|
||||
if((goldsum == (void *)0) || (compsum == (void *)0))
|
||||
return 0xFFFF;
|
||||
|
||||
if(goldsum->total_ones != compsum->total_ones )
|
||||
return 0xFFFE;
|
||||
|
||||
if((goldsum->fact_weight_sum.highHalfMSW != compsum->fact_weight_sum.highHalfMSW )
|
||||
|| (goldsum->fact_weight_sum.highHalfLSW != compsum->fact_weight_sum.highHalfLSW )
|
||||
|| (goldsum->fact_weight_sum.lowHalfMSW != compsum->fact_weight_sum.lowHalfMSW )
|
||||
|| (goldsum->fact_weight_sum.lowHalfLSW != compsum->fact_weight_sum.lowHalfLSW ))
|
||||
{
|
||||
return 0xFFFD;
|
||||
}
|
||||
|
||||
if((goldsum->row_weight_sum.highHalfMSW != compsum->row_weight_sum.highHalfMSW )
|
||||
|| (goldsum->row_weight_sum.highHalfLSW != compsum->row_weight_sum.highHalfLSW)
|
||||
|| (goldsum->row_weight_sum.lowHalfMSW != compsum->row_weight_sum.lowHalfMSW)
|
||||
|| (goldsum->row_weight_sum.lowHalfLSW != compsum->row_weight_sum.lowHalfLSW))
|
||||
{
|
||||
return 0xFFFC;
|
||||
}
|
||||
|
||||
if((goldsum->bit_column_cksum[7][2] != compsum->bit_column_cksum[7][2])
|
||||
|| (goldsum->bit_column_cksum[7][1] != compsum->bit_column_cksum[7][1])
|
||||
|| (goldsum->bit_column_cksum[7][0] != compsum->bit_column_cksum[7][0]))
|
||||
{
|
||||
return 0xFFFB;
|
||||
}
|
||||
|
||||
if((goldsum->bit_column_cksum[6][2] != compsum->bit_column_cksum[6][2])
|
||||
|| (goldsum->bit_column_cksum[6][1] != compsum->bit_column_cksum[6][1])
|
||||
|| (goldsum->bit_column_cksum[6][0] != compsum->bit_column_cksum[6][0]))
|
||||
{
|
||||
return 0xFFFA;
|
||||
}
|
||||
|
||||
if((goldsum->bit_column_cksum[5][2] != compsum->bit_column_cksum[5][2])
|
||||
|| (goldsum->bit_column_cksum[5][1] != compsum->bit_column_cksum[5][1])
|
||||
|| (goldsum->bit_column_cksum[5][0] != compsum->bit_column_cksum[5][0]))
|
||||
{
|
||||
return 0xFFF9;
|
||||
}
|
||||
|
||||
if((goldsum->bit_column_cksum[4][2] != compsum->bit_column_cksum[4][2])
|
||||
|| (goldsum->bit_column_cksum[4][1] != compsum->bit_column_cksum[4][1])
|
||||
|| (goldsum->bit_column_cksum[4][0] != compsum->bit_column_cksum[4][0]))
|
||||
{
|
||||
return 0xFFF8;
|
||||
}
|
||||
|
||||
if((goldsum->bit_column_cksum[3][2] != compsum->bit_column_cksum[3][2])
|
||||
|| (goldsum->bit_column_cksum[3][1] != compsum->bit_column_cksum[3][1])
|
||||
|| (goldsum->bit_column_cksum[3][0] != compsum->bit_column_cksum[3][0]))
|
||||
{
|
||||
return 0xFFF7;
|
||||
}
|
||||
|
||||
if((goldsum->bit_column_cksum[2][2] != compsum->bit_column_cksum[2][2])
|
||||
|| (goldsum->bit_column_cksum[2][1] != compsum->bit_column_cksum[2][1])
|
||||
|| (goldsum->bit_column_cksum[2][0] != compsum->bit_column_cksum[2][0]))
|
||||
{
|
||||
return 0xFFF6;
|
||||
}
|
||||
|
||||
if((goldsum->bit_column_cksum[1][2] != compsum->bit_column_cksum[1][2])
|
||||
|| (goldsum->bit_column_cksum[1][1] != compsum->bit_column_cksum[1][1])
|
||||
|| (goldsum->bit_column_cksum[1][0] != compsum->bit_column_cksum[1][0]))
|
||||
{
|
||||
return 0xFFF5;
|
||||
}
|
||||
|
||||
if((goldsum->bit_column_cksum[0][2] != compsum->bit_column_cksum[0][2])
|
||||
|| (goldsum->bit_column_cksum[0][1] != compsum->bit_column_cksum[0][1])
|
||||
|| (goldsum->bit_column_cksum[0][0] != compsum->bit_column_cksum[0][0]))
|
||||
{
|
||||
return 0xFFF4;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
unsigned short verify_checksum_onROM()
|
||||
{
|
||||
composite_checksum_t rom_cksum;
|
||||
memblock mblock_rom[6];
|
||||
volatile unsigned long *test_signature;
|
||||
volatile unsigned long *alt_test_signature;
|
||||
|
||||
sysctl_wdog_disable();
|
||||
|
||||
mblock_rom[0].firstAddr = 0x003F8002;
|
||||
mblock_rom[0].lastAddr = 0x003fe6b1;
|
||||
mblock_rom[0].mem_attribute = 1; //data is present
|
||||
|
||||
mblock_rom[1].firstAddr = 0x003fe6b2;
|
||||
mblock_rom[1].lastAddr = 0X003fff39;
|
||||
mblock_rom[1].mem_attribute = 0; //data is NOT present
|
||||
|
||||
mblock_rom[2].firstAddr = 0x003fff3a;
|
||||
mblock_rom[2].lastAddr = 0x003fff7b;
|
||||
mblock_rom[2].mem_attribute = 1; //data is present
|
||||
|
||||
// .CKSUMLOC
|
||||
// * 0 003fff7c 00000042
|
||||
// 003fff7c 00000042 c1brom_checksum.obj (.CKSUMLOC)
|
||||
|
||||
mblock_rom[3].firstAddr = 0x003fffbe;
|
||||
mblock_rom[3].lastAddr = 0x003fffFF;
|
||||
mblock_rom[3].mem_attribute = 1; //data is present
|
||||
|
||||
mblock_rom[4].firstAddr = 0x01001000;
|
||||
mblock_rom[4].lastAddr = 0x0100186F;
|
||||
mblock_rom[4].mem_attribute = 0; //data is NOT present
|
||||
|
||||
mblock_rom[5].firstAddr = 0x01001870;
|
||||
mblock_rom[5].lastAddr = 0x01001FFF;
|
||||
mblock_rom[5].mem_attribute = 1; //data is present
|
||||
|
||||
test_signature = (volatile unsigned long *)0x3f8000;
|
||||
alt_test_signature = (volatile unsigned long *)0x3ffffe;
|
||||
|
||||
//first check if all the data and address lines mapped to ROM are functional
|
||||
if (*(test_signature) != ~(*(alt_test_signature)))
|
||||
return 0xFFF3;
|
||||
|
||||
if ( 0xFFFF == calculate_composite_checksum_on_rom(&rom_cksum, &mblock_rom[0], 6))
|
||||
return 0xFFF2;
|
||||
|
||||
return compare_two_composite_checksums(&csum_rom, &rom_cksum);
|
||||
}
|
||||
|
||||
// EOF --------
|
||||
#endif //no stable compiler available
|
||||
+47
@@ -0,0 +1,47 @@
|
||||
;; TI File $Revision: /main/1 $
|
||||
;; Checkin $Date: August 13, 2012 11:53:45 $
|
||||
;;###########################################################################
|
||||
;;
|
||||
;; FILE: cbrom_utility_functions.asm
|
||||
;;
|
||||
;; TITLE: Boot Rom C callable assembly utility functions.
|
||||
;;
|
||||
;; Functions:
|
||||
;;
|
||||
;;
|
||||
;; Notes:
|
||||
;;
|
||||
;;###########################################################################
|
||||
;; $TI Release: F2837x Boot ROM Version 0 $
|
||||
;; $Release Date: Oct 1, 2013 $
|
||||
;;###########################################################################
|
||||
;; READ ME --- READ ME --- READ ME ---- READ ME
|
||||
;; NOTE:- The code in this file is compiler version dependent
|
||||
;; PAY ATTENTION when COMPILER version CHANGES - ****************************
|
||||
|
||||
.global _branch_to_entryaddress
|
||||
.global _load_itrap_address
|
||||
|
||||
; C-calling convention: branch_to_entryaddress (unsigned long *entryaddress)
|
||||
; Parameter is stored in XAR4
|
||||
; Function moves the Entry Address into the ISR return from address on the stack
|
||||
|
||||
_branch_to_entryaddress:
|
||||
|
||||
MOVL ACC, *XAR4 ; load ACC with the desired branch address
|
||||
MOVL *-SP[30], ACC ; move branch address to isr return address on stack
|
||||
LRETR
|
||||
|
||||
; C-calling convention: load_itrap_address (unsigned long *itrapaddress)
|
||||
; Parameter is stored in XAR4
|
||||
; Function loads the address where the ITRAP occurred stored from the stack and
|
||||
; into the address pointed to by the itrapaddress pointer.
|
||||
; The stack location where the ITRAP return address is stored on the stack will change
|
||||
; according to compiler optimizations, The below value is without any optimizations -
|
||||
; if the code uses optimizations please re-check the below value
|
||||
;
|
||||
|
||||
_load_itrap_address:
|
||||
MOVL ACC, *-SP[34]; ; load ITRAP address location on stack into ACC
|
||||
MOVL *XAR4, ACC ; return ITRAP address back to calling function
|
||||
LRETR
|
||||
+851
@@ -0,0 +1,851 @@
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 13, 2012 11:53:47 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: ccore_bootrom_interrupts.c
|
||||
//
|
||||
// TITLE: B.C28x Boot ROM interrupt handlers
|
||||
//
|
||||
// Functions:
|
||||
//
|
||||
// Notes:
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F2837x Boot ROM Version 0 $
|
||||
// $Release Date: Oct 1, 2013 $
|
||||
//###########################################################################
|
||||
|
||||
#include "c2_bootrom.h"
|
||||
|
||||
void c2brom_init_pie_control(void);
|
||||
void c2brom_init_pie_vect_table(void);
|
||||
|
||||
void branch_to_entryaddress(Uint32 *entryaddress);
|
||||
void load_itrap_address (Uint32 *itrapaddress);
|
||||
|
||||
interrupt void c2brom_itrap_isr(void);
|
||||
interrupt void c2brom_c1c2_ipc_int1_isr(void);
|
||||
interrupt void c2brom_handle_nmi();
|
||||
void c2brom_pie_vect_mismatch_handler();
|
||||
void c2brom_handle_nmi_for_pie_mismatch();
|
||||
|
||||
extern Uint32 I2C_Boot(void);
|
||||
extern Uint32 SCI_Boot();
|
||||
extern Uint32 SPI_Boot();
|
||||
extern Uint32 SPI_Alternate_IO_Boot();
|
||||
extern Uint32 Parallel_Boot();
|
||||
|
||||
|
||||
|
||||
extern cur_c1c2_ipc_cmd_sts_t c2brom_current_c1c2_ipc;
|
||||
extern Uint32 c2brom_status;
|
||||
|
||||
volatile Uint16 c2brom_nmi_status;
|
||||
Uint32 iTrap_addr;
|
||||
Uint32 c1c2_branch_addr;
|
||||
|
||||
/*
|
||||
* Function to handle unsupported PIE interrupts in C-BootROM
|
||||
*/
|
||||
interrupt void c2brom_pie_isr_not_supported()
|
||||
{
|
||||
Uint16 interrupt_num = 0;
|
||||
Uint16 address_offset = 0;
|
||||
|
||||
//PIEVECT of PIECTRL register stores the vector address from the PIE vector table from which the vector was fetched.
|
||||
// (the vector address - base address of PIE vector table)/2 gives the interrupt vector ID
|
||||
address_offset = ((PieCtrlRegs.PIECTRL.all) & (0x00000000FE));
|
||||
interrupt_num = (address_offset >> 1);
|
||||
|
||||
c2brom_send_ipc_to_c1(C2_BOOTROM_IPC_CTOM_PIE_INTERRUPT_NOT_SUPPORTED, 0, interrupt_num);
|
||||
|
||||
/*acknowledge the interrupt; don't have to ACK interrupt nos less than 32, its done automatically by interrupt return*/
|
||||
if(interrupt_num >= 32)
|
||||
{
|
||||
/*for PIE multiplexed interrupts INT1 to INT12*/
|
||||
PieCtrlRegs.PIEACK.all |= (0x01 << ((address_offset >> 4) - 4));
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
void c2brom_handle_nmi_for_pie_mismatch()
|
||||
{
|
||||
uint32_t EntryAddr;
|
||||
|
||||
/*check if NMI is triggered*/
|
||||
c2brom_nmi_status = NmiIntruptRegs.NMIFLG.all;
|
||||
|
||||
EntryAddr = TI_OTP_C2BROM_ESCAPE_POINT_11;
|
||||
|
||||
if((EntryAddr != 0xFFFFFFFF) &&
|
||||
(EntryAddr != 0x00000000))
|
||||
{
|
||||
/*do a dummy branch to OTP - if we later decide not to handler this the way done below*/
|
||||
/*if OTP is programmed, then call OTP function*/
|
||||
((void (*)(void))EntryAddr)();
|
||||
}
|
||||
|
||||
do
|
||||
{
|
||||
if(c2brom_nmi_status & NMI_INT_CLOCKFAIL) /*check for CLOCKFAIL_NMI*/
|
||||
{
|
||||
c2brom_status |= C2_BOOTROM_GOT_A_MCLK_NMI;
|
||||
c2brom_set_c2c1_boot_status(0);
|
||||
c2brom_nmi_status &= ~(NMI_INT_CLOCKFAIL); /*clear bit 1*/
|
||||
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.CLOCKFAIL = 1;
|
||||
EDIS;
|
||||
|
||||
}
|
||||
if(c2brom_nmi_status & NMI_INT_RAMUNCERR) /*check for C28RAMUNCERR NMI */
|
||||
{
|
||||
c2brom_status |= C2_BOOTROM_GOT_A_RAM_UNCERR_NMI;
|
||||
c2brom_send_ipc_to_c1(C2_BOOTROM_IPC_CTOM_CONTROL_SYSTEM_IN_RAMUNCERR, 0, 0);
|
||||
c2brom_nmi_status &= ~(NMI_INT_RAMUNCERR); /*clear bit 2*/
|
||||
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.RAMUNCERR = 1;
|
||||
EDIS;
|
||||
}
|
||||
if(c2brom_nmi_status & NMI_INT_FLUNCERR) /*check for C28FLUNCERR NMI */
|
||||
{
|
||||
c2brom_status |= C2_BOOTROM_GOT_A_FLASH_UNCERR_NMI;
|
||||
c2brom_send_ipc_to_c1(C2_BOOTROM_IPC_CTOM_CONTROL_SYSTEM_IN_FLUNCERR, 0, 0);
|
||||
c2brom_nmi_status &= ~(NMI_INT_FLUNCERR); /*clear bit 3*/
|
||||
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.FLUNCERR = 1;
|
||||
EDIS;
|
||||
}
|
||||
|
||||
if(c2brom_nmi_status & NMI_INT_CPU1HWBISTERR) /*check for M3BISTERR NMI */
|
||||
{
|
||||
c2brom_status |= C2_BOOTROM_GOT_A_C1BISTERR_NMI;
|
||||
c2brom_nmi_status &= ~(NMI_INT_CPU1HWBISTERR); /*clear bit 4*/
|
||||
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.CPU1HWBISTERR = 1;
|
||||
EDIS;
|
||||
}
|
||||
|
||||
if(c2brom_nmi_status & NMI_INT_CPU2HWBISTERR) /*check for C28BISTERR NMI */
|
||||
{
|
||||
c2brom_status |= C2_BOOTROM_GOT_A_C2BISTERR_NMI;
|
||||
c2brom_nmi_status &= ~(NMI_INT_CPU2HWBISTERR); /*clear bit 5*/
|
||||
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.CPU2HWBISTERR = 1;
|
||||
EDIS;
|
||||
|
||||
}
|
||||
if(c2brom_nmi_status & NMI_INT_PIEVECTERR) /*check for PIEVECT NMI */
|
||||
{
|
||||
c2brom_status |= C2_BOOTROM_GOT_A_PIEVECTERR_NMI;
|
||||
|
||||
c2brom_nmi_status &= ~(NMI_INT_PIEVECTERR); /*clear bit 6*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.PIEVECTERR = 1;
|
||||
EDIS;
|
||||
}
|
||||
if(c2brom_nmi_status & NMI_INT_SYSDBG) /*check for PIEVECT NMI */
|
||||
{
|
||||
c2brom_status |= C2_BOOTROM_GOT_A_SYSDBG_NMI;
|
||||
|
||||
c2brom_nmi_status &= ~(NMI_INT_SYSDBG); /*clear bit 6*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.SYSDBGNMI = 1;
|
||||
EDIS;
|
||||
}
|
||||
if(c2brom_nmi_status & NMI_INT_RL) /*check for PIEVECT NMI */
|
||||
{
|
||||
c2brom_status |= C2_BOOTROM_GOT_A_RL_NMI;
|
||||
|
||||
c2brom_nmi_status &= ~(NMI_INT_RL); /*clear bit 6*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.RLNMI = 1;
|
||||
EDIS;
|
||||
}
|
||||
if(c2brom_nmi_status & NMI_INT_OVF) /*check for PIEVECT NMI */
|
||||
{
|
||||
c2brom_status |= C2_BOOTROM_GOT_A_OVF_NMI;
|
||||
|
||||
c2brom_nmi_status &= ~(NMI_INT_OVF); /*clear bit 6*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.OVF = 1;
|
||||
EDIS;
|
||||
}
|
||||
|
||||
c2brom_nmi_status &= ~(0x01); /*clear bit 0*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.NMIINT = 1;
|
||||
EDIS;
|
||||
|
||||
c2brom_set_c2c1_boot_status(0);
|
||||
|
||||
c2brom_nmi_status = NmiIntruptRegs.NMIFLG.all;
|
||||
|
||||
}while(c2brom_nmi_status & 0x01); /*check for NMIINT bit - bit 0*/
|
||||
|
||||
return;
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
* Function to handle PIE vector mismatch handler in C-BootROM
|
||||
*/
|
||||
interrupt void c2brom_pie_vect_mismatch_handler()
|
||||
{
|
||||
|
||||
uint32_t EntryAddr = 0xFFFFFFFF;
|
||||
|
||||
c2brom_status |= C2_BOOTROM_GOT_A_PIEMISMATCH;
|
||||
c2brom_set_c2c1_boot_status(0);
|
||||
|
||||
EALLOW;
|
||||
EntryAddr = (CpuSysRegs.PIEVERRADDR.all);
|
||||
EDIS;
|
||||
|
||||
if((EntryAddr != (uint32_t)0x003FFFFF))
|
||||
{
|
||||
((void (*)(void))EntryAddr)();
|
||||
}
|
||||
else
|
||||
{
|
||||
//No need to send this as the other core has already got the NMI
|
||||
//c2brom_send_ipc_to_master(C_BOOTROM_IPC_CTOM_PIE_VECTOR_ADDRESS_MISMATCH, 0, 0);
|
||||
|
||||
c2brom_handle_nmi_for_pie_mismatch();
|
||||
|
||||
while(1);
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
|
||||
//c- callable function
|
||||
void c2brom_handle_nmi_at_start()
|
||||
{
|
||||
uint32_t EntryAddr;
|
||||
|
||||
EntryAddr = TI_OTP_C2BROM_ESCAPE_POINT_12;
|
||||
|
||||
if((EntryAddr != 0xFFFFFFFF) &&
|
||||
(EntryAddr != 0x00000000))
|
||||
{
|
||||
/*do a dummy branch to OTP - if we later decide not to handler this the way done below*/
|
||||
/*if OTP is programmed, then call OTP function*/
|
||||
((void (*)(void))EntryAddr)();
|
||||
}
|
||||
|
||||
/*check if NMI is triggered*/
|
||||
c2brom_nmi_status = NmiIntruptRegs.NMIFLG.all;
|
||||
do
|
||||
{
|
||||
if(c2brom_nmi_status & NMI_INT_CLOCKFAIL) /*check for CLOCKFAIL_NMI*/
|
||||
{
|
||||
c2brom_status |= C2_BOOTROM_GOT_A_MCLK_NMI;
|
||||
c2brom_set_c2c1_boot_status(0);
|
||||
c2brom_nmi_status &= ~(NMI_INT_CLOCKFAIL); /*clear bit 1*/
|
||||
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.CLOCKFAIL = 1;
|
||||
EDIS;
|
||||
|
||||
c2brom_nmi_status = NmiIntruptRegs.NMIFLG.all;
|
||||
|
||||
/*continue to run*/
|
||||
if((c2brom_nmi_status) == NMI_INT_FLG)
|
||||
{
|
||||
c2brom_nmi_status &= ~(NMI_INT_FLG); /*clear bit 0*/
|
||||
/* clear the NMIINT flag and return because there is no other NMI set*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.NMIINT = 1;
|
||||
EDIS;
|
||||
|
||||
return;
|
||||
}
|
||||
}
|
||||
if(c2brom_nmi_status & NMI_INT_RAMUNCERR) /*check for C28RAMUNCERR NMI */
|
||||
{
|
||||
c2brom_status |= C2_BOOTROM_GOT_A_RAM_UNCERR_NMI;
|
||||
c2brom_send_ipc_to_c1(C2_BOOTROM_IPC_CTOM_CONTROL_SYSTEM_IN_RAMUNCERR, 0, 0);
|
||||
c2brom_nmi_status &= ~(NMI_INT_RAMUNCERR); /*clear bit 2*/
|
||||
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.RAMUNCERR = 1;
|
||||
EDIS;
|
||||
}
|
||||
if(c2brom_nmi_status & NMI_INT_FLUNCERR) /*check for C28FLUNCERR NMI */
|
||||
{
|
||||
c2brom_status |= C2_BOOTROM_GOT_A_FLASH_UNCERR_NMI;
|
||||
c2brom_send_ipc_to_c1(C2_BOOTROM_IPC_CTOM_CONTROL_SYSTEM_IN_FLUNCERR, 0, 0);
|
||||
c2brom_nmi_status &= ~(NMI_INT_FLUNCERR); /*clear bit 3*/
|
||||
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.FLUNCERR = 1;
|
||||
EDIS;
|
||||
}
|
||||
|
||||
if(c2brom_nmi_status & NMI_INT_CPU1HWBISTERR) /*check for M3BISTERR NMI */
|
||||
{
|
||||
c2brom_status |= C2_BOOTROM_GOT_A_C1BISTERR_NMI;
|
||||
c2brom_nmi_status &= ~(NMI_INT_CPU1HWBISTERR); /*clear bit 4*/
|
||||
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.CPU1HWBISTERR = 1;
|
||||
EDIS;
|
||||
}
|
||||
|
||||
if(c2brom_nmi_status & NMI_INT_CPU2HWBISTERR) /*check for C28BISTERR NMI */
|
||||
{
|
||||
c2brom_status |= C2_BOOTROM_GOT_A_C2BISTERR_NMI;
|
||||
c2brom_nmi_status &= ~(NMI_INT_CPU2HWBISTERR); /*clear bit 5*/
|
||||
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.CPU2HWBISTERR = 1;
|
||||
EDIS;
|
||||
|
||||
}
|
||||
if(c2brom_nmi_status & NMI_INT_PIEVECTERR) /*check for PIEVECT NMI */
|
||||
{
|
||||
c2brom_status |= C2_BOOTROM_GOT_A_PIEVECTERR_NMI;
|
||||
|
||||
c2brom_nmi_status &= ~(NMI_INT_PIEVECTERR); /*clear bit 6*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.PIEVECTERR = 1;
|
||||
EDIS;
|
||||
}
|
||||
if(c2brom_nmi_status & NMI_INT_SYSDBG) /*check for PIEVECT NMI */
|
||||
{
|
||||
c2brom_status |= C2_BOOTROM_GOT_A_SYSDBG_NMI;
|
||||
|
||||
c2brom_nmi_status &= ~(NMI_INT_SYSDBG); /*clear bit 6*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.SYSDBGNMI = 1;
|
||||
EDIS;
|
||||
}
|
||||
if(c2brom_nmi_status & NMI_INT_RL) /*check for PIEVECT NMI */
|
||||
{
|
||||
c2brom_status |= C2_BOOTROM_GOT_A_RL_NMI;
|
||||
|
||||
c2brom_nmi_status &= ~(NMI_INT_RL); /*clear bit 6*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.RLNMI = 1;
|
||||
EDIS;
|
||||
}
|
||||
if(c2brom_nmi_status & NMI_INT_OVF) /*check for PIEVECT NMI */
|
||||
{
|
||||
c2brom_status |= C2_BOOTROM_GOT_A_OVF_NMI;
|
||||
|
||||
c2brom_nmi_status &= ~(NMI_INT_OVF); /*clear bit 6*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.OVF = 1;
|
||||
EDIS;
|
||||
}
|
||||
|
||||
|
||||
c2brom_nmi_status &= ~(0x01); /*clear bit 0*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.NMIINT = 1;
|
||||
EDIS;
|
||||
|
||||
c2brom_set_c2c1_boot_status(0);
|
||||
|
||||
c2brom_nmi_status = NmiIntruptRegs.NMIFLG.all;
|
||||
|
||||
}while(c2brom_nmi_status & 0x01); /*check for NMIINT bit - bit 0*/
|
||||
// while(1);
|
||||
}
|
||||
/*
|
||||
* Function to handle NMI interrupts in C-BootROM
|
||||
*/
|
||||
interrupt void c2brom_handle_nmi()
|
||||
{
|
||||
uint32_t EntryAddr;
|
||||
|
||||
EntryAddr = TI_OTP_C2BROM_ESCAPE_POINT_12;
|
||||
|
||||
if((EntryAddr != 0xFFFFFFFF) &&
|
||||
(EntryAddr != 0x00000000))
|
||||
{
|
||||
/*do a dummy branch to OTP - if we later decide not to handler this the way done below*/
|
||||
/*if OTP is programmed, then call OTP function*/
|
||||
((void (*)(void))EntryAddr)();
|
||||
}
|
||||
|
||||
/*check if NMI is triggered*/
|
||||
c2brom_nmi_status = NmiIntruptRegs.NMIFLG.all;
|
||||
do
|
||||
{
|
||||
if(c2brom_nmi_status & NMI_INT_CLOCKFAIL) /*check for CLOCKFAIL_NMI*/
|
||||
{
|
||||
c2brom_status |= C2_BOOTROM_GOT_A_MCLK_NMI;
|
||||
c2brom_set_c2c1_boot_status(0);
|
||||
c2brom_nmi_status &= ~(NMI_INT_CLOCKFAIL); /*clear bit 1*/
|
||||
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.CLOCKFAIL = 1;
|
||||
EDIS;
|
||||
|
||||
c2brom_nmi_status = NmiIntruptRegs.NMIFLG.all;
|
||||
|
||||
/*continue to run*/
|
||||
if((c2brom_nmi_status) == NMI_INT_FLG)
|
||||
{
|
||||
c2brom_nmi_status &= ~(NMI_INT_FLG); /*clear bit 0*/
|
||||
/* clear the NMIINT flag and return because there is no other NMI set*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.NMIINT = 1;
|
||||
EDIS;
|
||||
|
||||
return;
|
||||
}
|
||||
}
|
||||
if(c2brom_nmi_status & NMI_INT_RAMUNCERR) /*check for C28RAMUNCERR NMI */
|
||||
{
|
||||
c2brom_status |= C2_BOOTROM_GOT_A_RAM_UNCERR_NMI;
|
||||
c2brom_send_ipc_to_c1(C2_BOOTROM_IPC_CTOM_CONTROL_SYSTEM_IN_RAMUNCERR, 0, 0);
|
||||
c2brom_nmi_status &= ~(NMI_INT_RAMUNCERR); /*clear bit 2*/
|
||||
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.RAMUNCERR = 1;
|
||||
EDIS;
|
||||
}
|
||||
if(c2brom_nmi_status & NMI_INT_FLUNCERR) /*check for C28FLUNCERR NMI */
|
||||
{
|
||||
c2brom_status |= C2_BOOTROM_GOT_A_FLASH_UNCERR_NMI;
|
||||
c2brom_send_ipc_to_c1(C2_BOOTROM_IPC_CTOM_CONTROL_SYSTEM_IN_FLUNCERR, 0, 0);
|
||||
c2brom_nmi_status &= ~(NMI_INT_FLUNCERR); /*clear bit 3*/
|
||||
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.FLUNCERR = 1;
|
||||
EDIS;
|
||||
}
|
||||
|
||||
if(c2brom_nmi_status & NMI_INT_CPU1HWBISTERR) /*check for M3BISTERR NMI */
|
||||
{
|
||||
c2brom_status |= C2_BOOTROM_GOT_A_C1BISTERR_NMI;
|
||||
c2brom_nmi_status &= ~(NMI_INT_CPU1HWBISTERR); /*clear bit 4*/
|
||||
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.CPU1HWBISTERR = 1;
|
||||
EDIS;
|
||||
}
|
||||
|
||||
if(c2brom_nmi_status & NMI_INT_CPU2HWBISTERR) /*check for C28BISTERR NMI */
|
||||
{
|
||||
c2brom_status |= C2_BOOTROM_GOT_A_C2BISTERR_NMI;
|
||||
c2brom_nmi_status &= ~(NMI_INT_CPU2HWBISTERR); /*clear bit 5*/
|
||||
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.CPU2HWBISTERR = 1;
|
||||
EDIS;
|
||||
|
||||
}
|
||||
if(c2brom_nmi_status & NMI_INT_PIEVECTERR) /*check for PIEVECT NMI */
|
||||
{
|
||||
c2brom_status |= C2_BOOTROM_GOT_A_PIEVECTERR_NMI;
|
||||
|
||||
c2brom_nmi_status &= ~(NMI_INT_PIEVECTERR); /*clear bit 6*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.PIEVECTERR = 1;
|
||||
EDIS;
|
||||
}
|
||||
if(c2brom_nmi_status & NMI_INT_SYSDBG) /*check for PIEVECT NMI */
|
||||
{
|
||||
c2brom_status |= C2_BOOTROM_GOT_A_SYSDBG_NMI;
|
||||
|
||||
c2brom_nmi_status &= ~(NMI_INT_SYSDBG); /*clear bit 6*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.SYSDBGNMI = 1;
|
||||
EDIS;
|
||||
}
|
||||
if(c2brom_nmi_status & NMI_INT_RL) /*check for PIEVECT NMI */
|
||||
{
|
||||
c2brom_status |= C2_BOOTROM_GOT_A_RL_NMI;
|
||||
|
||||
c2brom_nmi_status &= ~(NMI_INT_RL); /*clear bit 6*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.RLNMI = 1;
|
||||
EDIS;
|
||||
}
|
||||
if(c2brom_nmi_status & NMI_INT_OVF) /*check for PIEVECT NMI */
|
||||
{
|
||||
c2brom_status |= C2_BOOTROM_GOT_A_OVF_NMI;
|
||||
|
||||
c2brom_nmi_status &= ~(NMI_INT_OVF); /*clear bit 6*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.OVF = 1;
|
||||
EDIS;
|
||||
}
|
||||
|
||||
|
||||
c2brom_nmi_status &= ~(0x01); /*clear bit 0*/
|
||||
EALLOW;
|
||||
NmiIntruptRegs.NMIFLGCLR.bit.NMIINT = 1;
|
||||
EDIS;
|
||||
|
||||
c2brom_set_c2c1_boot_status(0);
|
||||
|
||||
c2brom_nmi_status = NmiIntruptRegs.NMIFLG.all;
|
||||
|
||||
}while(c2brom_nmi_status & 0x01); /*check for NMIINT bit - bit 0*/
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*
|
||||
* Function called whenever an illegal interrupt occurs on B.C28X CPU
|
||||
*/
|
||||
interrupt void c2brom_itrap_isr(void)
|
||||
{
|
||||
|
||||
/*set boot status to indicate that B.C28X CPU is in iTRAP ISR, only a reset can pull it out of this*/
|
||||
c2brom_status |= C2_BOOTROM_IN_AN_ITRAP;
|
||||
|
||||
/*check if RAM is accessible at this point,
|
||||
* so read back the prev. value that was written
|
||||
*/
|
||||
if((c2brom_status & C2_BOOTROM_IN_AN_ITRAP) == 0x0)
|
||||
{
|
||||
//if RAM is not accessible then don;t do any function calls.
|
||||
//just send IPC to Master and enter while(1) loop
|
||||
|
||||
//wait until master finishes up with current IPC, if any.
|
||||
while(IpcRegs.IPCFLG.bit.IPC0);
|
||||
|
||||
IpcRegs.IPCSENDCOM = C2_BOOTROM_IPC_CTOM_CONTROL_SYSTEM_IN_ITRAP;
|
||||
IpcRegs.IPCSENDADDR = 0xFFFFFFFF;
|
||||
IpcRegs.IPCSENDDATA = 0xFFFFFFFF;
|
||||
IpcRegs.IPCSET.all = 0x80000001; //set bit 31 and bit 0
|
||||
|
||||
while(1);
|
||||
}
|
||||
/*if here then RAM is still accessible so provide enough debug info*/
|
||||
|
||||
c2brom_set_c2c1_boot_status(0);
|
||||
|
||||
/*accessing the glob var locally -sets DP pointer for the below inline ASMs*/
|
||||
iTrap_addr = 0xFFFFFFFF;
|
||||
|
||||
/*get the iTrap address (return address from interrupt) stored in stack
|
||||
* This particular return address stored in stack will change according to
|
||||
* compiler optimizations,
|
||||
*/
|
||||
load_itrap_address (&iTrap_addr);
|
||||
|
||||
/*return address from interrupt will be PC location where illegal instruction is executed + 1*/
|
||||
iTrap_addr -= 1;
|
||||
|
||||
/*send IPC to master system with iTrap address in ADDR register*/
|
||||
c2brom_send_ipc_to_c1(C2_BOOTROM_IPC_CTOM_CONTROL_SYSTEM_IN_ITRAP, iTrap_addr, 0);
|
||||
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*C122IPCINT1_isr()
|
||||
*
|
||||
* interrupt handler which handles all IPC commands from master system
|
||||
*
|
||||
*/
|
||||
|
||||
interrupt void c2brom_c1c2_ipc_int1_isr(void)
|
||||
{
|
||||
|
||||
/*check if IPC flags are set properly*/
|
||||
if(0 == C2BROM_CHECK_C1C2_IPC_COMMAND_FLAGS_SET)
|
||||
{
|
||||
/*if both IPC1 and IPC32 flags are not set then return NAK*/
|
||||
C2BROM_C1C2_IPC_COMMAND_NAK(c2brom_status | C2_BOOTROM_NAK_STATUS_CMD_NOT_SET_PROPERLY);
|
||||
|
||||
/*ACK PIE interrupt and return*/
|
||||
C2BROM_C1C2_IPC_INT1_ACK;
|
||||
return;
|
||||
}
|
||||
|
||||
/*see if C-BootROM is already busy processing another MTOCIPC command*/
|
||||
if((c2brom_current_c1c2_ipc.status != COMMAND_STATUS_INVALID) ||
|
||||
(c2brom_current_c1c2_ipc.command != C1C2_BROM_IPC_COMMAND_ILLEGAL))
|
||||
{
|
||||
//return NAK if busy
|
||||
C2BROM_C1C2_IPC_COMMAND_NAK(c2brom_status | C2_BOOTROM_NAK_STATUS_ALREADY_BUSY_WITH_YOUR_CMD);
|
||||
C2BROM_C1C2_IPC_INT1_ACK;
|
||||
return;
|
||||
}
|
||||
|
||||
//not busy, then get busy with current command
|
||||
c2brom_current_c1c2_ipc.command = IpcRegs.IPCRECVCOM;
|
||||
c2brom_current_c1c2_ipc.status = COMMAND_PENDING;
|
||||
|
||||
|
||||
/*boundary checks*/
|
||||
if((c2brom_current_c1c2_ipc.command == C1C2_BROM_IPC_COMMAND_ILLEGAL) ||
|
||||
(c2brom_current_c1c2_ipc.command >= C1C2_BROM_IPC_MAX_SUPPORT_VALUE))
|
||||
{
|
||||
c2brom_current_c1c2_ipc.command = C1C2_BROM_IPC_COMMAND_ILLEGAL;
|
||||
c2brom_current_c1c2_ipc.status = COMMAND_STATUS_INVALID;
|
||||
C2BROM_C1C2_IPC_COMMAND_NAK(c2brom_status | C2_BOOTROM_NAK_STATUS_CMD_NOT_SUPPORTED);
|
||||
C2BROM_C1C2_IPC_INT1_ACK; // PIE ack for intr group_11 (incl IPC_MTOC_1)
|
||||
return;
|
||||
}
|
||||
|
||||
//parse the command
|
||||
if(c2brom_current_c1c2_ipc.command == C1C2_BROM_IPC_SET_BITS_16)
|
||||
{
|
||||
c2brom_current_c1c2_ipc.status = c2brom_c1c2_ipc_set_bits_16();
|
||||
}
|
||||
else if (c2brom_current_c1c2_ipc.command == C1C2_BROM_IPC_SET_BITS_32)
|
||||
{
|
||||
c2brom_current_c1c2_ipc.status = c2brom_c1c2_ipc_set_bits_32();
|
||||
}
|
||||
else if (c2brom_current_c1c2_ipc.command == C1C2_BROM_IPC_CLEAR_BITS_16)
|
||||
{
|
||||
c2brom_current_c1c2_ipc.status = c2brom_c1c2_ipc_clear_bits_16();
|
||||
}
|
||||
else if (c2brom_current_c1c2_ipc.command == C1C2_BROM_IPC_CLEAR_BITS_32)
|
||||
{
|
||||
c2brom_current_c1c2_ipc.status = c2brom_c1c2_ipc_clear_bits_32();
|
||||
}
|
||||
else if (c2brom_current_c1c2_ipc.command == C1C2_BROM_IPC_DATA_WRITE_16)
|
||||
{
|
||||
c2brom_current_c1c2_ipc.status = c2brom_c1c2_ipc_write_data_16();
|
||||
}
|
||||
else if (c2brom_current_c1c2_ipc.command == C1C2_BROM_IPC_DATA_WRITE_32)
|
||||
{
|
||||
c2brom_current_c1c2_ipc.status = c2brom_c1c2_ipc_write_data_32();
|
||||
}
|
||||
else if (c2brom_current_c1c2_ipc.command == C1C2_BROM_IPC_DATA_READ_16)
|
||||
{
|
||||
c2brom_current_c1c2_ipc.status = c2brom_c1c2_ipc_read_data_16();
|
||||
}
|
||||
else if (c2brom_current_c1c2_ipc.command == C1C2_BROM_IPC_DATA_READ_32)
|
||||
{
|
||||
c2brom_current_c1c2_ipc.status = c2brom_c1c2_ipc_read_data_32();
|
||||
}
|
||||
else if (c2brom_current_c1c2_ipc.command == C1C2_BROM_IPC_SET_BITS_PROTECTED_16)
|
||||
{
|
||||
c2brom_current_c1c2_ipc.status = c2brom_c1c2_ipc_set_bits_protected_16();
|
||||
}
|
||||
else if (c2brom_current_c1c2_ipc.command == C1C2_BROM_IPC_SET_BITS_PROTECTED_32)
|
||||
{
|
||||
c2brom_current_c1c2_ipc.status = c2brom_c1c2_ipc_set_bits_protected_32();
|
||||
}
|
||||
else if (c2brom_current_c1c2_ipc.command == C1C2_BROM_IPC_CLEAR_BITS_PROTECTED_16)
|
||||
{
|
||||
c2brom_current_c1c2_ipc.status = c2brom_c1c2_ipc_clear_bits_protected_16();
|
||||
}
|
||||
else if (c2brom_current_c1c2_ipc.command == C1C2_BROM_IPC_CLEAR_BITS_PROTECTED_32)
|
||||
{
|
||||
c2brom_current_c1c2_ipc.status = c2brom_c1c2_ipc_clear_bits_protected_32();
|
||||
}
|
||||
else if (c2brom_current_c1c2_ipc.command == C1C2_BROM_IPC_DATA_WRITE_PROTECTED_16)
|
||||
{
|
||||
c2brom_current_c1c2_ipc.status = c2brom_c1c2_ipc_write_data_protected_16();
|
||||
}
|
||||
else if (c2brom_current_c1c2_ipc.command == C1C2_BROM_IPC_DATA_WRITE_PROTECTED_32)
|
||||
{
|
||||
c2brom_current_c1c2_ipc.status = c2brom_c1c2_ipc_write_data_protected_32();
|
||||
}
|
||||
else if (c2brom_current_c1c2_ipc.command == C1C2_BROM_IPC_DATA_READ_PROTECTED_16)
|
||||
{
|
||||
c2brom_current_c1c2_ipc.status = c2brom_c1c2_ipc_read_data_protected_16();
|
||||
}
|
||||
else if (c2brom_current_c1c2_ipc.command == C1C2_BROM_IPC_DATA_READ_PROTECTED_32)
|
||||
{
|
||||
c2brom_current_c1c2_ipc.status = c2brom_c1c2_ipc_read_data_protected_32();
|
||||
}
|
||||
else if (c2brom_current_c1c2_ipc.command == C1C2_BROM_IPC_BRANCH_CALL)
|
||||
{
|
||||
|
||||
/*set boot status to indicate that B.C28X CPU is will be branching to Control system requested address*/
|
||||
c2brom_status |= C2_BOOTROM_IN_C1TOC2_BRANCH;
|
||||
c2brom_set_c2c1_boot_status(0);
|
||||
|
||||
c1c2_branch_addr = IpcRegs.IPCRECVADDR;
|
||||
|
||||
/*the return address from the interrupt service routine will be pushed into stack
|
||||
* (please look at C28X assembly reference guide for more info)
|
||||
* modify the stack location which holds the return address to the required branch address
|
||||
* so when iRET is executed it will branch to the required location
|
||||
* */
|
||||
|
||||
branch_to_entryaddress(&c1c2_branch_addr);
|
||||
c2brom_current_c1c2_ipc.status = COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
else if (c2brom_current_c1c2_ipc.command == C1C2_BROM_IPC_FUNCTION_CALL)
|
||||
{
|
||||
IpcRegs.IPCLOCALREPLY = c2brom_c1c2_ipc_func_call_command();
|
||||
c2brom_current_c1c2_ipc.status = COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
else if (c2brom_current_c1c2_ipc.command == C1C2_BROM_IPC_EXECUTE_BOOTMODE_CMD)
|
||||
{
|
||||
if((C1C2_BROM_BOOTMODE_COMMAND_ILLEGAL != IpcRegs.IPCBOOTMODE) &&
|
||||
(IpcRegs.IPCBOOTMODE < C1C2_BROM_BOOTMODE_BOOT_COMMAND_MAX_SUPPORT_VALUE))
|
||||
{
|
||||
c1c2_branch_addr = 0xFFFFFFFF;
|
||||
|
||||
if( IpcRegs.IPCBOOTMODE == C1C2_BROM_BOOTMODE_BOOT_FROM_RAM)
|
||||
{
|
||||
c1c2_branch_addr = RAM_ENTRY_POINT;
|
||||
}
|
||||
else if( IpcRegs.IPCBOOTMODE == C1C2_BROM_BOOTMODE_BOOT_FROM_FLASH)
|
||||
{
|
||||
c1c2_branch_addr = FLASH_ENTRY_POINT;
|
||||
}
|
||||
else if( IpcRegs.IPCBOOTMODE == C1C2_BROM_BOOTMODE_BOOT_FROM_SCI)
|
||||
{
|
||||
c1c2_branch_addr = SCI_Boot();
|
||||
}
|
||||
else if( IpcRegs.IPCBOOTMODE == C1C2_BROM_BOOTMODE_BOOT_FROM_SPI)
|
||||
{
|
||||
c1c2_branch_addr = SPI_Boot();
|
||||
}
|
||||
else if( IpcRegs.IPCBOOTMODE == C1C2_BROM_BOOTMODE_BOOT_FROM_I2C)
|
||||
{
|
||||
c1c2_branch_addr = I2C_Boot();
|
||||
}
|
||||
else if( IpcRegs.IPCBOOTMODE == C1C2_BROM_BOOTMODE_BOOT_FROM_PARALLEL)
|
||||
{
|
||||
c1c2_branch_addr = Parallel_Boot();
|
||||
}
|
||||
|
||||
if(c1c2_branch_addr != 0xFFFFFFFF)
|
||||
{
|
||||
c2brom_status |= C2_BOOTROM_BOOT_COMPLETE;
|
||||
c2brom_set_c2c1_boot_status(C2_BOOTROM_BOOTSTS_CTOM_BOOT_CMD_ACK);
|
||||
|
||||
/*the return address from the interrupt service routine will be pushed into stack
|
||||
* (please look at C28X assembly reference guide for more info)
|
||||
* modify the stack location which holds the return address to the required branch address
|
||||
* so when iRET is executed it will branch to the required location
|
||||
* */
|
||||
branch_to_entryaddress(&c1c2_branch_addr);
|
||||
|
||||
c2brom_current_c1c2_ipc.status = COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
else
|
||||
{
|
||||
c2brom_current_c1c2_ipc.status = COMMAND_COMPLETE_FAILURE;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
c2brom_set_c2c1_boot_status(C2_BOOTROM_BOOTSTS_CTOM_BOOT_CMD_NAK_STATUS_NOT_SUPPORTED);
|
||||
c2brom_current_c1c2_ipc.status = COMMAND_COMPLETE_SUCCESS;
|
||||
|
||||
c1c2_branch_addr = TI_OTP_C2BROM_ESCAPE_POINT_10;
|
||||
if((c1c2_branch_addr != 0xFFFFFFFF) &&
|
||||
(c1c2_branch_addr != 0x00000000))
|
||||
|
||||
{
|
||||
/*if OTP is programmed, then call OTP function*/
|
||||
((void (*)(void))c1c2_branch_addr)();
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
c2brom_current_c1c2_ipc.status = COMMAND_COMPLETE_FAILURE;
|
||||
}
|
||||
|
||||
//handle command complete
|
||||
if(COMMAND_COMPLETE_SUCCESS == c2brom_current_c1c2_ipc.status)
|
||||
{
|
||||
c2brom_current_c1c2_ipc.command = C1C2_BROM_IPC_COMMAND_ILLEGAL;
|
||||
c2brom_current_c1c2_ipc.status = COMMAND_STATUS_INVALID;
|
||||
C2BROM_C1C2_IPC_COMMAND_ACK;
|
||||
C2BROM_C1C2_IPC_INT1_ACK; // PIE ack for intr group_1 (incl IPC_MTOC_1)
|
||||
}
|
||||
else /*command failure*/
|
||||
{
|
||||
c2brom_current_c1c2_ipc.command = C1C2_BROM_IPC_COMMAND_ILLEGAL;
|
||||
c2brom_current_c1c2_ipc.status = COMMAND_STATUS_INVALID;
|
||||
C2BROM_C1C2_IPC_COMMAND_NAK(c2brom_status | C2_BOOTROM_NAK_STATUS_CMD_NOT_SUPPORTED);
|
||||
C2BROM_C1C2_IPC_INT1_ACK; // PIE ack for intr group_11 (incl IPC_MTOC_1)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
// InitPieVectTable:
|
||||
//---------------------------------------------------------------------------
|
||||
// This function initializes the PIE vector table to a known state.
|
||||
// This function must be executed after boot time.
|
||||
//
|
||||
|
||||
void c2brom_init_pie_vect_table(void)
|
||||
{
|
||||
int16 i;
|
||||
Uint32 *Dest = (void *) &PieVectTable;
|
||||
|
||||
EALLOW;
|
||||
Dest += 3;
|
||||
for(i=3; i < sizeof(struct PIE_VECT_TABLE); i++)
|
||||
{
|
||||
*Dest++ = (Uint32)&c2brom_pie_isr_not_supported;
|
||||
}
|
||||
EDIS;
|
||||
|
||||
// Enable the PIE Vector Table
|
||||
PieCtrlRegs.PIECTRL.bit.ENPIE = 1;
|
||||
|
||||
}
|
||||
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
// InitPieCtrl:
|
||||
//---------------------------------------------------------------------------
|
||||
// This function initializes the PIE control registers to a known state.
|
||||
//
|
||||
void c2brom_init_pie_control(void)
|
||||
{
|
||||
// Disable Interrupts at the CPU level:
|
||||
DINT;
|
||||
|
||||
// Disable the PIE
|
||||
PieCtrlRegs.PIECTRL.bit.ENPIE = 0;
|
||||
|
||||
// Clear all PIEIER registers:
|
||||
PieCtrlRegs.PIEIER1.all = 0;
|
||||
PieCtrlRegs.PIEIER2.all = 0;
|
||||
PieCtrlRegs.PIEIER3.all = 0;
|
||||
PieCtrlRegs.PIEIER4.all = 0;
|
||||
PieCtrlRegs.PIEIER5.all = 0;
|
||||
PieCtrlRegs.PIEIER6.all = 0;
|
||||
PieCtrlRegs.PIEIER7.all = 0;
|
||||
PieCtrlRegs.PIEIER8.all = 0;
|
||||
PieCtrlRegs.PIEIER9.all = 0;
|
||||
PieCtrlRegs.PIEIER10.all = 0;
|
||||
PieCtrlRegs.PIEIER11.all = 0;
|
||||
PieCtrlRegs.PIEIER12.all = 0;
|
||||
|
||||
// Clear all PIEIFR registers:
|
||||
PieCtrlRegs.PIEIFR1.all = 0;
|
||||
PieCtrlRegs.PIEIFR2.all = 0;
|
||||
PieCtrlRegs.PIEIFR3.all = 0;
|
||||
PieCtrlRegs.PIEIFR4.all = 0;
|
||||
PieCtrlRegs.PIEIFR5.all = 0;
|
||||
PieCtrlRegs.PIEIFR6.all = 0;
|
||||
PieCtrlRegs.PIEIFR7.all = 0;
|
||||
PieCtrlRegs.PIEIFR8.all = 0;
|
||||
PieCtrlRegs.PIEIFR9.all = 0;
|
||||
PieCtrlRegs.PIEIFR10.all = 0;
|
||||
PieCtrlRegs.PIEIFR11.all = 0;
|
||||
PieCtrlRegs.PIEIFR12.all = 0;
|
||||
|
||||
// Enable the PIE
|
||||
PieCtrlRegs.PIECTRL.bit.ENPIE = 1;
|
||||
|
||||
// Enables PIE to drive a pulse into the CPU
|
||||
PieCtrlRegs.PIEACK.all = 0xFFFF;
|
||||
|
||||
// Enable Interrupts at the CPU level
|
||||
EINT;
|
||||
|
||||
}
|
||||
//===========================================================================
|
||||
// End of file.
|
||||
//===========================================================================
|
||||
|
||||
|
||||
+273
@@ -0,0 +1,273 @@
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 13, 2012 11:53:49 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: ccore_bootrom_ipc_commands.c
|
||||
//
|
||||
// TITLE: C-BootROM ipc commands utility function
|
||||
//
|
||||
// Functions:
|
||||
//
|
||||
// Notes:
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F2837x Boot ROM Version 0 $
|
||||
// $Release Date: Oct 1, 2013 $
|
||||
//###########################################################################
|
||||
|
||||
#include "c2_bootrom.h"
|
||||
|
||||
/*function prototypes*/
|
||||
command_status_t c2brom_c1c2_ipc_set_bits_16(void);
|
||||
command_status_t c2brom_c1c2_ipc_set_bits_32(void);
|
||||
command_status_t c2brom_c1c2_ipc_clear_bits_16(void);
|
||||
command_status_t c2brom_c1c2_ipc_clear_bits_32(void);
|
||||
command_status_t c2brom_c1c2_ipc_write_data_16(void);
|
||||
command_status_t c2brom_c1c2_ipc_write_data_32(void);
|
||||
command_status_t c2brom_c1c2_ipc_read_data_16(void);
|
||||
command_status_t c2brom_c1c2_ipc_read_data_32(void);
|
||||
|
||||
command_status_t c2brom_c1c2_ipc_set_bits_protected_16(void);
|
||||
command_status_t c2brom_c1c2_ipc_set_bits_protected_32(void);
|
||||
command_status_t c2brom_c1c2_ipc_clear_bits_protected_16(void);
|
||||
command_status_t c2brom_c1c2_ipc_clear_bits_protected_32(void);
|
||||
command_status_t c2brom_c1c2_ipc_write_data_protected_16(void);
|
||||
command_status_t c2brom_c1c2_ipc_write_data_protected_32(void);
|
||||
command_status_t c2brom_c1c2_ipc_read_data_protected_16(void);
|
||||
command_status_t c2brom_c1c2_ipc_read_data_protected_32(void);
|
||||
|
||||
Uint32 c2brom_c1c2_ipc_func_call_command(void);
|
||||
|
||||
|
||||
Uint32 c2brom_send_ipc_to_c1(Uint32 command, Uint32 addr, Uint32 data_w);
|
||||
void c2brom_set_c2c1_boot_status(Uint32 status);
|
||||
|
||||
extern Uint32 c2brom_status;
|
||||
|
||||
/*
|
||||
Function to set CTOMBOOTSTS register
|
||||
*/
|
||||
|
||||
void c2brom_set_c2c1_boot_status(Uint32 status)
|
||||
{
|
||||
/*top word (bits 31-16) is reserved for boot rom health status - bits 15:0 are for boot status*/
|
||||
IpcRegs.IPCBOOTSTS = ((Uint32)c2brom_status | (Uint32)status);
|
||||
}
|
||||
/*
|
||||
Function called to send an IPC message/command to master
|
||||
*/
|
||||
|
||||
Uint32 c2brom_send_ipc_to_c1(Uint32 command, Uint32 addr, Uint32 data_w)
|
||||
{
|
||||
|
||||
if((IpcRegs.IPCFLG.bit.IPC0) || (IpcRegs.IPCFLG.bit.IPC31))
|
||||
{
|
||||
/*if IPC flags from prev. command are not cleared yet, then ignore the current command*/
|
||||
return IS_FAILURE;
|
||||
}
|
||||
|
||||
IpcRegs.IPCSENDCOM = command;
|
||||
IpcRegs.IPCSENDADDR = addr;
|
||||
IpcRegs.IPCSENDDATA = data_w;
|
||||
IpcRegs.IPCSET.all = 0x80000001; //set bit 31 and bit 0
|
||||
|
||||
return IS_SUCCESS;
|
||||
}
|
||||
|
||||
/****************************************************************************************
|
||||
*
|
||||
* Functions to handle MTOC IPC commands
|
||||
*
|
||||
***************************************************************************************/
|
||||
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_SET_BITS_16 command
|
||||
*/
|
||||
|
||||
command_status_t c2brom_c1c2_ipc_set_bits_16(void)
|
||||
{
|
||||
*((Uint16 *)(IpcRegs.IPCRECVADDR)) |= (Uint16)(IpcRegs.IPCRECVDATA);
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint16 *)(IpcRegs.IPCRECVADDR));
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_SET_BITS_32 command
|
||||
*/
|
||||
|
||||
command_status_t c2brom_c1c2_ipc_set_bits_32(void)
|
||||
{
|
||||
*((Uint32 *)(IpcRegs.IPCRECVADDR)) |= (Uint32)(IpcRegs.IPCRECVDATA);
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint32 *)(IpcRegs.IPCRECVADDR));
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_CLEAR_BITS_16 command
|
||||
*/
|
||||
|
||||
command_status_t c2brom_c1c2_ipc_clear_bits_16(void)
|
||||
{
|
||||
*((Uint16 *)(IpcRegs.IPCRECVADDR)) &= (Uint16)(~(IpcRegs.IPCRECVDATA));
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint16 *)(IpcRegs.IPCRECVADDR));
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_CLEAR_BITS_32 command
|
||||
*/
|
||||
command_status_t c2brom_c1c2_ipc_clear_bits_32(void)
|
||||
{
|
||||
*((Uint32 *)(IpcRegs.IPCRECVADDR)) &= (Uint32)(~(IpcRegs.IPCRECVDATA));
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint32 *)(IpcRegs.IPCRECVADDR));
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_DATA_WRITE_16 command
|
||||
*/
|
||||
command_status_t c2brom_c1c2_ipc_write_data_16(void)
|
||||
{
|
||||
*((Uint16 *)(IpcRegs.IPCRECVADDR)) = (Uint16)(IpcRegs.IPCRECVDATA);
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint16 *)(IpcRegs.IPCRECVADDR));
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_DATA_WRITE_32 command
|
||||
*/
|
||||
command_status_t c2brom_c1c2_ipc_write_data_32(void)
|
||||
{
|
||||
*((Uint32 *)(IpcRegs.IPCRECVADDR)) = (Uint32)(IpcRegs.IPCRECVDATA);
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint32 *)(IpcRegs.IPCRECVADDR));
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_DATA_READ_16 command
|
||||
*/
|
||||
command_status_t c2brom_c1c2_ipc_read_data_16(void)
|
||||
{
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint16 *)(IpcRegs.IPCRECVADDR));
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_DATA_READ_32 command
|
||||
*/
|
||||
command_status_t c2brom_c1c2_ipc_read_data_32(void)
|
||||
{
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint32 *)(IpcRegs.IPCRECVADDR));
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_SET_BITS_PROTECTED_16 command
|
||||
*/
|
||||
command_status_t c2brom_c1c2_ipc_set_bits_protected_16(void)
|
||||
{
|
||||
EALLOW;
|
||||
*((Uint16 *)(IpcRegs.IPCRECVADDR)) |= (Uint16)IpcRegs.IPCRECVDATA;
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint16 *)(IpcRegs.IPCRECVADDR));
|
||||
EDIS;
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_SET_BITS_PROTECTED_32 command
|
||||
*/
|
||||
command_status_t c2brom_c1c2_ipc_set_bits_protected_32(void)
|
||||
{
|
||||
EALLOW;
|
||||
*((Uint32 *)(IpcRegs.IPCRECVADDR)) |= (Uint32)IpcRegs.IPCRECVDATA;
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint32 *)(IpcRegs.IPCRECVADDR));
|
||||
EDIS;
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_CLEAR_BITS_PROTECTED_16 command
|
||||
*/
|
||||
command_status_t c2brom_c1c2_ipc_clear_bits_protected_16(void)
|
||||
{
|
||||
EALLOW;
|
||||
*((Uint16 *)(IpcRegs.IPCRECVADDR)) &= (Uint16)(~(IpcRegs.IPCRECVDATA));
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint16 *)(IpcRegs.IPCRECVADDR));
|
||||
EDIS;
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_CLEAR_BITS_PROTECTED_32 command
|
||||
*/
|
||||
command_status_t c2brom_c1c2_ipc_clear_bits_protected_32(void)
|
||||
{
|
||||
EALLOW;
|
||||
*((Uint32 *)(IpcRegs.IPCRECVADDR)) &= (Uint32)(~(IpcRegs.IPCRECVDATA));
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint32 *)(IpcRegs.IPCRECVADDR));
|
||||
EDIS;
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_DATA_WRITE_PROTECTED_16 command
|
||||
*/
|
||||
command_status_t c2brom_c1c2_ipc_write_data_protected_16(void)
|
||||
{
|
||||
EALLOW;
|
||||
*((Uint16 *)(IpcRegs.IPCRECVADDR)) = (Uint16)(IpcRegs.IPCRECVDATA);
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint16 *)(IpcRegs.IPCRECVADDR));
|
||||
EDIS;
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_DATA_WRITE_PROTECTED_32 command
|
||||
*/
|
||||
command_status_t c2brom_c1c2_ipc_write_data_protected_32(void)
|
||||
{
|
||||
EALLOW;
|
||||
*((Uint32 *)(IpcRegs.IPCRECVADDR)) = (Uint32)(IpcRegs.IPCRECVDATA);
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint32 *)(IpcRegs.IPCRECVADDR));
|
||||
EDIS;
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_DATA_READ_PROTECTED_16 command
|
||||
*/
|
||||
command_status_t c2brom_c1c2_ipc_read_data_protected_16(void)
|
||||
{
|
||||
EALLOW;
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint16 *)(IpcRegs.IPCRECVADDR));
|
||||
EDIS;
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_DATA_READ_PROTECTED_32 command
|
||||
*/
|
||||
command_status_t c2brom_c1c2_ipc_read_data_protected_32(void)
|
||||
{
|
||||
EALLOW;
|
||||
IpcRegs.IPCLOCALREPLY = *((Uint32 *)(IpcRegs.IPCRECVADDR));
|
||||
EDIS;
|
||||
return COMMAND_COMPLETE_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*
|
||||
Function called to handle MASTER_IPC_MTOC_FUNCTION_CALL command
|
||||
*/
|
||||
Uint32 c2brom_c1c2_ipc_func_call_command(void)
|
||||
{
|
||||
Uint32 param = IpcRegs.IPCRECVDATA;
|
||||
c2brom_ipc_func_call_t c1c2_func_call = (c2brom_ipc_func_call_t)IpcRegs.IPCRECVADDR;
|
||||
return c1c2_func_call(param);
|
||||
}
|
||||
|
||||
BIN
Binary file not shown.
+2
@@ -0,0 +1,2 @@
|
||||
|
||||
-u _ti_sysbios_BIOS_setThreadType__E
|
||||
+733
@@ -0,0 +1,733 @@
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 13, 2012 11:54:04 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: mac_plc.c
|
||||
//
|
||||
// TITLE: PLC Tables
|
||||
//
|
||||
// DESCRIPTION:
|
||||
// This file contains functions relevant to MAC PLC features
|
||||
//
|
||||
// Copyright (c) 2009 Texas Instruments Inc.
|
||||
// All Rights Reserved This program is the confidential and proprietary
|
||||
// product of Texas Instruments Inc. Any Unauthorized use, reproduction or
|
||||
// transfer of this program is strictly prohibited.
|
||||
//
|
||||
// HISTORY:
|
||||
//
|
||||
//
|
||||
// LIST OF FUNCTION PROTOTYPES:
|
||||
//
|
||||
//
|
||||
// Notes:
|
||||
//
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F2837x Boot ROM Version 0 $
|
||||
// $Release Date: Oct 1, 2013 $
|
||||
//###########################################################################
|
||||
|
||||
#include "c2_bootrom.h"
|
||||
|
||||
|
||||
#define uint32 const Uint32
|
||||
|
||||
/*===========================================================================
|
||||
STATIC TABLE DEFINATIONS
|
||||
===========================================================================*/
|
||||
#pragma DATA_SECTION(Te0,"PLC_TABLE");
|
||||
#pragma DATA_SECTION(Te1,"PLC_TABLE");
|
||||
#pragma DATA_SECTION(Te2,"PLC_TABLE");
|
||||
#pragma DATA_SECTION(Te3,"PLC_TABLE");
|
||||
#pragma DATA_SECTION(Te4,"PLC_TABLE");
|
||||
|
||||
#pragma DATA_SECTION(Td0,"PLC_TABLE");
|
||||
#pragma DATA_SECTION(Td1,"PLC_TABLE");
|
||||
#pragma DATA_SECTION(Td2,"PLC_TABLE");
|
||||
#pragma DATA_SECTION(Td3,"PLC_TABLE");
|
||||
#pragma DATA_SECTION(Td4,"PLC_TABLE");
|
||||
|
||||
uint32 Te0[256] =
|
||||
{
|
||||
0xc66363a5U, 0xf87c7c84U, 0xee777799U, 0xf67b7b8dU,
|
||||
0xfff2f20dU, 0xd66b6bbdU, 0xde6f6fb1U, 0x91c5c554U,
|
||||
0x60303050U, 0x02010103U, 0xce6767a9U, 0x562b2b7dU,
|
||||
0xe7fefe19U, 0xb5d7d762U, 0x4dababe6U, 0xec76769aU,
|
||||
0x8fcaca45U, 0x1f82829dU, 0x89c9c940U, 0xfa7d7d87U,
|
||||
0xeffafa15U, 0xb25959ebU, 0x8e4747c9U, 0xfbf0f00bU,
|
||||
0x41adadecU, 0xb3d4d467U, 0x5fa2a2fdU, 0x45afafeaU,
|
||||
0x239c9cbfU, 0x53a4a4f7U, 0xe4727296U, 0x9bc0c05bU,
|
||||
0x75b7b7c2U, 0xe1fdfd1cU, 0x3d9393aeU, 0x4c26266aU,
|
||||
0x6c36365aU, 0x7e3f3f41U, 0xf5f7f702U, 0x83cccc4fU,
|
||||
0x6834345cU, 0x51a5a5f4U, 0xd1e5e534U, 0xf9f1f108U,
|
||||
0xe2717193U, 0xabd8d873U, 0x62313153U, 0x2a15153fU,
|
||||
0x0804040cU, 0x95c7c752U, 0x46232365U, 0x9dc3c35eU,
|
||||
0x30181828U, 0x379696a1U, 0x0a05050fU, 0x2f9a9ab5U,
|
||||
0x0e070709U, 0x24121236U, 0x1b80809bU, 0xdfe2e23dU,
|
||||
0xcdebeb26U, 0x4e272769U, 0x7fb2b2cdU, 0xea75759fU,
|
||||
0x1209091bU, 0x1d83839eU, 0x582c2c74U, 0x341a1a2eU,
|
||||
0x361b1b2dU, 0xdc6e6eb2U, 0xb45a5aeeU, 0x5ba0a0fbU,
|
||||
0xa45252f6U, 0x763b3b4dU, 0xb7d6d661U, 0x7db3b3ceU,
|
||||
0x5229297bU, 0xdde3e33eU, 0x5e2f2f71U, 0x13848497U,
|
||||
0xa65353f5U, 0xb9d1d168U, 0x00000000U, 0xc1eded2cU,
|
||||
0x40202060U, 0xe3fcfc1fU, 0x79b1b1c8U, 0xb65b5bedU,
|
||||
0xd46a6abeU, 0x8dcbcb46U, 0x67bebed9U, 0x7239394bU,
|
||||
0x944a4adeU, 0x984c4cd4U, 0xb05858e8U, 0x85cfcf4aU,
|
||||
0xbbd0d06bU, 0xc5efef2aU, 0x4faaaae5U, 0xedfbfb16U,
|
||||
0x864343c5U, 0x9a4d4dd7U, 0x66333355U, 0x11858594U,
|
||||
0x8a4545cfU, 0xe9f9f910U, 0x04020206U, 0xfe7f7f81U,
|
||||
0xa05050f0U, 0x783c3c44U, 0x259f9fbaU, 0x4ba8a8e3U,
|
||||
0xa25151f3U, 0x5da3a3feU, 0x804040c0U, 0x058f8f8aU,
|
||||
0x3f9292adU, 0x219d9dbcU, 0x70383848U, 0xf1f5f504U,
|
||||
0x63bcbcdfU, 0x77b6b6c1U, 0xafdada75U, 0x42212163U,
|
||||
0x20101030U, 0xe5ffff1aU, 0xfdf3f30eU, 0xbfd2d26dU,
|
||||
0x81cdcd4cU, 0x180c0c14U, 0x26131335U, 0xc3ecec2fU,
|
||||
0xbe5f5fe1U, 0x359797a2U, 0x884444ccU, 0x2e171739U,
|
||||
0x93c4c457U, 0x55a7a7f2U, 0xfc7e7e82U, 0x7a3d3d47U,
|
||||
0xc86464acU, 0xba5d5de7U, 0x3219192bU, 0xe6737395U,
|
||||
0xc06060a0U, 0x19818198U, 0x9e4f4fd1U, 0xa3dcdc7fU,
|
||||
0x44222266U, 0x542a2a7eU, 0x3b9090abU, 0x0b888883U,
|
||||
0x8c4646caU, 0xc7eeee29U, 0x6bb8b8d3U, 0x2814143cU,
|
||||
0xa7dede79U, 0xbc5e5ee2U, 0x160b0b1dU, 0xaddbdb76U,
|
||||
0xdbe0e03bU, 0x64323256U, 0x743a3a4eU, 0x140a0a1eU,
|
||||
0x924949dbU, 0x0c06060aU, 0x4824246cU, 0xb85c5ce4U,
|
||||
0x9fc2c25dU, 0xbdd3d36eU, 0x43acacefU, 0xc46262a6U,
|
||||
0x399191a8U, 0x319595a4U, 0xd3e4e437U, 0xf279798bU,
|
||||
0xd5e7e732U, 0x8bc8c843U, 0x6e373759U, 0xda6d6db7U,
|
||||
0x018d8d8cU, 0xb1d5d564U, 0x9c4e4ed2U, 0x49a9a9e0U,
|
||||
0xd86c6cb4U, 0xac5656faU, 0xf3f4f407U, 0xcfeaea25U,
|
||||
0xca6565afU, 0xf47a7a8eU, 0x47aeaee9U, 0x10080818U,
|
||||
0x6fbabad5U, 0xf0787888U, 0x4a25256fU, 0x5c2e2e72U,
|
||||
0x381c1c24U, 0x57a6a6f1U, 0x73b4b4c7U, 0x97c6c651U,
|
||||
0xcbe8e823U, 0xa1dddd7cU, 0xe874749cU, 0x3e1f1f21U,
|
||||
0x964b4bddU, 0x61bdbddcU, 0x0d8b8b86U, 0x0f8a8a85U,
|
||||
0xe0707090U, 0x7c3e3e42U, 0x71b5b5c4U, 0xcc6666aaU,
|
||||
0x904848d8U, 0x06030305U, 0xf7f6f601U, 0x1c0e0e12U,
|
||||
0xc26161a3U, 0x6a35355fU, 0xae5757f9U, 0x69b9b9d0U,
|
||||
0x17868691U, 0x99c1c158U, 0x3a1d1d27U, 0x279e9eb9U,
|
||||
0xd9e1e138U, 0xebf8f813U, 0x2b9898b3U, 0x22111133U,
|
||||
0xd26969bbU, 0xa9d9d970U, 0x078e8e89U, 0x339494a7U,
|
||||
0x2d9b9bb6U, 0x3c1e1e22U, 0x15878792U, 0xc9e9e920U,
|
||||
0x87cece49U, 0xaa5555ffU, 0x50282878U, 0xa5dfdf7aU,
|
||||
0x038c8c8fU, 0x59a1a1f8U, 0x09898980U, 0x1a0d0d17U,
|
||||
0x65bfbfdaU, 0xd7e6e631U, 0x844242c6U, 0xd06868b8U,
|
||||
0x824141c3U, 0x299999b0U, 0x5a2d2d77U, 0x1e0f0f11U,
|
||||
0x7bb0b0cbU, 0xa85454fcU, 0x6dbbbbd6U, 0x2c16163aU,
|
||||
};
|
||||
|
||||
uint32 Te1[256] =
|
||||
{
|
||||
0xa5c66363U, 0x84f87c7cU, 0x99ee7777U, 0x8df67b7bU,
|
||||
0x0dfff2f2U, 0xbdd66b6bU, 0xb1de6f6fU, 0x5491c5c5U,
|
||||
0x50603030U, 0x03020101U, 0xa9ce6767U, 0x7d562b2bU,
|
||||
0x19e7fefeU, 0x62b5d7d7U, 0xe64dababU, 0x9aec7676U,
|
||||
0x458fcacaU, 0x9d1f8282U, 0x4089c9c9U, 0x87fa7d7dU,
|
||||
0x15effafaU, 0xebb25959U, 0xc98e4747U, 0x0bfbf0f0U,
|
||||
0xec41adadU, 0x67b3d4d4U, 0xfd5fa2a2U, 0xea45afafU,
|
||||
0xbf239c9cU, 0xf753a4a4U, 0x96e47272U, 0x5b9bc0c0U,
|
||||
0xc275b7b7U, 0x1ce1fdfdU, 0xae3d9393U, 0x6a4c2626U,
|
||||
0x5a6c3636U, 0x417e3f3fU, 0x02f5f7f7U, 0x4f83ccccU,
|
||||
0x5c683434U, 0xf451a5a5U, 0x34d1e5e5U, 0x08f9f1f1U,
|
||||
0x93e27171U, 0x73abd8d8U, 0x53623131U, 0x3f2a1515U,
|
||||
0x0c080404U, 0x5295c7c7U, 0x65462323U, 0x5e9dc3c3U,
|
||||
0x28301818U, 0xa1379696U, 0x0f0a0505U, 0xb52f9a9aU,
|
||||
0x090e0707U, 0x36241212U, 0x9b1b8080U, 0x3ddfe2e2U,
|
||||
0x26cdebebU, 0x694e2727U, 0xcd7fb2b2U, 0x9fea7575U,
|
||||
0x1b120909U, 0x9e1d8383U, 0x74582c2cU, 0x2e341a1aU,
|
||||
0x2d361b1bU, 0xb2dc6e6eU, 0xeeb45a5aU, 0xfb5ba0a0U,
|
||||
0xf6a45252U, 0x4d763b3bU, 0x61b7d6d6U, 0xce7db3b3U,
|
||||
0x7b522929U, 0x3edde3e3U, 0x715e2f2fU, 0x97138484U,
|
||||
0xf5a65353U, 0x68b9d1d1U, 0x00000000U, 0x2cc1ededU,
|
||||
0x60402020U, 0x1fe3fcfcU, 0xc879b1b1U, 0xedb65b5bU,
|
||||
0xbed46a6aU, 0x468dcbcbU, 0xd967bebeU, 0x4b723939U,
|
||||
0xde944a4aU, 0xd4984c4cU, 0xe8b05858U, 0x4a85cfcfU,
|
||||
0x6bbbd0d0U, 0x2ac5efefU, 0xe54faaaaU, 0x16edfbfbU,
|
||||
0xc5864343U, 0xd79a4d4dU, 0x55663333U, 0x94118585U,
|
||||
0xcf8a4545U, 0x10e9f9f9U, 0x06040202U, 0x81fe7f7fU,
|
||||
0xf0a05050U, 0x44783c3cU, 0xba259f9fU, 0xe34ba8a8U,
|
||||
0xf3a25151U, 0xfe5da3a3U, 0xc0804040U, 0x8a058f8fU,
|
||||
0xad3f9292U, 0xbc219d9dU, 0x48703838U, 0x04f1f5f5U,
|
||||
0xdf63bcbcU, 0xc177b6b6U, 0x75afdadaU, 0x63422121U,
|
||||
0x30201010U, 0x1ae5ffffU, 0x0efdf3f3U, 0x6dbfd2d2U,
|
||||
0x4c81cdcdU, 0x14180c0cU, 0x35261313U, 0x2fc3ececU,
|
||||
0xe1be5f5fU, 0xa2359797U, 0xcc884444U, 0x392e1717U,
|
||||
0x5793c4c4U, 0xf255a7a7U, 0x82fc7e7eU, 0x477a3d3dU,
|
||||
0xacc86464U, 0xe7ba5d5dU, 0x2b321919U, 0x95e67373U,
|
||||
0xa0c06060U, 0x98198181U, 0xd19e4f4fU, 0x7fa3dcdcU,
|
||||
0x66442222U, 0x7e542a2aU, 0xab3b9090U, 0x830b8888U,
|
||||
0xca8c4646U, 0x29c7eeeeU, 0xd36bb8b8U, 0x3c281414U,
|
||||
0x79a7dedeU, 0xe2bc5e5eU, 0x1d160b0bU, 0x76addbdbU,
|
||||
0x3bdbe0e0U, 0x56643232U, 0x4e743a3aU, 0x1e140a0aU,
|
||||
0xdb924949U, 0x0a0c0606U, 0x6c482424U, 0xe4b85c5cU,
|
||||
0x5d9fc2c2U, 0x6ebdd3d3U, 0xef43acacU, 0xa6c46262U,
|
||||
0xa8399191U, 0xa4319595U, 0x37d3e4e4U, 0x8bf27979U,
|
||||
0x32d5e7e7U, 0x438bc8c8U, 0x596e3737U, 0xb7da6d6dU,
|
||||
0x8c018d8dU, 0x64b1d5d5U, 0xd29c4e4eU, 0xe049a9a9U,
|
||||
0xb4d86c6cU, 0xfaac5656U, 0x07f3f4f4U, 0x25cfeaeaU,
|
||||
0xafca6565U, 0x8ef47a7aU, 0xe947aeaeU, 0x18100808U,
|
||||
0xd56fbabaU, 0x88f07878U, 0x6f4a2525U, 0x725c2e2eU,
|
||||
0x24381c1cU, 0xf157a6a6U, 0xc773b4b4U, 0x5197c6c6U,
|
||||
0x23cbe8e8U, 0x7ca1ddddU, 0x9ce87474U, 0x213e1f1fU,
|
||||
0xdd964b4bU, 0xdc61bdbdU, 0x860d8b8bU, 0x850f8a8aU,
|
||||
0x90e07070U, 0x427c3e3eU, 0xc471b5b5U, 0xaacc6666U,
|
||||
0xd8904848U, 0x05060303U, 0x01f7f6f6U, 0x121c0e0eU,
|
||||
0xa3c26161U, 0x5f6a3535U, 0xf9ae5757U, 0xd069b9b9U,
|
||||
0x91178686U, 0x5899c1c1U, 0x273a1d1dU, 0xb9279e9eU,
|
||||
0x38d9e1e1U, 0x13ebf8f8U, 0xb32b9898U, 0x33221111U,
|
||||
0xbbd26969U, 0x70a9d9d9U, 0x89078e8eU, 0xa7339494U,
|
||||
0xb62d9b9bU, 0x223c1e1eU, 0x92158787U, 0x20c9e9e9U,
|
||||
0x4987ceceU, 0xffaa5555U, 0x78502828U, 0x7aa5dfdfU,
|
||||
0x8f038c8cU, 0xf859a1a1U, 0x80098989U, 0x171a0d0dU,
|
||||
0xda65bfbfU, 0x31d7e6e6U, 0xc6844242U, 0xb8d06868U,
|
||||
0xc3824141U, 0xb0299999U, 0x775a2d2dU, 0x111e0f0fU,
|
||||
0xcb7bb0b0U, 0xfca85454U, 0xd66dbbbbU, 0x3a2c1616U,
|
||||
};
|
||||
|
||||
uint32 Te2[256] =
|
||||
{
|
||||
0x63a5c663U, 0x7c84f87cU, 0x7799ee77U, 0x7b8df67bU,
|
||||
0xf20dfff2U, 0x6bbdd66bU, 0x6fb1de6fU, 0xc55491c5U,
|
||||
0x30506030U, 0x01030201U, 0x67a9ce67U, 0x2b7d562bU,
|
||||
0xfe19e7feU, 0xd762b5d7U, 0xabe64dabU, 0x769aec76U,
|
||||
0xca458fcaU, 0x829d1f82U, 0xc94089c9U, 0x7d87fa7dU,
|
||||
0xfa15effaU, 0x59ebb259U, 0x47c98e47U, 0xf00bfbf0U,
|
||||
0xadec41adU, 0xd467b3d4U, 0xa2fd5fa2U, 0xafea45afU,
|
||||
0x9cbf239cU, 0xa4f753a4U, 0x7296e472U, 0xc05b9bc0U,
|
||||
0xb7c275b7U, 0xfd1ce1fdU, 0x93ae3d93U, 0x266a4c26U,
|
||||
0x365a6c36U, 0x3f417e3fU, 0xf702f5f7U, 0xcc4f83ccU,
|
||||
0x345c6834U, 0xa5f451a5U, 0xe534d1e5U, 0xf108f9f1U,
|
||||
0x7193e271U, 0xd873abd8U, 0x31536231U, 0x153f2a15U,
|
||||
0x040c0804U, 0xc75295c7U, 0x23654623U, 0xc35e9dc3U,
|
||||
0x18283018U, 0x96a13796U, 0x050f0a05U, 0x9ab52f9aU,
|
||||
0x07090e07U, 0x12362412U, 0x809b1b80U, 0xe23ddfe2U,
|
||||
0xeb26cdebU, 0x27694e27U, 0xb2cd7fb2U, 0x759fea75U,
|
||||
0x091b1209U, 0x839e1d83U, 0x2c74582cU, 0x1a2e341aU,
|
||||
0x1b2d361bU, 0x6eb2dc6eU, 0x5aeeb45aU, 0xa0fb5ba0U,
|
||||
0x52f6a452U, 0x3b4d763bU, 0xd661b7d6U, 0xb3ce7db3U,
|
||||
0x297b5229U, 0xe33edde3U, 0x2f715e2fU, 0x84971384U,
|
||||
0x53f5a653U, 0xd168b9d1U, 0x00000000U, 0xed2cc1edU,
|
||||
0x20604020U, 0xfc1fe3fcU, 0xb1c879b1U, 0x5bedb65bU,
|
||||
0x6abed46aU, 0xcb468dcbU, 0xbed967beU, 0x394b7239U,
|
||||
0x4ade944aU, 0x4cd4984cU, 0x58e8b058U, 0xcf4a85cfU,
|
||||
0xd06bbbd0U, 0xef2ac5efU, 0xaae54faaU, 0xfb16edfbU,
|
||||
0x43c58643U, 0x4dd79a4dU, 0x33556633U, 0x85941185U,
|
||||
0x45cf8a45U, 0xf910e9f9U, 0x02060402U, 0x7f81fe7fU,
|
||||
0x50f0a050U, 0x3c44783cU, 0x9fba259fU, 0xa8e34ba8U,
|
||||
0x51f3a251U, 0xa3fe5da3U, 0x40c08040U, 0x8f8a058fU,
|
||||
0x92ad3f92U, 0x9dbc219dU, 0x38487038U, 0xf504f1f5U,
|
||||
0xbcdf63bcU, 0xb6c177b6U, 0xda75afdaU, 0x21634221U,
|
||||
0x10302010U, 0xff1ae5ffU, 0xf30efdf3U, 0xd26dbfd2U,
|
||||
0xcd4c81cdU, 0x0c14180cU, 0x13352613U, 0xec2fc3ecU,
|
||||
0x5fe1be5fU, 0x97a23597U, 0x44cc8844U, 0x17392e17U,
|
||||
0xc45793c4U, 0xa7f255a7U, 0x7e82fc7eU, 0x3d477a3dU,
|
||||
0x64acc864U, 0x5de7ba5dU, 0x192b3219U, 0x7395e673U,
|
||||
0x60a0c060U, 0x81981981U, 0x4fd19e4fU, 0xdc7fa3dcU,
|
||||
0x22664422U, 0x2a7e542aU, 0x90ab3b90U, 0x88830b88U,
|
||||
0x46ca8c46U, 0xee29c7eeU, 0xb8d36bb8U, 0x143c2814U,
|
||||
0xde79a7deU, 0x5ee2bc5eU, 0x0b1d160bU, 0xdb76addbU,
|
||||
0xe03bdbe0U, 0x32566432U, 0x3a4e743aU, 0x0a1e140aU,
|
||||
0x49db9249U, 0x060a0c06U, 0x246c4824U, 0x5ce4b85cU,
|
||||
0xc25d9fc2U, 0xd36ebdd3U, 0xacef43acU, 0x62a6c462U,
|
||||
0x91a83991U, 0x95a43195U, 0xe437d3e4U, 0x798bf279U,
|
||||
0xe732d5e7U, 0xc8438bc8U, 0x37596e37U, 0x6db7da6dU,
|
||||
0x8d8c018dU, 0xd564b1d5U, 0x4ed29c4eU, 0xa9e049a9U,
|
||||
0x6cb4d86cU, 0x56faac56U, 0xf407f3f4U, 0xea25cfeaU,
|
||||
0x65afca65U, 0x7a8ef47aU, 0xaee947aeU, 0x08181008U,
|
||||
0xbad56fbaU, 0x7888f078U, 0x256f4a25U, 0x2e725c2eU,
|
||||
0x1c24381cU, 0xa6f157a6U, 0xb4c773b4U, 0xc65197c6U,
|
||||
0xe823cbe8U, 0xdd7ca1ddU, 0x749ce874U, 0x1f213e1fU,
|
||||
0x4bdd964bU, 0xbddc61bdU, 0x8b860d8bU, 0x8a850f8aU,
|
||||
0x7090e070U, 0x3e427c3eU, 0xb5c471b5U, 0x66aacc66U,
|
||||
0x48d89048U, 0x03050603U, 0xf601f7f6U, 0x0e121c0eU,
|
||||
0x61a3c261U, 0x355f6a35U, 0x57f9ae57U, 0xb9d069b9U,
|
||||
0x86911786U, 0xc15899c1U, 0x1d273a1dU, 0x9eb9279eU,
|
||||
0xe138d9e1U, 0xf813ebf8U, 0x98b32b98U, 0x11332211U,
|
||||
0x69bbd269U, 0xd970a9d9U, 0x8e89078eU, 0x94a73394U,
|
||||
0x9bb62d9bU, 0x1e223c1eU, 0x87921587U, 0xe920c9e9U,
|
||||
0xce4987ceU, 0x55ffaa55U, 0x28785028U, 0xdf7aa5dfU,
|
||||
0x8c8f038cU, 0xa1f859a1U, 0x89800989U, 0x0d171a0dU,
|
||||
0xbfda65bfU, 0xe631d7e6U, 0x42c68442U, 0x68b8d068U,
|
||||
0x41c38241U, 0x99b02999U, 0x2d775a2dU, 0x0f111e0fU,
|
||||
0xb0cb7bb0U, 0x54fca854U, 0xbbd66dbbU, 0x163a2c16U,
|
||||
};
|
||||
|
||||
uint32 Te3[256] =
|
||||
{
|
||||
0x6363a5c6U, 0x7c7c84f8U, 0x777799eeU, 0x7b7b8df6U,
|
||||
0xf2f20dffU, 0x6b6bbdd6U, 0x6f6fb1deU, 0xc5c55491U,
|
||||
0x30305060U, 0x01010302U, 0x6767a9ceU, 0x2b2b7d56U,
|
||||
0xfefe19e7U, 0xd7d762b5U, 0xababe64dU, 0x76769aecU,
|
||||
0xcaca458fU, 0x82829d1fU, 0xc9c94089U, 0x7d7d87faU,
|
||||
0xfafa15efU, 0x5959ebb2U, 0x4747c98eU, 0xf0f00bfbU,
|
||||
0xadadec41U, 0xd4d467b3U, 0xa2a2fd5fU, 0xafafea45U,
|
||||
0x9c9cbf23U, 0xa4a4f753U, 0x727296e4U, 0xc0c05b9bU,
|
||||
0xb7b7c275U, 0xfdfd1ce1U, 0x9393ae3dU, 0x26266a4cU,
|
||||
0x36365a6cU, 0x3f3f417eU, 0xf7f702f5U, 0xcccc4f83U,
|
||||
0x34345c68U, 0xa5a5f451U, 0xe5e534d1U, 0xf1f108f9U,
|
||||
0x717193e2U, 0xd8d873abU, 0x31315362U, 0x15153f2aU,
|
||||
0x04040c08U, 0xc7c75295U, 0x23236546U, 0xc3c35e9dU,
|
||||
0x18182830U, 0x9696a137U, 0x05050f0aU, 0x9a9ab52fU,
|
||||
0x0707090eU, 0x12123624U, 0x80809b1bU, 0xe2e23ddfU,
|
||||
0xebeb26cdU, 0x2727694eU, 0xb2b2cd7fU, 0x75759feaU,
|
||||
0x09091b12U, 0x83839e1dU, 0x2c2c7458U, 0x1a1a2e34U,
|
||||
0x1b1b2d36U, 0x6e6eb2dcU, 0x5a5aeeb4U, 0xa0a0fb5bU,
|
||||
0x5252f6a4U, 0x3b3b4d76U, 0xd6d661b7U, 0xb3b3ce7dU,
|
||||
0x29297b52U, 0xe3e33eddU, 0x2f2f715eU, 0x84849713U,
|
||||
0x5353f5a6U, 0xd1d168b9U, 0x00000000U, 0xeded2cc1U,
|
||||
0x20206040U, 0xfcfc1fe3U, 0xb1b1c879U, 0x5b5bedb6U,
|
||||
0x6a6abed4U, 0xcbcb468dU, 0xbebed967U, 0x39394b72U,
|
||||
0x4a4ade94U, 0x4c4cd498U, 0x5858e8b0U, 0xcfcf4a85U,
|
||||
0xd0d06bbbU, 0xefef2ac5U, 0xaaaae54fU, 0xfbfb16edU,
|
||||
0x4343c586U, 0x4d4dd79aU, 0x33335566U, 0x85859411U,
|
||||
0x4545cf8aU, 0xf9f910e9U, 0x02020604U, 0x7f7f81feU,
|
||||
0x5050f0a0U, 0x3c3c4478U, 0x9f9fba25U, 0xa8a8e34bU,
|
||||
0x5151f3a2U, 0xa3a3fe5dU, 0x4040c080U, 0x8f8f8a05U,
|
||||
0x9292ad3fU, 0x9d9dbc21U, 0x38384870U, 0xf5f504f1U,
|
||||
0xbcbcdf63U, 0xb6b6c177U, 0xdada75afU, 0x21216342U,
|
||||
0x10103020U, 0xffff1ae5U, 0xf3f30efdU, 0xd2d26dbfU,
|
||||
0xcdcd4c81U, 0x0c0c1418U, 0x13133526U, 0xecec2fc3U,
|
||||
0x5f5fe1beU, 0x9797a235U, 0x4444cc88U, 0x1717392eU,
|
||||
0xc4c45793U, 0xa7a7f255U, 0x7e7e82fcU, 0x3d3d477aU,
|
||||
0x6464acc8U, 0x5d5de7baU, 0x19192b32U, 0x737395e6U,
|
||||
0x6060a0c0U, 0x81819819U, 0x4f4fd19eU, 0xdcdc7fa3U,
|
||||
0x22226644U, 0x2a2a7e54U, 0x9090ab3bU, 0x8888830bU,
|
||||
0x4646ca8cU, 0xeeee29c7U, 0xb8b8d36bU, 0x14143c28U,
|
||||
0xdede79a7U, 0x5e5ee2bcU, 0x0b0b1d16U, 0xdbdb76adU,
|
||||
0xe0e03bdbU, 0x32325664U, 0x3a3a4e74U, 0x0a0a1e14U,
|
||||
0x4949db92U, 0x06060a0cU, 0x24246c48U, 0x5c5ce4b8U,
|
||||
0xc2c25d9fU, 0xd3d36ebdU, 0xacacef43U, 0x6262a6c4U,
|
||||
0x9191a839U, 0x9595a431U, 0xe4e437d3U, 0x79798bf2U,
|
||||
0xe7e732d5U, 0xc8c8438bU, 0x3737596eU, 0x6d6db7daU,
|
||||
0x8d8d8c01U, 0xd5d564b1U, 0x4e4ed29cU, 0xa9a9e049U,
|
||||
0x6c6cb4d8U, 0x5656faacU, 0xf4f407f3U, 0xeaea25cfU,
|
||||
0x6565afcaU, 0x7a7a8ef4U, 0xaeaee947U, 0x08081810U,
|
||||
0xbabad56fU, 0x787888f0U, 0x25256f4aU, 0x2e2e725cU,
|
||||
0x1c1c2438U, 0xa6a6f157U, 0xb4b4c773U, 0xc6c65197U,
|
||||
0xe8e823cbU, 0xdddd7ca1U, 0x74749ce8U, 0x1f1f213eU,
|
||||
0x4b4bdd96U, 0xbdbddc61U, 0x8b8b860dU, 0x8a8a850fU,
|
||||
0x707090e0U, 0x3e3e427cU, 0xb5b5c471U, 0x6666aaccU,
|
||||
0x4848d890U, 0x03030506U, 0xf6f601f7U, 0x0e0e121cU,
|
||||
0x6161a3c2U, 0x35355f6aU, 0x5757f9aeU, 0xb9b9d069U,
|
||||
0x86869117U, 0xc1c15899U, 0x1d1d273aU, 0x9e9eb927U,
|
||||
0xe1e138d9U, 0xf8f813ebU, 0x9898b32bU, 0x11113322U,
|
||||
0x6969bbd2U, 0xd9d970a9U, 0x8e8e8907U, 0x9494a733U,
|
||||
0x9b9bb62dU, 0x1e1e223cU, 0x87879215U, 0xe9e920c9U,
|
||||
0xcece4987U, 0x5555ffaaU, 0x28287850U, 0xdfdf7aa5U,
|
||||
0x8c8c8f03U, 0xa1a1f859U, 0x89898009U, 0x0d0d171aU,
|
||||
0xbfbfda65U, 0xe6e631d7U, 0x4242c684U, 0x6868b8d0U,
|
||||
0x4141c382U, 0x9999b029U, 0x2d2d775aU, 0x0f0f111eU,
|
||||
0xb0b0cb7bU, 0x5454fca8U, 0xbbbbd66dU, 0x16163a2cU,
|
||||
};
|
||||
|
||||
uint32 Te4[256] =
|
||||
{
|
||||
0x63636363U, 0x7c7c7c7cU, 0x77777777U, 0x7b7b7b7bU,
|
||||
0xf2f2f2f2U, 0x6b6b6b6bU, 0x6f6f6f6fU, 0xc5c5c5c5U,
|
||||
0x30303030U, 0x01010101U, 0x67676767U, 0x2b2b2b2bU,
|
||||
0xfefefefeU, 0xd7d7d7d7U, 0xababababU, 0x76767676U,
|
||||
0xcacacacaU, 0x82828282U, 0xc9c9c9c9U, 0x7d7d7d7dU,
|
||||
0xfafafafaU, 0x59595959U, 0x47474747U, 0xf0f0f0f0U,
|
||||
0xadadadadU, 0xd4d4d4d4U, 0xa2a2a2a2U, 0xafafafafU,
|
||||
0x9c9c9c9cU, 0xa4a4a4a4U, 0x72727272U, 0xc0c0c0c0U,
|
||||
0xb7b7b7b7U, 0xfdfdfdfdU, 0x93939393U, 0x26262626U,
|
||||
0x36363636U, 0x3f3f3f3fU, 0xf7f7f7f7U, 0xccccccccU,
|
||||
0x34343434U, 0xa5a5a5a5U, 0xe5e5e5e5U, 0xf1f1f1f1U,
|
||||
0x71717171U, 0xd8d8d8d8U, 0x31313131U, 0x15151515U,
|
||||
0x04040404U, 0xc7c7c7c7U, 0x23232323U, 0xc3c3c3c3U,
|
||||
0x18181818U, 0x96969696U, 0x05050505U, 0x9a9a9a9aU,
|
||||
0x07070707U, 0x12121212U, 0x80808080U, 0xe2e2e2e2U,
|
||||
0xebebebebU, 0x27272727U, 0xb2b2b2b2U, 0x75757575U,
|
||||
0x09090909U, 0x83838383U, 0x2c2c2c2cU, 0x1a1a1a1aU,
|
||||
0x1b1b1b1bU, 0x6e6e6e6eU, 0x5a5a5a5aU, 0xa0a0a0a0U,
|
||||
0x52525252U, 0x3b3b3b3bU, 0xd6d6d6d6U, 0xb3b3b3b3U,
|
||||
0x29292929U, 0xe3e3e3e3U, 0x2f2f2f2fU, 0x84848484U,
|
||||
0x53535353U, 0xd1d1d1d1U, 0x00000000U, 0xededededU,
|
||||
0x20202020U, 0xfcfcfcfcU, 0xb1b1b1b1U, 0x5b5b5b5bU,
|
||||
0x6a6a6a6aU, 0xcbcbcbcbU, 0xbebebebeU, 0x39393939U,
|
||||
0x4a4a4a4aU, 0x4c4c4c4cU, 0x58585858U, 0xcfcfcfcfU,
|
||||
0xd0d0d0d0U, 0xefefefefU, 0xaaaaaaaaU, 0xfbfbfbfbU,
|
||||
0x43434343U, 0x4d4d4d4dU, 0x33333333U, 0x85858585U,
|
||||
0x45454545U, 0xf9f9f9f9U, 0x02020202U, 0x7f7f7f7fU,
|
||||
0x50505050U, 0x3c3c3c3cU, 0x9f9f9f9fU, 0xa8a8a8a8U,
|
||||
0x51515151U, 0xa3a3a3a3U, 0x40404040U, 0x8f8f8f8fU,
|
||||
0x92929292U, 0x9d9d9d9dU, 0x38383838U, 0xf5f5f5f5U,
|
||||
0xbcbcbcbcU, 0xb6b6b6b6U, 0xdadadadaU, 0x21212121U,
|
||||
0x10101010U, 0xffffffffU, 0xf3f3f3f3U, 0xd2d2d2d2U,
|
||||
0xcdcdcdcdU, 0x0c0c0c0cU, 0x13131313U, 0xececececU,
|
||||
0x5f5f5f5fU, 0x97979797U, 0x44444444U, 0x17171717U,
|
||||
0xc4c4c4c4U, 0xa7a7a7a7U, 0x7e7e7e7eU, 0x3d3d3d3dU,
|
||||
0x64646464U, 0x5d5d5d5dU, 0x19191919U, 0x73737373U,
|
||||
0x60606060U, 0x81818181U, 0x4f4f4f4fU, 0xdcdcdcdcU,
|
||||
0x22222222U, 0x2a2a2a2aU, 0x90909090U, 0x88888888U,
|
||||
0x46464646U, 0xeeeeeeeeU, 0xb8b8b8b8U, 0x14141414U,
|
||||
0xdedededeU, 0x5e5e5e5eU, 0x0b0b0b0bU, 0xdbdbdbdbU,
|
||||
0xe0e0e0e0U, 0x32323232U, 0x3a3a3a3aU, 0x0a0a0a0aU,
|
||||
0x49494949U, 0x06060606U, 0x24242424U, 0x5c5c5c5cU,
|
||||
0xc2c2c2c2U, 0xd3d3d3d3U, 0xacacacacU, 0x62626262U,
|
||||
0x91919191U, 0x95959595U, 0xe4e4e4e4U, 0x79797979U,
|
||||
0xe7e7e7e7U, 0xc8c8c8c8U, 0x37373737U, 0x6d6d6d6dU,
|
||||
0x8d8d8d8dU, 0xd5d5d5d5U, 0x4e4e4e4eU, 0xa9a9a9a9U,
|
||||
0x6c6c6c6cU, 0x56565656U, 0xf4f4f4f4U, 0xeaeaeaeaU,
|
||||
0x65656565U, 0x7a7a7a7aU, 0xaeaeaeaeU, 0x08080808U,
|
||||
0xbabababaU, 0x78787878U, 0x25252525U, 0x2e2e2e2eU,
|
||||
0x1c1c1c1cU, 0xa6a6a6a6U, 0xb4b4b4b4U, 0xc6c6c6c6U,
|
||||
0xe8e8e8e8U, 0xddddddddU, 0x74747474U, 0x1f1f1f1fU,
|
||||
0x4b4b4b4bU, 0xbdbdbdbdU, 0x8b8b8b8bU, 0x8a8a8a8aU,
|
||||
0x70707070U, 0x3e3e3e3eU, 0xb5b5b5b5U, 0x66666666U,
|
||||
0x48484848U, 0x03030303U, 0xf6f6f6f6U, 0x0e0e0e0eU,
|
||||
0x61616161U, 0x35353535U, 0x57575757U, 0xb9b9b9b9U,
|
||||
0x86868686U, 0xc1c1c1c1U, 0x1d1d1d1dU, 0x9e9e9e9eU,
|
||||
0xe1e1e1e1U, 0xf8f8f8f8U, 0x98989898U, 0x11111111U,
|
||||
0x69696969U, 0xd9d9d9d9U, 0x8e8e8e8eU, 0x94949494U,
|
||||
0x9b9b9b9bU, 0x1e1e1e1eU, 0x87878787U, 0xe9e9e9e9U,
|
||||
0xcecececeU, 0x55555555U, 0x28282828U, 0xdfdfdfdfU,
|
||||
0x8c8c8c8cU, 0xa1a1a1a1U, 0x89898989U, 0x0d0d0d0dU,
|
||||
0xbfbfbfbfU, 0xe6e6e6e6U, 0x42424242U, 0x68686868U,
|
||||
0x41414141U, 0x99999999U, 0x2d2d2d2dU, 0x0f0f0f0fU,
|
||||
0xb0b0b0b0U, 0x54545454U, 0xbbbbbbbbU, 0x16161616U,
|
||||
};
|
||||
|
||||
uint32 Td0[256] =
|
||||
{
|
||||
0x51f4a750U, 0x7e416553U, 0x1a17a4c3U, 0x3a275e96U,
|
||||
0x3bab6bcbU, 0x1f9d45f1U, 0xacfa58abU, 0x4be30393U,
|
||||
0x2030fa55U, 0xad766df6U, 0x88cc7691U, 0xf5024c25U,
|
||||
0x4fe5d7fcU, 0xc52acbd7U, 0x26354480U, 0xb562a38fU,
|
||||
0xdeb15a49U, 0x25ba1b67U, 0x45ea0e98U, 0x5dfec0e1U,
|
||||
0xc32f7502U, 0x814cf012U, 0x8d4697a3U, 0x6bd3f9c6U,
|
||||
0x038f5fe7U, 0x15929c95U, 0xbf6d7aebU, 0x955259daU,
|
||||
0xd4be832dU, 0x587421d3U, 0x49e06929U, 0x8ec9c844U,
|
||||
0x75c2896aU, 0xf48e7978U, 0x99583e6bU, 0x27b971ddU,
|
||||
0xbee14fb6U, 0xf088ad17U, 0xc920ac66U, 0x7dce3ab4U,
|
||||
0x63df4a18U, 0xe51a3182U, 0x97513360U, 0x62537f45U,
|
||||
0xb16477e0U, 0xbb6bae84U, 0xfe81a01cU, 0xf9082b94U,
|
||||
0x70486858U, 0x8f45fd19U, 0x94de6c87U, 0x527bf8b7U,
|
||||
0xab73d323U, 0x724b02e2U, 0xe31f8f57U, 0x6655ab2aU,
|
||||
0xb2eb2807U, 0x2fb5c203U, 0x86c57b9aU, 0xd33708a5U,
|
||||
0x302887f2U, 0x23bfa5b2U, 0x02036abaU, 0xed16825cU,
|
||||
0x8acf1c2bU, 0xa779b492U, 0xf307f2f0U, 0x4e69e2a1U,
|
||||
0x65daf4cdU, 0x0605bed5U, 0xd134621fU, 0xc4a6fe8aU,
|
||||
0x342e539dU, 0xa2f355a0U, 0x058ae132U, 0xa4f6eb75U,
|
||||
0x0b83ec39U, 0x4060efaaU, 0x5e719f06U, 0xbd6e1051U,
|
||||
0x3e218af9U, 0x96dd063dU, 0xdd3e05aeU, 0x4de6bd46U,
|
||||
0x91548db5U, 0x71c45d05U, 0x0406d46fU, 0x605015ffU,
|
||||
0x1998fb24U, 0xd6bde997U, 0x894043ccU, 0x67d99e77U,
|
||||
0xb0e842bdU, 0x07898b88U, 0xe7195b38U, 0x79c8eedbU,
|
||||
0xa17c0a47U, 0x7c420fe9U, 0xf8841ec9U, 0x00000000U,
|
||||
0x09808683U, 0x322bed48U, 0x1e1170acU, 0x6c5a724eU,
|
||||
0xfd0efffbU, 0x0f853856U, 0x3daed51eU, 0x362d3927U,
|
||||
0x0a0fd964U, 0x685ca621U, 0x9b5b54d1U, 0x24362e3aU,
|
||||
0x0c0a67b1U, 0x9357e70fU, 0xb4ee96d2U, 0x1b9b919eU,
|
||||
0x80c0c54fU, 0x61dc20a2U, 0x5a774b69U, 0x1c121a16U,
|
||||
0xe293ba0aU, 0xc0a02ae5U, 0x3c22e043U, 0x121b171dU,
|
||||
0x0e090d0bU, 0xf28bc7adU, 0x2db6a8b9U, 0x141ea9c8U,
|
||||
0x57f11985U, 0xaf75074cU, 0xee99ddbbU, 0xa37f60fdU,
|
||||
0xf701269fU, 0x5c72f5bcU, 0x44663bc5U, 0x5bfb7e34U,
|
||||
0x8b432976U, 0xcb23c6dcU, 0xb6edfc68U, 0xb8e4f163U,
|
||||
0xd731dccaU, 0x42638510U, 0x13972240U, 0x84c61120U,
|
||||
0x854a247dU, 0xd2bb3df8U, 0xaef93211U, 0xc729a16dU,
|
||||
0x1d9e2f4bU, 0xdcb230f3U, 0x0d8652ecU, 0x77c1e3d0U,
|
||||
0x2bb3166cU, 0xa970b999U, 0x119448faU, 0x47e96422U,
|
||||
0xa8fc8cc4U, 0xa0f03f1aU, 0x567d2cd8U, 0x223390efU,
|
||||
0x87494ec7U, 0xd938d1c1U, 0x8ccaa2feU, 0x98d40b36U,
|
||||
0xa6f581cfU, 0xa57ade28U, 0xdab78e26U, 0x3fadbfa4U,
|
||||
0x2c3a9de4U, 0x5078920dU, 0x6a5fcc9bU, 0x547e4662U,
|
||||
0xf68d13c2U, 0x90d8b8e8U, 0x2e39f75eU, 0x82c3aff5U,
|
||||
0x9f5d80beU, 0x69d0937cU, 0x6fd52da9U, 0xcf2512b3U,
|
||||
0xc8ac993bU, 0x10187da7U, 0xe89c636eU, 0xdb3bbb7bU,
|
||||
0xcd267809U, 0x6e5918f4U, 0xec9ab701U, 0x834f9aa8U,
|
||||
0xe6956e65U, 0xaaffe67eU, 0x21bccf08U, 0xef15e8e6U,
|
||||
0xbae79bd9U, 0x4a6f36ceU, 0xea9f09d4U, 0x29b07cd6U,
|
||||
0x31a4b2afU, 0x2a3f2331U, 0xc6a59430U, 0x35a266c0U,
|
||||
0x744ebc37U, 0xfc82caa6U, 0xe090d0b0U, 0x33a7d815U,
|
||||
0xf104984aU, 0x41ecdaf7U, 0x7fcd500eU, 0x1791f62fU,
|
||||
0x764dd68dU, 0x43efb04dU, 0xccaa4d54U, 0xe49604dfU,
|
||||
0x9ed1b5e3U, 0x4c6a881bU, 0xc12c1fb8U, 0x4665517fU,
|
||||
0x9d5eea04U, 0x018c355dU, 0xfa877473U, 0xfb0b412eU,
|
||||
0xb3671d5aU, 0x92dbd252U, 0xe9105633U, 0x6dd64713U,
|
||||
0x9ad7618cU, 0x37a10c7aU, 0x59f8148eU, 0xeb133c89U,
|
||||
0xcea927eeU, 0xb761c935U, 0xe11ce5edU, 0x7a47b13cU,
|
||||
0x9cd2df59U, 0x55f2733fU, 0x1814ce79U, 0x73c737bfU,
|
||||
0x53f7cdeaU, 0x5ffdaa5bU, 0xdf3d6f14U, 0x7844db86U,
|
||||
0xcaaff381U, 0xb968c43eU, 0x3824342cU, 0xc2a3405fU,
|
||||
0x161dc372U, 0xbce2250cU, 0x283c498bU, 0xff0d9541U,
|
||||
0x39a80171U, 0x080cb3deU, 0xd8b4e49cU, 0x6456c190U,
|
||||
0x7bcb8461U, 0xd532b670U, 0x486c5c74U, 0xd0b85742U,
|
||||
};
|
||||
|
||||
|
||||
uint32 Td1[256] =
|
||||
{
|
||||
0x5051f4a7U, 0x537e4165U, 0xc31a17a4U, 0x963a275eU,
|
||||
0xcb3bab6bU, 0xf11f9d45U, 0xabacfa58U, 0x934be303U,
|
||||
0x552030faU, 0xf6ad766dU, 0x9188cc76U, 0x25f5024cU,
|
||||
0xfc4fe5d7U, 0xd7c52acbU, 0x80263544U, 0x8fb562a3U,
|
||||
0x49deb15aU, 0x6725ba1bU, 0x9845ea0eU, 0xe15dfec0U,
|
||||
0x02c32f75U, 0x12814cf0U, 0xa38d4697U, 0xc66bd3f9U,
|
||||
0xe7038f5fU, 0x9515929cU, 0xebbf6d7aU, 0xda955259U,
|
||||
0x2dd4be83U, 0xd3587421U, 0x2949e069U, 0x448ec9c8U,
|
||||
0x6a75c289U, 0x78f48e79U, 0x6b99583eU, 0xdd27b971U,
|
||||
0xb6bee14fU, 0x17f088adU, 0x66c920acU, 0xb47dce3aU,
|
||||
0x1863df4aU, 0x82e51a31U, 0x60975133U, 0x4562537fU,
|
||||
0xe0b16477U, 0x84bb6baeU, 0x1cfe81a0U, 0x94f9082bU,
|
||||
0x58704868U, 0x198f45fdU, 0x8794de6cU, 0xb7527bf8U,
|
||||
0x23ab73d3U, 0xe2724b02U, 0x57e31f8fU, 0x2a6655abU,
|
||||
0x07b2eb28U, 0x032fb5c2U, 0x9a86c57bU, 0xa5d33708U,
|
||||
0xf2302887U, 0xb223bfa5U, 0xba02036aU, 0x5ced1682U,
|
||||
0x2b8acf1cU, 0x92a779b4U, 0xf0f307f2U, 0xa14e69e2U,
|
||||
0xcd65daf4U, 0xd50605beU, 0x1fd13462U, 0x8ac4a6feU,
|
||||
0x9d342e53U, 0xa0a2f355U, 0x32058ae1U, 0x75a4f6ebU,
|
||||
0x390b83ecU, 0xaa4060efU, 0x065e719fU, 0x51bd6e10U,
|
||||
0xf93e218aU, 0x3d96dd06U, 0xaedd3e05U, 0x464de6bdU,
|
||||
0xb591548dU, 0x0571c45dU, 0x6f0406d4U, 0xff605015U,
|
||||
0x241998fbU, 0x97d6bde9U, 0xcc894043U, 0x7767d99eU,
|
||||
0xbdb0e842U, 0x8807898bU, 0x38e7195bU, 0xdb79c8eeU,
|
||||
0x47a17c0aU, 0xe97c420fU, 0xc9f8841eU, 0x00000000U,
|
||||
0x83098086U, 0x48322bedU, 0xac1e1170U, 0x4e6c5a72U,
|
||||
0xfbfd0effU, 0x560f8538U, 0x1e3daed5U, 0x27362d39U,
|
||||
0x640a0fd9U, 0x21685ca6U, 0xd19b5b54U, 0x3a24362eU,
|
||||
0xb10c0a67U, 0x0f9357e7U, 0xd2b4ee96U, 0x9e1b9b91U,
|
||||
0x4f80c0c5U, 0xa261dc20U, 0x695a774bU, 0x161c121aU,
|
||||
0x0ae293baU, 0xe5c0a02aU, 0x433c22e0U, 0x1d121b17U,
|
||||
0x0b0e090dU, 0xadf28bc7U, 0xb92db6a8U, 0xc8141ea9U,
|
||||
0x8557f119U, 0x4caf7507U, 0xbbee99ddU, 0xfda37f60U,
|
||||
0x9ff70126U, 0xbc5c72f5U, 0xc544663bU, 0x345bfb7eU,
|
||||
0x768b4329U, 0xdccb23c6U, 0x68b6edfcU, 0x63b8e4f1U,
|
||||
0xcad731dcU, 0x10426385U, 0x40139722U, 0x2084c611U,
|
||||
0x7d854a24U, 0xf8d2bb3dU, 0x11aef932U, 0x6dc729a1U,
|
||||
0x4b1d9e2fU, 0xf3dcb230U, 0xec0d8652U, 0xd077c1e3U,
|
||||
0x6c2bb316U, 0x99a970b9U, 0xfa119448U, 0x2247e964U,
|
||||
0xc4a8fc8cU, 0x1aa0f03fU, 0xd8567d2cU, 0xef223390U,
|
||||
0xc787494eU, 0xc1d938d1U, 0xfe8ccaa2U, 0x3698d40bU,
|
||||
0xcfa6f581U, 0x28a57adeU, 0x26dab78eU, 0xa43fadbfU,
|
||||
0xe42c3a9dU, 0x0d507892U, 0x9b6a5fccU, 0x62547e46U,
|
||||
0xc2f68d13U, 0xe890d8b8U, 0x5e2e39f7U, 0xf582c3afU,
|
||||
0xbe9f5d80U, 0x7c69d093U, 0xa96fd52dU, 0xb3cf2512U,
|
||||
0x3bc8ac99U, 0xa710187dU, 0x6ee89c63U, 0x7bdb3bbbU,
|
||||
0x09cd2678U, 0xf46e5918U, 0x01ec9ab7U, 0xa8834f9aU,
|
||||
0x65e6956eU, 0x7eaaffe6U, 0x0821bccfU, 0xe6ef15e8U,
|
||||
0xd9bae79bU, 0xce4a6f36U, 0xd4ea9f09U, 0xd629b07cU,
|
||||
0xaf31a4b2U, 0x312a3f23U, 0x30c6a594U, 0xc035a266U,
|
||||
0x37744ebcU, 0xa6fc82caU, 0xb0e090d0U, 0x1533a7d8U,
|
||||
0x4af10498U, 0xf741ecdaU, 0x0e7fcd50U, 0x2f1791f6U,
|
||||
0x8d764dd6U, 0x4d43efb0U, 0x54ccaa4dU, 0xdfe49604U,
|
||||
0xe39ed1b5U, 0x1b4c6a88U, 0xb8c12c1fU, 0x7f466551U,
|
||||
0x049d5eeaU, 0x5d018c35U, 0x73fa8774U, 0x2efb0b41U,
|
||||
0x5ab3671dU, 0x5292dbd2U, 0x33e91056U, 0x136dd647U,
|
||||
0x8c9ad761U, 0x7a37a10cU, 0x8e59f814U, 0x89eb133cU,
|
||||
0xeecea927U, 0x35b761c9U, 0xede11ce5U, 0x3c7a47b1U,
|
||||
0x599cd2dfU, 0x3f55f273U, 0x791814ceU, 0xbf73c737U,
|
||||
0xea53f7cdU, 0x5b5ffdaaU, 0x14df3d6fU, 0x867844dbU,
|
||||
0x81caaff3U, 0x3eb968c4U, 0x2c382434U, 0x5fc2a340U,
|
||||
0x72161dc3U, 0x0cbce225U, 0x8b283c49U, 0x41ff0d95U,
|
||||
0x7139a801U, 0xde080cb3U, 0x9cd8b4e4U, 0x906456c1U,
|
||||
0x617bcb84U, 0x70d532b6U, 0x74486c5cU, 0x42d0b857U,
|
||||
};
|
||||
|
||||
|
||||
uint32 Td2[256] =
|
||||
{
|
||||
0xa75051f4U, 0x65537e41U, 0xa4c31a17U, 0x5e963a27U,
|
||||
0x6bcb3babU, 0x45f11f9dU, 0x58abacfaU, 0x03934be3U,
|
||||
0xfa552030U, 0x6df6ad76U, 0x769188ccU, 0x4c25f502U,
|
||||
0xd7fc4fe5U, 0xcbd7c52aU, 0x44802635U, 0xa38fb562U,
|
||||
0x5a49deb1U, 0x1b6725baU, 0x0e9845eaU, 0xc0e15dfeU,
|
||||
0x7502c32fU, 0xf012814cU, 0x97a38d46U, 0xf9c66bd3U,
|
||||
0x5fe7038fU, 0x9c951592U, 0x7aebbf6dU, 0x59da9552U,
|
||||
0x832dd4beU, 0x21d35874U, 0x692949e0U, 0xc8448ec9U,
|
||||
0x896a75c2U, 0x7978f48eU, 0x3e6b9958U, 0x71dd27b9U,
|
||||
0x4fb6bee1U, 0xad17f088U, 0xac66c920U, 0x3ab47dceU,
|
||||
0x4a1863dfU, 0x3182e51aU, 0x33609751U, 0x7f456253U,
|
||||
0x77e0b164U, 0xae84bb6bU, 0xa01cfe81U, 0x2b94f908U,
|
||||
0x68587048U, 0xfd198f45U, 0x6c8794deU, 0xf8b7527bU,
|
||||
0xd323ab73U, 0x02e2724bU, 0x8f57e31fU, 0xab2a6655U,
|
||||
0x2807b2ebU, 0xc2032fb5U, 0x7b9a86c5U, 0x08a5d337U,
|
||||
0x87f23028U, 0xa5b223bfU, 0x6aba0203U, 0x825ced16U,
|
||||
0x1c2b8acfU, 0xb492a779U, 0xf2f0f307U, 0xe2a14e69U,
|
||||
0xf4cd65daU, 0xbed50605U, 0x621fd134U, 0xfe8ac4a6U,
|
||||
0x539d342eU, 0x55a0a2f3U, 0xe132058aU, 0xeb75a4f6U,
|
||||
0xec390b83U, 0xefaa4060U, 0x9f065e71U, 0x1051bd6eU,
|
||||
0x8af93e21U, 0x063d96ddU, 0x05aedd3eU, 0xbd464de6U,
|
||||
0x8db59154U, 0x5d0571c4U, 0xd46f0406U, 0x15ff6050U,
|
||||
0xfb241998U, 0xe997d6bdU, 0x43cc8940U, 0x9e7767d9U,
|
||||
0x42bdb0e8U, 0x8b880789U, 0x5b38e719U, 0xeedb79c8U,
|
||||
0x0a47a17cU, 0x0fe97c42U, 0x1ec9f884U, 0x00000000U,
|
||||
0x86830980U, 0xed48322bU, 0x70ac1e11U, 0x724e6c5aU,
|
||||
0xfffbfd0eU, 0x38560f85U, 0xd51e3daeU, 0x3927362dU,
|
||||
0xd9640a0fU, 0xa621685cU, 0x54d19b5bU, 0x2e3a2436U,
|
||||
0x67b10c0aU, 0xe70f9357U, 0x96d2b4eeU, 0x919e1b9bU,
|
||||
0xc54f80c0U, 0x20a261dcU, 0x4b695a77U, 0x1a161c12U,
|
||||
0xba0ae293U, 0x2ae5c0a0U, 0xe0433c22U, 0x171d121bU,
|
||||
0x0d0b0e09U, 0xc7adf28bU, 0xa8b92db6U, 0xa9c8141eU,
|
||||
0x198557f1U, 0x074caf75U, 0xddbbee99U, 0x60fda37fU,
|
||||
0x269ff701U, 0xf5bc5c72U, 0x3bc54466U, 0x7e345bfbU,
|
||||
0x29768b43U, 0xc6dccb23U, 0xfc68b6edU, 0xf163b8e4U,
|
||||
0xdccad731U, 0x85104263U, 0x22401397U, 0x112084c6U,
|
||||
0x247d854aU, 0x3df8d2bbU, 0x3211aef9U, 0xa16dc729U,
|
||||
0x2f4b1d9eU, 0x30f3dcb2U, 0x52ec0d86U, 0xe3d077c1U,
|
||||
0x166c2bb3U, 0xb999a970U, 0x48fa1194U, 0x642247e9U,
|
||||
0x8cc4a8fcU, 0x3f1aa0f0U, 0x2cd8567dU, 0x90ef2233U,
|
||||
0x4ec78749U, 0xd1c1d938U, 0xa2fe8ccaU, 0x0b3698d4U,
|
||||
0x81cfa6f5U, 0xde28a57aU, 0x8e26dab7U, 0xbfa43fadU,
|
||||
0x9de42c3aU, 0x920d5078U, 0xcc9b6a5fU, 0x4662547eU,
|
||||
0x13c2f68dU, 0xb8e890d8U, 0xf75e2e39U, 0xaff582c3U,
|
||||
0x80be9f5dU, 0x937c69d0U, 0x2da96fd5U, 0x12b3cf25U,
|
||||
0x993bc8acU, 0x7da71018U, 0x636ee89cU, 0xbb7bdb3bU,
|
||||
0x7809cd26U, 0x18f46e59U, 0xb701ec9aU, 0x9aa8834fU,
|
||||
0x6e65e695U, 0xe67eaaffU, 0xcf0821bcU, 0xe8e6ef15U,
|
||||
0x9bd9bae7U, 0x36ce4a6fU, 0x09d4ea9fU, 0x7cd629b0U,
|
||||
0xb2af31a4U, 0x23312a3fU, 0x9430c6a5U, 0x66c035a2U,
|
||||
0xbc37744eU, 0xcaa6fc82U, 0xd0b0e090U, 0xd81533a7U,
|
||||
0x984af104U, 0xdaf741ecU, 0x500e7fcdU, 0xf62f1791U,
|
||||
0xd68d764dU, 0xb04d43efU, 0x4d54ccaaU, 0x04dfe496U,
|
||||
0xb5e39ed1U, 0x881b4c6aU, 0x1fb8c12cU, 0x517f4665U,
|
||||
0xea049d5eU, 0x355d018cU, 0x7473fa87U, 0x412efb0bU,
|
||||
0x1d5ab367U, 0xd25292dbU, 0x5633e910U, 0x47136dd6U,
|
||||
0x618c9ad7U, 0x0c7a37a1U, 0x148e59f8U, 0x3c89eb13U,
|
||||
0x27eecea9U, 0xc935b761U, 0xe5ede11cU, 0xb13c7a47U,
|
||||
0xdf599cd2U, 0x733f55f2U, 0xce791814U, 0x37bf73c7U,
|
||||
0xcdea53f7U, 0xaa5b5ffdU, 0x6f14df3dU, 0xdb867844U,
|
||||
0xf381caafU, 0xc43eb968U, 0x342c3824U, 0x405fc2a3U,
|
||||
0xc372161dU, 0x250cbce2U, 0x498b283cU, 0x9541ff0dU,
|
||||
0x017139a8U, 0xb3de080cU, 0xe49cd8b4U, 0xc1906456U,
|
||||
0x84617bcbU, 0xb670d532U, 0x5c74486cU, 0x5742d0b8U,
|
||||
};
|
||||
|
||||
uint32 Td3[256] =
|
||||
{
|
||||
0xf4a75051U, 0x4165537eU, 0x17a4c31aU, 0x275e963aU,
|
||||
0xab6bcb3bU, 0x9d45f11fU, 0xfa58abacU, 0xe303934bU,
|
||||
0x30fa5520U, 0x766df6adU, 0xcc769188U, 0x024c25f5U,
|
||||
0xe5d7fc4fU, 0x2acbd7c5U, 0x35448026U, 0x62a38fb5U,
|
||||
0xb15a49deU, 0xba1b6725U, 0xea0e9845U, 0xfec0e15dU,
|
||||
0x2f7502c3U, 0x4cf01281U, 0x4697a38dU, 0xd3f9c66bU,
|
||||
0x8f5fe703U, 0x929c9515U, 0x6d7aebbfU, 0x5259da95U,
|
||||
0xbe832dd4U, 0x7421d358U, 0xe0692949U, 0xc9c8448eU,
|
||||
0xc2896a75U, 0x8e7978f4U, 0x583e6b99U, 0xb971dd27U,
|
||||
0xe14fb6beU, 0x88ad17f0U, 0x20ac66c9U, 0xce3ab47dU,
|
||||
0xdf4a1863U, 0x1a3182e5U, 0x51336097U, 0x537f4562U,
|
||||
0x6477e0b1U, 0x6bae84bbU, 0x81a01cfeU, 0x082b94f9U,
|
||||
0x48685870U, 0x45fd198fU, 0xde6c8794U, 0x7bf8b752U,
|
||||
0x73d323abU, 0x4b02e272U, 0x1f8f57e3U, 0x55ab2a66U,
|
||||
0xeb2807b2U, 0xb5c2032fU, 0xc57b9a86U, 0x3708a5d3U,
|
||||
0x2887f230U, 0xbfa5b223U, 0x036aba02U, 0x16825cedU,
|
||||
0xcf1c2b8aU, 0x79b492a7U, 0x07f2f0f3U, 0x69e2a14eU,
|
||||
0xdaf4cd65U, 0x05bed506U, 0x34621fd1U, 0xa6fe8ac4U,
|
||||
0x2e539d34U, 0xf355a0a2U, 0x8ae13205U, 0xf6eb75a4U,
|
||||
0x83ec390bU, 0x60efaa40U, 0x719f065eU, 0x6e1051bdU,
|
||||
0x218af93eU, 0xdd063d96U, 0x3e05aeddU, 0xe6bd464dU,
|
||||
0x548db591U, 0xc45d0571U, 0x06d46f04U, 0x5015ff60U,
|
||||
0x98fb2419U, 0xbde997d6U, 0x4043cc89U, 0xd99e7767U,
|
||||
0xe842bdb0U, 0x898b8807U, 0x195b38e7U, 0xc8eedb79U,
|
||||
0x7c0a47a1U, 0x420fe97cU, 0x841ec9f8U, 0x00000000U,
|
||||
0x80868309U, 0x2bed4832U, 0x1170ac1eU, 0x5a724e6cU,
|
||||
0x0efffbfdU, 0x8538560fU, 0xaed51e3dU, 0x2d392736U,
|
||||
0x0fd9640aU, 0x5ca62168U, 0x5b54d19bU, 0x362e3a24U,
|
||||
0x0a67b10cU, 0x57e70f93U, 0xee96d2b4U, 0x9b919e1bU,
|
||||
0xc0c54f80U, 0xdc20a261U, 0x774b695aU, 0x121a161cU,
|
||||
0x93ba0ae2U, 0xa02ae5c0U, 0x22e0433cU, 0x1b171d12U,
|
||||
0x090d0b0eU, 0x8bc7adf2U, 0xb6a8b92dU, 0x1ea9c814U,
|
||||
0xf1198557U, 0x75074cafU, 0x99ddbbeeU, 0x7f60fda3U,
|
||||
0x01269ff7U, 0x72f5bc5cU, 0x663bc544U, 0xfb7e345bU,
|
||||
0x4329768bU, 0x23c6dccbU, 0xedfc68b6U, 0xe4f163b8U,
|
||||
0x31dccad7U, 0x63851042U, 0x97224013U, 0xc6112084U,
|
||||
0x4a247d85U, 0xbb3df8d2U, 0xf93211aeU, 0x29a16dc7U,
|
||||
0x9e2f4b1dU, 0xb230f3dcU, 0x8652ec0dU, 0xc1e3d077U,
|
||||
0xb3166c2bU, 0x70b999a9U, 0x9448fa11U, 0xe9642247U,
|
||||
0xfc8cc4a8U, 0xf03f1aa0U, 0x7d2cd856U, 0x3390ef22U,
|
||||
0x494ec787U, 0x38d1c1d9U, 0xcaa2fe8cU, 0xd40b3698U,
|
||||
0xf581cfa6U, 0x7ade28a5U, 0xb78e26daU, 0xadbfa43fU,
|
||||
0x3a9de42cU, 0x78920d50U, 0x5fcc9b6aU, 0x7e466254U,
|
||||
0x8d13c2f6U, 0xd8b8e890U, 0x39f75e2eU, 0xc3aff582U,
|
||||
0x5d80be9fU, 0xd0937c69U, 0xd52da96fU, 0x2512b3cfU,
|
||||
0xac993bc8U, 0x187da710U, 0x9c636ee8U, 0x3bbb7bdbU,
|
||||
0x267809cdU, 0x5918f46eU, 0x9ab701ecU, 0x4f9aa883U,
|
||||
0x956e65e6U, 0xffe67eaaU, 0xbccf0821U, 0x15e8e6efU,
|
||||
0xe79bd9baU, 0x6f36ce4aU, 0x9f09d4eaU, 0xb07cd629U,
|
||||
0xa4b2af31U, 0x3f23312aU, 0xa59430c6U, 0xa266c035U,
|
||||
0x4ebc3774U, 0x82caa6fcU, 0x90d0b0e0U, 0xa7d81533U,
|
||||
0x04984af1U, 0xecdaf741U, 0xcd500e7fU, 0x91f62f17U,
|
||||
0x4dd68d76U, 0xefb04d43U, 0xaa4d54ccU, 0x9604dfe4U,
|
||||
0xd1b5e39eU, 0x6a881b4cU, 0x2c1fb8c1U, 0x65517f46U,
|
||||
0x5eea049dU, 0x8c355d01U, 0x877473faU, 0x0b412efbU,
|
||||
0x671d5ab3U, 0xdbd25292U, 0x105633e9U, 0xd647136dU,
|
||||
0xd7618c9aU, 0xa10c7a37U, 0xf8148e59U, 0x133c89ebU,
|
||||
0xa927eeceU, 0x61c935b7U, 0x1ce5ede1U, 0x47b13c7aU,
|
||||
0xd2df599cU, 0xf2733f55U, 0x14ce7918U, 0xc737bf73U,
|
||||
0xf7cdea53U, 0xfdaa5b5fU, 0x3d6f14dfU, 0x44db8678U,
|
||||
0xaff381caU, 0x68c43eb9U, 0x24342c38U, 0xa3405fc2U,
|
||||
0x1dc37216U, 0xe2250cbcU, 0x3c498b28U, 0x0d9541ffU,
|
||||
0xa8017139U, 0x0cb3de08U, 0xb4e49cd8U, 0x56c19064U,
|
||||
0xcb84617bU, 0x32b670d5U, 0x6c5c7448U, 0xb85742d0U,
|
||||
};
|
||||
|
||||
uint32 Td4[256] =
|
||||
{
|
||||
0x52525252U, 0x09090909U, 0x6a6a6a6aU, 0xd5d5d5d5U,
|
||||
0x30303030U, 0x36363636U, 0xa5a5a5a5U, 0x38383838U,
|
||||
0xbfbfbfbfU, 0x40404040U, 0xa3a3a3a3U, 0x9e9e9e9eU,
|
||||
0x81818181U, 0xf3f3f3f3U, 0xd7d7d7d7U, 0xfbfbfbfbU,
|
||||
0x7c7c7c7cU, 0xe3e3e3e3U, 0x39393939U, 0x82828282U,
|
||||
0x9b9b9b9bU, 0x2f2f2f2fU, 0xffffffffU, 0x87878787U,
|
||||
0x34343434U, 0x8e8e8e8eU, 0x43434343U, 0x44444444U,
|
||||
0xc4c4c4c4U, 0xdedededeU, 0xe9e9e9e9U, 0xcbcbcbcbU,
|
||||
0x54545454U, 0x7b7b7b7bU, 0x94949494U, 0x32323232U,
|
||||
0xa6a6a6a6U, 0xc2c2c2c2U, 0x23232323U, 0x3d3d3d3dU,
|
||||
0xeeeeeeeeU, 0x4c4c4c4cU, 0x95959595U, 0x0b0b0b0bU,
|
||||
0x42424242U, 0xfafafafaU, 0xc3c3c3c3U, 0x4e4e4e4eU,
|
||||
0x08080808U, 0x2e2e2e2eU, 0xa1a1a1a1U, 0x66666666U,
|
||||
0x28282828U, 0xd9d9d9d9U, 0x24242424U, 0xb2b2b2b2U,
|
||||
0x76767676U, 0x5b5b5b5bU, 0xa2a2a2a2U, 0x49494949U,
|
||||
0x6d6d6d6dU, 0x8b8b8b8bU, 0xd1d1d1d1U, 0x25252525U,
|
||||
0x72727272U, 0xf8f8f8f8U, 0xf6f6f6f6U, 0x64646464U,
|
||||
0x86868686U, 0x68686868U, 0x98989898U, 0x16161616U,
|
||||
0xd4d4d4d4U, 0xa4a4a4a4U, 0x5c5c5c5cU, 0xccccccccU,
|
||||
0x5d5d5d5dU, 0x65656565U, 0xb6b6b6b6U, 0x92929292U,
|
||||
0x6c6c6c6cU, 0x70707070U, 0x48484848U, 0x50505050U,
|
||||
0xfdfdfdfdU, 0xededededU, 0xb9b9b9b9U, 0xdadadadaU,
|
||||
0x5e5e5e5eU, 0x15151515U, 0x46464646U, 0x57575757U,
|
||||
0xa7a7a7a7U, 0x8d8d8d8dU, 0x9d9d9d9dU, 0x84848484U,
|
||||
0x90909090U, 0xd8d8d8d8U, 0xababababU, 0x00000000U,
|
||||
0x8c8c8c8cU, 0xbcbcbcbcU, 0xd3d3d3d3U, 0x0a0a0a0aU,
|
||||
0xf7f7f7f7U, 0xe4e4e4e4U, 0x58585858U, 0x05050505U,
|
||||
0xb8b8b8b8U, 0xb3b3b3b3U, 0x45454545U, 0x06060606U,
|
||||
0xd0d0d0d0U, 0x2c2c2c2cU, 0x1e1e1e1eU, 0x8f8f8f8fU,
|
||||
0xcacacacaU, 0x3f3f3f3fU, 0x0f0f0f0fU, 0x02020202U,
|
||||
0xc1c1c1c1U, 0xafafafafU, 0xbdbdbdbdU, 0x03030303U,
|
||||
0x01010101U, 0x13131313U, 0x8a8a8a8aU, 0x6b6b6b6bU,
|
||||
0x3a3a3a3aU, 0x91919191U, 0x11111111U, 0x41414141U,
|
||||
0x4f4f4f4fU, 0x67676767U, 0xdcdcdcdcU, 0xeaeaeaeaU,
|
||||
0x97979797U, 0xf2f2f2f2U, 0xcfcfcfcfU, 0xcecececeU,
|
||||
0xf0f0f0f0U, 0xb4b4b4b4U, 0xe6e6e6e6U, 0x73737373U,
|
||||
0x96969696U, 0xacacacacU, 0x74747474U, 0x22222222U,
|
||||
0xe7e7e7e7U, 0xadadadadU, 0x35353535U, 0x85858585U,
|
||||
0xe2e2e2e2U, 0xf9f9f9f9U, 0x37373737U, 0xe8e8e8e8U,
|
||||
0x1c1c1c1cU, 0x75757575U, 0xdfdfdfdfU, 0x6e6e6e6eU,
|
||||
0x47474747U, 0xf1f1f1f1U, 0x1a1a1a1aU, 0x71717171U,
|
||||
0x1d1d1d1dU, 0x29292929U, 0xc5c5c5c5U, 0x89898989U,
|
||||
0x6f6f6f6fU, 0xb7b7b7b7U, 0x62626262U, 0x0e0e0e0eU,
|
||||
0xaaaaaaaaU, 0x18181818U, 0xbebebebeU, 0x1b1b1b1bU,
|
||||
0xfcfcfcfcU, 0x56565656U, 0x3e3e3e3eU, 0x4b4b4b4bU,
|
||||
0xc6c6c6c6U, 0xd2d2d2d2U, 0x79797979U, 0x20202020U,
|
||||
0x9a9a9a9aU, 0xdbdbdbdbU, 0xc0c0c0c0U, 0xfefefefeU,
|
||||
0x78787878U, 0xcdcdcdcdU, 0x5a5a5a5aU, 0xf4f4f4f4U,
|
||||
0x1f1f1f1fU, 0xddddddddU, 0xa8a8a8a8U, 0x33333333U,
|
||||
0x88888888U, 0x07070707U, 0xc7c7c7c7U, 0x31313131U,
|
||||
0xb1b1b1b1U, 0x12121212U, 0x10101010U, 0x59595959U,
|
||||
0x27272727U, 0x80808080U, 0xececececU, 0x5f5f5f5fU,
|
||||
0x60606060U, 0x51515151U, 0x7f7f7f7fU, 0xa9a9a9a9U,
|
||||
0x19191919U, 0xb5b5b5b5U, 0x4a4a4a4aU, 0x0d0d0d0dU,
|
||||
0x2d2d2d2dU, 0xe5e5e5e5U, 0x7a7a7a7aU, 0x9f9f9f9fU,
|
||||
0x93939393U, 0xc9c9c9c9U, 0x9c9c9c9cU, 0xefefefefU,
|
||||
0xa0a0a0a0U, 0xe0e0e0e0U, 0x3b3b3b3bU, 0x4d4d4d4dU,
|
||||
0xaeaeaeaeU, 0x2a2a2a2aU, 0xf5f5f5f5U, 0xb0b0b0b0U,
|
||||
0xc8c8c8c8U, 0xebebebebU, 0xbbbbbbbbU, 0x3c3c3c3cU,
|
||||
0x83838383U, 0x53535353U, 0x99999999U, 0x61616161U,
|
||||
0x17171717U, 0x2b2b2b2bU, 0x04040404U, 0x7e7e7e7eU,
|
||||
0xbabababaU, 0x77777777U, 0xd6d6d6d6U, 0x26262626U,
|
||||
0xe1e1e1e1U, 0x69696969U, 0x14141414U, 0x63636363U,
|
||||
0x55555555U, 0x21212121U, 0x0c0c0c0cU, 0x7d7d7d7dU,
|
||||
};
|
||||
#undef uint32
|
||||
|
||||
+33
@@ -0,0 +1,33 @@
|
||||
/******************************************************************************
|
||||
* FILE PURPOSE: This file contains the cos/sin table
|
||||
*******************************************************************************
|
||||
*
|
||||
* FILE NAME: phy_cosinTable.c
|
||||
*
|
||||
* DESCRIPTION: COS and SIN Lookup Table, Length 1024
|
||||
*
|
||||
* Copyright (c) 2012 Texas Instruments Inc.
|
||||
* All Rights Reserved This program is the confidential and proprietary
|
||||
* product of Texas Instruments Inc. Any Unauthorized use, reproduction or
|
||||
* transfer of this program is strictly prohibited.
|
||||
*
|
||||
* HISTORY:
|
||||
*
|
||||
* 01/13/2013 Written
|
||||
*
|
||||
*
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
#include <phy_sunTables.h>
|
||||
|
||||
//#pragma DATA_SECTION(PHY_cosinTable, "sunPhyTable");
|
||||
#pragma DATA_SECTION(PHY_cosinTable,"sunPhyTable");
|
||||
|
||||
/* Length 1024 COS/SIN table, arranged in COS(1), SIN(1), COS(2), SIN(2), ...
|
||||
* in Q14 format */
|
||||
const SINT16 PHY_cosinTable[PHY_COSIN_LUT_SIZE * 2] =
|
||||
{
|
||||
#include "PHY_cosinTable_1024.txt"
|
||||
};
|
||||
|
||||
+259
@@ -0,0 +1,259 @@
|
||||
// 1024-point COS and SIN Table in Q14, offset by half sample
|
||||
// cos = round(2^14 * cos(2*pi*(0+0.5:Npoints-1+0.5)/Npoints));
|
||||
// sin = round(2^14 * sin(2*pi*(0+0.5:Npoints-1+0.5)/Npoints));
|
||||
16383, 50, 16383, 151, 16382, 251, 16380, 352,
|
||||
16378, 452, 16375, 553, 16371, 653, 16367, 754,
|
||||
16362, 854, 16356, 955, 16350, 1055, 16343, 1155,
|
||||
16336, 1255, 16328, 1356, 16319, 1456, 16310, 1556,
|
||||
16300, 1656, 16290, 1756, 16279, 1856, 16267, 1956,
|
||||
16255, 2055, 16242, 2155, 16228, 2255, 16214, 2354,
|
||||
16199, 2454, 16184, 2553, 16168, 2652, 16151, 2752,
|
||||
16134, 2851, 16116, 2949, 16098, 3048, 16079, 3147,
|
||||
16059, 3246, 16039, 3344, 16018, 3442, 15997, 3541,
|
||||
15975, 3639, 15952, 3737, 15929, 3835, 15905, 3932,
|
||||
15881, 4030, 15856, 4127, 15830, 4224, 15804, 4321,
|
||||
15777, 4418, 15750, 4515, 15722, 4612, 15693, 4708,
|
||||
15664, 4804, 15634, 4900, 15604, 4996, 15573, 5092,
|
||||
15541, 5187, 15509, 5282, 15476, 5377, 15443, 5472,
|
||||
15409, 5567, 15375, 5661, 15340, 5756, 15304, 5850,
|
||||
15268, 5943, 15231, 6037, 15194, 6130, 15156, 6223,
|
||||
15118, 6316, 15078, 6409, 15039, 6501, 14999, 6593,
|
||||
14958, 6685, 14917, 6777, 14875, 6868, 14832, 6960,
|
||||
14789, 7050, 14746, 7141, 14702, 7231, 14657, 7321,
|
||||
14612, 7411, 14566, 7501, 14520, 7590, 14473, 7679,
|
||||
14426, 7768, 14378, 7856, 14329, 7944, 14280, 8032,
|
||||
14231, 8119, 14181, 8207, 14130, 8293, 14079, 8380,
|
||||
14027, 8466, 13975, 8552, 13922, 8638, 13869, 8723,
|
||||
13815, 8808, 13761, 8892, 13706, 8977, 13651, 9061,
|
||||
13595, 9144, 13538, 9227, 13482, 9310, 13424, 9393,
|
||||
13366, 9475, 13308, 9557, 13249, 9638, 13190, 9720,
|
||||
13130, 9800, 13069, 9881, 13008, 9961, 12947, 10040,
|
||||
12885, 10120, 12823, 10198, 12760, 10277, 12697, 10355,
|
||||
12633, 10433, 12569, 10510, 12504, 10587, 12439, 10663,
|
||||
12373, 10740, 12307, 10815, 12240, 10891, 12173, 10966,
|
||||
12106, 11040, 12038, 11114, 11970, 11188, 11901, 11261,
|
||||
11831, 11334, 11762, 11406, 11691, 11478, 11621, 11550,
|
||||
11550, 11621, 11478, 11691, 11406, 11762, 11334, 11831,
|
||||
11261, 11901, 11188, 11970, 11114, 12038, 11040, 12106,
|
||||
10966, 12173, 10891, 12240, 10815, 12307, 10740, 12373,
|
||||
10663, 12439, 10587, 12504, 10510, 12569, 10433, 12633,
|
||||
10355, 12697, 10277, 12760, 10198, 12823, 10120, 12885,
|
||||
10040, 12947, 9961, 13008, 9881, 13069, 9800, 13130,
|
||||
9720, 13190, 9638, 13249, 9557, 13308, 9475, 13366,
|
||||
9393, 13424, 9310, 13482, 9227, 13538, 9144, 13595,
|
||||
9061, 13651, 8977, 13706, 8892, 13761, 8808, 13815,
|
||||
8723, 13869, 8638, 13922, 8552, 13975, 8466, 14027,
|
||||
8380, 14079, 8293, 14130, 8207, 14181, 8119, 14231,
|
||||
8032, 14280, 7944, 14329, 7856, 14378, 7768, 14426,
|
||||
7679, 14473, 7590, 14520, 7501, 14566, 7411, 14612,
|
||||
7321, 14657, 7231, 14702, 7141, 14746, 7050, 14789,
|
||||
6960, 14832, 6868, 14875, 6777, 14917, 6685, 14958,
|
||||
6593, 14999, 6501, 15039, 6409, 15078, 6316, 15118,
|
||||
6223, 15156, 6130, 15194, 6037, 15231, 5943, 15268,
|
||||
5850, 15304, 5756, 15340, 5661, 15375, 5567, 15409,
|
||||
5472, 15443, 5377, 15476, 5282, 15509, 5187, 15541,
|
||||
5092, 15573, 4996, 15604, 4900, 15634, 4804, 15664,
|
||||
4708, 15693, 4612, 15722, 4515, 15750, 4418, 15777,
|
||||
4321, 15804, 4224, 15830, 4127, 15856, 4030, 15881,
|
||||
3932, 15905, 3835, 15929, 3737, 15952, 3639, 15975,
|
||||
3541, 15997, 3442, 16018, 3344, 16039, 3246, 16059,
|
||||
3147, 16079, 3048, 16098, 2949, 16116, 2851, 16134,
|
||||
2752, 16151, 2652, 16168, 2553, 16184, 2454, 16199,
|
||||
2354, 16214, 2255, 16228, 2155, 16242, 2055, 16255,
|
||||
1956, 16267, 1856, 16279, 1756, 16290, 1656, 16300,
|
||||
1556, 16310, 1456, 16319, 1356, 16328, 1255, 16336,
|
||||
1155, 16343, 1055, 16350, 955, 16356, 854, 16362,
|
||||
754, 16367, 653, 16371, 553, 16375, 452, 16378,
|
||||
352, 16380, 251, 16382, 151, 16383, 50, 16383,
|
||||
-50, 16383, -151, 16383, -251, 16382, -352, 16380,
|
||||
-452, 16378, -553, 16375, -653, 16371, -754, 16367,
|
||||
-854, 16362, -955, 16356, -1055, 16350, -1155, 16343,
|
||||
-1255, 16336, -1356, 16328, -1456, 16319, -1556, 16310,
|
||||
-1656, 16300, -1756, 16290, -1856, 16279, -1956, 16267,
|
||||
-2055, 16255, -2155, 16242, -2255, 16228, -2354, 16214,
|
||||
-2454, 16199, -2553, 16184, -2652, 16168, -2752, 16151,
|
||||
-2851, 16134, -2949, 16116, -3048, 16098, -3147, 16079,
|
||||
-3246, 16059, -3344, 16039, -3442, 16018, -3541, 15997,
|
||||
-3639, 15975, -3737, 15952, -3835, 15929, -3932, 15905,
|
||||
-4030, 15881, -4127, 15856, -4224, 15830, -4321, 15804,
|
||||
-4418, 15777, -4515, 15750, -4612, 15722, -4708, 15693,
|
||||
-4804, 15664, -4900, 15634, -4996, 15604, -5092, 15573,
|
||||
-5187, 15541, -5282, 15509, -5377, 15476, -5472, 15443,
|
||||
-5567, 15409, -5661, 15375, -5756, 15340, -5850, 15304,
|
||||
-5943, 15268, -6037, 15231, -6130, 15194, -6223, 15156,
|
||||
-6316, 15118, -6409, 15078, -6501, 15039, -6593, 14999,
|
||||
-6685, 14958, -6777, 14917, -6868, 14875, -6960, 14832,
|
||||
-7050, 14789, -7141, 14746, -7231, 14702, -7321, 14657,
|
||||
-7411, 14612, -7501, 14566, -7590, 14520, -7679, 14473,
|
||||
-7768, 14426, -7856, 14378, -7944, 14329, -8032, 14280,
|
||||
-8119, 14231, -8207, 14181, -8293, 14130, -8380, 14079,
|
||||
-8466, 14027, -8552, 13975, -8638, 13922, -8723, 13869,
|
||||
-8808, 13815, -8892, 13761, -8977, 13706, -9061, 13651,
|
||||
-9144, 13595, -9227, 13538, -9310, 13482, -9393, 13424,
|
||||
-9475, 13366, -9557, 13308, -9638, 13249, -9720, 13190,
|
||||
-9800, 13130, -9881, 13069, -9961, 13008, -10040, 12947,
|
||||
-10120, 12885, -10198, 12823, -10277, 12760, -10355, 12697,
|
||||
-10433, 12633, -10510, 12569, -10587, 12504, -10663, 12439,
|
||||
-10740, 12373, -10815, 12307, -10891, 12240, -10966, 12173,
|
||||
-11040, 12106, -11114, 12038, -11188, 11970, -11261, 11901,
|
||||
-11334, 11831, -11406, 11762, -11478, 11691, -11550, 11621,
|
||||
-11621, 11550, -11691, 11478, -11762, 11406, -11831, 11334,
|
||||
-11901, 11261, -11970, 11188, -12038, 11114, -12106, 11040,
|
||||
-12173, 10966, -12240, 10891, -12307, 10815, -12373, 10740,
|
||||
-12439, 10663, -12504, 10587, -12569, 10510, -12633, 10433,
|
||||
-12697, 10355, -12760, 10277, -12823, 10198, -12885, 10120,
|
||||
-12947, 10040, -13008, 9961, -13069, 9881, -13130, 9800,
|
||||
-13190, 9720, -13249, 9638, -13308, 9557, -13366, 9475,
|
||||
-13424, 9393, -13482, 9310, -13538, 9227, -13595, 9144,
|
||||
-13651, 9061, -13706, 8977, -13761, 8892, -13815, 8808,
|
||||
-13869, 8723, -13922, 8638, -13975, 8552, -14027, 8466,
|
||||
-14079, 8380, -14130, 8293, -14181, 8207, -14231, 8119,
|
||||
-14280, 8032, -14329, 7944, -14378, 7856, -14426, 7768,
|
||||
-14473, 7679, -14520, 7590, -14566, 7501, -14612, 7411,
|
||||
-14657, 7321, -14702, 7231, -14746, 7141, -14789, 7050,
|
||||
-14832, 6960, -14875, 6868, -14917, 6777, -14958, 6685,
|
||||
-14999, 6593, -15039, 6501, -15078, 6409, -15118, 6316,
|
||||
-15156, 6223, -15194, 6130, -15231, 6037, -15268, 5943,
|
||||
-15304, 5850, -15340, 5756, -15375, 5661, -15409, 5567,
|
||||
-15443, 5472, -15476, 5377, -15509, 5282, -15541, 5187,
|
||||
-15573, 5092, -15604, 4996, -15634, 4900, -15664, 4804,
|
||||
-15693, 4708, -15722, 4612, -15750, 4515, -15777, 4418,
|
||||
-15804, 4321, -15830, 4224, -15856, 4127, -15881, 4030,
|
||||
-15905, 3932, -15929, 3835, -15952, 3737, -15975, 3639,
|
||||
-15997, 3541, -16018, 3442, -16039, 3344, -16059, 3246,
|
||||
-16079, 3147, -16098, 3048, -16116, 2949, -16134, 2851,
|
||||
-16151, 2752, -16168, 2652, -16184, 2553, -16199, 2454,
|
||||
-16214, 2354, -16228, 2255, -16242, 2155, -16255, 2055,
|
||||
-16267, 1956, -16279, 1856, -16290, 1756, -16300, 1656,
|
||||
-16310, 1556, -16319, 1456, -16328, 1356, -16336, 1255,
|
||||
-16343, 1155, -16350, 1055, -16356, 955, -16362, 854,
|
||||
-16367, 754, -16371, 653, -16375, 553, -16378, 452,
|
||||
-16380, 352, -16382, 251, -16383, 151, -16384, 50,
|
||||
-16384, -50, -16383, -151, -16382, -251, -16380, -352,
|
||||
-16378, -452, -16375, -553, -16371, -653, -16367, -754,
|
||||
-16362, -854, -16356, -955, -16350, -1055, -16343, -1155,
|
||||
-16336, -1255, -16328, -1356, -16319, -1456, -16310, -1556,
|
||||
-16300, -1656, -16290, -1756, -16279, -1856, -16267, -1956,
|
||||
-16255, -2055, -16242, -2155, -16228, -2255, -16214, -2354,
|
||||
-16199, -2454, -16184, -2553, -16168, -2652, -16151, -2752,
|
||||
-16134, -2851, -16116, -2949, -16098, -3048, -16079, -3147,
|
||||
-16059, -3246, -16039, -3344, -16018, -3442, -15997, -3541,
|
||||
-15975, -3639, -15952, -3737, -15929, -3835, -15905, -3932,
|
||||
-15881, -4030, -15856, -4127, -15830, -4224, -15804, -4321,
|
||||
-15777, -4418, -15750, -4515, -15722, -4612, -15693, -4708,
|
||||
-15664, -4804, -15634, -4900, -15604, -4996, -15573, -5092,
|
||||
-15541, -5187, -15509, -5282, -15476, -5377, -15443, -5472,
|
||||
-15409, -5567, -15375, -5661, -15340, -5756, -15304, -5850,
|
||||
-15268, -5943, -15231, -6037, -15194, -6130, -15156, -6223,
|
||||
-15118, -6316, -15078, -6409, -15039, -6501, -14999, -6593,
|
||||
-14958, -6685, -14917, -6777, -14875, -6868, -14832, -6960,
|
||||
-14789, -7050, -14746, -7141, -14702, -7231, -14657, -7321,
|
||||
-14612, -7411, -14566, -7501, -14520, -7590, -14473, -7679,
|
||||
-14426, -7768, -14378, -7856, -14329, -7944, -14280, -8032,
|
||||
-14231, -8119, -14181, -8207, -14130, -8293, -14079, -8380,
|
||||
-14027, -8466, -13975, -8552, -13922, -8638, -13869, -8723,
|
||||
-13815, -8808, -13761, -8892, -13706, -8977, -13651, -9061,
|
||||
-13595, -9144, -13538, -9227, -13482, -9310, -13424, -9393,
|
||||
-13366, -9475, -13308, -9557, -13249, -9638, -13190, -9720,
|
||||
-13130, -9800, -13069, -9881, -13008, -9961, -12947, -10040,
|
||||
-12885, -10120, -12823, -10198, -12760, -10277, -12697, -10355,
|
||||
-12633, -10433, -12569, -10510, -12504, -10587, -12439, -10663,
|
||||
-12373, -10740, -12307, -10815, -12240, -10891, -12173, -10966,
|
||||
-12106, -11040, -12038, -11114, -11970, -11188, -11901, -11261,
|
||||
-11831, -11334, -11762, -11406, -11691, -11478, -11621, -11550,
|
||||
-11550, -11621, -11478, -11691, -11406, -11762, -11334, -11831,
|
||||
-11261, -11901, -11188, -11970, -11114, -12038, -11040, -12106,
|
||||
-10966, -12173, -10891, -12240, -10815, -12307, -10740, -12373,
|
||||
-10663, -12439, -10587, -12504, -10510, -12569, -10433, -12633,
|
||||
-10355, -12697, -10277, -12760, -10198, -12823, -10120, -12885,
|
||||
-10040, -12947, -9961, -13008, -9881, -13069, -9800, -13130,
|
||||
-9720, -13190, -9638, -13249, -9557, -13308, -9475, -13366,
|
||||
-9393, -13424, -9310, -13482, -9227, -13538, -9144, -13595,
|
||||
-9061, -13651, -8977, -13706, -8892, -13761, -8808, -13815,
|
||||
-8723, -13869, -8638, -13922, -8552, -13975, -8466, -14027,
|
||||
-8380, -14079, -8293, -14130, -8207, -14181, -8119, -14231,
|
||||
-8032, -14280, -7944, -14329, -7856, -14378, -7768, -14426,
|
||||
-7679, -14473, -7590, -14520, -7501, -14566, -7411, -14612,
|
||||
-7321, -14657, -7231, -14702, -7141, -14746, -7050, -14789,
|
||||
-6960, -14832, -6868, -14875, -6777, -14917, -6685, -14958,
|
||||
-6593, -14999, -6501, -15039, -6409, -15078, -6316, -15118,
|
||||
-6223, -15156, -6130, -15194, -6037, -15231, -5943, -15268,
|
||||
-5850, -15304, -5756, -15340, -5661, -15375, -5567, -15409,
|
||||
-5472, -15443, -5377, -15476, -5282, -15509, -5187, -15541,
|
||||
-5092, -15573, -4996, -15604, -4900, -15634, -4804, -15664,
|
||||
-4708, -15693, -4612, -15722, -4515, -15750, -4418, -15777,
|
||||
-4321, -15804, -4224, -15830, -4127, -15856, -4030, -15881,
|
||||
-3932, -15905, -3835, -15929, -3737, -15952, -3639, -15975,
|
||||
-3541, -15997, -3442, -16018, -3344, -16039, -3246, -16059,
|
||||
-3147, -16079, -3048, -16098, -2949, -16116, -2851, -16134,
|
||||
-2752, -16151, -2652, -16168, -2553, -16184, -2454, -16199,
|
||||
-2354, -16214, -2255, -16228, -2155, -16242, -2055, -16255,
|
||||
-1956, -16267, -1856, -16279, -1756, -16290, -1656, -16300,
|
||||
-1556, -16310, -1456, -16319, -1356, -16328, -1255, -16336,
|
||||
-1155, -16343, -1055, -16350, -955, -16356, -854, -16362,
|
||||
-754, -16367, -653, -16371, -553, -16375, -452, -16378,
|
||||
-352, -16380, -251, -16382, -151, -16383, -50, -16384,
|
||||
50, -16384, 151, -16383, 251, -16382, 352, -16380,
|
||||
452, -16378, 553, -16375, 653, -16371, 754, -16367,
|
||||
854, -16362, 955, -16356, 1055, -16350, 1155, -16343,
|
||||
1255, -16336, 1356, -16328, 1456, -16319, 1556, -16310,
|
||||
1656, -16300, 1756, -16290, 1856, -16279, 1956, -16267,
|
||||
2055, -16255, 2155, -16242, 2255, -16228, 2354, -16214,
|
||||
2454, -16199, 2553, -16184, 2652, -16168, 2752, -16151,
|
||||
2851, -16134, 2949, -16116, 3048, -16098, 3147, -16079,
|
||||
3246, -16059, 3344, -16039, 3442, -16018, 3541, -15997,
|
||||
3639, -15975, 3737, -15952, 3835, -15929, 3932, -15905,
|
||||
4030, -15881, 4127, -15856, 4224, -15830, 4321, -15804,
|
||||
4418, -15777, 4515, -15750, 4612, -15722, 4708, -15693,
|
||||
4804, -15664, 4900, -15634, 4996, -15604, 5092, -15573,
|
||||
5187, -15541, 5282, -15509, 5377, -15476, 5472, -15443,
|
||||
5567, -15409, 5661, -15375, 5756, -15340, 5850, -15304,
|
||||
5943, -15268, 6037, -15231, 6130, -15194, 6223, -15156,
|
||||
6316, -15118, 6409, -15078, 6501, -15039, 6593, -14999,
|
||||
6685, -14958, 6777, -14917, 6868, -14875, 6960, -14832,
|
||||
7050, -14789, 7141, -14746, 7231, -14702, 7321, -14657,
|
||||
7411, -14612, 7501, -14566, 7590, -14520, 7679, -14473,
|
||||
7768, -14426, 7856, -14378, 7944, -14329, 8032, -14280,
|
||||
8119, -14231, 8207, -14181, 8293, -14130, 8380, -14079,
|
||||
8466, -14027, 8552, -13975, 8638, -13922, 8723, -13869,
|
||||
8808, -13815, 8892, -13761, 8977, -13706, 9061, -13651,
|
||||
9144, -13595, 9227, -13538, 9310, -13482, 9393, -13424,
|
||||
9475, -13366, 9557, -13308, 9638, -13249, 9720, -13190,
|
||||
9800, -13130, 9881, -13069, 9961, -13008, 10040, -12947,
|
||||
10120, -12885, 10198, -12823, 10277, -12760, 10355, -12697,
|
||||
10433, -12633, 10510, -12569, 10587, -12504, 10663, -12439,
|
||||
10740, -12373, 10815, -12307, 10891, -12240, 10966, -12173,
|
||||
11040, -12106, 11114, -12038, 11188, -11970, 11261, -11901,
|
||||
11334, -11831, 11406, -11762, 11478, -11691, 11550, -11621,
|
||||
11621, -11550, 11691, -11478, 11762, -11406, 11831, -11334,
|
||||
11901, -11261, 11970, -11188, 12038, -11114, 12106, -11040,
|
||||
12173, -10966, 12240, -10891, 12307, -10815, 12373, -10740,
|
||||
12439, -10663, 12504, -10587, 12569, -10510, 12633, -10433,
|
||||
12697, -10355, 12760, -10277, 12823, -10198, 12885, -10120,
|
||||
12947, -10040, 13008, -9961, 13069, -9881, 13130, -9800,
|
||||
13190, -9720, 13249, -9638, 13308, -9557, 13366, -9475,
|
||||
13424, -9393, 13482, -9310, 13538, -9227, 13595, -9144,
|
||||
13651, -9061, 13706, -8977, 13761, -8892, 13815, -8808,
|
||||
13869, -8723, 13922, -8638, 13975, -8552, 14027, -8466,
|
||||
14079, -8380, 14130, -8293, 14181, -8207, 14231, -8119,
|
||||
14280, -8032, 14329, -7944, 14378, -7856, 14426, -7768,
|
||||
14473, -7679, 14520, -7590, 14566, -7501, 14612, -7411,
|
||||
14657, -7321, 14702, -7231, 14746, -7141, 14789, -7050,
|
||||
14832, -6960, 14875, -6868, 14917, -6777, 14958, -6685,
|
||||
14999, -6593, 15039, -6501, 15078, -6409, 15118, -6316,
|
||||
15156, -6223, 15194, -6130, 15231, -6037, 15268, -5943,
|
||||
15304, -5850, 15340, -5756, 15375, -5661, 15409, -5567,
|
||||
15443, -5472, 15476, -5377, 15509, -5282, 15541, -5187,
|
||||
15573, -5092, 15604, -4996, 15634, -4900, 15664, -4804,
|
||||
15693, -4708, 15722, -4612, 15750, -4515, 15777, -4418,
|
||||
15804, -4321, 15830, -4224, 15856, -4127, 15881, -4030,
|
||||
15905, -3932, 15929, -3835, 15952, -3737, 15975, -3639,
|
||||
15997, -3541, 16018, -3442, 16039, -3344, 16059, -3246,
|
||||
16079, -3147, 16098, -3048, 16116, -2949, 16134, -2851,
|
||||
16151, -2752, 16168, -2652, 16184, -2553, 16199, -2454,
|
||||
16214, -2354, 16228, -2255, 16242, -2155, 16255, -2055,
|
||||
16267, -1956, 16279, -1856, 16290, -1756, 16300, -1656,
|
||||
16310, -1556, 16319, -1456, 16328, -1356, 16336, -1255,
|
||||
16343, -1155, 16350, -1055, 16356, -955, 16362, -854,
|
||||
16367, -754, 16371, -653, 16375, -553, 16378, -452,
|
||||
16380, -352, 16382, -251, 16383, -151, 16383, -50,
|
||||
+73
@@ -0,0 +1,73 @@
|
||||
/******************************************************************************
|
||||
* FILE PURPOSE: This file contains DSSS despreading LUT
|
||||
*******************************************************************************
|
||||
*
|
||||
* FILE NAME: phy_dsssDesprdTable.c
|
||||
*
|
||||
* DESCRIPTION: This file contains LUTs for DSSS despreading
|
||||
*
|
||||
*
|
||||
* HISTORY:
|
||||
* 03/23/2012 MFu initial revision.
|
||||
* 07/23/2012 JK Added 16_4 and 16_1 Despreading
|
||||
* LIST OF FUNCTIONS:
|
||||
*
|
||||
*
|
||||
* Copyright (c) 2012 Texas Instruments Inc. All rights reserved.
|
||||
******************************************************************************/
|
||||
#include <phy_sunTables.h>
|
||||
|
||||
#pragma DATA_SECTION(PHY_dsssDesprd_8_4_table, "sunPhyTable");
|
||||
#pragma DATA_SECTION(PHY_dsssDesprd_16_4_table, "sunPhyTable");
|
||||
#pragma DATA_SECTION(PHY_dsssDesprd_16_1_0_table, "sunPhyTable");
|
||||
#pragma DATA_SECTION(PHY_dsssDesprd_16_1_1_table, "sunPhyTable");
|
||||
|
||||
/* LUT for (8, 4) spreading */
|
||||
const SINT16 PHY_dsssDesprd_8_4_table[PHY_DSSS_DESPRD_8_4_LUT_NUM_ROWS][PHY_DSSS_DESPRD_8_4_LUT_NUM_COLS] =
|
||||
{ // b0b1b2b3 c0c1..c7
|
||||
{ 1, 1, 1, 1, 1, 1, 1, -1}, // 0000 0000 0001
|
||||
{-1, -1, 1, -1, 1, 1, 1, 1}, // 1000 1101 0000
|
||||
{ 1, -1, -1, 1, -1, 1, 1, 1}, // 0100 0110 1000
|
||||
{-1, 1, -1, -1, -1, 1, 1, -1}, // 1100 1011 1001
|
||||
{-1, -1, -1, 1, 1, -1, 1, -1}, // 0010 1110 0101
|
||||
{ 1, 1, -1, -1, 1, -1, 1, 1}, // 1010 0011 0100
|
||||
{-1, 1, 1, 1, -1, -1, 1, 1}, // 0110 1000 1100
|
||||
{ 1, -1, 1, -1, -1, -1, 1, -1}, // 1110 0101 1101
|
||||
};
|
||||
|
||||
/* LUT for (16, 4) spreading */
|
||||
const SINT16 PHY_dsssDesprd_16_4_table[PHY_DSSS_DESPRD_16_4_LUT_NUM_ROWS][PHY_DSSS_DESPRD_16_4_LUT_NUM_COLS] =
|
||||
{
|
||||
{ 1, 1, -1, -1, -1, -1, -1, 1, 1, 1, -1, 1, 1, -1, 1, -1}, // 0000 0011 1110 0010 0101
|
||||
{ 1, -1, 1, 1, -1, -1, -1, -1, -1, 1, 1, 1, -1, 1, 1, -1}, // 1000 0100 1111 1000 1001
|
||||
{ 1, -1, 1, -1, 1, 1, -1, -1, -1, -1, -1, 1, 1, 1, -1, 1}, // 0100 0101 0011 1110 0010
|
||||
{-1, 1, 1, -1, 1, -1, 1, 1, -1, -1, -1, -1, -1, 1, 1, 1}, // 1100 1001 1100 1111 1000
|
||||
{ 1, 1, -1, 1, 1, -1, 1, -1, 1, 1, -1, -1, -1, -1, -1, 1}, // 0010 0010 0110 0011 1110
|
||||
{-1, 1, 1, 1, -1, 1, 1, -1, 1, -1, 1, 1, -1, -1, -1, -1}, // 1010 1000 1001 0000 1111
|
||||
{-1, -1, -1, 1, 1, 1, -1, 1, 1, -1, 1, -1, 1, 1, -1, -1}, // 0110 1110 0010 0110 0011
|
||||
{-1, -1, -1, -1, -1, 1, 1, 1, -1, 1, 1, -1, 1, -1, 1, 1}, // 1110 1111 1000 1001 0100
|
||||
|
||||
{ 1, -1, -1, 1, -1, 1, -1, -1, 1, -1, -1, -1, 1, 1, 1, 1}, // 0001 0110 1011 0111 0000
|
||||
{ 1, 1, 1, -1, -1, 1, -1, 1, -1, -1, 1, -1, -1, -1, 1, 1}, // 1001 0001 1010 1101 1100
|
||||
{ 1, 1, 1, 1, 1, -1, -1, 1, -1, 1, -1, -1, 1, -1, -1, -1}, // 0101 0000 0110 1011 0111
|
||||
{-1, -1, 1, 1, 1, 1, 1, -1, -1, 1, -1, 1, -1, -1, 1, -1}, // 1101 1100 0001 1010 1101
|
||||
{ 1, -1, -1, -1, 1, 1, 1, 1, 1, -1, -1, 1, -1, 1, -1, -1}, // 0011 0111 0000 0110 1011
|
||||
{-1, -1, 1, -1, -1, -1, 1, 1, 1, 1, 1, -1, -1, 1, -1, 1}, // 1011 1101 1100 0001 1010
|
||||
{-1, 1, -1, -1, 1, -1, -1, -1, 1, 1, 1, 1, 1, -1, -1, 1}, // 0111 1011 0111 0000 0110
|
||||
{-1, 1, -1, 1, -1, -1, 1, -1, -1, -1, 1, 1, 1, 1, 1, -1}, // 1111 1010 1101 1100 0001
|
||||
|
||||
};
|
||||
|
||||
/* LUT for (16, 1, 0) spreading */
|
||||
const SINT16 PHY_dsssDesprd_16_1_0_table[PHY_DSSS_DESPRD_16_1_LUT_NUM_COLS] =
|
||||
{
|
||||
-1, -1, 1, -1, -1, -1, 1, 1, 1, 1, -1, 1, -1, 1, 1, -1
|
||||
|
||||
};
|
||||
|
||||
/* LUT for (16, 1, 1) spreading */
|
||||
const SINT16 PHY_dsssDesprd_16_1_1_table[PHY_DSSS_DESPRD_16_1_LUT_NUM_COLS] =
|
||||
{
|
||||
-1, 1, -1, -1, -1, 1, 1, 1, 1, -1, 1, -1, 1, 1, -1, -1
|
||||
};
|
||||
|
||||
+95
@@ -0,0 +1,95 @@
|
||||
/*****************************************************************************
|
||||
* FILE PURPOSE: This file contains LUT for DSSS SHR spreading sequence (FFT)
|
||||
*******************************************************************************
|
||||
*
|
||||
* FILE NAME: phy_dsssFftDiffSeqTable.c
|
||||
*
|
||||
* DESCRIPTION:
|
||||
* This file contains LUT used for the frequency domain differential spreading
|
||||
* sequence of the DSSS SHR (FFT of the differential sequence)
|
||||
*
|
||||
* Copyright (c) 2012 Texas Instruments Inc.
|
||||
* All Rights Reserved This program is the confidential and proprietary
|
||||
* product of Texas Instruments Inc. Any Unauthorized use, reproduction or
|
||||
* transfer of this program is strictly prohibited.
|
||||
*
|
||||
* HISTORY:
|
||||
* 01/13/2013 Written
|
||||
*
|
||||
* LIST OF FUNCTIONS:
|
||||
*
|
||||
******************************************************************************/
|
||||
#include <phy_sunTables.h>
|
||||
|
||||
/* Q4.11 */
|
||||
/* Im Re */
|
||||
#pragma DATA_SECTION(PHY_dsssFftDiffSeqTable, "sunPhyTable");
|
||||
const ComplexShort_t PHY_dsssFftDiffSeqTable[PHY_DSSS_FFTDIFFSEQ_SIZE] =
|
||||
{
|
||||
0x0000, 0x5000,
|
||||
0xd42d, 0xe427,
|
||||
0x0df5, 0x1b29,
|
||||
0x1bb5, 0xfa1d,
|
||||
0x1739, 0xd941,
|
||||
0x1a07, 0x9f09,
|
||||
0xed9a, 0x2c0c,
|
||||
0xebcb, 0xd7f7,
|
||||
0x04b0, 0xa0ce,
|
||||
0xb2a2, 0x006c,
|
||||
0x2f63, 0xe8c5,
|
||||
0xcd78, 0x0ef4,
|
||||
0xb100, 0x4a89,
|
||||
0x16af, 0x1721,
|
||||
0x17aa, 0xe4d4,
|
||||
0xd712, 0xe4e9,
|
||||
0xd000, 0xc000,
|
||||
0xc57d, 0x3092,
|
||||
0x353a, 0x1a2a,
|
||||
0xbea4, 0x2e23,
|
||||
0x07a0, 0xd959,
|
||||
0x41d9, 0xea2e,
|
||||
0x2324, 0x46ec,
|
||||
0xdcb1, 0xec86,
|
||||
0xe4b0, 0x3f32,
|
||||
0xddfb, 0xd874,
|
||||
0xe15b, 0x3ec6,
|
||||
0xe046, 0xd437,
|
||||
0xedda, 0xc2dd,
|
||||
0xca8d, 0xd43d,
|
||||
0x2b85, 0xcb57,
|
||||
0x3fbd, 0xe901,
|
||||
0x0000, 0xf000,
|
||||
0xc043, 0xe901,
|
||||
0xd47b, 0xcb57,
|
||||
0x3573, 0xd43d,
|
||||
0x1226, 0xc2dd,
|
||||
0x1fba, 0xd437,
|
||||
0x1ea5, 0x3ec6,
|
||||
0x2205, 0xd874,
|
||||
0x1b50, 0x3f32,
|
||||
0x234f, 0xec86,
|
||||
0xdcdc, 0x46ec,
|
||||
0xbe27, 0xea2e,
|
||||
0xf860, 0xd959,
|
||||
0x415c, 0x2e23,
|
||||
0xcac6, 0x1a2a,
|
||||
0x3a83, 0x3092,
|
||||
0x3000, 0xc000,
|
||||
0x28ee, 0xe4e9,
|
||||
0xe856, 0xe4d4,
|
||||
0xe951, 0x1721,
|
||||
0x4f00, 0x4a89,
|
||||
0x3288, 0x0ef4,
|
||||
0xd09d, 0xe8c5,
|
||||
0x4d5e, 0x006c,
|
||||
0xfb50, 0xa0ce,
|
||||
0x1435, 0xd7f7,
|
||||
0x1266, 0x2c0c,
|
||||
0xe5f9, 0x9f09,
|
||||
0xe8c7, 0xd941,
|
||||
0xe44b, 0xfa1d,
|
||||
0xf20b, 0x1b29,
|
||||
0x2bd3, 0xe427,
|
||||
};
|
||||
|
||||
|
||||
+46
@@ -0,0 +1,46 @@
|
||||
// FSK Legacy Gaussian Interpolator Filter Table, upsample by 16, Q14
|
||||
//Start 1
|
||||
-1, -4, -11, -25, -53, -106, -202, -364,
|
||||
-624, -1018, -1585, -2354, -3342, -4542, -5922, -7421,
|
||||
1, 4, 11, 25, 53, 106, 202, 364,
|
||||
624, 1018, 1585, 2354, 3342, 4542, 5922, 7421,
|
||||
//Start 2
|
||||
-8963, -10462, -11842, -13042, -14030, -14799, -15366, -15760,
|
||||
-16020, -16182, -16278, -16331, -16359, -16373, -16380, -16383,
|
||||
-8960, -10454, -11820, -12992, -13924, -14587, -14962, -15032,
|
||||
-14772, -14145, -13108, -11623, -9675, -7288, -4536, -1540,
|
||||
8960, 10454, 11820, 12992, 13924, 14587, 14962, 15032,
|
||||
14772, 14145, 13108, 11623, 9675, 7288, 4536, 1540,
|
||||
8963, 10462, 11842, 13042, 14030, 14799, 15366, 15760,
|
||||
16020, 16182, 16278, 16331, 16359, 16373, 16380, 16383,
|
||||
//Main
|
||||
-16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384,
|
||||
-16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384,
|
||||
-16382, -16376, -16362, -16334, -16278, -16172, -15980, -15656,
|
||||
-15136, -14347, -13214, -11676, -9700, -7299, -4540, -1542,
|
||||
1539, 4532, 7277, 9650, 11570, 13002, 13944, 14409,
|
||||
14409, 13944, 13002, 11570, 9650, 7277, 4532, 1539,
|
||||
1542, 4540, 7299, 9700, 11676, 13214, 14347, 15136,
|
||||
15656, 15980, 16172, 16278, 16334, 16362, 16376, 16382,
|
||||
-1542, -4540, -7299, -9700, -11676, -13214, -14347, -15136,
|
||||
-15656, -15980, -16172, -16278, -16334, -16362, -16376, -16382,
|
||||
-1539, -4532, -7277, -9650, -11570, -13002, -13944, -14409,
|
||||
-14409, -13944, -13002, -11570, -9650, -7277, -4532, -1539,
|
||||
16382, 16376, 16362, 16334, 16278, 16172, 15980, 15656,
|
||||
15136, 14347, 13214, 11676, 9700, 7299, 4540, 1542,
|
||||
16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383,
|
||||
16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383,
|
||||
//End 1
|
||||
-16383, -16380, -16373, -16359, -16331, -16278, -16182, -16020,
|
||||
-15760, -15366, -14799, -14030, -13042, -11842, -10462, -8963,
|
||||
1540, 4536, 7288, 9675, 11623, 13108, 14145, 14772,
|
||||
15032, 14962, 14587, 13924, 12992, 11820, 10454, 8960,
|
||||
-1540, -4536, -7288, -9675, -11623, -13108, -14145, -14772,
|
||||
-15032, -14962, -14587, -13924, -12992, -11820, -10454, -8960,
|
||||
16383, 16380, 16373, 16359, 16331, 16278, 16182, 16020,
|
||||
15760, 15366, 14799, 14030, 13042, 11842, 10462, 8963,
|
||||
//End 2
|
||||
-7421, -5922, -4542, -3342, -2354, -1585, -1018, -624,
|
||||
-364, -202, -106, -53, -25, -11, -4, -1,
|
||||
7421, 5922, 4542, 3342, 2354, 1585, 1018, 624,
|
||||
364, 202, 106, 53, 25, 11, 4, 1,
|
||||
+106
@@ -0,0 +1,106 @@
|
||||
// FSK 4G Gaussian Interpolator Filter Table, upsample by 50, Q14
|
||||
//Start 1
|
||||
0, -1, -2, -3, -4, -5, -7, -10, -13, -17,
|
||||
-22, -29, -37, -47, -59, -74, -93, -115, -142, -174,
|
||||
-212, -257, -309, -371, -443, -526, -622, -732, -856, -996,
|
||||
-1154, -1331, -1527, -1743, -1981, -2241, -2524, -2829, -3156, -3506,
|
||||
-3877, -4268, -4680, -5109, -5554, -6013, -6485, -6966, -7453, -7945,
|
||||
0, 1, 2, 3, 4, 5, 7, 10, 13, 17,
|
||||
22, 29, 37, 47, 59, 74, 93, 115, 142, 174,
|
||||
212, 257, 309, 371, 443, 526, 622, 732, 856, 996,
|
||||
1154, 1331, 1527, 1743, 1981, 2241, 2524, 2829, 3156, 3506,
|
||||
3877, 4268, 4680, 5109, 5554, 6013, 6485, 6966, 7453, 7945,
|
||||
//Start 2
|
||||
-8439, -8931, -9418, -9899, -10371, -10830, -11275, -11704, -12116, -12507,
|
||||
-12878, -13228, -13555, -13860, -14143, -14403, -14641, -14857, -15053, -15230,
|
||||
-15388, -15528, -15652, -15762, -15858, -15941, -16013, -16075, -16127, -16172,
|
||||
-16210, -16242, -16269, -16291, -16310, -16325, -16337, -16347, -16355, -16362,
|
||||
-16367, -16371, -16374, -16377, -16379, -16380, -16381, -16382, -16383, -16384,
|
||||
-8438, -8929, -9415, -9894, -10363, -10820, -11261, -11685, -12089, -12473,
|
||||
-12834, -13170, -13482, -13766, -14024, -14254, -14455, -14627, -14770, -14883,
|
||||
-14965, -15015, -15034, -15019, -14971, -14888, -14768, -14612, -14416, -14180,
|
||||
-13902, -13581, -13215, -12804, -12347, -11842, -11290, -10690, -10043, -9351,
|
||||
-8613, -7834, -7015, -6159, -5271, -4354, -3412, -2451, -1476, -493,
|
||||
8438, 8929, 9415, 9894, 10363, 10820, 11261, 11685, 12089, 12473,
|
||||
12834, 13170, 13482, 13766, 14024, 14254, 14455, 14627, 14770, 14883,
|
||||
14965, 15015, 15034, 15019, 14971, 14888, 14768, 14612, 14416, 14180,
|
||||
13902, 13581, 13215, 12804, 12347, 11842, 11290, 10690, 10043, 9351,
|
||||
8613, 7834, 7015, 6159, 5271, 4354, 3412, 2451, 1476, 493,
|
||||
8439, 8931, 9418, 9899, 10371, 10830, 11275, 11704, 12116, 12507,
|
||||
12878, 13228, 13555, 13860, 14143, 14403, 14641, 14857, 15053, 15230,
|
||||
15388, 15528, 15652, 15762, 15858, 15941, 16013, 16075, 16127, 16172,
|
||||
16210, 16242, 16269, 16291, 16310, 16325, 16337, 16347, 16355, 16362,
|
||||
16367, 16371, 16374, 16377, 16379, 16380, 16381, 16382, 16383, 16383,
|
||||
//Main
|
||||
-16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384,
|
||||
-16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384,
|
||||
-16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384,
|
||||
-16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384,
|
||||
-16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384, -16384,
|
||||
-16383, -16382, -16381, -16379, -16377, -16373, -16369, -16364, -16358, -16350,
|
||||
-16339, -16326, -16310, -16290, -16266, -16235, -16199, -16154, -16101, -16037,
|
||||
-15961, -15871, -15765, -15641, -15497, -15331, -15140, -14921, -14672, -14391,
|
||||
-14075, -13722, -13330, -12897, -12421, -11901, -11337, -10727, -10072, -9373,
|
||||
-8631, -7847, -7025, -6167, -5276, -4357, -3415, -2453, -1477, -493,
|
||||
493, 1475, 2450, 3409, 4350, 5266, 6152, 7005, 7821, 8596,
|
||||
9328, 10014, 10653, 11243, 11783, 12272, 12712, 13101, 13439, 13728,
|
||||
13968, 14159, 14302, 14397, 14444, 14444, 14397, 14302, 14159, 13968,
|
||||
13728, 13439, 13101, 12712, 12272, 11783, 11243, 10653, 10014, 9328,
|
||||
8596, 7821, 7005, 6152, 5266, 4350, 3409, 2450, 1475, 493,
|
||||
493, 1477, 2453, 3415, 4357, 5276, 6167, 7025, 7847, 8631,
|
||||
9373, 10072, 10727, 11337, 11901, 12421, 12897, 13330, 13722, 14075,
|
||||
14391, 14672, 14921, 15140, 15331, 15497, 15641, 15765, 15871, 15961,
|
||||
16037, 16101, 16154, 16199, 16235, 16266, 16290, 16310, 16326, 16339,
|
||||
16350, 16358, 16364, 16369, 16373, 16377, 16379, 16381, 16382, 16383,
|
||||
-493, -1477, -2453, -3415, -4357, -5276, -6167, -7025, -7847, -8631,
|
||||
-9373, -10072, -10727, -11337, -11901, -12421, -12897, -13330, -13722, -14075,
|
||||
-14391, -14672, -14921, -15140, -15331, -15497, -15641, -15765, -15871, -15961,
|
||||
-16037, -16101, -16154, -16199, -16235, -16266, -16290, -16310, -16326, -16339,
|
||||
-16350, -16358, -16364, -16369, -16373, -16377, -16379, -16381, -16382, -16383,
|
||||
-493, -1475, -2450, -3409, -4350, -5266, -6152, -7005, -7821, -8596,
|
||||
-9328, -10014, -10653, -11243, -11783, -12272, -12712, -13101, -13439, -13728,
|
||||
-13968, -14159, -14302, -14397, -14444, -14444, -14397, -14302, -14159, -13968,
|
||||
-13728, -13439, -13101, -12712, -12272, -11783, -11243, -10653, -10014, -9328,
|
||||
-8596, -7821, -7005, -6152, -5266, -4350, -3409, -2450, -1475, -493,
|
||||
16383, 16382, 16381, 16379, 16377, 16373, 16369, 16364, 16358, 16350,
|
||||
16339, 16326, 16310, 16290, 16266, 16235, 16199, 16154, 16101, 16037,
|
||||
15961, 15871, 15765, 15641, 15497, 15331, 15140, 14921, 14672, 14391,
|
||||
14075, 13722, 13330, 12897, 12421, 11901, 11337, 10727, 10072, 9373,
|
||||
8631, 7847, 7025, 6167, 5276, 4357, 3415, 2453, 1477, 493,
|
||||
16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383,
|
||||
16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383,
|
||||
16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383,
|
||||
16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383,
|
||||
16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383, 16383,
|
||||
//End 1
|
||||
-16384, -16383, -16382, -16381, -16380, -16379, -16377, -16374, -16371, -16367,
|
||||
-16362, -16355, -16347, -16337, -16325, -16310, -16291, -16269, -16242, -16210,
|
||||
-16172, -16127, -16075, -16013, -15941, -15858, -15762, -15652, -15528, -15388,
|
||||
-15230, -15053, -14857, -14641, -14403, -14143, -13860, -13555, -13228, -12878,
|
||||
-12507, -12116, -11704, -11275, -10830, -10371, -9899, -9418, -8931, -8439,
|
||||
493, 1476, 2451, 3412, 4354, 5271, 6159, 7015, 7834, 8613,
|
||||
9351, 10043, 10690, 11290, 11842, 12347, 12804, 13215, 13581, 13902,
|
||||
14180, 14416, 14612, 14768, 14888, 14971, 15019, 15034, 15015, 14965,
|
||||
14883, 14770, 14627, 14455, 14254, 14024, 13766, 13482, 13170, 12834,
|
||||
12473, 12089, 11685, 11261, 10820, 10363, 9894, 9415, 8929, 8438,
|
||||
-493, -1476, -2451, -3412, -4354, -5271, -6159, -7015, -7834, -8613,
|
||||
-9351, -10043, -10690, -11290, -11842, -12347, -12804, -13215, -13581, -13902,
|
||||
-14180, -14416, -14612, -14768, -14888, -14971, -15019, -15034, -15015, -14965,
|
||||
-14883, -14770, -14627, -14455, -14254, -14024, -13766, -13482, -13170, -12834,
|
||||
-12473, -12089, -11685, -11261, -10820, -10363, -9894, -9415, -8929, -8438,
|
||||
16383, 16383, 16382, 16381, 16380, 16379, 16377, 16374, 16371, 16367,
|
||||
16362, 16355, 16347, 16337, 16325, 16310, 16291, 16269, 16242, 16210,
|
||||
16172, 16127, 16075, 16013, 15941, 15858, 15762, 15652, 15528, 15388,
|
||||
15230, 15053, 14857, 14641, 14403, 14143, 13860, 13555, 13228, 12878,
|
||||
12507, 12116, 11704, 11275, 10830, 10371, 9899, 9418, 8931, 8439,
|
||||
//End 2
|
||||
-7945, -7453, -6966, -6485, -6013, -5554, -5109, -4680, -4268, -3877,
|
||||
-3506, -3156, -2829, -2524, -2241, -1981, -1743, -1527, -1331, -1154,
|
||||
-996, -856, -732, -622, -526, -443, -371, -309, -257, -212,
|
||||
-174, -142, -115, -93, -74, -59, -47, -37, -29, -22,
|
||||
-17, -13, -10, -7, -5, -4, -3, -2, -1, 0,
|
||||
7945, 7453, 6966, 6485, 6013, 5554, 5109, 4680, 4268, 3877,
|
||||
3506, 3156, 2829, 2524, 2241, 1981, 1743, 1527, 1331, 1154,
|
||||
996, 856, 732, 622, 526, 443, 371, 309, 257, 212,
|
||||
174, 142, 115, 93, 74, 59, 47, 37, 29, 22,
|
||||
17, 13, 10, 7, 5, 4, 3, 2, 1, 0,
|
||||
+38
@@ -0,0 +1,38 @@
|
||||
/*****************************************************************************
|
||||
* FILE PURPOSE: This file contains LUT for FSK Gaussian interpolator filter
|
||||
*******************************************************************************
|
||||
*
|
||||
* FILE NAME: phy_fskGsnIntFiltTable.c
|
||||
*
|
||||
* DESCRIPTION:
|
||||
* This file contains LUT used for the Gaussian interpolator filter.
|
||||
* The upsampling ratio is 16 for 150kbps and 50 for 50kbps modes
|
||||
*
|
||||
* Copyright (c) 2012 Texas Instruments Inc.
|
||||
* All Rights Reserved This program is the confidential and proprietary
|
||||
* product of Texas Instruments Inc. Any Unauthorized use, reproduction or
|
||||
* transfer of this program is strictly prohibited.
|
||||
*
|
||||
* HISTORY:
|
||||
* 01/13/2013 Written
|
||||
*
|
||||
* LIST OF FUNCTIONS:
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#include <phy_sunTables.h>
|
||||
|
||||
#pragma DATA_SECTION(PHY_fskGsnIntFilt50Table, "sunPhyTable");
|
||||
#pragma DATA_SECTION(PHY_fskGsnIntFilt16Table, "sunPhyTable");
|
||||
|
||||
/* LUT for 50x upsampling ratio */
|
||||
const SINT16 PHY_fskGsnIntFilt50Table[PHY_FSK_GSN_INTFILT50_LUT_SIZE] =
|
||||
{
|
||||
#include "phy_fskGsnIntFilt50Table.txt"
|
||||
};
|
||||
|
||||
/* LUT for 16x upsampling ratio */
|
||||
const SINT16 PHY_fskGsnIntFilt16Table[PHY_FSK_GSN_INTFILT16_LUT_SIZE] =
|
||||
{
|
||||
#include "phy_fskGsnIntFilt16Table.txt"
|
||||
};
|
||||
+33
@@ -0,0 +1,33 @@
|
||||
/*****************************************************************************
|
||||
* FILE PURPOSE: This file contains LUT for FSK TX resampler
|
||||
*******************************************************************************
|
||||
*
|
||||
* FILE NAME: phy_fskTxSrcCoefTable.c
|
||||
*
|
||||
* DESCRIPTION:
|
||||
* This file contains LUT used for FSK TX resampler or sampling rate
|
||||
* converter (src). It converts 2.4MHz to 2.5MHz sapling rate
|
||||
*
|
||||
* Copyright (c) 2012 Texas Instruments Inc.
|
||||
* All Rights Reserved This program is the confidential and proprietary
|
||||
* product of Texas Instruments Inc. Any Unauthorized use, reproduction or
|
||||
* transfer of this program is strictly prohibited.
|
||||
*
|
||||
* HISTORY:
|
||||
* 01/13/2013 Written
|
||||
*
|
||||
* LIST OF FUNCTIONS:
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#include "PHY_sunTables.h"
|
||||
/*
|
||||
* column index: x[n - J + 1] x[n - J + 2] x[n - J + 3] x[n - J + 4] x[n - J + 5] x[n - J + 6] = x[n] (newest)
|
||||
* row index: phase number
|
||||
*/
|
||||
#pragma DATA_SECTION(PHY_fskTxSrcCoefTable, "sunPhyTable");
|
||||
const SINT16 PHY_fskTxSrcCoefTable[PHY_FSK_TXSRC_COEF_LUT_SIZE] =
|
||||
{
|
||||
#include "phy_fskTxSrcCoefTable.txt"
|
||||
};
|
||||
|
||||
+17
@@ -0,0 +1,17 @@
|
||||
// FSK Legacy TX sample rate converter filter table, resample 2.4->2.5MHz, Q15
|
||||
0, 32767, 0, 0, -513, 32697, 594, -42,
|
||||
-948, 32486, 1270, -86, -1308, 32136, 2030, -135,
|
||||
-1598, 31650, 2873, -189, -1821, 31034, 3798, -250,
|
||||
-1984, 30293, 4804, -319, -2090, 29436, 5886, -397,
|
||||
-2148, 28469, 7041, -485, -2161, 27402, 8264, -582,
|
||||
-2135, 26245, 9547, -690, -2078, 25009, 10884, -808,
|
||||
-1993, 23705, 12266, -934, -1888, 22345, 13684, -1068,
|
||||
-1766, 20941, 15128, -1207, -1633, 19506, 16587, -1350,
|
||||
-1493, 18050, 18050, -1493, -1350, 16587, 19506, -1633,
|
||||
-1207, 15128, 20941, -1766, -1068, 13684, 22345, -1888,
|
||||
-934, 12266, 23705, -1993, -808, 10884, 25009, -2078,
|
||||
-690, 9547, 26245, -2135, -582, 8264, 27402, -2161,
|
||||
-485, 7041, 28469, -2148, -397, 5886, 29436, -2090,
|
||||
-319, 4804, 30293, -1984, -250, 3798, 31034, -1821,
|
||||
-189, 2873, 31650, -1598, -135, 2030, 32136, -1308,
|
||||
-86, 1270, 32486, -948, -42, 594, 32697, -513,
|
||||
+99
@@ -0,0 +1,99 @@
|
||||
/******************************************************************************
|
||||
* FILE PURPOSE: This file contains the PN9 table
|
||||
*******************************************************************************
|
||||
*
|
||||
* FILE NAME: phy_pn9Table.c
|
||||
*
|
||||
* DESCRIPTION: PN9 Sequence Lookup Table
|
||||
*
|
||||
* Copyright (c) 2012 Texas Instruments Inc.
|
||||
* All Rights Reserved This program is the confidential and proprietary
|
||||
* product of Texas Instruments Inc. Any Unauthorized use, reproduction or
|
||||
* transfer of this program is strictly prohibited.
|
||||
*
|
||||
* HISTORY:
|
||||
*
|
||||
* 07/31/2012 JKunduru Written
|
||||
*
|
||||
*
|
||||
*
|
||||
*******************************************************************************/
|
||||
#include <phy_sunTables.h>
|
||||
|
||||
#pragma DATA_SECTION(PHY_pn9STable, "sunPhyTable");
|
||||
#pragma DATA_SECTION(PHY_pn9Table, "sunPhyTable");
|
||||
|
||||
/* PN9 sequence in signed (1/-1) format */
|
||||
const SINT16 PHY_pn9STable[PHY_PN9_LUT_SIZE] =
|
||||
{
|
||||
1, 1, 1, -1, 1, 1, 1, -1,
|
||||
-1, 1, 1, -1, 1, 1, 1, -1,
|
||||
-1, -1, 1, -1, 1, -1, 1, -1,
|
||||
-1, 1, -1, -1, 1, 1, 1, -1,
|
||||
-1, -1, 1, 1, 1, -1, 1, 1,
|
||||
-1, 1, -1, 1, -1, 1, 1, 1,
|
||||
-1, -1, 1, -1, -1, 1, 1, -1,
|
||||
-1, -1, -1, -1, 1, 1, -1, -1,
|
||||
-1, -1, 1, 1, 1, -1, 1, -1,
|
||||
-1, 1, -1, -1, -1, 1, 1, -1,
|
||||
1, -1, 1, 1, -1, 1, 1, 1,
|
||||
1, 1, -1, 1, 1, -1, -1, 1,
|
||||
1, -1, -1, -1, 1, -1, 1, 1,
|
||||
1, -1, -1, -1, -1, -1, 1, -1,
|
||||
-1, -1, -1, 1, 1, 1, 1, 1,
|
||||
-1, -1, -1, -1, -1, -1, -1, -1,
|
||||
-1, 1, 1, 1, 1, -1, -1, -1,
|
||||
-1, 1, -1, -1, -1, 1, 1, 1,
|
||||
1, -1, 1, -1, -1, 1, 1, -1,
|
||||
-1, 1, -1, -1, 1, -1, -1, -1,
|
||||
-1, 1, -1, 1, 1, 1, 1, -1,
|
||||
-1, -1, 1, 1, -1, -1, 1, 1,
|
||||
1, 1, -1, 1, 1, -1, 1, 1,
|
||||
1, -1, 1, -1, 1, -1, -1, -1,
|
||||
1, -1, 1, -1, -1, -1, -1, 1,
|
||||
1, -1, 1, 1, -1, 1, -1, -1,
|
||||
-1, 1, 1, -1, -1, -1, 1, 1,
|
||||
1, 1, 1, 1, -1, -1, -1, 1,
|
||||
-1, -1, -1, 1, -1, 1, 1, -1,
|
||||
-1, -1, -1, 1, -1, 1, -1, 1,
|
||||
1, -1, 1, -1, 1, 1, 1, 1,
|
||||
1, 1, -1, 1, -1, 1, -1, 1,
|
||||
-1, 1, -1, -1, -1, -1, -1, 1,
|
||||
-1, 1, -1, -1, 1, -1, 1, 1,
|
||||
1, 1, 1, -1, -1, 1, -1, -1,
|
||||
-1, 1, -1, -1, 1, -1, -1, 1,
|
||||
-1, 1, -1, -1, 1, 1, 1, 1,
|
||||
1, -1, 1, -1, -1, -1, 1, -1,
|
||||
-1, -1, -1, -1, 1, 1, 1, -1,
|
||||
-1, -1, -1, 1, 1, -1, -1, 1,
|
||||
-1, 1, 1, -1, -1, 1, -1, 1,
|
||||
-1, -1, -1, 1, 1, 1, -1, -1,
|
||||
1, -1, 1, 1, 1, -1, 1, -1,
|
||||
-1, -1, -1, -1, -1, -1, 1, -1,
|
||||
1, 1, -1, 1, -1, -1, 1, 1,
|
||||
1, -1, 1, -1, 1, 1, -1, -1,
|
||||
1, 1, 1, -1, -1, 1, 1, 1,
|
||||
1, 1, 1, 1, -1, -1, 1, 1,
|
||||
-1, -1, 1, 1, -1, 1, -1, 1,
|
||||
-1, -1, 1, 1, -1, 1, 1, -1,
|
||||
-1, -1, -1, -1, -1, 1, -1, -1,
|
||||
1, -1, 1, 1, -1, 1, 1, -1,
|
||||
1, 1, -1, -1, 1, -1, -1, -1,
|
||||
-1, -1, -1, 1, 1, -1, 1, -1,
|
||||
-1, 1, -1, 1, -1, 1, 1, 1,
|
||||
1, -1, 1, -1, 1, 1, 1, -1,
|
||||
1, 1, -1, -1, -1, 1, -1, -1,
|
||||
1, 1, -1, 1, -1, -1, -1, -1,
|
||||
1, -1, -1, 1, 1, 1, 1, -1,
|
||||
-1, 1, -1, 1, -1, 1, -1, 1,
|
||||
1, -1, -1, -1, 1, 1, -1, 1,
|
||||
1, 1, 1, -1, -1, 1, 1, 1,
|
||||
-1, 1, 1, 1, 1, -1, 1, 1,
|
||||
1, 1, 1, 1, 1, 1, -1, 1
|
||||
};
|
||||
|
||||
/* PN9 sequence in unsigned (1/0) format */
|
||||
const SINT16 PHY_pn9Table[PHY_PN9_LUT_SIZE] =
|
||||
{
|
||||
#include "phy_pn9Table.txt"
|
||||
};
|
||||
+65
@@ -0,0 +1,65 @@
|
||||
//PN9 sequence, seed 111111111
|
||||
0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 1, 1, 1, 0, 0, 0, 0,
|
||||
1, 0, 1, 1, 0, 0, 1, 1,
|
||||
0, 1, 1, 0, 1, 1, 1, 1,
|
||||
0, 1, 0, 0, 0, 0, 1, 1,
|
||||
1, 0, 0, 1, 1, 0, 0, 0,
|
||||
0, 1, 0, 0, 1, 0, 0, 0,
|
||||
1, 0, 1, 0, 1, 1, 1, 0,
|
||||
1, 0, 1, 1, 1, 1, 0, 0,
|
||||
1, 0, 0, 1, 0, 1, 1, 1,
|
||||
0, 0, 1, 1, 1, 0, 0, 0,
|
||||
0, 0, 0, 1, 1, 1, 0, 1,
|
||||
1, 1, 0, 1, 0, 0, 1, 1,
|
||||
1, 1, 0, 1, 0, 1, 0, 0,
|
||||
1, 0, 1, 0, 0, 0, 0, 0,
|
||||
0, 1, 0, 1, 0, 1, 0, 1,
|
||||
0, 1, 1, 1, 1, 1, 0, 1,
|
||||
0, 1, 1, 0, 1, 0, 0, 0,
|
||||
0, 0, 1, 1, 0, 1, 1, 1,
|
||||
0, 1, 1, 0, 1, 1, 0, 1,
|
||||
0, 1, 1, 0, 0, 0, 0, 0,
|
||||
1, 0, 1, 1, 1, 0, 1, 1,
|
||||
1, 1, 1, 0, 0, 0, 1, 1,
|
||||
1, 1, 0, 0, 1, 1, 0, 1,
|
||||
0, 0, 1, 1, 0, 1, 0, 1,
|
||||
1, 1, 0, 0, 0, 1, 1, 0,
|
||||
1, 0, 0, 0, 1, 0, 1, 1,
|
||||
1, 1, 1, 1, 1, 0, 1, 0,
|
||||
0, 1, 0, 1, 1, 0, 0, 0,
|
||||
1, 0, 1, 0, 0, 1, 1, 0,
|
||||
0, 0, 1, 1, 0, 0, 0, 0,
|
||||
0, 0, 0, 1, 1, 0, 0, 1,
|
||||
1, 0, 0, 1, 0, 1, 0, 1,
|
||||
1, 0, 0, 1, 0, 0, 1, 1,
|
||||
1, 1, 1, 1, 0, 1, 1, 0,
|
||||
1, 0, 0, 1, 0, 0, 1, 0,
|
||||
0, 1, 1, 0, 1, 1, 1, 1,
|
||||
1, 1, 0, 0, 1, 0, 1, 1,
|
||||
0, 1, 0, 1, 0, 0, 0, 0,
|
||||
1, 0, 1, 0, 0, 0, 1, 0,
|
||||
0, 1, 1, 1, 0, 1, 1, 0,
|
||||
0, 1, 0, 1, 1, 1, 1, 0,
|
||||
1, 1, 0, 0, 0, 0, 1, 1,
|
||||
0, 1, 0, 1, 0, 1, 0, 0,
|
||||
1, 1, 1, 0, 0, 1, 0, 0,
|
||||
0, 0, 1, 1, 0, 0, 0, 1,
|
||||
0, 0, 0, 0, 1, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 1, 0, 0,
|
||||
0, 1, 0, 0, 0, 1, 1, 0,
|
||||
0, 1, 0, 0, 0, 1, 1, 1,
|
||||
0, 1, 0, 1, 0, 1, 1, 0,
|
||||
1, 1, 0, 0, 0, 1, 1, 1,
|
||||
0, 0, 0, 1, 0, 0, 1, 0,
|
||||
1, 0, 1, 0, 0, 0, 1, 1,
|
||||
0, 1, 1, 0, 0, 1, 1, 1,
|
||||
1, 1, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 0, 1, 0, 1, 1, 0,
|
||||
1, 1, 1, 0, 0, 1, 0, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0,
|
||||
1, 0, 0, 1, 1, 0, 0, 1,
|
||||
1, 1, 0, 1, 0, 0, 0, 1,
|
||||
1, 1, 1, 1, 0, 1, 1, 1,
|
||||
1, 0, 0, 0, 0, 0, 1, 1,
|
||||
1, 1, 1, 1, 1, 1, 1, 0
|
||||
+53
@@ -0,0 +1,53 @@
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 13, 2012 11:54:06 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: phy_primprefTable.c
|
||||
//
|
||||
// TITLE: PHY_primePrefTable (size 64, 32bit words)
|
||||
//
|
||||
// DESCRIPTION:
|
||||
// This file contains data relevant to PRIME scrambling sequence table
|
||||
//
|
||||
// Copyright (c) 2009 Texas Instruments Inc.
|
||||
// All Rights Reserved This program is the confidential and proprietary
|
||||
// product of Texas Instruments Inc. Any Unauthorized use, reproduction or
|
||||
// transfer of this program is strictly prohibited.
|
||||
//
|
||||
// HISTORY:
|
||||
//
|
||||
//
|
||||
// LIST OF FUNCTION PROTOTYPES:
|
||||
//
|
||||
//
|
||||
// Notes:
|
||||
//
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F28M35x Boot ROM V1.0 $
|
||||
// $Release Date: January 22, 2011 $
|
||||
//###########################################################################
|
||||
|
||||
|
||||
#include "c2_bootrom.h"
|
||||
|
||||
|
||||
#define UINT32 const Uint32
|
||||
|
||||
#pragma DATA_SECTION(PHY_primePrefTable,"primePrefTable");
|
||||
|
||||
UINT32 PHY_primePrefTable[64] = {
|
||||
0x00000000, 0x00000000, 0x00010001, 0x00000001, 0x00010001, 0x00010001, 0x00000000,
|
||||
0x00000001, 0x00010001, 0x00000000, 0x00000001, 0x00010000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000001, 0x00000000, 0x00000001, 0x00010000, 0x00000001, 0x00000000,
|
||||
0x00000001, 0x00010001, 0x00000001, 0x00000001, 0x00010001, 0x00010000, 0x00000001,
|
||||
0x00000000, 0x00000000, 0x00010001, 0x00000000, 0x00010001, 0x00010000, 0x00010000,
|
||||
0x00000000, 0x00010001, 0x00000001, 0x00010000, 0x00010001, 0x00000001, 0x00010001,
|
||||
0x00010000, 0x00000000, 0x00000000, 0x00000001, 0x00000001, 0x00000001, 0x00010001,
|
||||
0x00010001, 0x00000001, 0x00000001, 0x00010000, 0x00010000, 0x00000000, 0x00010000,
|
||||
0x00000001, 0x00010001, 0x00000001, 0x00000000, 0x00010001, 0x00010001, 0x00010001,
|
||||
0x00000001
|
||||
};
|
||||
|
||||
#undef UINT32
|
||||
|
||||
+80
@@ -0,0 +1,80 @@
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 13, 2012 11:54:08 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: phy_primetxpreamble.c
|
||||
//
|
||||
// TITLE: PHY_primeTXPreamable (size 264, 32bit words)
|
||||
//
|
||||
// DESCRIPTION:
|
||||
// This file contains data relevant to PRIME TX preamble sequence table
|
||||
//
|
||||
// Copyright (c) 2009 Texas Instruments Inc.
|
||||
// All Rights Reserved This program is the confidential and proprietary
|
||||
// product of Texas Instruments Inc. Any Unauthorized use, reproduction or
|
||||
// transfer of this program is strictly prohibited.
|
||||
//
|
||||
// HISTORY:
|
||||
//
|
||||
//
|
||||
// LIST OF FUNCTION PROTOTYPES:
|
||||
//
|
||||
//
|
||||
// Notes:
|
||||
//
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F28M35x Boot ROM V1.0 $
|
||||
// $Release Date: January 22, 2011 $
|
||||
//###########################################################################
|
||||
|
||||
|
||||
#include "c2_bootrom.h"
|
||||
|
||||
|
||||
#define UINT32 const Uint32
|
||||
|
||||
#pragma DATA_SECTION(PHY_primeTXPreamble,"primeTxPreamble");
|
||||
|
||||
UINT32 PHY_primeTXPreamble[264] = {
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x02F70000, 0xFE770175, 0xFEA7FD0A, 0x02F301A8, 0xFE2D012E, 0xFF0DFD14, 0x02DC0207,
|
||||
0xFDBF00A8, 0xFFB6FD40, 0x0292027C, 0xFD4CFFDC, 0x00A0FDB2, 0x01F002DF, 0xFD0BFED9,
|
||||
0x01B1FE8D, 0x00D902ED, 0xFD43FDCD, 0x029FFFDC, 0xFF5E025D, 0xFE37FD1B, 0x02F4016A,
|
||||
0xFDDF0103, 0xFFE9FD41, 0x023C02AD, 0xFD0DFF1A, 0x01D5FE93, 0x006202DB, 0xFDA6FD6F,
|
||||
0x02F100C6, 0xFE230171, 0xFFC3FD2B, 0x023002A9, 0xFD09FEEE, 0x0234FEF0, 0xFFA802A2,
|
||||
0xFE56FD20, 0x02DB01B9, 0xFD4D003C, 0x0151FDF0, 0x00A302F1, 0xFDB5FD7A, 0x02F60109,
|
||||
0xFD9700DE, 0x00E8FD9B, 0x00EE02F7, 0xFD9BFD9C, 0x02F600F1, 0xFD8800D5, 0x0122FDB6,
|
||||
0x009102F3, 0xFDF1FD60, 0x02E10178, 0xFD300020, 0x01EBFE57, 0xFF8302B0, 0xFEF2FD0D,
|
||||
0x024B0267, 0xFD15FEC4, 0x02CFFFC6, 0xFDFA019B, 0x00CAFD6A, 0x009A02F6, 0xFE29FD51,
|
||||
0x02AC01D8, 0xFD09FF59, 0x02AFFF5A, 0xFE1401CD, 0x00D6FD64, 0x005D02F4, 0xFE85FD31,
|
||||
0x0259023A, 0xFD26FEAD, 0x02F30041, 0xFD5900D3, 0x0207FE3B, 0xFED2027A, 0x0037FD1F,
|
||||
0x00BE02F3, 0xFE66FD49, 0x02480237, 0xFD43FE7A, 0x02F300B9, 0xFD16001E, 0x02ABFF15,
|
||||
0xFDC201A1, 0x01AFFDCB, 0xFEF402A0, 0x0060FD20, 0x004B02F6, 0xFF15FD1A, 0x017A02B5,
|
||||
0xFE0CFD98, 0x02560208, 0xFD60FE66, 0x02D20125, 0xFD12FF53, 0x02F70038, 0xFD110038,
|
||||
0x02DAFF61, 0xFD4600FD, 0x0294FEAF, 0xFD98019A, 0x023BFE28, 0xFDF3020D, 0x01E1FDC8,
|
||||
0xFE49025C, 0x0191FD88, 0xFE90028E, 0x0154FD61, 0xFEC202AC, 0x012EFD4C, 0xFEDB02BA,
|
||||
0x0122FD43, 0xFEDB02BD, 0x012EFD46, 0xFEC202B4, 0x0154FD54, 0xFE90029F, 0x0191FD72,
|
||||
0xFE490278, 0x01E1FDA4, 0xFDF30238, 0x023BFDF3, 0xFD9801D8, 0x0294FE66, 0xFD460151,
|
||||
0x02DAFF03, 0xFD11009F, 0x02F7FFC8, 0xFD12FFC8, 0x02D200AD, 0xFD60FEDC, 0x0257019A,
|
||||
0xFE0BFDF8, 0x017B0268, 0xFF14FD4C, 0x004B02E6, 0x005FFD0A, 0xFEF402E0, 0x01AFFD60,
|
||||
0xFDC20235, 0x02ABFE5E, 0xFD1600EC, 0x02F3FFE2, 0xFD43FF48, 0x02490186, 0xFE65FDC9,
|
||||
0x00BF02B6, 0x0037FD0D, 0xFED302E1, 0x0207FD85, 0xFD5901C6, 0x02F3FF2D, 0xFD26FFBF,
|
||||
0x02590153, 0xFE84FDC6, 0x005E02CF, 0x00D6FD0C, 0xFE15029C, 0x02AFFE33, 0xFD0900A6,
|
||||
0x02AD00A6, 0xFE29FE28, 0x009B02AF, 0x00C9FD0A, 0xFDFA0296, 0x02CEFE64, 0xFD15003A,
|
||||
0x024B013C, 0xFEF1FD99, 0xFF8402F3, 0x01EAFD4F, 0xFD3001AA, 0x02E1FFDF, 0xFDF1FE88,
|
||||
0x009202A0, 0x0121FD0D, 0xFD88024B, 0x02F6FF2A, 0xFD9BFF10, 0x00EF0264, 0x00E7FD09,
|
||||
0xFD970266, 0x02F6FF21, 0xFDB5FEF8, 0x00A40286, 0x0150FD0F, 0xFD4D0210, 0x02DBFFC3,
|
||||
0xFE55FE48, 0xFFA902E0, 0x0233FD5D, 0xFD090111, 0x02310111, 0xFFC2FD58, 0xFE2402D5,
|
||||
0x02F1FE8E, 0xFDA6FF3B, 0x00630290, 0x01D4FD24, 0xFD0D016E, 0x023D00E5, 0xFFE7FD54,
|
||||
0xFDE002C0, 0x02F5FEFC, 0xFE36FE97, 0xFF6002E4, 0x029EFDA3, 0xFD430026, 0x00DA0232,
|
||||
0x01B0FD13, 0xFD0B0174, 0x01F10126, 0x009FFD22, 0xFD4D024F, 0x02930022, 0xFFB4FD85,
|
||||
0xFDC002C1, 0x02DDFF57, 0xFF0BFDFB, 0xFE2F02EC, 0x02F4FED0, 0xFEA5FE59, 0xFE7802F6,
|
||||
0x02F7FE89, 0xFE7CFE8B, 0xFE9002F6, 0x02F6FE7B, 0xFE89FE87, 0xFE7102F6, 0x02F5FEA4,
|
||||
0xFECEFE4E, 0xFE2002F0, 0x02E4FF08, 0xFF54FDEA, 0xFDAF02CD, 0x02A6FFB0, 0x001EFD73,
|
||||
0xFD3F026B, 0x0217009A, 0x0121FD18, 0xFD0901A6, 0x011701AA, 0x022DFD1C, 0xFD5A006C,
|
||||
0xFFAB029A, 0x02E3FDC9, 0xFE6CFEE1, 0xFE2002F5, 0x02C3FF3E, 0x0031FD81, 0xFD1E0243,
|
||||
0x0177012E, 0x0213FD10, 0xFD69006E, 0xFF4602B8, 0x0000FE2D
|
||||
};
|
||||
|
||||
#undef UINT32
|
||||
+79
@@ -0,0 +1,79 @@
|
||||
// TI File $Revision: /main/1 $
|
||||
// Checkin $Date: August 13, 2012 11:54:09 $
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: phy_primetxpreamble.c
|
||||
//
|
||||
// TITLE: PHY_primeRXPreamable (size 256, 32bit words)
|
||||
//
|
||||
// DESCRIPTION:
|
||||
// This file contains data relevant to PRIME RX preamble sequence table
|
||||
//
|
||||
// Copyright (c) 2009 Texas Instruments Inc.
|
||||
// All Rights Reserved This program is the confidential and proprietary
|
||||
// product of Texas Instruments Inc. Any Unauthorized use, reproduction or
|
||||
// transfer of this program is strictly prohibited.
|
||||
//
|
||||
// HISTORY:
|
||||
//
|
||||
//
|
||||
// LIST OF FUNCTION PROTOTYPES:
|
||||
//
|
||||
//
|
||||
// Notes:
|
||||
//
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F28M35x Boot ROM V1.0 $
|
||||
// $Release Date: January 22, 2011 $
|
||||
//###########################################################################
|
||||
|
||||
|
||||
#include "c2_bootrom.h"
|
||||
|
||||
|
||||
#define UINT32 const Uint32
|
||||
|
||||
#pragma DATA_SECTION(PHY_primeRXPreamble,"primeRxPreamble");
|
||||
|
||||
UINT32 PHY_primeRXPreamble[256] = {
|
||||
0x00800080, 0xFFE1FFE1, 0xFF68FF68, 0x00A600A6, 0x001E001E, 0xFF40FF40, 0x00580058,
|
||||
0x00940094, 0xFF60FF60, 0xFFABFFAB, 0x00BE00BE, 0x00260026, 0xFF39FF39, 0xFFF0FFF0,
|
||||
0x00C800C8, 0x00180018, 0xFF3CFF3C, 0xFFC4FFC4, 0x00B300B3, 0x00770077, 0xFF7EFF7E,
|
||||
0xFF4EFF4E, 0x001F001F, 0x00C100C1, 0x00650065, 0xFF8FFF8F, 0xFF42FF42, 0xFFC7FFC7,
|
||||
0x00830083, 0x00BA00BA, 0x00480048, 0xFF9DFF9D, 0xFF47FF47, 0xFF7AFF7A, 0x00050005,
|
||||
0x00860086, 0x00B500B5, 0x00850085, 0x001B001B, 0xFFABFFAB, 0xFF62FF62, 0xFF52FF52,
|
||||
0xFF76FF76, 0xFFBBFFBB, 0x00090009, 0x004F004F, 0x00820082, 0x009F009F, 0x00A800A8,
|
||||
0x00A200A2, 0x00930093, 0x007F007F, 0x006B006B, 0x00590059, 0x004B004B, 0x00420042,
|
||||
0x003E003E, 0x00400040, 0x00480048, 0x00550055, 0x00660066, 0x007A007A, 0x008E008E,
|
||||
0x009F009F, 0x00A800A8, 0x00A300A3, 0x008B008B, 0x005D005D, 0x001B001B, 0xFFCDFFCD,
|
||||
0xFF84FF84, 0xFF57FF57, 0xFF59FF59, 0xFF95FF95, 0xFFFEFFFE, 0x006F006F, 0x00B100B1,
|
||||
0x009A009A, 0x00280028, 0xFF97FF97, 0xFF47FF47, 0xFF7CFF7C, 0x001D001D, 0x00AB00AB,
|
||||
0x00A100A1, 0xFFF9FFF9, 0xFF52FF52, 0xFF67FF67, 0x00300030, 0x00C200C2, 0x00590059,
|
||||
0xFF73FF73, 0xFF54FF54, 0x003A003A, 0x00C600C6, 0x000C000C, 0xFF3BFF3B, 0xFFCCFFCC,
|
||||
0x00BF00BF, 0x003F003F, 0xFF41FF41, 0xFFD2FFD2, 0x00C500C5, 0x00000000, 0xFF3DFF3D,
|
||||
0x004A004A, 0x009E009E, 0xFF65FF65, 0xFFC0FFC0, 0x00C000C0, 0xFFB3FFB3, 0xFF83FF83,
|
||||
0x00B500B5, 0xFFD2FFD2, 0xFF7FFF7F, 0x00B100B1, 0xFFB9FFB9, 0xFFABFFAB, 0x00AA00AA,
|
||||
0xFF7AFF7A, 0x00100010, 0x00660066, 0xFF61FF61, 0x00870087, 0xFFC8FFC8, 0xFFDBFFDB,
|
||||
0x006D006D, 0xFF80FF80, 0xFFD9FFD9, 0xFF5BFF5B, 0x00740074, 0x005E005E, 0xFF41FF41,
|
||||
0x00240024, 0x00AE00AE, 0xFF7CFF7C, 0xFF8DFF8D, 0x00B400B4, 0x00390039, 0xFF3CFF3C,
|
||||
0xFFEAFFEA, 0x00C800C8, 0x000F000F, 0xFF39FF39, 0xFFDAFFDA, 0x00BF00BF, 0x00570057,
|
||||
0xFF60FF60, 0xFF6AFF6A, 0x00570057, 0x00C300C3, 0x00220022, 0xFF59FF59, 0xFF62FF62,
|
||||
0x00220022, 0x00B700B7, 0x008C008C, 0xFFDBFFDB, 0xFF52FF52, 0xFF60FF60, 0xFFEBFFEB,
|
||||
0x007F007F, 0x00B800B8, 0x007D007D, 0xFFFFFFFF, 0xFF89FF89, 0xFF50FF50, 0xFF64FF64,
|
||||
0xFFB1FFB1, 0x00130013, 0x00690069, 0x009E009E, 0x00AC00AC, 0x00980098, 0x006E006E,
|
||||
0x003A003A, 0x00050005, 0xFFD7FFD7, 0xFFB1FFB1, 0xFF95FF95, 0xFF81FF81, 0xFF74FF74,
|
||||
0xFF6CFF6C, 0xFF68FF68, 0xFF67FF67, 0xFF67FF67, 0xFF6BFF6B, 0xFF71FF71, 0xFF7DFF7D,
|
||||
0xFF8EFF8E, 0xFFA8FFA8, 0xFFCCFFCC, 0xFFF8FFF8, 0x002C002C, 0x00610061, 0x008F008F,
|
||||
0x00A900A9, 0x00A500A5, 0x007B007B, 0x002C002C, 0xFFCAFFCA, 0xFF74FF74, 0xFF4EFF4E,
|
||||
0xFF72FF72, 0xFFDDFFDD, 0x00600060, 0x00B300B3, 0x00990099, 0x00150015, 0xFF7CFF7C,
|
||||
0xFF46FF46, 0xFFADFFAD, 0x00650065, 0x00C000C0, 0x00550055, 0xFF89FF89, 0xFF43FF43,
|
||||
0xFFE7FFE7, 0x00AF00AF, 0x008B008B, 0xFF9CFF9C, 0xFF42FF42, 0x00140014, 0x00C800C8,
|
||||
0x00230023, 0xFF3EFF3E, 0xFFC4FFC4, 0x00BE00BE, 0x00390039, 0xFF3DFF3D, 0xFFE7FFE7,
|
||||
0x00C700C7, 0xFFDCFFDC, 0xFF4AFF4A, 0x00750075, 0x00750075, 0xFF49FF49, 0x00070007,
|
||||
0x00AD00AD, 0xFF71FF71, 0xFFD3FFD3, 0x00B200B2, 0xFF7DFF7D, 0xFFDEFFDE, 0x00A200A2,
|
||||
0xFF66FF66, 0x00220022, 0x00670067, 0xFF5AFF5A, 0x00810081, 0xFFE4FFE4, 0xFFB2FFB2,
|
||||
0x008F008F, 0xFF6EFF6E, 0x00640064, 0xFFF5FFF5
|
||||
};
|
||||
|
||||
#undef UINT32
|
||||
+70
@@ -0,0 +1,70 @@
|
||||
/*****************************************************************************
|
||||
* FILE PURPOSE: Header file for 802.15.4G (SUN) PHY ROM Tables
|
||||
*******************************************************************************
|
||||
*
|
||||
* FILE NAME: phy_sunTables.h
|
||||
*
|
||||
* DESCRIPTION:
|
||||
* Header file for SUN PHY ROM Tables
|
||||
*
|
||||
* Copyright (c) 2012 Texas Instruments Inc.
|
||||
* All Rights Reserved This program is the confidential and proprietary
|
||||
* product of Texas Instruments Inc. Any Unauthorized use, reproduction or
|
||||
* transfer of this program is strictly prohibited.
|
||||
*
|
||||
* HISTORY:
|
||||
*
|
||||
* 01/13/2013 Written
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
#ifndef _PHY_SUN_TABLES_H
|
||||
#define _PHY_SUN_TABLES_H
|
||||
|
||||
#include <typedefs.h>
|
||||
|
||||
/******************************************************************************
|
||||
* Definitions
|
||||
*****************************************************************************/
|
||||
|
||||
#define PHY_PN9_LUT_SIZE 512
|
||||
#define PHY_COSIN_LUT_SIZE 1024
|
||||
|
||||
#define PHY_FSK_GSN_INTFILT50_LUT_SIZE 1000 //(2+4+8+4+2)*50
|
||||
#define PHY_FSK_GSN_INTFILT16_LUT_SIZE 320 //(2+4+8+4+2)*16
|
||||
#define PHY_FSK_TXSRC_COEF_LUT_SIZE 128 // 32*4
|
||||
|
||||
#define PHY_DSSS_NUM_EQZ_TAPS 16
|
||||
#define PHY_DSSS_LSF_MATRIX_SIZE 57
|
||||
|
||||
#define PHY_DSSS_FFTDIFFSEQ_SIZE 64 //complex
|
||||
|
||||
#define PHY_DSSS_DESPRD_8_4_LUT_NUM_ROWS 8
|
||||
#define PHY_DSSS_DESPRD_8_4_LUT_NUM_COLS 8
|
||||
|
||||
#define PHY_DSSS_DESPRD_16_4_LUT_NUM_ROWS 16
|
||||
#define PHY_DSSS_DESPRD_16_4_LUT_NUM_COLS 16
|
||||
|
||||
#define PHY_DSSS_DESPRD_8_4_LUT_NUM_ROWS 8
|
||||
#define PHY_DSSS_DESPRD_8_4_LUT_NUM_COLS 8
|
||||
|
||||
#define PHY_DSSS_DESPRD_16_1_LUT_NUM_COLS 16
|
||||
|
||||
/******************************************************************************
|
||||
* Prototypes
|
||||
*****************************************************************************/
|
||||
|
||||
extern const SINT16 PHY_pn9STable[PHY_PN9_LUT_SIZE];
|
||||
extern const SINT16 PHY_pn9Table[PHY_PN9_LUT_SIZE];
|
||||
extern const SINT16 PHY_cosinTable[PHY_COSIN_LUT_SIZE * 2];
|
||||
extern const SINT16 PHY_fskGsnIntFilt59Table[PHY_FSK_GSN_INTFILT50_LUT_SIZE];
|
||||
extern const SINT16 PHY_fskGsnIntFilt16Table[PHY_FSK_GSN_INTFILT16_LUT_SIZE];
|
||||
extern const SINT16 PHY_fskTxSrcCoefTable[PHY_FSK_TXSRC_COEF_LUT_SIZE];
|
||||
extern const ComplexShort_t PHY_dsssFftDiffSeqTable[PHY_DSSS_FFTDIFFSEQ_SIZE];
|
||||
//extern SINT16 PHY_dsssLsfMatrix[PHY_DSSS_NUM_EQZ_TAPS][2*PHY_DSSS_LSF_MATRIX_SIZE];
|
||||
extern const SINT16 PHY_dsssDesprd_8_4_table[PHY_DSSS_DESPRD_8_4_LUT_NUM_ROWS][PHY_DSSS_DESPRD_8_4_LUT_NUM_COLS];
|
||||
extern const SINT16 PHY_dsssDesprd_16_4_table[PHY_DSSS_DESPRD_16_4_LUT_NUM_ROWS][PHY_DSSS_DESPRD_16_4_LUT_NUM_COLS];
|
||||
extern const SINT16 PHY_dsssDesprd_16_1_0_table[PHY_DSSS_DESPRD_16_1_LUT_NUM_COLS];
|
||||
extern const SINT16 PHY_dsssDesprd_16_1_1_table[PHY_DSSS_DESPRD_16_1_LUT_NUM_COLS];
|
||||
|
||||
#endif
|
||||
+1075
File diff suppressed because it is too large
Load Diff
+227
@@ -0,0 +1,227 @@
|
||||
;============================================================================
|
||||
;
|
||||
; File Name : phy_tf384pFFTTable.asm
|
||||
;
|
||||
; Description : This file contains the radix-3 twiddle table for 384 pt compelx FFT
|
||||
;
|
||||
;
|
||||
; Date : 21/12/2012 (dd/mm/yyyy)
|
||||
;
|
||||
; Copyright (c) 2010 Texas Instruments Inc.
|
||||
;===========================================================================
|
||||
; Routine Type : C Callable
|
||||
;
|
||||
;======================================================================
|
||||
|
||||
|
||||
.sect "twiddleFactors"
|
||||
.global _PHY_tf384pFFTTable
|
||||
;=======================================
|
||||
; % matlab code for twiddle factor generation
|
||||
; n = 384
|
||||
; kk = [0:n-1];
|
||||
; w = round(32767*(cos(2*pi*kk/n)-j*sin(2*pi*kk/n)));
|
||||
; fp = fopen('tf_384.dat','w');
|
||||
; for ii = 1:4:n
|
||||
; fprintf(fp, ' .word %d, %d, %d, %d, %d, %d, %d, %d, \n',imag(w(ii)), real(w(ii)),imag(w(ii+1)), real(w(ii+1)),imag(w(ii+2)), real(w(ii+2)),imag(w(ii+3)), real(w(ii+3)));
|
||||
; end
|
||||
;=======================================
|
||||
_PHY_tf384pFFTTable:
|
||||
.word 0, 32767, -536, 32763, -1072, 32749, -1608, 32728
|
||||
.word -2143, 32697, -2678, 32657, -3212, 32609, -3745, 32552
|
||||
.word -4277, 32487, -4808, 32412, -5338, 32329, -5866, 32238
|
||||
.word -6393, 32137, -6917, 32028, -7441, 31911, -7962, 31785
|
||||
.word -8481, 31650, -8997, 31507, -9512, 31356, -10024, 31196
|
||||
.word -10533, 31028, -11039, 30852, -11542, 30667, -12042, 30474
|
||||
.word -12539, 30273, -13033, 30064, -13523, 29846, -14010, 29621
|
||||
.word -14492, 29388, -14971, 29147, -15446, 28898, -15917, 28641
|
||||
.word -16383, 28377, -16846, 28105, -17303, 27826, -17756, 27539
|
||||
.word -18204, 27245, -18648, 26943, -19086, 26635, -19519, 26319
|
||||
.word -19947, 25996, -20370, 25666, -20787, 25329, -21199, 24986
|
||||
.word -21605, 24636, -22005, 24279, -22399, 23915, -22788, 23546
|
||||
.word -23170, 23170, -23546, 22788, -23915, 22399, -24279, 22005
|
||||
.word -24636, 21605, -24986, 21199, -25329, 20787, -25666, 20370
|
||||
.word -25996, 19947, -26319, 19519, -26635, 19086, -26943, 18648
|
||||
.word -27245, 18204, -27539, 17756, -27826, 17303, -28105, 16846
|
||||
.word -28377, 16384, -28641, 15917, -28898, 15446, -29147, 14971
|
||||
.word -29388, 14492, -29621, 14010, -29846, 13523, -30064, 13033
|
||||
.word -30273, 12539, -30474, 12042, -30667, 11542, -30852, 11039
|
||||
.word -31028, 10533, -31196, 10024, -31356, 9512, -31507, 8997
|
||||
.word -31650, 8481, -31785, 7962, -31911, 7441, -32028, 6917
|
||||
.word -32137, 6393, -32238, 5866, -32329, 5338, -32412, 4808
|
||||
.word -32487, 4277, -32552, 3745, -32609, 3212, -32657, 2678
|
||||
.word -32697, 2143, -32728, 1608, -32749, 1072, -32763, 536
|
||||
.word -32767, 0, -32763, -536, -32749, -1072, -32728, -1608
|
||||
.word -32697, -2143, -32657, -2678, -32609, -3212, -32552, -3745
|
||||
.word -32487, -4277, -32412, -4808, -32329, -5338, -32238, -5866
|
||||
.word -32137, -6393, -32028, -6917, -31911, -7441, -31785, -7962
|
||||
.word -31650, -8481, -31507, -8997, -31356, -9512, -31196, -10024
|
||||
.word -31028, -10533, -30852, -11039, -30667, -11542, -30474, -12042
|
||||
.word -30273, -12539, -30064, -13033, -29846, -13523, -29621, -14010
|
||||
.word -29388, -14492, -29147, -14971, -28898, -15446, -28641, -15917
|
||||
.word -28377, -16383, -28105, -16846, -27826, -17303, -27539, -17756
|
||||
.word -27245, -18204, -26943, -18648, -26635, -19086, -26319, -19519
|
||||
.word -25996, -19947, -25666, -20370, -25329, -20787, -24986, -21199
|
||||
.word -24636, -21605, -24279, -22005, -23915, -22399, -23546, -22788
|
||||
.word -23170, -23170, -22788, -23546, -22399, -23915, -22005, -24279
|
||||
.word -21605, -24636, -21199, -24986, -20787, -25329, -20370, -25666
|
||||
.word -19947, -25996, -19519, -26319, -19086, -26635, -18648, -26943
|
||||
.word -18204, -27245, -17756, -27539, -17303, -27826, -16846, -28105
|
||||
.word -16383, -28377, -15917, -28641, -15446, -28898, -14971, -29147
|
||||
.word -14492, -29388, -14010, -29621, -13523, -29846, -13033, -30064
|
||||
.word -12539, -30273, -12042, -30474, -11542, -30667, -11039, -30852
|
||||
.word -10533, -31028, -10024, -31196, -9512, -31356, -8997, -31507
|
||||
.word -8481, -31650, -7962, -31785, -7441, -31911, -6917, -32028
|
||||
.word -6393, -32137, -5866, -32238, -5338, -32329, -4808, -32412
|
||||
.word -4277, -32487, -3745, -32552, -3212, -32609, -2678, -32657
|
||||
.word -2143, -32697, -1608, -32728, -1072, -32749, -536, -32763
|
||||
.word 0, -32767, 536, -32763, 1072, -32749, 1608, -32728
|
||||
.word 2143, -32697, 2678, -32657, 3212, -32609, 3745, -32552
|
||||
.word 4277, -32487, 4808, -32412, 5338, -32329, 5866, -32238
|
||||
.word 6393, -32137, 6917, -32028, 7441, -31911, 7962, -31785
|
||||
.word 8481, -31650, 8997, -31507, 9512, -31356, 10024, -31196
|
||||
.word 10533, -31028, 11039, -30852, 11542, -30667, 12042, -30474
|
||||
.word 12539, -30273, 13033, -30064, 13523, -29846, 14010, -29621
|
||||
.word 14492, -29388, 14971, -29147, 15446, -28898, 15917, -28641
|
||||
.word 16383, -28377, 16846, -28105, 17303, -27826, 17756, -27539
|
||||
.word 18204, -27245, 18648, -26943, 19086, -26635, 19519, -26319
|
||||
.word 19947, -25996, 20370, -25666, 20787, -25329, 21199, -24986
|
||||
.word 21605, -24636, 22005, -24279, 22399, -23915, 22788, -23546
|
||||
.word 23170, -23170, 23546, -22788, 23915, -22399, 24279, -22005
|
||||
.word 24636, -21605, 24986, -21199, 25329, -20787, 25666, -20370
|
||||
.word 25996, -19947, 26319, -19519, 26635, -19086, 26943, -18648
|
||||
.word 27245, -18204, 27539, -17756, 27826, -17303, 28105, -16846
|
||||
.word 28377, -16384, 28641, -15917, 28898, -15446, 29147, -14971
|
||||
.word 29388, -14492, 29621, -14010, 29846, -13523, 30064, -13033
|
||||
.word 30273, -12539, 30474, -12042, 30667, -11542, 30852, -11039
|
||||
.word 31028, -10533, 31196, -10024, 31356, -9512, 31507, -8997
|
||||
.word 31650, -8481, 31785, -7962, 31911, -7441, 32028, -6917
|
||||
.word 32137, -6393, 32238, -5866, 32329, -5338, 32412, -4808
|
||||
.word 32487, -4277, 32552, -3745, 32609, -3212, 32657, -2678
|
||||
.word 32697, -2143, 32728, -1608, 32749, -1072, 32763, -536
|
||||
.word 32767, 0, 32763, 536, 32749, 1072, 32728, 1608
|
||||
.word 32697, 2143, 32657, 2678, 32609, 3212, 32552, 3745
|
||||
.word 32487, 4277, 32412, 4808, 32329, 5338, 32238, 5866
|
||||
.word 32137, 6393, 32028, 6917, 31911, 7441, 31785, 7962
|
||||
.word 31650, 8481, 31507, 8997, 31356, 9512, 31196, 10024
|
||||
.word 31028, 10533, 30852, 11039, 30667, 11542, 30474, 12042
|
||||
.word 30273, 12539, 30064, 13033, 29846, 13523, 29621, 14010
|
||||
.word 29388, 14492, 29147, 14971, 28898, 15446, 28641, 15917
|
||||
.word 28377, 16384, 28105, 16846, 27826, 17303, 27539, 17756
|
||||
.word 27245, 18204, 26943, 18648, 26635, 19086, 26319, 19519
|
||||
.word 25996, 19947, 25666, 20370, 25329, 20787, 24986, 21199
|
||||
.word 24636, 21605, 24279, 22005, 23915, 22399, 23546, 22788
|
||||
.word 23170, 23170, 22788, 23546, 22399, 23915, 22005, 24279
|
||||
.word 21605, 24636, 21199, 24986, 20787, 25329, 20370, 25666
|
||||
.word 19947, 25996, 19519, 26319, 19086, 26635, 18648, 26943
|
||||
.word 18204, 27245, 17756, 27539, 17303, 27826, 16846, 28105
|
||||
.word 16384, 28377, 15917, 28641, 15446, 28898, 14971, 29147
|
||||
.word 14492, 29388, 14010, 29621, 13523, 29846, 13033, 30064
|
||||
.word 12539, 30273, 12042, 30474, 11542, 30667, 11039, 30852
|
||||
.word 10533, 31028, 10024, 31196, 9512, 31356, 8997, 31507
|
||||
.word 8481, 31650, 7962, 31785, 7441, 31911, 6917, 32028
|
||||
.word 6393, 32137, 5866, 32238, 5338, 32329, 4808, 32412
|
||||
.word 4277, 32487, 3745, 32552, 3212, 32609, 2678, 32657
|
||||
.word 2143, 32697, 1608, 32728, 1072, 32749, 536, 32763
|
||||
.word 0, 32767, -268, 32766, -536, 32763, -804, 32757
|
||||
.word -1072, 32749, -1340, 32740, -1608, 32728, -1875, 32713
|
||||
.word -2143, 32697, -2410, 32678, -2678, 32657, -2945, 32634
|
||||
.word -3212, 32609, -3478, 32582, -3745, 32552, -4011, 32521
|
||||
.word -4277, 32487, -4543, 32451, -4808, 32412, -5073, 32372
|
||||
.word -5338, 32329, -5602, 32285, -5866, 32238, -6129, 32189
|
||||
.word -6393, 32137, -6655, 32084, -6917, 32028, -7179, 31971
|
||||
.word -7441, 31911, -7701, 31849, -7962, 31785, -8222, 31719
|
||||
.word -8481, 31650, -8739, 31580, -8997, 31507, -9255, 31433
|
||||
.word -9512, 31356, -9768, 31277, -10024, 31196, -10278, 31113
|
||||
.word -10533, 31028, -10786, 30941, -11039, 30852, -11291, 30760
|
||||
.word -11542, 30667, -11793, 30571, -12042, 30474, -12291, 30374
|
||||
.word -12539, 30273, -12787, 30169, -13033, 30064, -13279, 29956
|
||||
.word -13523, 29846, -13767, 29735, -14010, 29621, -14252, 29505
|
||||
.word -14492, 29388, -14732, 29268, -14971, 29147, -15209, 29023
|
||||
.word -15446, 28898, -15682, 28771, -15917, 28641, -16151, 28510
|
||||
.word -16383, 28377, -16615, 28242, -16846, 28105, -17075, 27966
|
||||
.word -17303, 27826, -17530, 27683, -17756, 27539, -17981, 27393
|
||||
.word -18204, 27245, -18427, 27095, -18648, 26943, -18868, 26790
|
||||
.word -19086, 26635, -19303, 26478, -19519, 26319, -19734, 26158
|
||||
.word -19947, 25996, -20159, 25832, -20370, 25666, -20579, 25498
|
||||
.word -20787, 25329, -20994, 25158, -21199, 24986, -21403, 24811
|
||||
.word -21605, 24636, -21806, 24458, -22005, 24279, -22203, 24098
|
||||
.word -22399, 23915, -22594, 23731, -22788, 23546, -22979, 23359
|
||||
.word -23170, 23170, -23359, 22979, -23546, 22788, -23731, 22594
|
||||
.word -23915, 22399, -24098, 22203, -24279, 22005, -24458, 21806
|
||||
.word -24636, 21605, -24811, 21403, -24986, 21199, -25158, 20994
|
||||
.word -25329, 20787, -25498, 20579, -25666, 20370, -25832, 20159
|
||||
.word -25996, 19947, -26158, 19734, -26319, 19519, -26478, 19303
|
||||
.word -26635, 19086, -26790, 18868, -26943, 18648, -27095, 18427
|
||||
.word -27245, 18204, -27393, 17981, -27539, 17756, -27683, 17530
|
||||
.word -27826, 17303, -27966, 17075, -28105, 16846, -28242, 16615
|
||||
.word -28377, 16384, -28510, 16151, -28641, 15917, -28771, 15682
|
||||
.word -28898, 15446, -29023, 15209, -29147, 14971, -29268, 14732
|
||||
.word -29388, 14492, -29505, 14252, -29621, 14010, -29735, 13767
|
||||
.word -29846, 13523, -29956, 13279, -30064, 13033, -30169, 12787
|
||||
.word -30273, 12539, -30374, 12291, -30474, 12042, -30571, 11793
|
||||
.word -30667, 11542, -30760, 11291, -30852, 11039, -30941, 10786
|
||||
.word -31028, 10533, -31113, 10278, -31196, 10024, -31277, 9768
|
||||
.word -31356, 9512, -31433, 9255, -31507, 8997, -31580, 8739
|
||||
.word -31650, 8481, -31719, 8222, -31785, 7962, -31849, 7701
|
||||
.word -31911, 7441, -31971, 7179, -32028, 6917, -32084, 6655
|
||||
.word -32137, 6393, -32189, 6129, -32238, 5866, -32285, 5602
|
||||
.word -32329, 5338, -32372, 5073, -32412, 4808, -32451, 4543
|
||||
.word -32487, 4277, -32521, 4011, -32552, 3745, -32582, 3478
|
||||
.word -32609, 3212, -32634, 2945, -32657, 2678, -32678, 2410
|
||||
.word -32697, 2143, -32713, 1875, -32728, 1608, -32740, 1340
|
||||
.word -32749, 1072, -32757, 804, -32763, 536, -32766, 268
|
||||
.word -32767, 0, -32766, -268, -32763, -536, -32757, -804
|
||||
.word -32749, -1072, -32740, -1340, -32728, -1608, -32713, -1875
|
||||
.word -32697, -2143, -32678, -2410, -32657, -2678, -32634, -2945
|
||||
.word -32609, -3212, -32582, -3478, -32552, -3745, -32521, -4011
|
||||
.word -32487, -4277, -32451, -4543, -32412, -4808, -32372, -5073
|
||||
.word -32329, -5338, -32285, -5602, -32238, -5866, -32189, -6129
|
||||
.word -32137, -6393, -32084, -6655, -32028, -6917, -31971, -7179
|
||||
.word -31911, -7441, -31849, -7701, -31785, -7962, -31719, -8222
|
||||
.word -31650, -8481, -31580, -8739, -31507, -8997, -31433, -9255
|
||||
.word -31356, -9512, -31277, -9768, -31196, -10024, -31113, -10278
|
||||
.word -31028, -10533, -30941, -10786, -30852, -11039, -30760, -11291
|
||||
.word -30667, -11542, -30571, -11793, -30474, -12042, -30374, -12291
|
||||
.word -30273, -12539, -30169, -12787, -30064, -13033, -29956, -13279
|
||||
.word -29846, -13523, -29735, -13767, -29621, -14010, -29505, -14252
|
||||
.word -29388, -14492, -29268, -14732, -29147, -14971, -29023, -15209
|
||||
.word -28898, -15446, -28771, -15682, -28641, -15917, -28510, -16151
|
||||
.word -28377, -16383, -28242, -16615, -28105, -16846, -27966, -17075
|
||||
.word -27826, -17303, -27683, -17530, -27539, -17756, -27393, -17981
|
||||
.word -27245, -18204, -27095, -18427, -26943, -18648, -26790, -18868
|
||||
.word -26635, -19086, -26478, -19303, -26319, -19519, -26158, -19734
|
||||
.word -25996, -19947, -25832, -20159, -25666, -20370, -25498, -20579
|
||||
.word -25329, -20787, -25158, -20994, -24986, -21199, -24811, -21403
|
||||
.word -24636, -21605, -24458, -21806, -24279, -22005, -24098, -22203
|
||||
.word -23915, -22399, -23731, -22594, -23546, -22788, -23359, -22979
|
||||
.word -23170, -23170, -22979, -23359, -22788, -23546, -22594, -23731
|
||||
.word -22399, -23915, -22203, -24098, -22005, -24279, -21806, -24458
|
||||
.word -21605, -24636, -21403, -24811, -21199, -24986, -20994, -25158
|
||||
.word -20787, -25329, -20579, -25498, -20370, -25666, -20159, -25832
|
||||
.word -19947, -25996, -19734, -26158, -19519, -26319, -19303, -26478
|
||||
.word -19086, -26635, -18868, -26790, -18648, -26943, -18427, -27095
|
||||
.word -18204, -27245, -17981, -27393, -17756, -27539, -17530, -27683
|
||||
.word -17303, -27826, -17075, -27966, -16846, -28105, -16615, -28242
|
||||
.word -16383, -28377, -16151, -28510, -15917, -28641, -15682, -28771
|
||||
.word -15446, -28898, -15209, -29023, -14971, -29147, -14732, -29268
|
||||
.word -14492, -29388, -14252, -29505, -14010, -29621, -13767, -29735
|
||||
.word -13523, -29846, -13279, -29956, -13033, -30064, -12787, -30169
|
||||
.word -12539, -30273, -12291, -30374, -12042, -30474, -11793, -30571
|
||||
.word -11542, -30667, -11291, -30760, -11039, -30852, -10786, -30941
|
||||
.word -10533, -31028, -10278, -31113, -10024, -31196, -9768, -31277
|
||||
.word -9512, -31356, -9255, -31433, -8997, -31507, -8739, -31580
|
||||
.word -8481, -31650, -8222, -31719, -7962, -31785, -7701, -31849
|
||||
.word -7441, -31911, -7179, -31971, -6917, -32028, -6655, -32084
|
||||
.word -6393, -32137, -6129, -32189, -5866, -32238, -5602, -32285
|
||||
.word -5338, -32329, -5073, -32372, -4808, -32412, -4543, -32451
|
||||
.word -4277, -32487, -4011, -32521, -3745, -32552, -3478, -32582
|
||||
.word -3212, -32609, -2945, -32634, -2678, -32657, -2410, -32678
|
||||
.word -2143, -32697, -1875, -32713, -1608, -32728, -1340, -32740
|
||||
.word -1072, -32749, -804, -32757, -536, -32763, -268, -32766
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
+163
@@ -0,0 +1,163 @@
|
||||
#ifndef _TYPEDEFS_H
|
||||
#define _TYPEDEFS_H
|
||||
|
||||
/*******************************************************************************
|
||||
* FILE PURPOSE: Define data types for C
|
||||
********************************************************************************
|
||||
*
|
||||
* FILE NAME: typedefs.h
|
||||
*
|
||||
* DESCRIPTION:
|
||||
* This file contains common data type definitions
|
||||
*
|
||||
* Copyright (c) 2009 Texas Instruments Inc.
|
||||
* All Rights Reserved This program is the confidential and proprietary
|
||||
* product of Texas Instruments Inc. Any Unauthorized use, reproduction or
|
||||
* transfer of this program is strictly prohibited.
|
||||
*
|
||||
* HISTORY:
|
||||
*
|
||||
* 10/26/2004 S.Yim Written
|
||||
* 09/13/2006 U.Dasgupta Added defines to help division by 3.
|
||||
* 11/10/2006 S.Yim Change the definitions of WIMAX_status_t to align
|
||||
* withe M2P I/F
|
||||
* 09/11/2007 S.Yim Added MAC types.h here
|
||||
* 11/11/2008 R.Liang port to DSP/BIOS
|
||||
*
|
||||
* LIST OF FUNCTION PROTOTYPES:
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#include <limits.h>
|
||||
|
||||
//----------------------------------------------------------------------------
|
||||
// Global Macro Declarations
|
||||
//----------------------------------------------------------------------------
|
||||
#ifndef TRUE
|
||||
#define TRUE (1)
|
||||
#define FALSE (0)
|
||||
#endif
|
||||
|
||||
typedef enum {
|
||||
EVEN = 0,
|
||||
ODD = 1
|
||||
} parity_t;
|
||||
#define PARITY(a) ((a) % 2)
|
||||
|
||||
#define ALIGN16(len) (((len) + 1) & ~1)
|
||||
|
||||
#if defined (CM3)
|
||||
// Cortex CM3
|
||||
typedef unsigned char uint8;
|
||||
typedef unsigned short uint16;
|
||||
typedef signed short sint16;
|
||||
typedef unsigned int uint32;
|
||||
typedef signed int sint32;
|
||||
typedef int bool;
|
||||
|
||||
typedef unsigned char UINT8;
|
||||
// Read-Write Data Types
|
||||
typedef signed short SINT16; // Signed 16-bit integer (15-bit magnitude)
|
||||
typedef unsigned short UINT16; // Unsigned 16-bit integer
|
||||
typedef signed int SINT32; // Signed 32-bit integer (31-bit magnitude)
|
||||
typedef unsigned int UINT32; // Unsigned 32-bit integer
|
||||
//typedef int BOOL; // Only TRUE/FALSE applied
|
||||
|
||||
// All pointers are 32 bits long
|
||||
typedef SINT16 *PSINT16; // Pointer to SINT16
|
||||
typedef UINT16 *PUINT16; // Pointer to UINT16
|
||||
typedef SINT32 *PSINT32; // Pointer to SINT32
|
||||
typedef UINT32 *PUINT32; // Pointer to UINT32
|
||||
|
||||
#else
|
||||
|
||||
//----------------------------------------------------------------------------
|
||||
// Global Typedef Declarations
|
||||
//----------------------------------------------------------------------------
|
||||
|
||||
/* size of, in octets */
|
||||
#define OCTETS(x) ((sizeof(x)) * (CHAR_BIT >> 3))
|
||||
|
||||
//typedef unsigned char uint8;
|
||||
typedef unsigned int uint16;
|
||||
typedef unsigned long uint32;
|
||||
typedef unsigned long long uint64;
|
||||
|
||||
#ifndef DSP28_DATA_TYPES
|
||||
#define DSP28_DATA_TYPES
|
||||
typedef int int16;
|
||||
typedef long int32;
|
||||
typedef long long int64;
|
||||
|
||||
#ifndef STD_
|
||||
#ifndef _TI_STD_TYPES
|
||||
typedef unsigned int Uint16;
|
||||
typedef unsigned long Uint32;
|
||||
#endif
|
||||
#endif
|
||||
|
||||
typedef unsigned long long Uint64;
|
||||
typedef float float32;
|
||||
typedef long double float64;
|
||||
#endif
|
||||
|
||||
typedef long RCODE;
|
||||
//typedef unsigned long bool;
|
||||
|
||||
// Read-Write Data Types
|
||||
typedef signed int SINT16; // Signed 16-bit integer (15-bit magnitude)
|
||||
typedef unsigned int UINT16; // Unsigned 16-bit integer
|
||||
typedef signed long SINT32; // Signed 32-bit integer (31-bit magnitude)
|
||||
typedef unsigned long UINT32; // Unsigned 32-bit integer
|
||||
typedef signed long long SINT64; // Signed 64-bit integer
|
||||
typedef unsigned long long UINT64; // Unsigned 64-bit integer
|
||||
typedef int BOOL; // Only TRUE/FALSE applied
|
||||
|
||||
// All pointers are 32 bits long
|
||||
typedef SINT16 *PSINT16; // Pointer to SINT16
|
||||
typedef UINT16 *PUINT16; // Pointer to UINT16
|
||||
typedef SINT32 *PSINT32; // Pointer to SINT32
|
||||
typedef UINT32 *PUINT32; // Pointer to UINT32
|
||||
|
||||
#endif
|
||||
|
||||
#define SIZEOF_SINT16 2
|
||||
#define SIZEOF_UINT16 2
|
||||
#define SIZEOF_SINT32 4
|
||||
#define SIZEOF_UINT32 4
|
||||
|
||||
|
||||
//----------------------------------------------------------------------------
|
||||
// Complex data Typedef Declarations
|
||||
//----------------------------------------------------------------------------
|
||||
typedef struct
|
||||
{
|
||||
SINT16 real;
|
||||
SINT16 imag;
|
||||
|
||||
}cplx16, ComplexShort, ComplexShort_t;
|
||||
|
||||
// VCU uses reverse order
|
||||
typedef struct
|
||||
{
|
||||
SINT16 imag;
|
||||
SINT16 real;
|
||||
}cplx16vcu, ComplexShortVCU;
|
||||
|
||||
//----------------------------------------------------------------------------
|
||||
// Circular buffer Typedef Declarations
|
||||
//----------------------------------------------------------------------------
|
||||
typedef struct
|
||||
{
|
||||
SINT16 *buf_p; // buffer base addr
|
||||
UINT16 rdIdx; // read index
|
||||
UINT16 wtIdx; // write index
|
||||
UINT16 bufSize; // buf size in 16-bits words
|
||||
|
||||
}Buffer_t;
|
||||
|
||||
#endif //_TYPEDEFS_H
|
||||
|
||||
|
||||
|
||||
|
||||
+171
@@ -0,0 +1,171 @@
|
||||
//###########################################################################
|
||||
//
|
||||
// FILE: F2837x_Cla_defines.h
|
||||
//
|
||||
// TITLE: #defines used in CLA examples
|
||||
//
|
||||
//###########################################################################
|
||||
// $TI Release: F2837x C/C++ Header Files and Peripheral Examples V100 $
|
||||
// $Release Date: November 30, 2011 $
|
||||
//###########################################################################
|
||||
|
||||
#ifndef F2837X_CLA_DEFINES_H
|
||||
#define F2837X_CLA_DEFINES_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
// MCTL Register
|
||||
//==========================
|
||||
#define CLA_FORCE_RESET 0x1
|
||||
#define CLA_IACK_ENABLE 0x1
|
||||
#define CLA_IACK_DISABLE 0x0
|
||||
|
||||
// MMEMCFG Register
|
||||
//==========================
|
||||
#define CLA_CLA_SPACE 0x1
|
||||
#define CLA_CPU_SPACE 0x0
|
||||
|
||||
// MIER Interrupt Enable Register
|
||||
//==========================
|
||||
#define CLA_INT_ENABLE 0x1
|
||||
#define CLA_INT_DISABLE 0x0
|
||||
|
||||
// Peripheral Interrupt Source Select define for DMAnCLASourceSelect Register
|
||||
//===========================================================================
|
||||
#define CLA_TRIG_NOPERPH 0
|
||||
#define CLA_TRIG_ADCAINT1 1
|
||||
#define CLA_TRIG_ADCAINT2 2
|
||||
#define CLA_TRIG_ADCAINT3 3
|
||||
#define CLA_TRIG_ADCAINT4 4
|
||||
#define CLA_TRIG_ADCAEVT 5
|
||||
#define CLA_TRIG_ADCBINT1 6
|
||||
#define CLA_TRIG_ADCBINT2 7
|
||||
#define CLA_TRIG_ADCBINT3 8
|
||||
#define CLA_TRIG_ADCBINT4 9
|
||||
#define CLA_TRIG_ADCBEVT 10
|
||||
#define CLA_TRIG_ADCCINT1 11
|
||||
#define CLA_TRIG_ADCCINT2 12
|
||||
#define CLA_TRIG_ADCCINT3 13
|
||||
#define CLA_TRIG_ADCCINT4 14
|
||||
#define CLA_TRIG_ADCCEVT 15
|
||||
#define CLA_TRIG_ADCDINT1 16
|
||||
#define CLA_TRIG_ADCDINT2 17
|
||||
#define CLA_TRIG_ADCDINT3 18
|
||||
#define CLA_TRIG_ADCDINT4 19
|
||||
#define CLA_TRIG_ADCDEVT 20
|
||||
|
||||
#define CLA_TRIG_XINT1 29
|
||||
#define CLA_TRIG_XINT2 30
|
||||
#define CLA_TRIG_XINT3 31
|
||||
#define CLA_TRIG_XINT4 32
|
||||
#define CLA_TRIG_XINT5 33
|
||||
|
||||
#define CLA_TRIG_EPWM1INT 36
|
||||
#define CLA_TRIG_EPWM2INT 37
|
||||
#define CLA_TRIG_EPWM3INT 38
|
||||
#define CLA_TRIG_EPWM4INT 39
|
||||
#define CLA_TRIG_EPWM5INT 40
|
||||
#define CLA_TRIG_EPWM6INT 41
|
||||
#define CLA_TRIG_EPWM7INT 42
|
||||
#define CLA_TRIG_EPWM8INT 43
|
||||
#define CLA_TRIG_EPWM9INT 44
|
||||
#define CLA_TRIG_EPWM10INT 45
|
||||
#define CLA_TRIG_EPWM11INT 46
|
||||
#define CLA_TRIG_EPWM12INT 47
|
||||
|
||||
#define CLA_TRIG_TINT0 68
|
||||
#define CLA_TRIG_TINT1 69
|
||||
#define CLA_TRIG_TINT2 70
|
||||
|
||||
#define CLA_TRIG_MXEVTA 71
|
||||
#define CLA_TRIG_MREVTA 72
|
||||
#define CLA_TRIG_MXEVTB 73
|
||||
#define CLA_TRIG_MREVTB 74
|
||||
|
||||
#define CLA_TRIG_ECAP1INT 75
|
||||
#define CLA_TRIG_ECAP2INT 76
|
||||
#define CLA_TRIG_ECAP3INT 77
|
||||
#define CLA_TRIG_ECAP4INT 78
|
||||
#define CLA_TRIG_ECAP5INT 79
|
||||
#define CLA_TRIG_ECAP6INT 80
|
||||
|
||||
#define CLA_TRIG_EQEP1INT 83
|
||||
#define CLA_TRIG_EQEP2INT 84
|
||||
#define CLA_TRIG_EQEP3INT 85
|
||||
|
||||
#define CLA_TRIG_HRCAP1INT 87
|
||||
#define CLA_TRIG_HRCAP2INT 88
|
||||
|
||||
#define CLA_TRIG_SD1INT 95
|
||||
#define CLA_TRIG_SD2INT 96
|
||||
|
||||
#define CLA_TRIG_UPP1_INT 107
|
||||
|
||||
#define CLA_TRIG_SPITXINTA 109
|
||||
#define CLA_TRIG_SPIRXINTA 110
|
||||
#define CLA_TRIG_SPITXINTB 111
|
||||
#define CLA_TRIG_SPIRXINTB 112
|
||||
#define CLA_TRIG_SPITXINTC 113
|
||||
#define CLA_TRIG_SPIRXINTC 114
|
||||
// TODO
|
||||
|
||||
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
// Useful CLA Operation Macros:
|
||||
//================================
|
||||
|
||||
#define Cla1ForceTask1andWait()asm(" IACK #0x0001"); \
|
||||
asm(" RPT #3 || NOP"); \
|
||||
while(Cla1Regs.MIRUN.bit.INT1 == 1);
|
||||
|
||||
|
||||
#define Cla1ForceTask2andWait()asm(" IACK #0x0002"); \
|
||||
asm(" RPT #3 || NOP"); \
|
||||
while(Cla1Regs.MIRUN.bit.INT2 == 1);
|
||||
|
||||
#define Cla1ForceTask3andWait()asm(" IACK #0x0004"); \
|
||||
asm(" RPT #3 || NOP"); \
|
||||
while(Cla1Regs.MIRUN.bit.INT3 == 1);
|
||||
|
||||
#define Cla1ForceTask4andWait()asm(" IACK #0x0008"); \
|
||||
asm(" RPT #3 || NOP"); \
|
||||
while(Cla1Regs.MIRUN.bit.INT4 == 1);
|
||||
|
||||
#define Cla1ForceTask5andWait()asm(" IACK #0x0010"); \
|
||||
asm(" RPT #3 || NOP"); \
|
||||
while(Cla1Regs.MIRUN.bit.INT5 == 1);
|
||||
|
||||
#define Cla1ForceTask6andWait()asm(" IACK #0x0020"); \
|
||||
asm(" RPT #3 || NOP"); \
|
||||
while(Cla1Regs.MIRUN.bit.INT6 == 1);
|
||||
|
||||
#define Cla1ForceTask7andWait()asm(" IACK #0x0040"); \
|
||||
asm(" RPT #3 || NOP"); \
|
||||
while(Cla1Regs.MIRUN.bit.INT7 == 1);
|
||||
|
||||
#define Cla1ForceTask8andWait()asm(" IACK #0x0080"); \
|
||||
asm(" RPT #3 || NOP"); \
|
||||
while(Cla1Regs.MIRUN.bit.INT8 == 1);
|
||||
|
||||
|
||||
#define Cla1ForceTask1() asm(" IACK #0x0001")
|
||||
#define Cla1ForceTask2() asm(" IACK #0x0002")
|
||||
#define Cla1ForceTask3() asm(" IACK #0x0004")
|
||||
#define Cla1ForceTask4() asm(" IACK #0x0008")
|
||||
#define Cla1ForceTask5() asm(" IACK #0x0010")
|
||||
#define Cla1ForceTask6() asm(" IACK #0x0020")
|
||||
#define Cla1ForceTask7() asm(" IACK #0x0040")
|
||||
#define Cla1ForceTask8() asm(" IACK #0x0080")
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* extern "C" */
|
||||
|
||||
#endif // - end of F2837x_CLA_DEFINES_H
|
||||
|
||||
//===========================================================================
|
||||
// End of file.
|
||||
//===========================================================================
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user