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hangpersonal
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C2000Ware/libraries/diagnostic/f2838x/include/stl_can_ram.h
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//#############################################################################
//
// FILE: stl_can_ram.h
//
// TITLE: Diagnostic Library CAN message RAM test software module header
//
//#############################################################################
// $TI Release: C2000 Diagnostic Library v5.00.01 $
// $Release Date: Tue Oct 29 00:57:20 IST 2024 $
// $Copyright:
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//#############################################################################
#ifndef STL_CAN_RAM_H
#define STL_CAN_RAM_H
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
//
// Includes
//
#include <stdbool.h>
#include <stdint.h>
#include "stl_march.h"
#include "can.h"
//*****************************************************************************
//
//!
//! \addtogroup stl_can_ram CAN Message RAM Test API Functions
//!
//! @{
//
//*****************************************************************************
//
// Defines
//
#define STL_CAN_RAM_PASS 0U
#define STL_CAN_RAM_ERROR 1U
//
// Values for address calculation and checking
//
#define STL_CAN_RAM_ADDR_OFFSET 0x1000U // Offset from CAN base address to
// message RAM start
#define STL_CAN_RAM_MAX_ADDR_OFFSET 0x13F1U // Offset from CAN base address to
// message RAM end (in RDA mode)
//
// Key to turn off parity checking
//
#define STL_CAN_RAM_PARITY_OFF (5U << CAN_CTL_PMD_S)
//
//! Value to indicate to STL_CAN_RAM_testRAM() through the \b copyAddress
//! parameter that the test should run a destructive test on the region of CAN
//! message RAM without saving and restoring its contents.
//
#define STL_CAN_RAM_NO_COPY 0xFFFFFFFFU
//
// Prototypes
//
//*****************************************************************************
//
//! \brief Performs a March13N memory test on the specified range of CAN
//! message RAM objects.
//!
//! \param canBase is the base address of the CAN controller.
//! \param pattern is the test pattern to use.
//! \param startAddress is the starting address (inclusive) of the CAN message
//! RAM range to test.
//! \param endAddress is the end address (inclusive) of the CAN message RAM
//! range to test.
//! \param copyAddress is the address to copy the original contents of the
//! memory under test. It will be used to restore the original memory at the
//! end of the March13N memory test. If no save and restore is required, use
//! a value of \b STL_CAN_RAM_NO_COPY.
//!
//! This function performs a March13N memory test on the range of CAN message
//! RAM objects specified by \b canBase, \b startAddress and \b endAddress.
//! The test can save and restore the original contents of the message RAM
//! by passing an address to a back up buffer through the \b copyAddress
//! parameter. The test will copy the original contents of the memory to
//! \b copyAddress, perform the memory test, and then copy the original
//! contents back to the memory under test. To skip the save and restore, use
//! a value of \b STL_CAN_RAM_NO_COPY for the \b copyAddress and a destructive
//! test will be performed instead.
//!
//! The test patterns and the March13N memory test algorithm provided test
//! the memory for stuck-at-faults. The parity bits will show if any were
//! detected. Use STL_CAN_RAM_checkErrorStatus() to read the parity status.
//!
//! \note Note to take care calculating the size of memory needed for
//! \b copyAddress. The March13N function is not specific to the CAN message
//! RAM and does not take the byte addressability of the memory into account.
//! Use a buffer twice the size of the actual message RAM region you are
//! testing.
//!
//! \note The STL_March functions called by this test disable global CPU
//! interrupts (DINT) and then re-enable them after the test has completed.
//!
//! \return None.
//
//*****************************************************************************
extern void STL_CAN_RAM_testRAM(const uint32_t canBase,
const STL_March_Pattern pattern,
const uint32_t startAddress,
const uint32_t endAddress,
const uint32_t copyAddress);
//*****************************************************************************
//
//! \brief Injects an error into a CAN message RAM address.
//!
//! \param canBase is the base address of the CAN controller.
//! \param address is the address of the word in the message RAM where the
//! error will be injected.
//! \param xorMask mask of the bit to flip in \b address.
//!
//! This function injects an error at a specific memory \b address. \b xorMask
//! specifies which bit to flip in order to corrupt the data or parity bits.
//!
//! \return None.
//
//*****************************************************************************
extern void STL_CAN_RAM_injectError(const uint32_t canBase,
const uint32_t address,
const uint32_t xorMask);
//*****************************************************************************
//
//! \brief Returns the status of the CAN message RAM parity error detected bit.
//!
//! \param canBase is the base address of the CAN controller.
//!
//! This function checks if any parity errors have been detected by the CAN
//! message RAM parity logic.
//!
//! \return If the CAN error status register indicates a parity error the
//! function returns \b STL_CAN_RAM_ERROR. Otherwise, the function returns
//! \b STL_CAN_RAM_PASS.
//!
//! \note Several bits in the CAN error status register (CAN_ES) are cleared
//! on a CPU read of the register which this function performs. If the
//! potential clearing of these bits (see device Technical Reference Manual for
//! details) is undesired behavior for your application, use different means of
//! reading the status.
//
//*****************************************************************************
extern uint16_t STL_CAN_RAM_checkErrorStatus(const uint32_t canBase);
//*****************************************************************************
//
// Close the Doxygen group.
//! @}
//
//*****************************************************************************
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // STL_CAN_RAM_H
//
// End of File
//
C2000Ware/libraries/diagnostic/f2838x/include/stl_cpu_reg.h
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//#############################################################################
//
// FILE: stl_cpu_reg.h
//
// TITLE: Diagnostic Library CPU register test module header
//
//#############################################################################
// $TI Release: C2000 Diagnostic Library v5.00.01 $
// $Release Date: Tue Oct 29 00:57:20 IST 2024 $
// $Copyright:
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//#############################################################################
#ifndef STL_CPU_REG_H
#define STL_CPU_REG_H
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C" {
#endif
//
// Includes
//
#include <stdint.h>
#include "inc/hw_types.h"
#include "stl_util.h"
//*****************************************************************************
//
//! \addtogroup stl_cpu_reg CPU Register API Functions
//!
//! @{
//
//*****************************************************************************
//
// Defines
//
#define STL_CPU_REG_PASS 0x0U
#define STL_CPU_REG_FAIL 0x1U
//
// Prototypes
//
//*****************************************************************************
//
// C-callable assembly routines to test the core registers for stuck at bits.
// They are called by the high level inline test functions below. They return
// STL_CPU_REG_PASS on success and STL_CPU_REG_FAIL on a failure.
//
// The scratchRAM parameter should be a pointer to RAM memory that will be
// used by the function to transfer data between the CPU and extended
// instruction set registers.
//
//*****************************************************************************
extern uint16_t STL_CPU_REG_testCPURegisters(bool injectError);
extern uint16_t STL_CPU_REG_testFPURegisters(bool injectError);
extern uint16_t STL_CPU_REG_testVCRCRegisters(uint32_t *scratchRAM,
bool injectError);
//*****************************************************************************
//
//! \brief Tests CPU registers
//!
//! \param injectError when \e false the test writes the test pattern to the
//! registers as expected. When \e true, the test will write an unexpected
//! error pattern to ACC to simulate a stuck bit, causing the test to fail.
//!
//! This function tests CPU core registers for stuck bits. The following
//! registers are tested:
//! - ACC
//! - P
//! - XAR0 to XAR7
//! - XT
//! - SP
//! - IFR, IER and DBGIER
//! - ST0
//! - ST1 (excluding IDLESTAT and LOOP bits)
//! - DP
//!
//! The values of ST0, ST1, DP, IER, IFR, and DBGIER and the save-on-entry XAR
//! registers, as defined by the compiler calling convention, are saved and
//! restored in this test.
//!
//! Note that the IDLESTAT and LOOP bits of ST1 are not tested by this function
//! as they are read-only. IDLESTAT is set when the IDLE instruction is used to
//! enter a low-power mode. Performing a functional test of the low-power mode
//! will indirectly serve as a test of IDLESTAT.
//!
//! The LOOP bit is set by the LOOPZ and LOOPNZ instructions. The C2000
//! compiler will not generate code that uses these instructions. If an
//! application contains hand-coded assembly that uses them, the LOOP bit may
//! also be tested by performing a functional test of the applicable LOOP
//! instruction.
//!
//! \note You should disable interrupts before calling this test. Also note
//! this test was written with POST use in mind, particularly before interrupts
//! are enabled even at the PIE or CPU IER level. Keep in mind that INTM being
//! set doesn't prevent interrupts from propagating to the IFR registers, so
//! although this function saves and restores IFR, an interrupt arriving in IFR
//! during this test will be cleared by the restore or could cause a failure of
//! this test. If this test needs to be used during runtime, you may want to
//! modify STL_CPU_REG_testCPURegisters() in stl_cpu_reg.asm to remove the IFR
//! test (and related save and restore). Alternatively, you can disable all
//! interrupts at the PIE level (PIEIER) or in the case of non-PIE interrupts
//! (like CPU Timers 1 and 2) at the peripheral level and restore them after
//! STL_CPU_REG_checkCPURegisters() completes.
//!
//! \return If the test passes, the routine returns \b STL_CPU_REG_PASS.
//! Otherwise, it returns \b STL_CPU_REG_FAIL.
//
//*****************************************************************************
static inline uint16_t STL_CPU_REG_checkCPURegisters(bool injectError)
{
uint16_t returnVal;
returnVal = STL_CPU_REG_testCPURegisters(injectError);
//
// If test failed, set global error flag.
//
if(STL_CPU_REG_PASS != returnVal)
{
STL_Util_setErrorFlag(STL_UTIL_CPU_REG);
}
return(returnVal);
}
//*****************************************************************************
//
//! \brief Tests FPU registers
//!
//! \param injectError when \e false the test writes the test pattern to the
//! registers as expected. When \e true, the test will write an unexpected
//! error pattern to R5H to simulate a stuck bit, causing the test to fail.
//!
//! This function tests FPU registers for stuck bits. The following registers
//! are tested:
//! - R0 to R7
//! - RND32, TF, ZI, NI, ZF, NF bits of STF register.
//! - Shadow registers for R0 to R7 and STF
//!
//! The values of STF and the save-on-entry RnH registers, as defined by the
//! compiler calling convention, are saved and restored in this test.
//!
//! \note You should disable interrupts before calling this test.
//!
//! \return If the test passes, the routine returns \b STL_CPU_REG_PASS.
//! Otherwise, it returns \b STL_CPU_REG_FAIL.
//
//*****************************************************************************
static inline uint16_t STL_CPU_REG_checkFPURegisters(bool injectError)
{
uint16_t returnVal;
returnVal = STL_CPU_REG_testFPURegisters(injectError);
//
// If test failed, set global error flag.
//
if(STL_CPU_REG_PASS != returnVal)
{
STL_Util_setErrorFlag(STL_UTIL_FPU_REG);
}
return(returnVal);
}
//*****************************************************************************
//
//! \brief Tests VCRC registers
//!
//! \param injectError when \e false the test writes the test pattern to the
//! registers as expected. When \e true, the test will write an unexpected
//! error pattern to VCRCPOLY to simulate a stuck bit, causing the test to fail.
//!
//! This function tests VCRC (Cyclic Redundancy Check Unit) registers for
//! stuck bits. The following registers are tested:
//! - VCRCPOLY
//! - VCRCSIZE
//! - VCRC
//! - VSTATUS
//!
//! The values of VCRCPOLY, VCRCSIZE, and VSTATUS are saved and restored in this
//! test.
//!
//! \note You should disable interrupts before calling this test.
//!
//! \return If the test passes, the routine returns \b STL_CPU_REG_PASS.
//! Otherwise, it returns \b STL_CPU_REG_FAIL.
//
//*****************************************************************************
static inline uint16_t STL_CPU_REG_checkVCRCRegisters(bool injectError)
{
uint16_t returnVal;
uint32_t scratchPad;
returnVal = STL_CPU_REG_testVCRCRegisters(&scratchPad, injectError);
//
// If test failed, set global error flag.
//
if(STL_CPU_REG_PASS != returnVal)
{
STL_Util_setErrorFlag(STL_UTIL_VCRC_REG);
}
return(returnVal);
}
//*****************************************************************************
//
// Close the Doxygen group.
//! @}
//
//*****************************************************************************
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // STL_CPU_REG_H
//
// End of File
//
C2000Ware/libraries/diagnostic/f2838x/include/stl_crc.h
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//#############################################################################
//
// FILE: stl_crc.h
//
// TITLE: Diagnostic Library CRC software module header
//
//#############################################################################
// $TI Release: C2000 Diagnostic Library v5.00.01 $
// $Release Date: Tue Oct 29 00:57:20 IST 2024 $
// $Copyright:
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//#############################################################################
#ifndef STL_CRC_H
#define STL_CRC_H
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
//
// Includes
//
#include <stdbool.h>
#include <stdint.h>
#include "inc/hw_types.h"
#include "stl_util.h"
//*****************************************************************************
//
//! \addtogroup stl_crc CRC API Functions
//!
//! @{
//
//*****************************************************************************
//
// Defines
//
#define STL_CRC_INIT_CRC 0x0UL //!< Initial CRC Register Value
#define STL_CRC_PASS 0x0U
#define STL_CRC_FAIL 0x1U
//
// Typedefs
//
//! \brief Parity enumeration
//!
//! The parity is used by the CRC algorithm to determine whether to begin
//! calculations from the low byte (EVEN) or from the high byte (ODD) of the
//! first word (16-bit) in the message. \n
//! For example, if your message had 10 bytes and started at the address 0x8000
//! but the first byte was at the high byte position of the first 16-bit word,
//! the user would call the CRC function with odd parity i.e.
//! STL_CRC_PARITY_ODD \n
//! Address: HI LO \n
//! 0x8000 : B0 XX \n
//! 0x8001 : B2 B1 \n
//! 0x8002 : B4 B3 \n
//! 0x8003 : B6 B5 \n
//! 0x8004 : B8 B7 \n
//! 0x8005 : XX B9 \n
//! However, if the first byte was at the low byte position of the first 16-bit
//! word, the user would call the CRC function with even parity i.e.
//! STL_CRC_PARITY_EVEN \n
//! Address: HI LO \n
//! 0x8000 : B1 B0 \n
//! 0x8001 : B3 B2 \n
//! 0x8002 : B5 B4 \n
//! 0x8003 : B7 B6 \n
//! 0x8004 : B9 B8 \n
//
typedef enum
{
STL_CRC_PARITY_EVEN = 0U, //!< Even parity, CRC starts at the low byte of
//!< the first word (16-bit)
STL_CRC_PARITY_ODD = 1U //!< Odd parity, CRC starts at the high byte of
//!< the first word (16-bit)
} STL_CRC_Parity;
//! \brief CRC structure
//!
typedef struct
{
uint32_t seedValue; //!< Initial value of the CRC calculation
uint16_t numBytes; //!< Number of bytes in the message buffer
STL_CRC_Parity parity; //!< Start the CRC from the low byte
//!< or high byte
uint32_t crcResult; //!< The calculated CRC
void * msgBuffer; //!< Pointer to the message buffer
} STL_CRC_Obj;
//! \brief Handle to the CRC structure
//!
typedef STL_CRC_Obj *STL_CRC_Handle;
//
// Prototypes
//
//*****************************************************************************
//
//! \brief Workaround to the silicon issue of first VCU calculation on power up
//! being erroneous
//!
//! Due to the internal power-up state of the VCU module, it is possible that
//! the first CRC result will be incorrect. This condition applies to the
//! first result from each of the eight CRC instructions. This rare condition
//! can only occur after a power-on reset, but will not necessarily occur on
//! every power on. A warm reset will not cause this condition to reappear.
//!
//! Workaround(s): The application can reset the internal VCU CRC logic by
//! performing a CRC calculation of a single byte in the initialization
//! routine. This routine only needs to perform one CRC calculation and can use
//! any of the CRC instructions.
//!
//! \return None.
//
//*****************************************************************************
extern void STL_CRC_reset(void);
//*****************************************************************************
//
//! \brief Runs the 32-bit CRC routine using polynomial 0x04c11db7
//!
//! \param crcHandle handle to the CRC object
//!
//! Calculates the 32-bit CRC using polynomial 0x04c11db7 on the VCU or VCRC.
//! Depending on the parity chosen the CRC begins at either
//! the low byte (STL_CRC_PARITY_EVEN) or the high byte (STL_CRC_PARITY_ODD)
//! of the first word (16-bit).
//!
//! \note The size of the message (bytes) is limited to 65535 bytes.
//!
//! \return None.
//
//*****************************************************************************
extern void STL_CRC_calculate(const STL_CRC_Handle crcHandle);
//*****************************************************************************
//
//! \brief Runs the 32-bit CRC routine using polynomial 0x04c11db7
//!
//! \param crcHandle handle to the CRC object
//!
//! Calculates the 32-bit CRC using polynomial 0x04c11db7 on the VCU or VCRC.
//! This algorithm performs a CRC32 only on the low bytes (LSB) of each
//! 16-bit word. The input \b parity has no effect. This function works on
//! unpacked data.
//!
//! \note The size of the message (bytes) is limited to 65535 bytes.
//!
//! \return None.
//
//*****************************************************************************
extern void STL_CRC_calculateLowBytes(const STL_CRC_Handle crcHandle);
//*****************************************************************************
//
//! \brief Calculates a CRC-32 value for specific memory range and compares it
//! with the goldenCRC value.
//!
//! \param startAddress - start address of CRC calculation.
//! \param endAddress - end address of CRC calculation, inclusive.
//! \param goldenCRC - golden CRC value.
//!
//! This function performs a test of the memory range by calculating the
//! CRC-32 value for the input memory range and comparing it with the golden
//! CRC value.
//!
//! \note This function could be used with many memory types including
//! Flash and Boot ROM.
//!
//! \return If the calculated CRC matches the golden CRC, then the function
//! returns \b STL_CRC_PASS. Otherwise, it returns \b STL_CRC_FAIL.
//
//*****************************************************************************
extern uint16_t STL_CRC_checkCRC(const uint32_t startAddress,
const uint32_t endAddress,
const uint32_t goldenCRC);
//*****************************************************************************
//
// Close the Doxygen group.
//! @}
//
//*****************************************************************************
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // STL_CRC_H
//
// End of File
//
C2000Ware/libraries/diagnostic/f2838x/include/stl_hwbist.h
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//#############################################################################
//
// FILE: stl_hwbist.h
//
// TITLE: Diagnostic Library HWBIST software module header
//
//#############################################################################
// $TI Release: C2000 Diagnostic Library v5.00.01 $
// $Release Date: Tue Oct 29 00:57:20 IST 2024 $
// $Copyright:
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//#############################################################################
#ifndef STL_HWBIST_H
#define STL_HWBIST_H
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
//
// Includes
//
#include <stdbool.h>
#include <stdint.h>
#include "stl_util.h"
#include "cpu.h"
#include "debug.h"
#include "inc/hw_types.h"
#include "inc/hw_memmap.h"
//*****************************************************************************
//
//! \addtogroup stl_hwbist HWBIST API Functions
//!
//! @{
//
//*****************************************************************************
//
// Defines
//
//! The full HWBIST operation is complete. HWBIST has either completed the
//! full number of micro-runs to be meet the selected coverage level or
//! has detected an error.
//!
#define STL_HWBIST_BIST_DONE 0x0001U
//
//! The micro-run has completed.
//!
#define STL_HWBIST_MACRO_DONE 0x0002U
//
//! An NMI was generated by the HWBIST controller. This could be caused by an
//! external NMI, a time-out failure, or a detected logic error.
//!
#define STL_HWBIST_NMI 0x0004U
//
//! The HWBIST detected an error. This could be caused by a time-out failure
//! or a detected logic error.
//!
#define STL_HWBIST_BIST_FAIL 0x0008U
//
//! HWBIST detected a logic error.
//!
#define STL_HWBIST_INT_COMP_FAIL 0x0010U
//
//! HWBIST has experienced a time-out failure.
//!
#define STL_HWBIST_TO_FAIL 0x0020U
//
//! The HWBIST has run enough micro-runs to meet the configured coverage level
//! but still is not reporting \b STL_HWBIST_BIST_DONE status as expected.
//!
#define STL_HWBIST_OVERRUN_FAIL 0x0040U
//
// HWBIST register address offsets
//
#define HWBIST_O_CSTCGCR0 0x0U
#define HWBIST_O_CSTCGCR1 0x4U
#define HWBIST_O_CSTCGCR2 0x8U
#define HWBIST_O_CSTCGCR3 0xCU
#define HWBIST_O_CSTCGCR4 0x10U
#define HWBIST_O_CSTCGCR5 0x14U
#define HWBIST_O_CSTCGCR6 0x18U
#define HWBIST_O_CSTCGCR7 0x1CU
#define HWBIST_O_CSTCGCR8 0x20U
#define HWBIST_O_CSTCPCNT 0x24U
#define HWBIST_O_CSTCCONFIG 0x28U
#define HWBIST_O_CSTCSADDR 0x2CU
#define HWBIST_O_CSTCTEST 0x30U
#define HWBIST_O_CSTCRET 0x34U
#define HWBIST_O_CSTCCRD 0x38U
#define HWBIST_O_CSTGSTAT 0x40U
#define HWBIST_O_CSTCCPCR 0x48U
#define HWBIST_O_CSTCCADDR 0x4CU
#define HWBIST_O_CSTCSEM 0xA0U
#define HWBIST_CSTCSEM_SEMAPHORE 0x03U
#define PIEVECTTABLE_O_NMI ((INT_NMI >> 16) * 2U)
//
// Number of micro-runs to reach desired coverage level
//
#define STL_HWBIST_MICRO_LIMIT_95 650UL
#define STL_HWBIST_MICRO_LIMIT_99_RUN1 1700UL
#define STL_HWBIST_MICRO_LIMIT_99_RUN2 300UL
#define STL_HWBIST_MICRO_LIMIT_99 (STL_HWBIST_MICRO_LIMIT_99_RUN1 + \
STL_HWBIST_MICRO_LIMIT_99_RUN2)
//
// Macros to isolate inline assembly
//
#define STL_HWBIST_REF_STACK __asm(" .ref __stack")
#define STL_HWBIST_MOV_SP_STACK __asm(" MOV SP, #__stack")
#define STL_HWBIST_C28OBJ __asm(" C28OBJ")
#define STL_HWBIST_C28ADDR __asm(" C28ADDR")
#define STL_HWBIST_C28MAP __asm(" C28MAP")
#define STL_HWBIST_CLRC_PAGE0 __asm(" CLRC PAGE0")
#define STL_HWBIST_MOVW_DP_0 __asm(" MOVW DP,#0")
#define STL_HWBIST_CLRC_OVM __asm(" CLRC OVM")
#define STL_HWBIST_SPM_0 __asm(" SPM 0")
#define STL_HWBIST_REF_HANDLE_RESET_FXN __asm(" .ref STL_HWBIST_handleReset")
#define STL_HWBIST_LCR_HANDLE_RESET_FXN __asm(" LCR STL_HWBIST_handleReset")
//
// Typedefs
//
//
//! Values that must be used for as a parameter to STL_HWBIST_claimSemaphore()
//! in order to claim the semaphore properly for the CPU in use.
//
typedef enum
{
STL_HWBIST_CPU01 = 0x02, //!< CPU01
STL_HWBIST_CPU02 = 0x01 //!< CPU02
} STL_HWBIST_Core;
//
//! Values that must be used as parameter to STL_HWBIST_injectError() and
//! STL_HWBIST_runFull() in order to specify the type of error to inject
//! before executing HWBIST.
//
typedef enum
{
STL_HWBIST_NO_ERROR = 0x0000, //!< No error
STL_HWBIST_TIMEOUT = 0x000A, //!< Time-out error
STL_HWBIST_FINAL_COMPARE = 0x00A0, //!< Final MISR compare error
STL_HWBIST_NMI_TRAP = 0x0A00, //!< NMI trap error
STL_HWBIST_LOGIC_FAULT = 0x2000 //!< Logic error
} STL_HWBIST_Error;
//
//! Values that must be used as a parameter to STL_HWBIST_init() in order to
//! initialize the HWBIST engine before a micro-run for a specific target
//! coverage. Note that not all devices support multiple coverage levels.
//
typedef enum
{
STL_HWBIST_99_RUN1 = 0x0000, //!< 99% coverage, run 1 patterns
STL_HWBIST_99_RUN2 = 0x0002, //!< 99% coverage, run 2 patterns
STL_HWBIST_95 = 0x0001 //!< 95% coverage
} STL_HWBIST_Coverage;
//
// Prototypes
//
__interrupt void STL_HWBIST_errorNMIISR(void);
//*****************************************************************************
//
//! \brief Performs a hardware built-in self-test of the CPU under test.
//!
//! \param errorType is an enumerated type \b STL_HWBIST_Error which specifies
//! the type of error to inject before executing a full run of HWBIST test.
//!
//! This function
//! initializes the HWBIST engine and then injects the \b errorType. It also
//! registers the STL_HWBIST_errorNMIISR() as the NMI vector. It then performs
//! a full hardware built-in self-test achieving 99% coverage. If there is a
//! failure in the HWBIST, then a global error flag will be set and the return
//! value will specify a failure. Additionally, if the coverage is not achieved
//! in the expected micro-runs then the test will fail due to an overrun.
//! Before returning, the function will restore the previous NMI vector.
//! vector.
//!
//! This function expects the HWBIST semaphore to be claimed by the CPU
//! attempting to run HWBIST by calling STL_HWBIST_claimSemaphore().
//!
//! \note There is a corner case where a spurious CPU Timer 1 or CPU Timer 2
//! interrupt may be triggered when HWBIST completes. This test contains a
//! workaround which clears the TIE bits of Timer 1 and 2 before starting
//! HWBIST interrupt logging and restores them after HWBIST runs.
//!
//! \return If the HWBIST full run test passes with no errors within the
//! expected number of micro-runs, then this function returns the status of the
//! HWBIST and the value will be a bitwise OR of \b STL_HWBIST_BIST_DONE, and
//! \b STL_HWBIST_MACRO_DONE. If the test fails, then the status of the HWBIST
//! and the return value of the function will have contain a bitwise OR of some
//! combination of the following values: \b STL_HWBIST_NMI,
//! \b STL_HWBIST_BIST_FAIL, STL_HWBIST_INT_COMP_FAIL, \b STL_HWBIST_TO_FAIL,
//! and \b STL_HWBIST_OVERRUN_FAIL.
//
//*****************************************************************************
extern uint16_t STL_HWBIST_runFull(const STL_HWBIST_Error errorType);
//*****************************************************************************
//
//! \brief Performs a micro-run of the hardware built-in self-test of the
//! CPU under test.
//!
//! This function expects the HWBIST engine to already be initialized with
//! STL_HWBIST_init() before it is called. This function performs a HWBIST
//! micro-run and returns its status. Before returning, the function will also
//! restore the previous NMI vector.
//!
//! In order to achieve 95% coverage, the user needs to initialize the HWBIST
//! controller for 95% coverage and then execute \e STL_HWBIST_MICRO_LIMIT_95
//! micro-runs. The HWBIST will complete in \e STL_HWBIST_MICRO_LIMIT_95
//! micro-runs if there are no detected faults.
//!
//! In order to achieve 99% coverage, the user needs to initialize the HWBIST
//! controller for 99% coverage RUN 1 and then execute
//! \e STL_HWBIST_MICRO_LIMIT_99_RUN1 micro-runs. The HWBIST will complete in
//! \e STL_HWBIST_MICRO_LIMIT_99_RUN1 micro-runs if there are no detected
//! faults. The HWBIST should then be reinitialized to 99% coverage RUN 2 and
//! then executed for \e STL_HWBIST_MICRO_LIMIT_99_RUN2 micro-runs to complete
//! 99% coverage.
//!
//! This function expects the HWBIST semaphore to be claimed by the CPU
//! attempting to run HWBIST by calling STL_HWBIST_claimSemaphore().
//!
//! \note This function performs a HWBIST micro-run and is designed to be used
//! as a periodic self-test or PEST.
//!
//! \note There is a corner case where a spurious CPU Timer 1 or CPU Timer 2
//! interrupt may be triggered when HWBIST completes. This test contains a
//! workaround which clears the TIE bits of Timer 1 and 2 before starting
//! HWBIST interrupt logging and restores them after HWBIST runs.
//!
//! \return This function returns the status of the HWBIST after the micro-run
//! executes. If the HWBIST micro-run test passes with no errors, then the
//! value will be either \b STL_HWBIST_MACRO_DONE or a bitwise OR of
//! \b STL_HWBIST_BIST_DONE | \b STL_HWBIST_MACRO_DONE.
//! \b STL_HWBIST_BIST_DONE should be be set after the expected number of
//! micro-runs have been executed to reach the configured coverage level. If
//! the test fails, then the status of the HWBIST and the return value of the
//! function will have contain a bitwise OR of some combination of the
//! following values: \b STL_HWBIST_NMI, \b STL_HWBIST_BIST_FAIL,
//! \b STL_HWBIST_INT_COMP_FAIL, and \b STL_HWBIST_TO_FAIL.
//
//*****************************************************************************
extern uint16_t STL_HWBIST_runMicro(void);
//*****************************************************************************
//
//! \brief Begins the context restore after a CPU reset after a HWBIST
//! micro-run.
//!
//! This function should not be called by the user, but must be placed at the
//! beginning of RAMM0, memory address 0x0000. After a HWBIST micro-run
//! completes, the CPU will reset and begin executing instructions from 0x0000.
//! The user is responsible for placing this function at memory address 0x0000.
//! This can be done using the linker command file and program sections.
//!
//! \return None.
//
//*****************************************************************************
extern void STL_HWBIST_restoreContext(void);
//*****************************************************************************
//
//! \brief Initializes the HWBIST engine for operation.
//!
//! \param coverage is an enumerated type \b STL_HWBIST_Coverage which specifies
//! the coverage to achieve.
//!
//! This function initializes the HWBIST engine for the specified level of
//! coverage. This function is intended to be used with STL_HWBIST_runMicro().
//! This function should be called once to initialize the HWBIST and not called
//! again until the HWBIST is done which is indicated by a return value of
//! \b STL_HWBIST_BIST_DONE as this function resets the HWBIST engine.
//!
//! \return None.
//
//*****************************************************************************
extern void STL_HWBIST_init(const STL_HWBIST_Coverage coverage);
//*****************************************************************************
//
//! \brief Injects an error into the HWBIST engine for operation.
//!
//! \param errorType is an enumerated type \b STL_HWBIST_Error which specifies
//! the error to inject.
//!
//! This function injects an error into the HWBIST using the HWBIST registers.
//!
//! \note This function should be called after STL_HWBIST_init() because
//! STL_HWBIST_init() resets the HWBIST engine and initializes the test.
//!
//! \return None.
//
//*****************************************************************************
#ifndef __cplusplus
#pragma CODE_SECTION(STL_HWBIST_injectError, ".TI.ramfunc");
#else
#pragma CODE_SECTION(".TI.ramfunc");
#endif
static inline
void STL_HWBIST_injectError(const STL_HWBIST_Error errorType)
{
EALLOW;
//
// Inject an error in the HWBIST.
//
HWREG(HWBIST_BASE + HWBIST_O_CSTCTEST) = (uint32_t)errorType;
NOP;
NOP;
EDIS;
}
//*****************************************************************************
//
//! \brief Attempts to claim the HWBIST semaphore for the specified core.
//!
//! \param core is an enumerated type \b STL_HWBIST_Core which specifies
//! the core attempting to claim the HWBIST semaphore.
//!
//! This function attempts to claim the semaphore for the specified core.
//!
//! \note This function should be called before \b STL_HWBIST_init(),
//! \b STL_HWBIST_runMicro() and \b STL_HWBIST_runFull().
//!
//! \return If the semaphore was claimed successfully, then \b true is returned.
//! If the semaphore was unable to be claimed, then \b false is returned.
//*****************************************************************************
#ifndef __cplusplus
#pragma CODE_SECTION(STL_HWBIST_claimSemaphore, ".TI.ramfunc");
#else
#pragma CODE_SECTION(".TI.ramfunc");
#endif
static inline
bool STL_HWBIST_claimSemaphore(const STL_HWBIST_Core core)
{
EALLOW;
//
// Claim the HWBIST semaphore.
//
HWREG(HWBIST_BASE + HWBIST_O_CSTCSEM) = (uint32_t)core;
NOP;
NOP;
NOP;
EDIS;
return((HWREG(HWBIST_BASE + HWBIST_O_CSTCSEM) &
HWBIST_CSTCSEM_SEMAPHORE) == (uint32_t)core);
}
//*****************************************************************************
//
//! \brief Releases the HWBIST semaphore.
//!
//! This function releases the semaphore.
//!
//! \return None.
//*****************************************************************************
#ifndef __cplusplus
#pragma CODE_SECTION(STL_HWBIST_releaseSemaphore, ".TI.ramfunc");
#else
#pragma CODE_SECTION(".TI.ramfunc");
#endif
static inline
void STL_HWBIST_releaseSemaphore(void)
{
EALLOW;
//
// Release the HWBIST semaphore.
//
HWREG(HWBIST_BASE + HWBIST_O_CSTCSEM) = 0x0003UL;
NOP;
NOP;
NOP;
EDIS;
}
//*****************************************************************************
//
// Close the Doxygen group.
//! @}
//
//*****************************************************************************
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // STL_HWBIST_H
//
// End of File
//
C2000Ware/libraries/diagnostic/f2838x/include/stl_march.h
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//#############################################################################
//
// FILE: stl_march.h
//
// TITLE: Diagnostic Library March13N software module header
//
//#############################################################################
// $TI Release: C2000 Diagnostic Library v5.00.01 $
// $Release Date: Tue Oct 29 00:57:20 IST 2024 $
// $Copyright:
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//#############################################################################
#ifndef STL_MARCH_H
#define STL_MARCH_H
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
//
// Includes
//
#include <stdbool.h>
#include <stdint.h>
#include "memcfg.h"
//*****************************************************************************
//
//!
//! \addtogroup stl_march March13N Test API Functions
//!
//! @{
//
//*****************************************************************************
//
// Defines
//
#define STL_MARCH_PASS 0U
#define STL_MARCH_CORR_ERROR 1U
#define STL_MARCH_UNC_ERROR 2U
#define STL_MARCH_BOTH_ERROR 3U
//
// Typedefs
//
//
//! Values that must be used to pass to determine the test pattern for
//! STL_March_testRAMCopy() and STL_March_testRAM()
//!
typedef enum
{
STL_MARCH_PATTERN_ONE = 0x96966969U, //!< Test Pattern One
STL_MARCH_PATTERN_TWO = 0x0000FFFEU, //!< Test Pattern Two
STL_MARCH_PATTERN_THREE = 0x2AAA5555U, //!< Test Pattern Three
STL_MARCH_PATTERN_FOUR = 0xCC3723CCU //!< Test Pattern Four
} STL_March_Pattern;
//
//! \brief Defines the March memory test inject error object.
//!
typedef struct
{
uint32_t address; //!< Address (32-bit aligned)
uint32_t ramSection; //!< RAM section identifier
uint32_t xorMask; //!< Mask to flip bits in test mode
MemCfg_TestMode testMode; //!< Mode in which to inject error
} STL_March_InjectErrorObj;
//
//! Defines the RAM error logic test handle
//!
typedef STL_March_InjectErrorObj * STL_March_InjectErrorHandle;
//
// Prototypes
//
//*****************************************************************************
//
//! \brief Performs a March13N non-destructive memory test on the specified
//! RAM memory.
//!
//! \param pattern is the test pattern to use.
//! \param startAddress is the address to start the memory test.
//! \param length is the number of 32-bit words of the memory test minus 1.
//! \param copyAddress is the address to copy the original contents of the
//! memory under test. It will be used to restore the original memory at the
//! end of the March13N memory test.
//!
//! This function performs a March13N memory test on RAM specified by
//! \b startAddress and \b length. This function performs a non-destructive
//! memory test. This means that it will begin by copying the original contents
//! of the memory to \b copyAddress, perform the memory test, and then copy
//! the original contents back to the memory under test. The test patterns
//! along with the March13N memory test algorithm provided, test memory for
//! stuck-at-faults as well as boundary cases including worst case timings
//! tailored for the C2000 RAM bank architecture.
//!
//! This test is implemented to be able to perform a memory test on any section
//! of RAM including the stack.
//!
//! \note If this code is running from RAM, be careful not to perform this
//! memory test on itself, meaning do not perform the March13N memory test on
//! the March13N program code in RAM. This will likely lead to an ITRAP. In
//! order to test the program code for this March13N algorithm, the user can
//! create a copy of this function in RAM or flash and run the memory test code
//! from the copy.
//!
//! \note This function disables global CPU interrupts (DINT) and then
//! re-enables them after the test has completed.
//!
//! \note \b length is the number of 32-bits words to test minus 1. For
//! example, in order to test 8 32-bit words, length is 7.
//!
//! \return None.
//
//*****************************************************************************
extern void STL_March_testRAMCopy(const STL_March_Pattern pattern,
const uint32_t startAddress,
const uint32_t length,
const uint32_t copyAddress);
//*****************************************************************************
//
//! \brief Performs a March13N destructive memory test on the specified RAM
//! memory.
//!
//! \param pattern is the test pattern to use.
//! \param startAddress is the address to start the memory test.
//! \param length is the number of 32-bit words of the memory test minus 1.
//!
//! This function performs a March13N memory test on RAM specified by
//! \b startAddress and \b length. This test performs a destructive memory
//! test, meaning the original contents will be lost by this test. The test
//! patterns along with the March13N memory test algorithm provided, test
//! memory for stuck-at-faults as well as boundary cases including worst case
//! timings tailored for the C2000 RAM bank architecture.
//!
//! \note If this code is running from RAM, be careful not to perform this
//! memory test on itself, meaning do not perform the March13N memory test on
//! the March13N program code in RAM. This will likely lead to an ITRAP. In
//! order to test the program code for this March13N algorithm, the user can
//! create a copy of this function in RAM or flash and run the memory test code
//! from the copy.
//!
//! \note This function disables global CPU interrupts (DINT) and then
//! re-enables them after the test has completed.
//!
//! \note \b length is the number of 32-bits words to test minus 1. For
//! example, in order to test 8 32-bit words, length is 7.
//!
//! \return None.
//
//*****************************************************************************
extern void STL_March_testRAM(const STL_March_Pattern pattern,
const uint32_t startAddress,
const uint32_t length);
//*****************************************************************************
//
//! \brief Injects an error into a RAM memory address.
//!
//! \param errorHandle the inject error handle specifying where and what type
//! of error to inject into RAM.
//!
//! This function injects an error at a specific memory \b address in a
//! specific \b ramSection. \b testMode specifies whether the error will be
//! injected in the data or ECC/parity bits. \b xorMask specifies which bit
//! or bits to flip in order to corrupt either the data or ECC/parity bits.
//!
//! \return None.
//
//*****************************************************************************
extern void STL_March_injectError(const STL_March_InjectErrorHandle
errorHandle);
//*****************************************************************************
//
//! \brief Returns the status of the Memory Error Registers for RAM.
//!
//! This function checks if there are any correctable or uncorrectable errors
//! indicated by the Memory Error Registers and returns the status.
//!
//! \return If the Memory Error Registers indicate a correctable error
//! and/or an uncorrectable error in RAM, then the function returns
//! \b STL_MARCH_CORR_ERROR, \b STL_MARCH_UNC_ERROR, or \b STL_MARCH_BOTH_ERROR.
//! Otherwise, the function returns \b STL_MARCH_PASS.
//
//*****************************************************************************
extern uint16_t STL_March_checkErrorStatus(void);
//*****************************************************************************
//
// Close the Doxygen group.
//! @}
//
//*****************************************************************************
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // STL_MARCH_H
//
// End of File
//
C2000Ware/libraries/diagnostic/f2838x/include/stl_mcan_ram.h
+203
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//#############################################################################
//
// FILE: stl_mcan_ram.h
//
// TITLE: Diagnostic Library MCAN message RAM test software module header
//
//#############################################################################
// $TI Release: C2000 Diagnostic Library v5.00.01 $
// $Release Date: Tue Oct 29 00:57:20 IST 2024 $
// $Copyright:
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//#############################################################################
#ifndef STL_MCAN_RAM_H
#define STL_MCAN_RAM_H
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
//
// Includes
//
#include <stdbool.h>
#include <stdint.h>
#include "stl_march.h"
#include "mcan.h"
//*****************************************************************************
//
//!
//! \addtogroup stl_mcan_ram MCAN RAM API Functions
//!
//! @{
//
//*****************************************************************************
//
// Defines
//
#define STL_MCAN_RAM_PASS 0U
#define STL_MCAN_RAM_ERROR 1U
//
// Values for address calculation and checking
//
#define STL_MCAN_RAM_MAX_ADDR_OFFSET 0x43FFU // Offset from MCAN base address
// to message RAM end
//
//! Value to indicate to STL_MCAN_RAM_testRAM() through the \b copyAddress
//! parameter that the test should run a destructive test on the region of MCAN
//! message RAM without saving and restoring its contents.
//
#define STL_MCAN_RAM_NO_COPY 0xFFFFFFFFU
//
// Prototypes
//
//*****************************************************************************
//
//! \brief Performs a March13N memory test on the specified range of MCAN
//! message RAM objects.
//!
//! \param mcanBase is the base address of the MCAN instance.
//! \param pattern is the test pattern to use.
//! \param startAddress is the starting address (inclusive) of the MCAN message
//! RAM range to test.
//! \param endAddress is the end address (inclusive) of the MCAN message RAM
//! range to test.
//! \param copyAddress is the address to copy the original contents of the
//! memory under test. It will be used to restore the original memory at the
//! end of the March13N memory test. If no save and restore is required, use
//! a value of \b STL_MCAN_RAM_NO_COPY.
//!
//! This function performs a March13N memory test on the range of MCAN message
//! RAM specified by \b mcanBase, \b startAddress and \b endAddress.
//! The test can save and restore the original contents of the message RAM
//! by passing an address to a back up buffer through the \b copyAddress
//! parameter. The test will copy the original contents of the memory to
//! \b copyAddress, perform the memory test, and then copy the original
//! contents back to the memory under test. To skip the save and restore, use
//! a value of \b STL_MCAN_RAM_NO_COPY for the \b copyAddress and a destructive
//! test will be performed instead.
//!
//! The test patterns and the March13N memory test algorithm provided test
//! the memory for stuck-at-faults. The message RAM ECC logic will be used to
//! detect issues. Use STL_MCAN_RAM_checkErrorStatus() to read the ECC status.
//!
//! \note Note to take care calculating the size of memory needed for
//! \b copyAddress. The March13N function is not specific to the MCAN message
//! RAM and does not take the byte addressability of the memory into account.
//! Use a buffer twice the size of the actual message RAM region you are
//! testing.
//!
//! \note The STL_March functions called by this test disable global CPU
//! interrupts (DINT) and then re-enable them after the test has completed.
//!
//! \return None.
//
//*****************************************************************************
extern void STL_MCAN_RAM_testRAM(const uint32_t mcanBase,
const STL_March_Pattern pattern,
const uint32_t startAddress,
const uint32_t endAddress,
const uint32_t copyAddress);
//*****************************************************************************
//
//! \brief Injects an error into a MCAN message RAM address.
//!
//! \param mcanBase is the base address of the MCAN instance.
//! \param address is the address of the word in the message RAM where the
//! error will be injected.
//! \param xorMask mask of the bit or bits to flip in \b address.
//!
//! This function injects an error at a specific memory \b address. \b xorMask
//! specifies which bit to flip in order to corrupt the data.
//!
//! \return None.
//
//*****************************************************************************
extern void STL_MCAN_RAM_injectError(const uint32_t mcanBase,
const uint32_t address,
const uint32_t xorMask);
//*****************************************************************************
//
//! \brief Returns the MCAN message RAM ECC error status.
//!
//! \param mcanBase is the base address of the MCAN instance.
//! \param errStatus is a pointer to the structure in which the detailed ECC
//! error status will be returned.
//!
//! This function checks if any ECC errors have been detected or corrected by
//! the MCAN message RAM ECC logic.
//!
//! \return If the MCAN error status register indicates an ECC error the
//! function returns \b STL_MCAN_RAM_ERROR and \b errStatus will contain
//! additional details about the type of error. Otherwise, the function returns
//! \b STL_MCAN_RAM_PASS.
//
//*****************************************************************************
extern uint16_t STL_MCAN_RAM_checkErrorStatus(const uint32_t mcanBase,
MCAN_ECCErrStatus *errStatus);
//*****************************************************************************
//
// Close the Doxygen group.
//! @}
//
//*****************************************************************************
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // STL_MCAN_RAM_H
//
// End of File
//
C2000Ware/libraries/diagnostic/f2838x/include/stl_osc_ct.h
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//#############################################################################
//
// FILE: stl_osc_ct.h
//
// TITLE: Diagnostic Library Oscillator CPU Timer software module header
//
//#############################################################################
// $TI Release: C2000 Diagnostic Library v5.00.01 $
// $Release Date: Tue Oct 29 00:57:20 IST 2024 $
// $Copyright:
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//#############################################################################
#ifndef STL_OSC_CT_H
#define STL_OSC_CT_H
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
//
// Includes
//
#include <stdbool.h>
#include <stdint.h>
#include "cpu.h"
#include "cputimer.h"
#include "inc/hw_types.h"
#include "inc/hw_memmap.h"
#include "inc/hw_sysctl.h"
//*****************************************************************************
//
//! \addtogroup stl_osc_ct Oscillator CPU Timer API Functions
//!
//! @{
//
//*****************************************************************************
//
// Defines
//
#define STL_OSC_CT_FAIL 1U
#define STL_OSC_CT_PASS 0U
#define STL_OSC_CT_PERIOD 0xFFFFFFFFU
//! \brief Defines the OSC Timer 2 test object
//!
typedef struct
{
uint32_t minCount; //!< Lower bound count
uint32_t maxCount; //!< Upper bound count
CPUTimer_ClockSource clockSource; //!< Clock source for Timer2
CPUTimer_Prescaler prescaler; //!< Prescaler for selected clock source
} STL_OSC_CT_Obj;
//! \brief Defines the OSC Timer 2 test handle
//!
typedef STL_OSC_CT_Obj * STL_OSC_CT_Handle;
//*****************************************************************************
//
//! \brief Starts CPU Timer 2 to test the oscillator source.
//!
//! \param oscTimer2Handle is a pointer to the Oscillator Timer 2 object.
//!
//! This function disables CPU Timer 2 interrupts, configures the CPU Timer 2
//! to use the specified clock source and prescaler, starts the timer, and then
//! returns.
//!
//! The user should configure the PLL and CPU Timer with independent clock
//! sources.
//!
//! The user must preserve and restore the registers modified by this function.
//! The following CPU Timer 2 and System Control registers are modified by the
//! function.
//! - TCR
//! - PRD
//! - TPRH
//! - TPR
//! - TMR2CLKCTL
//!
//! \note When \b CPUTIMER_CLOCK_SOURCE_SYS is selected as the \b clockSource,
//! the \b prescaler is bypassed.
//!
//! \return None.
//!
//
//*****************************************************************************
extern void
STL_OSC_CT_startTest(const STL_OSC_CT_Handle oscTimer2Handle);
//*****************************************************************************
//
//! \brief Stops CPU Timer 2 and checks the elapsed time.
//!
//! \param oscTimer2Handle is a pointer to the Oscillator Timer 2 object.
//!
//! This function stops CPU Timer 2 and then compares the number of ticks that
//! have elapsed with the min and max boundaries. This function is intended to
//! be used in combination with STL_OSC_CT_startTest() to perform a
//! periodic test of the oscillator source.
//!
//! \return If the elapsed number of ticks is not within the min and max
//! boundaries, the function returns \b STL_OSC_CT_FAIL. Otherwise, it
//! returns \b STL_OSC_CT_PASS.
//!
//
//*****************************************************************************
extern uint16_t
STL_OSC_CT_stopTest(const STL_OSC_CT_Handle oscTimer2Handle);
//*****************************************************************************
//
// Close the Doxygen group.
//! @}
//
//*****************************************************************************
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // STL_OSC_CT_H
//
// End of File
//
C2000Ware/libraries/diagnostic/f2838x/include/stl_osc_hr.h
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//#############################################################################
//
// FILE: stl_osc_hr.h
//
// TITLE: Diagnostic Library Oscillator HRPWM software module header
//
//#############################################################################
// $TI Release: C2000 Diagnostic Library v5.00.01 $
// $Release Date: Tue Oct 29 00:57:20 IST 2024 $
// $Copyright:
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//#############################################################################
#ifndef STL_OSC_HR_H
#define STL_OSC_HR_H
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
//
// Includes
//
#include <stdbool.h>
#include "stl_util.h"
#include "hrpwm.h"
#include "sfo_v8.h"
//*****************************************************************************
//
//! \addtogroup stl_osc_hr Oscillator HRPWM API Functions
//!
//! @{
//
//*****************************************************************************
//
// Defines
//
#define STL_OSC_HR_PASS 0U
#define STL_OSC_HR_FAIL 1U
#define STL_OSC_HR_SFO_INCOMPLETE 0 // Calibration is incomplete
#define STL_OSC_HR_SFO_COMPLETE 1 // Calibration is complete
#define STL_OSC_HR_SFO_ERROR 2 // Calibration resulted in MEP steps
// greater than 255
//
//! \brief Defines the OSC HR test object
//!
typedef struct
{
uint32_t ePWMBase; //!< EPWM Base
HRPWM_Channel channel; //!< HRPWM channel
HRPWM_MEPEdgeMode mepEdgeMode; //!< Edge(s) controlled by MEP
int16_t mepMin; //!< MEP lower bound
int16_t mepMax; //!< MEP upper bound
uint32_t sfoDelay; //!< SFO function delay
} STL_OSC_HR_Obj;
//
//! \brief Defines the OSC HR test handle
//!
typedef STL_OSC_HR_Obj * STL_OSC_HR_Handle;
//
// Prototypes
//
//*****************************************************************************
//
//! \brief Tests the HRPWM SFO library's calibration process to ensure
//! execution completion and verify value of MEP scale factor
//!
//! \param oscHRHandle is a pointer to the OSC HR object.
//!
//! This function runs calibration using the SFO Library Software to calculate
//! an appropriate Micro Edge Positioner (MEP) scale factor for HRPWM-supported
//! ePWM modules to verify this value.
//!
//! The ePWM module used for the test is selected by \e ePWMBase member of the
//! OSC HR test object. The valid range of inputs is from EPWM1_BASE to
//! EPWMx_BASE where x is the value specified by PWM_CH - 1. PWM_CH is defined
//! in the SFO library header file SFO_V8.h. The channel member can be
//! configured to select between channels A and B. The \e mepEdgeMode value is
//! configured for the PWM edges to be controlled by MEP. The values \e mepMin
//! and \e mepMax define the minimum and maximum bounds of the expected MEP
//! scale factor range. The expected MEP scale factor for EPWMCLK of 100 MHz,
//! given a step size of 150 ps, is about 66 MEP steps.
//! (1/EPWMCLK)/Step size = (1/100 MHz)/150 ps is about 66.
//!
//! The \e sfoDelay value is the delay count required for the SFO() to finish
//! calibration. The typical EPWM cycles required for SFO() to complete
//! calibration if called repeatedly without interrupts is 130,000
//! EPWMCLK cycles. Please refer to \b Appendix \b A: \b SFO \b Library
//! \b Software of the Technical Reference Manual HRPWM chapter and the device
//! datasheet for more details. The repetition rate at which SFO() needs to be
//! executed depends on the application. If there is not a sufficiently large
//! interval between SFO() calls, the SFO() will return and not advance to the
//! next stage. The execution will only advance to the next stage if the
//! previous call's execution has completed and SFO() is called again. This
//! interval can be experimentally calculated for a particular application.
//!
//! \note The SFO library binary is provided in the C2000Ware calibration
//! libraries. The source code however is not publicly released. It may be
//! made available in some cases upon request through an FAE.
//!
//! \return If the MEP scale factor calculated by the calibration falls within
//! the MEP min and max values, the function returns \b STL_OSC_HR_PASS.
//! If the calibration fails to complete in the specified delay, if SFO()
//! returns an error status, or if the calculated MEP scale factor is outside
//! the range, this function returns \b STL_OSC_HR_FAIL.
//
//*****************************************************************************
extern uint16_t STL_OSC_HR_testSFO(const STL_OSC_HR_Handle oscHRHandle);
//*****************************************************************************
//
// Close the Doxygen group.
//! @}
//
//*****************************************************************************
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // STL_OSC_HR_H
//
// End of File
//
C2000Ware/libraries/diagnostic/f2838x/include/stl_pie_ram.h
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//###########################################################################
//
// FILE: stl_pie_ram.h
//
// TITLE: Diagnostic Library PIE RAM software module header
//
//###########################################################################
// $TI Release: C2000 Diagnostic Library v5.00.01 $
// $Release Date: Tue Oct 29 00:57:20 IST 2024 $
// $Copyright:
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//###########################################################################
#ifndef STL_PIE_RAM_H
#define STL_PIE_RAM_H
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
//
// Includes
//
#include <stdbool.h>
#include <stdint.h>
#include "cpu.h"
#include "inc/hw_types.h"
#include "inc/hw_memmap.h"
#include "debug.h"
#include "sysctl.h"
//*****************************************************************************
//
//! \addtogroup stl_pie_ram PIE RAM API Functions
//!
//! @{
//
//*****************************************************************************
//
// Defines
//
#define STL_PIE_RAM_PASS 0U
#define STL_PIE_RAM_FAIL_HANDLER 1U
#define STL_PIE_RAM_MIN_INDEX 0x6U // Skip EMU boot config regs
#define STL_PIE_RAM_MAX_INDEX 0x1C0U
#define STL_PIE_RAM_REDUNDANT_PIE_ADDRESS 0x1000D00UL
#define STL_PIE_RAM_TABLE_ROW_M 0x00FFU
#define STL_PIE_RAM_TABLE_COL_M 0xFF00U
#define STL_PIE_RAM_TABLE_COL_S 8U
#define STL_PIE_RAM_VECT_ID_M 0xFFFF0000UL
#define STL_PIE_RAM_VECT_ID_S 16U
//*****************************************************************************
//
//! PIE RAM mismatch error handler used by STL_PIE_RAM_testHandler().
//!
//! This function sets a static global flag for STL_PIE_RAM_testHandler()
//! and also sets the global error flag for the STL library.
//!
//! \return None.
//
//*****************************************************************************
extern void STL_PIE_RAM_handler(void);
//*****************************************************************************
//
//! Configures a vector mismatch handler.
//!
//! \param handlerPtr is a pointer or address of the PIE RAM vector mismatch
//! error exception handler.
//!
//! This function configures a PIE RAM mismatch error handler for the users
//! application. On a vector fetch mismatch, an exception will be taken and
//! the error handler will be executed.
//!
//! \return None.
//
//*****************************************************************************
extern void STL_PIE_RAM_configHandler(const void *handlerPtr);
//*****************************************************************************
//
//! Injects a fault by bit-flipping an entry in the redundant PIE RAM vector
//! table.
//!
//! \param entry is an index of the PIE RAM and should be a multiple of 2
//! for 32-bit alignment.
//!
//! This function bit-flips an entry of the redundant PIE RAM vector table in
//! order to inject a fault. The \b entry parameter must be within the
//! boundaries \b STL_PIE_RAM_MIN_INDEX and \b STL_PIE_RAM_MAX_INDEX.
//!
//! Data writes to the redundant PIE vector table write only to the redundant
//! table. This is how a fault may be injected. For more details see the
//! device's Technical Reference Manual chapter on "Vector Address Validity
//! Check."
//!
//! \return None.
//
//*****************************************************************************
extern void STL_PIE_RAM_injectFault(const uint16_t entry);
//*****************************************************************************
//
//! Restores a PIE RAM redundant vector entry from the PIE RAM vector table.
//!
//! \param entry is an index of the PIE RAM and should be a multiple of 2
//! for 32-bit alignment.
//!
//! This function restores the PIE RAM vector entry and consequently the
//! redundant PIE RAM vector table.
//!
//! \note This function can be used to restore the fault injected by
//! \b STL_PIE_RAM_injectFault().
//!
//! \return None.
//
//*****************************************************************************
extern void STL_PIE_RAM_restoreVector(const uint16_t entry);
//*****************************************************************************
//
//! Restores the PIE RAM from the initialization source.
//!
//! \param pieTableSourcePtr is a pointer to the source of the PIE vector table
//! in the user's application.
//!
//! This function restores the PIE RAM vector table and consequently the
//! redundant PIE RAM vector table.
//!
//! \note This function restores the entire PIE RAM table and not just a single
//! vector entry.
//!
//! \return None.
//
//*****************************************************************************
extern void STL_PIE_RAM_restoreTable(const uint32_t *pieTableSourcePtr);
//*****************************************************************************
//
//! Tests PIE RAM integrity.
//!
//! This function checks the integrity of PIE RAM vector by comparing the
//! entries in the main PIE vector with the redundant PIE vector located at a
//! higher memory address location. There is a redundant PIE RAM vector table
//! starting at 0X1000D00 which is used for data integrity of the PIE. Data
//! writes to the PIE vector table also write to the redundant PIE vector
//! table. For more details see the device's Technical Reference Manual chapter
//! on "PIE Vector Address Validity Check."
//!
//! \note The user may call STL_PIE_RAM_configHandler() in order to register an
//! error handler for PIE RAM mismatch.
//! \note A failure of this test will not trigger the PIE RAM mismatch handler.
//! Only when a vector is fetched in the PIE and there is a mismatch will the
//! handler be serviced.
//!
//! \return If the test passes, it returns \b STL_PIE_RAM_TEST_PASS. If the
//! test fails, it returns the address in the PIE vector table of the last
//! failure.
//
//*****************************************************************************
extern uint16_t STL_PIE_RAM_testRAM(void);
//*****************************************************************************
//
//! Tests PIE RAM integrity.
//!
//! \param interruptNumber is the 32-bit interrupt value used in the interrupt
//! driver found in hw_ints.h.
//!
//! This function checks the functionality of the PIE RAM mismatch error
//! handler. It will inject an error for the input interrupt, enable the
//! interrupt, and force the interrupt. It will then check to see that the error
//! handler was serviced properly. Afterward, it will restore the PIE RAM and
//! and restore the original error handler. It will also acknowledge the PIE
//! so that further interrupts from that group can be serviced.
//!
//! \note This test only covers PIE interrupts. This test does not cover CPU
//! interrupts.
//!
//! \return If the test passes, it returns \b STL_PIE_RAM_PASS. If the test
//! fails, and the error handler was not serviced, then it returns
//! \b STL_PIE_RAM_FAIL_HANDLER.
//
//*****************************************************************************
extern uint16_t STL_PIE_RAM_testHandler(const uint32_t interruptNumber);
//*****************************************************************************
//
// Close the Doxygen group.
//! @}
//
//*****************************************************************************
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // STL_PIE_RAM_H
C2000Ware/libraries/diagnostic/f2838x/include/stl_util.h
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//#############################################################################
//
// FILE: stl_util.h
//
// TITLE: Diagnostic Library Utility software module header
//
//#############################################################################
// $TI Release: C2000 Diagnostic Library v5.00.01 $
// $Release Date: Tue Oct 29 00:57:20 IST 2024 $
// $Copyright:
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//#############################################################################
#ifndef STL_UTIL_H
#define STL_UTIL_H
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
//
// Includes
//
#include <stdbool.h>
#include <stdint.h>
#include "inc/hw_ints.h"
#include "sysctl.h"
//*****************************************************************************
//
//! \addtogroup stl_util Utilities API Functions
//!
//! @{
//
//*****************************************************************************
//
// Defines
//
#define STL_UTIL_CPU_RATE 5.00f // for a 200MHz CPU clock speed (SYSCLKOUT)
//#define STL_UTIL_CPU_RATE 5.263f // for a 190MHz CPU clock speed (SYSCLKOUT)
//#define STL_UTIL_CPU_RATE 5.556f // for a 180MHz CPU clock speed (SYSCLKOUT)
//#define STL_UTIL_CPU_RATE 5.882f // for a 170MHz CPU clock speed (SYSCLKOUT)
//#define STL_UTIL_CPU_RATE 6.250f // for a 160MHz CPU clock speed (SYSCLKOUT)
//#define STL_UTIL_CPU_RATE 6.667f // for a 150MHz CPU clock speed (SYSCLKOUT)
//#define STL_UTIL_CPU_RATE 7.143f // for a 140MHz CPU clock speed (SYSCLKOUT)
//#define STL_UTIL_CPU_RATE 7.692f // for a 130MHz CPU clock speed (SYSCLKOUT)
//#define STL_UTIL_CPU_RATE 8.333f // for a 120MHz CPU clock speed (SYSCLKOUT)
//
// Offset of the NMI vector in the PIE vector table
//
#define STL_UTIL_PIEVECTTABLE_NMI ((INT_NMI >> 16) * 2U)
//
// Typedefs
//
//! Values to be passed to STL_Util_setErrorFlag() and
//! STL_Util_clearErrorFlag(). These correspond to different errors in the STL.
//
typedef enum
{
//! CRC check
STL_UTIL_CRC = 0x00000001UL,
//! CPU register test
STL_UTIL_CPU_REG = 0x00000002UL,
//! FPU register test
STL_UTIL_FPU_REG = 0x00000004UL,
//! VCRC register test
STL_UTIL_VCRC_REG = 0x00000008UL,
//! PIE RAM
STL_UTIL_PIE_RAM_MISMATCH = 0x00000010UL,
//! PIE RAM handler failed to execute
STL_UTIL_PIE_RAM_INT = 0x00000020UL,
//! OSC timer 2
STL_UTIL_OSC_TIMER2 = 0x00000040UL,
//! MEP out of range
STL_UTIL_OSC_HR_MEP_RANGE = 0x00000080UL,
//! SFO calibration error
STL_UTIL_OSC_HR_SFO = 0x00000100UL,
//! SFO delay error
STL_UTIL_OSC_HR_DELAY = 0x00000200UL,
//! March RAM test
STL_UTIL_MARCH = 0x00000400UL,
//! March test for CAN message RAM
STL_UTIL_CAN_RAM_PARITY = 0x00000800UL,
//! March test for MCAN message RAM
STL_UTIL_MCAN_RAM_ECC = 0x00010000UL,
//! HWBIST NMI test
STL_UTIL_HWBIST_NMI_TEST = 0x00001000UL,
//! HWBIST fail
STL_UTIL_HWBIST_FAIL = 0x00002000UL,
//! HWBIST NMI interrupt
STL_UTIL_HWBIST_NMI_INT = 0x00004000UL,
//! HWBIST over-run
STL_UTIL_HWBIST_OVERRUN = 0x00008000UL,
STL_UTIL_ALL_ERRORS = 0xFFFFFFFFUL
} STL_Util_ErrorFlag;
//*****************************************************************************
//
//! Delay for a specified number of microseconds
//!
//! \param microseconds is the number of microseconds to delay.
//!
//! This function calls SysCtl_delay() to achieve a delay in microseconds. The
//! function will convert the desired delay in microseconds to the count value
//! expected by the function. \e microseconds is the number of microseconds to
//! delay.
//!
//! \note If this function does not get inlined (for instance, if the optimizer
//! is turned off) the delay will be made less accurate by the overhead of the
//! additional function call.
//!
//! \return None.
//*****************************************************************************
#ifndef __cplusplus
#pragma CODE_SECTION(STL_Util_delayUS, ".TI.ramfunc")
#else
#pragma CODE_SECTION(".TI.ramfunc");
#endif
static inline void STL_Util_delayUS(uint32_t microseconds)
{
uint32_t delay = (uint32_t)(((((float32_t)microseconds * 1000.0f) /
(float32_t)STL_UTIL_CPU_RATE) - 9.0f) / 5.0f);
SysCtl_delay(delay);
}
//*****************************************************************************
//
//! Sets a global error flag.
//!
//! \param errorFlag is a STL_Util_ErrorFlag that will be set in
//! globalErrorFlags.
//!
//! This function sets an error flag in the global globalErrorFlags.
//!
//! \return None.
//
//*****************************************************************************
extern void STL_Util_setErrorFlag(const STL_Util_ErrorFlag errorFlag);
//*****************************************************************************
//
//! Gets the error flag status of globalErrorFlags.
//!
//! This function returns the global globalErrorFlags.
//!
//! \return Returns the global globalErrorFlags.
//
//*****************************************************************************
extern uint32_t STL_Util_getErrorFlag(void);
//*****************************************************************************
//
//! Clears a flag of globalErrorFlags.
//!
//! \param errorFlag is a STL_Util_ErrorFlag that will be cleared in
//! globalErrorFlags.
//!
//! This function clears a flag of globalErrorFlags.
//!
//! \return None.
//
//*****************************************************************************
extern void STL_Util_clearErrorFlag(const STL_Util_ErrorFlag errorFlag);
//*****************************************************************************
//
// Close the Doxygen group.
//! @}
//
//*****************************************************************************
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // STL_UTIL_H
//
// End of File
//