444 lines
14 KiB
C
444 lines
14 KiB
C
//#############################################################################
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//
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// FILE: device.c
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//
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// TITLE: Device setup for examples.
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//
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//#############################################################################
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//
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// $Release Date: $
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// $Copyright:
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// Copyright (C) 2014-2024 Texas Instruments Incorporated - http://www.ti.com/
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// $
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//#############################################################################
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//
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// Included Files
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//
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#include "device.h"
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#include "driverlib.h"
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#ifdef __cplusplus
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using std::memcpy;
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#endif
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#ifdef CMDTOOL
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#include "device_cmd.h"
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#endif
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#define PASS 0
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#define FAIL 1
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uint32_t Example_Result = FAIL;
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uint32_t Example_PassCount = 0;
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uint32_t Example_Fail = 0;
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//*****************************************************************************
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//
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// Function to initialize the device. Primarily initializes system control to a
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// known state by disabling the watchdog, setting up the SYSCLKOUT frequency,
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// and enabling the clocks to the peripherals.
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//
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//*****************************************************************************
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void Device_init(void)
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{
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//
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// Disable the watchdog
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//
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SysCtl_disableWatchdog();
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#ifdef CMDTOOL
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CMD_init();
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#endif
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#ifdef _FLASH
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#ifndef CMDTOOL
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//
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// Copy time critical code and flash setup code to RAM. This includes the
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// following functions: InitFlash();
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//
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// The RamfuncsLoadStart, RamfuncsLoadSize, and RamfuncsRunStart symbols
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// are created by the linker. Refer to the device .cmd file.
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//
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memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);
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#endif
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//
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// Call Flash Initialization to setup flash waitstates. This function must
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// reside in RAM.
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//
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Flash_initModule(FLASH0CTRL_BASE, FLASH0ECC_BASE, DEVICE_FLASH_WAITSTATES);
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#endif
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#ifdef CPU1
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//
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// Configure Analog Trim in case of untrimmed or TMX sample
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//
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if((SysCtl_getDeviceParametric(SYSCTL_DEVICE_QUAL) == 0x0U) &&
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(HWREGH(ANALOGSUBSYS_BASE + ASYSCTL_O_ANAREFTRIMA) == 0x0U))
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{
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Device_configureTMXAnalogTrim();
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}
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//
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// Set up PLL control and clock dividers
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//
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SysCtl_setClock(DEVICE_SETCLOCK_CFG);
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//
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// Make sure the LSPCLK divider is set to the default (divide by 4)
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//
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SysCtl_setLowSpeedClock(SYSCTL_LSPCLK_PRESCALE_4);
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//
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// These asserts will check that the #defines for the clock rates in
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// device.h match the actual rates that have been configured. If they do
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// not match, check that the calculations of DEVICE_SYSCLK_FREQ and
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// DEVICE_LSPCLK_FREQ are accurate. Some examples will not perform as
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// expected if these are not correct.
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//
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ASSERT(SysCtl_getClock(DEVICE_OSCSRC_FREQ) == DEVICE_SYSCLK_FREQ);
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ASSERT(SysCtl_getLowSpeedClock(DEVICE_OSCSRC_FREQ) == DEVICE_LSPCLK_FREQ);
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#ifndef _FLASH
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//
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// Call Device_cal function when run using debugger
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// This function is called as part of the Boot code. The function is called
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// in the Device_init function since during debug time resets, the boot code
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// will not be executed and the gel script will reinitialize all the
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// registers and the calibrated values will be lost.
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// Sysctl_deviceCal is a wrapper function for Device_Cal
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//
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SysCtl_deviceCal();
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#endif
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#endif
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//
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// Turn on all peripherals
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//
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Device_enableAllPeripherals();
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//
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// Initialize result parameter as FAIL
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//
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Example_Result = FAIL;
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}
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//*****************************************************************************
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//
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// Function to turn on all peripherals, enabling reads and writes to the
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// peripherals' registers.
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//
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// Note that to reduce power, unused peripherals should be disabled.
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//
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//*****************************************************************************
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void Device_enableAllPeripherals(void)
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{
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLA1);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DMA);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TIMER0);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TIMER1);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TIMER2);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_HRPWM);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TBCLKSYNC);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EMIF1);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EMIF2);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM1);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM2);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM3);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM4);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM5);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM6);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM7);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM8);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM9);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM10);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM11);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM12);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP1);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP2);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP3);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP4);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP5);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP6);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EQEP1);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EQEP2);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EQEP3);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SD1);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SD2);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SCIA);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SCIB);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SCIC);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SCID);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SPIA);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SPIB);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SPIC);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_I2CA);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_I2CB);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CANA);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CANB);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_MCBSPA);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_MCBSPB);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_USBA);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_UPPA);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCA);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCB);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCC);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCD);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS1);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS2);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS3);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS4);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS5);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS6);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS7);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS8);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DACA);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DACB);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DACC);
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}
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//*****************************************************************************
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//
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// Function to disable pin locks on GPIOs.
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//
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//*****************************************************************************
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void Device_initGPIO(void)
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{
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//
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// Disable pin locks.
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//
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GPIO_unlockPortConfig(GPIO_PORT_A, 0xFFFFFFFF);
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GPIO_unlockPortConfig(GPIO_PORT_B, 0xFFFFFFFF);
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GPIO_unlockPortConfig(GPIO_PORT_C, 0xFFFFFFFF);
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GPIO_unlockPortConfig(GPIO_PORT_D, 0xFFFFFFFF);
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GPIO_unlockPortConfig(GPIO_PORT_E, 0xFFFFFFFF);
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GPIO_unlockPortConfig(GPIO_PORT_F, 0xFFFFFFFF);
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//
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// Enable GPIO Pullups
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//
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Device_enableUnbondedGPIOPullups();
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}
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//*****************************************************************************
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//
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// Function to enable pullups for the unbonded GPIOs on the 176PTP package:
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// GPIOs Grp Bits
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// 95-132 C 31
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// D 31:0
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// E 4:0
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// 134-168 E 31:6
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// F 8:0
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//
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//*****************************************************************************
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void Device_enableUnbondedGPIOPullupsFor176Pin(void)
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{
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EALLOW;
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HWREG(GPIOCTRL_BASE + GPIO_O_GPCPUD) = ~0x80000000U;
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HWREG(GPIOCTRL_BASE + GPIO_O_GPDPUD) = ~0xFFFFFFF7U;
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HWREG(GPIOCTRL_BASE + GPIO_O_GPEPUD) = ~0xFFFFFFDFU;
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HWREG(GPIOCTRL_BASE + GPIO_O_GPFPUD) = ~0x000001FFU;
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EDIS;
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}
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//*****************************************************************************
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//
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// Function to enable pullups for the unbonded GPIOs on the 100PZ package:
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// GPIOs Grp Bits
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// 0-1 A 1:0
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// 5-9 A 9:5
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// 22-40 A 31:22
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// B 8:0
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// 44-57 B 25:12
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// 67-68 C 4:3
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// 74-77 C 13:10
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// 79-83 C 19:15
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// 93-168 C 31:29
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// D 31:0
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// E 31:0
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// F 8:0
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//
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//*****************************************************************************
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void Device_enableUnbondedGPIOPullupsFor100Pin(void)
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{
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EALLOW;
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HWREG(GPIOCTRL_BASE + GPIO_O_GPAPUD) = ~0xFFC003E3U;
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HWREG(GPIOCTRL_BASE + GPIO_O_GPBPUD) = ~0x03FFF1FFU;
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HWREG(GPIOCTRL_BASE + GPIO_O_GPCPUD) = ~0xE10FBC18U;
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HWREG(GPIOCTRL_BASE + GPIO_O_GPDPUD) = ~0xFFFFFFF7U;
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HWREG(GPIOCTRL_BASE + GPIO_O_GPEPUD) = ~0xFFFFFFFFU;
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HWREG(GPIOCTRL_BASE + GPIO_O_GPFPUD) = ~0x000001FFU;
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EDIS;
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}
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//*****************************************************************************
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//
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// Function to enable pullups for the unbonded GPIOs on the 100PZ or
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// 176PTP package.
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//
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//*****************************************************************************
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void Device_enableUnbondedGPIOPullups(void)
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{
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//
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// bits 8-10 have pin count
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//
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uint16_t pinCount = ((HWREG(DEVCFG_BASE + SYSCTL_O_PARTIDL) &
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(uint32_t)SYSCTL_PARTIDL_PIN_COUNT_M) >>
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SYSCTL_PARTIDL_PIN_COUNT_S);
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/*
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* 5 = 100 pin
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* 6 = 176 pin
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* 7 = 337 pin
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*/
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if(pinCount == 5)
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{
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Device_enableUnbondedGPIOPullupsFor100Pin();
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}
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else if(pinCount == 6)
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{
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Device_enableUnbondedGPIOPullupsFor176Pin();
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}
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else
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{
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//
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// Do nothing - this is 337 pin package
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//
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}
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}
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//*****************************************************************************
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//
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// Function to implement Analog trim of TMX devices
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//
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//*****************************************************************************
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void Device_configureTMXAnalogTrim(void)
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{
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//
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// Enable ADC clock
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//
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCA);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCB);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCC);
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SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCD);
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//
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// Configure ADC reference trim for TMX devices
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//
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EALLOW;
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HWREGH(ANALOGSUBSYS_BASE + ASYSCTL_O_ANAREFTRIMA) = 0x7BDDU;
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HWREGH(ANALOGSUBSYS_BASE + ASYSCTL_O_ANAREFTRIMB) = 0x7BDDU;
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HWREGH(ANALOGSUBSYS_BASE + ASYSCTL_O_ANAREFTRIMC) = 0x7BDDU;
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HWREGH(ANALOGSUBSYS_BASE + ASYSCTL_O_ANAREFTRIMD) = 0x7BDDU;
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//
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// Configure ADC offset trim. The user should generate the trim values
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// by following the instructions in the "ADC Zero Offset Calibration"
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// section in device TRM. The below lines needs to be uncommented and
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// updated with the correct trim values.
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//
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// HWREGH(ADCA_BASE + ADC_O_OFFTRIM) = 0x0U;
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// HWREGH(ADCB_BASE + ADC_O_OFFTRIM) = 0x0U;
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// HWREGH(ADCC_BASE + ADC_O_OFFTRIM) = 0x0U;
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// HWREGH(ADCD_BASE + ADC_O_OFFTRIM) = 0x0U;
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//
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// Configure internal oscillator trim. If the internal oscillator trim
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// contains all zeros, the user can adjust the lowest 10 bits of the
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// oscillator trim register between 1 (minimum) and 1023 (maximum)
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// while observing the system clock on the XCLOCKOUT pin. The below
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// lines needs to be uncommented and updated with the correct trim values.
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//
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// if(HWREGH(ANALOGSUBSYS_BASE + ASYSCTL_O_INTOSC1TRIM) == 0x0U)
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// {
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// HWREGH(ANALOGSUBSYS_BASE + ASYSCTL_O_INTOSC1TRIM) = 0x0U;
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// }
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// if( HWREGH(ANALOGSUBSYS_BASE + ASYSCTL_O_INTOSC2TRIM) = 0x0U)
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// {
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// HWREGH(ANALOGSUBSYS_BASE + ASYSCTL_O_INTOSC2TRIM) = 0x0U;
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// }
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EDIS;
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//
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// Disable ADC clock
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//
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SysCtl_disablePeripheral(SYSCTL_PERIPH_CLK_ADCA);
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SysCtl_disablePeripheral(SYSCTL_PERIPH_CLK_ADCB);
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SysCtl_disablePeripheral(SYSCTL_PERIPH_CLK_ADCC);
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SysCtl_disablePeripheral(SYSCTL_PERIPH_CLK_ADCD);
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}
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//*****************************************************************************
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//
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// Error handling function to be called when an ASSERT is violated
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//
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//*****************************************************************************
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void __error__(const char *filename, uint32_t line)
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{
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//
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// An ASSERT condition was evaluated as false. You can use the filename and
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// line parameters to determine what went wrong.
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//
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ESTOP0;
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}
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void Example_setResultPass(void)
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{
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Example_Result = PASS;
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}
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void Example_setResultFail(void)
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{
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Example_Result = FAIL;
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}
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void Example_done(void)
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{
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while(1);
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}
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